5dcb9116db1d38db6753b15f2be69c6190925c75
[cascardo/linux.git] / drivers / staging / rtl8192ee / rtl8192ee / rf.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2009-2010  Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * The full GNU General Public License is included in this distribution in the
15  * file called LICENSE.
16  *
17  * Contact Information:
18  * wlanfae <wlanfae@realtek.com>
19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20  * Hsinchu 300, Taiwan.
21  *
22  * Larry Finger <Larry.Finger@lwfinger.net>
23  *
24  *****************************************************************************/
25
26 #include "../wifi.h"
27 #include "reg.h"
28 #include "def.h"
29 #include "phy.h"
30 #include "rf.h"
31 #include "dm.h"
32
33 static bool _rtl92ee_phy_rf6052_config_parafile(struct ieee80211_hw *hw);
34
35 void rtl92ee_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth)
36 {
37         struct rtl_priv *rtlpriv = rtl_priv(hw);
38         struct rtl_phy *rtlphy = &(rtlpriv->phy);
39
40         switch (bandwidth) {
41         case HT_CHANNEL_WIDTH_20:
42                 rtlphy->rfreg_chnlval[0] = ((rtlphy->rfreg_chnlval[0] &
43                                              0xfffff3ff) | BIT(10) | BIT(11));
44                 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,
45                               rtlphy->rfreg_chnlval[0]);
46                 rtl_set_rfreg(hw, RF90_PATH_B, RF_CHNLBW, RFREG_OFFSET_MASK,
47                               rtlphy->rfreg_chnlval[0]);
48                 break;
49         case HT_CHANNEL_WIDTH_20_40:
50                 rtlphy->rfreg_chnlval[0] = ((rtlphy->rfreg_chnlval[0] &
51                                              0xfffff3ff) | BIT(10));
52                 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,
53                               rtlphy->rfreg_chnlval[0]);
54                 rtl_set_rfreg(hw, RF90_PATH_B, RF_CHNLBW, RFREG_OFFSET_MASK,
55                               rtlphy->rfreg_chnlval[0]);
56                 break;
57         default:
58                 RT_TRACE(COMP_ERR, DBG_EMERG, "unknown bandwidth: %#X\n",
59                          bandwidth);
60                 break;
61         }
62 }
63
64 bool rtl92ee_phy_rf6052_config(struct ieee80211_hw *hw)
65 {
66         struct rtl_priv *rtlpriv = rtl_priv(hw);
67         struct rtl_phy *rtlphy = &(rtlpriv->phy);
68
69         if (rtlphy->rf_type == RF_1T1R)
70                 rtlphy->num_total_rfpath = 1;
71         else
72                 rtlphy->num_total_rfpath = 2;
73         return _rtl92ee_phy_rf6052_config_parafile(hw);
74 }
75
76 static bool _rtl92ee_phy_rf6052_config_parafile(struct ieee80211_hw *hw)
77 {
78         struct rtl_priv *rtlpriv = rtl_priv(hw);
79         struct rtl_phy *rtlphy = &(rtlpriv->phy);
80         u32 u4_regvalue = 0;
81         u8 rfpath;
82         bool rtstatus = true;
83         struct bb_reg_def *pphyreg;
84
85         for (rfpath = 0; rfpath < rtlphy->num_total_rfpath; rfpath++) {
86                 pphyreg = &rtlphy->phyreg_def[rfpath];
87
88                 switch (rfpath) {
89                 case RF90_PATH_A:
90                 case RF90_PATH_C:
91                         u4_regvalue = rtl_get_bbreg(hw, pphyreg->rfintfs,
92                                                     BRFSI_RFENV);
93                         break;
94                 case RF90_PATH_B:
95                 case RF90_PATH_D:
96                         u4_regvalue = rtl_get_bbreg(hw, pphyreg->rfintfs,
97                                                     BRFSI_RFENV << 16);
98                         break;
99                 }
100
101                 rtl_set_bbreg(hw, pphyreg->rfintfe, BRFSI_RFENV << 16, 0x1);
102                 udelay(1);
103
104                 rtl_set_bbreg(hw, pphyreg->rfintfo, BRFSI_RFENV, 0x1);
105                 udelay(1);
106
107                 rtl_set_bbreg(hw, pphyreg->rfhssi_para2,
108                               B3WIREADDREAALENGTH, 0x0);
109                 udelay(1);
110
111                 rtl_set_bbreg(hw, pphyreg->rfhssi_para2, B3WIREDATALENGTH, 0x0);
112                 udelay(1);
113
114                 switch (rfpath) {
115                 case RF90_PATH_A:
116                         rtstatus = rtl92ee_phy_config_rf_with_headerfile(hw,
117                                                        (enum radio_path)rfpath);
118                         break;
119                 case RF90_PATH_B:
120                         rtstatus = rtl92ee_phy_config_rf_with_headerfile(hw,
121                                                        (enum radio_path)rfpath);
122                         break;
123                 case RF90_PATH_C:
124                         break;
125                 case RF90_PATH_D:
126                         break;
127                 }
128
129                 switch (rfpath) {
130                 case RF90_PATH_A:
131                 case RF90_PATH_C:
132                         rtl_set_bbreg(hw, pphyreg->rfintfs,
133                                       BRFSI_RFENV, u4_regvalue);
134                         break;
135                 case RF90_PATH_B:
136                 case RF90_PATH_D:
137                         rtl_set_bbreg(hw, pphyreg->rfintfs,
138                                       BRFSI_RFENV << 16, u4_regvalue);
139                         break;
140                 }
141                 if (!rtstatus) {
142                         RT_TRACE(COMP_INIT, DBG_TRACE, "Radio[%d] Fail!!\n",
143                                  rfpath);
144                         return false;
145                 }
146         }
147
148         RT_TRACE(COMP_INIT, DBG_TRACE, "\n");
149         return rtstatus;
150 }