Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
[cascardo/linux.git] / drivers / tty / serial / of_serial.c
1 /*
2  *  Serial Port driver for Open Firmware platform devices
3  *
4  *    Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
5  *
6  *  This program is free software; you can redistribute it and/or
7  *  modify it under the terms of the GNU General Public License
8  *  as published by the Free Software Foundation; either version
9  *  2 of the License, or (at your option) any later version.
10  *
11  */
12 #include <linux/module.h>
13 #include <linux/slab.h>
14 #include <linux/delay.h>
15 #include <linux/serial_core.h>
16 #include <linux/serial_reg.h>
17 #include <linux/of_address.h>
18 #include <linux/of_irq.h>
19 #include <linux/of_platform.h>
20 #include <linux/nwpserial.h>
21 #include <linux/clk.h>
22
23 #include "8250/8250.h"
24
25 struct of_serial_info {
26         struct clk *clk;
27         int type;
28         int line;
29 };
30
31 #ifdef CONFIG_ARCH_TEGRA
32 void tegra_serial_handle_break(struct uart_port *p)
33 {
34         unsigned int status, tmout = 10000;
35
36         do {
37                 status = p->serial_in(p, UART_LSR);
38                 if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
39                         status = p->serial_in(p, UART_RX);
40                 else
41                         break;
42                 if (--tmout == 0)
43                         break;
44                 udelay(1);
45         } while (1);
46 }
47 #else
48 static inline void tegra_serial_handle_break(struct uart_port *port)
49 {
50 }
51 #endif
52
53 /*
54  * Fill a struct uart_port for a given device node
55  */
56 static int of_platform_serial_setup(struct platform_device *ofdev,
57                         int type, struct uart_port *port,
58                         struct of_serial_info *info)
59 {
60         struct resource resource;
61         struct device_node *np = ofdev->dev.of_node;
62         u32 clk, spd, prop;
63         int ret;
64
65         memset(port, 0, sizeof *port);
66         if (of_property_read_u32(np, "clock-frequency", &clk)) {
67
68                 /* Get clk rate through clk driver if present */
69                 info->clk = clk_get(&ofdev->dev, NULL);
70                 if (IS_ERR(info->clk)) {
71                         dev_warn(&ofdev->dev,
72                                 "clk or clock-frequency not defined\n");
73                         return PTR_ERR(info->clk);
74                 }
75
76                 clk_prepare_enable(info->clk);
77                 clk = clk_get_rate(info->clk);
78         }
79         /* If current-speed was set, then try not to change it. */
80         if (of_property_read_u32(np, "current-speed", &spd) == 0)
81                 port->custom_divisor = clk / (16 * spd);
82
83         ret = of_address_to_resource(np, 0, &resource);
84         if (ret) {
85                 dev_warn(&ofdev->dev, "invalid address\n");
86                 goto out;
87         }
88
89         spin_lock_init(&port->lock);
90         port->mapbase = resource.start;
91
92         /* Check for shifted address mapping */
93         if (of_property_read_u32(np, "reg-offset", &prop) == 0)
94                 port->mapbase += prop;
95
96         /* Check for registers offset within the devices address range */
97         if (of_property_read_u32(np, "reg-shift", &prop) == 0)
98                 port->regshift = prop;
99
100         /* Check for fifo size */
101         if (of_property_read_u32(np, "fifo-size", &prop) == 0)
102                 port->fifosize = prop;
103
104         port->irq = irq_of_parse_and_map(np, 0);
105         port->iotype = UPIO_MEM;
106         if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
107                 switch (prop) {
108                 case 1:
109                         port->iotype = UPIO_MEM;
110                         break;
111                 case 4:
112                         port->iotype = UPIO_MEM32;
113                         break;
114                 default:
115                         dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
116                                  prop);
117                         ret = -EINVAL;
118                         goto out;
119                 }
120         }
121
122         port->type = type;
123         port->uartclk = clk;
124         port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
125                 | UPF_FIXED_PORT | UPF_FIXED_TYPE;
126
127         if (of_find_property(np, "no-loopback-test", NULL))
128                 port->flags |= UPF_SKIP_TEST;
129
130         port->dev = &ofdev->dev;
131
132         if (type == PORT_TEGRA)
133                 port->handle_break = tegra_serial_handle_break;
134
135         return 0;
136 out:
137         if (info->clk)
138                 clk_disable_unprepare(info->clk);
139         return ret;
140 }
141
142 /*
143  * Try to register a serial port
144  */
145 static struct of_device_id of_platform_serial_table[];
146 static int of_platform_serial_probe(struct platform_device *ofdev)
147 {
148         const struct of_device_id *match;
149         struct of_serial_info *info;
150         struct uart_port port;
151         int port_type;
152         int ret;
153
154         match = of_match_device(of_platform_serial_table, &ofdev->dev);
155         if (!match)
156                 return -EINVAL;
157
158         if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL))
159                 return -EBUSY;
160
161         info = kzalloc(sizeof(*info), GFP_KERNEL);
162         if (info == NULL)
163                 return -ENOMEM;
164
165         port_type = (unsigned long)match->data;
166         ret = of_platform_serial_setup(ofdev, port_type, &port, info);
167         if (ret)
168                 goto out;
169
170         switch (port_type) {
171 #ifdef CONFIG_SERIAL_8250
172         case PORT_8250 ... PORT_MAX_8250:
173         {
174                 struct uart_8250_port port8250;
175                 memset(&port8250, 0, sizeof(port8250));
176                 port.type = port_type;
177                 port8250.port = port;
178
179                 if (port.fifosize)
180                         port8250.capabilities = UART_CAP_FIFO;
181
182                 if (of_property_read_bool(ofdev->dev.of_node,
183                                           "auto-flow-control"))
184                         port8250.capabilities |= UART_CAP_AFE;
185
186                 ret = serial8250_register_8250_port(&port8250);
187                 break;
188         }
189 #endif
190 #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
191         case PORT_NWPSERIAL:
192                 ret = nwpserial_register_port(&port);
193                 break;
194 #endif
195         default:
196                 /* need to add code for these */
197         case PORT_UNKNOWN:
198                 dev_info(&ofdev->dev, "Unknown serial port found, ignored\n");
199                 ret = -ENODEV;
200                 break;
201         }
202         if (ret < 0)
203                 goto out;
204
205         info->type = port_type;
206         info->line = ret;
207         platform_set_drvdata(ofdev, info);
208         return 0;
209 out:
210         kfree(info);
211         irq_dispose_mapping(port.irq);
212         return ret;
213 }
214
215 /*
216  * Release a line
217  */
218 static int of_platform_serial_remove(struct platform_device *ofdev)
219 {
220         struct of_serial_info *info = platform_get_drvdata(ofdev);
221         switch (info->type) {
222 #ifdef CONFIG_SERIAL_8250
223         case PORT_8250 ... PORT_MAX_8250:
224                 serial8250_unregister_port(info->line);
225                 break;
226 #endif
227 #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
228         case PORT_NWPSERIAL:
229                 nwpserial_unregister_port(info->line);
230                 break;
231 #endif
232         default:
233                 /* need to add code for these */
234                 break;
235         }
236
237         if (info->clk)
238                 clk_disable_unprepare(info->clk);
239         kfree(info);
240         return 0;
241 }
242
243 /*
244  * A few common types, add more as needed.
245  */
246 static struct of_device_id of_platform_serial_table[] = {
247         { .compatible = "ns8250",   .data = (void *)PORT_8250, },
248         { .compatible = "ns16450",  .data = (void *)PORT_16450, },
249         { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
250         { .compatible = "ns16550",  .data = (void *)PORT_16550, },
251         { .compatible = "ns16750",  .data = (void *)PORT_16750, },
252         { .compatible = "ns16850",  .data = (void *)PORT_16850, },
253         { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
254         { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
255         { .compatible = "altr,16550-FIFO32",
256                 .data = (void *)PORT_ALTR_16550_F32, },
257         { .compatible = "altr,16550-FIFO64",
258                 .data = (void *)PORT_ALTR_16550_F64, },
259         { .compatible = "altr,16550-FIFO128",
260                 .data = (void *)PORT_ALTR_16550_F128, },
261 #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
262         { .compatible = "ibm,qpace-nwp-serial",
263                 .data = (void *)PORT_NWPSERIAL, },
264 #endif
265         { .type = "serial",         .data = (void *)PORT_UNKNOWN, },
266         { /* end of list */ },
267 };
268
269 static struct platform_driver of_platform_serial_driver = {
270         .driver = {
271                 .name = "of_serial",
272                 .owner = THIS_MODULE,
273                 .of_match_table = of_platform_serial_table,
274         },
275         .probe = of_platform_serial_probe,
276         .remove = of_platform_serial_remove,
277 };
278
279 module_platform_driver(of_platform_serial_driver);
280
281 MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
282 MODULE_LICENSE("GPL");
283 MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");