drivers/usb/host/ehci-hcd.c

   1 /*
   2  * Enhanced Host Controller Interface (EHCI) driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * Copyright (c) 2000-2004 by David Brownell
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License as published by the
  10  * Free Software Foundation; either version 2 of the License, or (at your
  11  * option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/pci.h>
  25 #include <linux/dmapool.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/hrtimer.h>
  34 #include <linux/list.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/usb.h>
  37 #include <linux/usb/hcd.h>
  38 #include <linux/moduleparam.h>
  39 #include <linux/dma-mapping.h>
  40 #include <linux/debugfs.h>
  41 #include <linux/slab.h>
  42
  43 #include <asm/byteorder.h>
  44 #include <asm/io.h>
  45 #include <asm/irq.h>
  46 #include <asm/unaligned.h>
  47
  48 #if defined(CONFIG_PPC_PS3)
  49 #include <asm/firmware.h>
  50 #endif
  51
  52 /*-------------------------------------------------------------------------*/
  53
  54 /*
  55  * EHCI hc_driver implementation ... experimental, incomplete.
  56  * Based on the final 1.0 register interface specification.
  57  *
  58  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  59  * First was PCMCIA, like ISA; then CardBus, which is PCI.
  60  * Next comes "CardBay", using USB 2.0 signals.
  61  *
  62  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  63  * Special thanks to Intel and VIA for providing host controllers to
  64  * test this driver on, and Cypress (including In-System Design) for
  65  * providing early devices for those host controllers to talk to!
  66  */
  67
  68 #define DRIVER_AUTHOR "David Brownell"
  69 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  70
  71 static const char       hcd_name [] = "ehci_hcd";
  72
  73
  74 #undef EHCI_URB_TRACE
  75
  76 /* magic numbers that can affect system performance */
  77 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  78 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  79 #define EHCI_TUNE_RL_TT         0
  80 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  81 #define EHCI_TUNE_MULT_TT       1
  82 /*
  83  * Some drivers think it's safe to schedule isochronous transfers more than
  84  * 256 ms into the future (partly as a result of an old bug in the scheduling
  85  * code).  In an attempt to avoid trouble, we will use a minimum scheduling
  86  * length of 512 frames instead of 256.
  87  */
  88 #define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
  89
  90 /* Initial IRQ latency:  faster than hw default */
  91 static int log2_irq_thresh = 0;         // 0 to 6
  92 module_param (log2_irq_thresh, int, S_IRUGO);
  93 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
  94
  95 /* initial park setting:  slower than hw default */
  96 static unsigned park = 0;
  97 module_param (park, uint, S_IRUGO);
  98 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
  99
 100 /* for flakey hardware, ignore overcurrent indicators */
 101 static bool ignore_oc = 0;
 102 module_param (ignore_oc, bool, S_IRUGO);
 103 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
 104
 105 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 106
 107 /*-------------------------------------------------------------------------*/
 108
 109 #include "ehci.h"
 110 #include "pci-quirks.h"
 111
 112 static void compute_tt_budget(u8 budget_table[EHCI_BANDWIDTH_SIZE],
 113                 struct ehci_tt *tt);
 114
 115 /*
 116  * The MosChip MCS9990 controller updates its microframe counter
 117  * a little before the frame counter, and occasionally we will read
 118  * the invalid intermediate value.  Avoid problems by checking the
 119  * microframe number (the low-order 3 bits); if they are 0 then
 120  * re-read the register to get the correct value.
 121  */
 122 static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
 123 {
 124         unsigned uf;
 125
 126         uf = ehci_readl(ehci, &ehci->regs->frame_index);
 127         if (unlikely((uf & 7) == 0))
 128                 uf = ehci_readl(ehci, &ehci->regs->frame_index);
 129         return uf;
 130 }
 131
 132 static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
 133 {
 134         if (ehci->frame_index_bug)
 135                 return ehci_moschip_read_frame_index(ehci);
 136         return ehci_readl(ehci, &ehci->regs->frame_index);
 137 }
 138
 139 #include "ehci-dbg.c"
 140
 141 /*-------------------------------------------------------------------------*/
 142
 143 /*
 144  * ehci_handshake - spin reading hc until handshake completes or fails
 145  * @ptr: address of hc register to be read
 146  * @mask: bits to look at in result of read
 147  * @done: value of those bits when handshake succeeds
 148  * @usec: timeout in microseconds
 149  *
 150  * Returns negative errno, or zero on success
 151  *
 152  * Success happens when the "mask" bits have the specified value (hardware
 153  * handshake done).  There are two failure modes:  "usec" have passed (major
 154  * hardware flakeout), or the register reads as all-ones (hardware removed).
 155  *
 156  * That last failure should_only happen in cases like physical cardbus eject
 157  * before driver shutdown. But it also seems to be caused by bugs in cardbus
 158  * bridge shutdown:  shutting down the bridge before the devices using it.
 159  */
 160 int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr,
 161                    u32 mask, u32 done, int usec)
 162 {
 163         u32     result;
 164
 165         do {
 166                 result = ehci_readl(ehci, ptr);
 167                 if (result == ~(u32)0)          /* card removed */
 168                         return -ENODEV;
 169                 result &= mask;
 170                 if (result == done)
 171                         return 0;
 172                 udelay (1);
 173                 usec--;
 174         } while (usec > 0);
 175         return -ETIMEDOUT;
 176 }
 177 EXPORT_SYMBOL_GPL(ehci_handshake);
 178
 179 /* check TDI/ARC silicon is in host mode */
 180 static int tdi_in_host_mode (struct ehci_hcd *ehci)
 181 {
 182         u32             tmp;
 183
 184         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 185         return (tmp & 3) == USBMODE_CM_HC;
 186 }
 187
 188 /*
 189  * Force HC to halt state from unknown (EHCI spec section 2.3).
 190  * Must be called with interrupts enabled and the lock not held.
 191  */
 192 static int ehci_halt (struct ehci_hcd *ehci)
 193 {
 194         u32     temp;
 195
 196         spin_lock_irq(&ehci->lock);
 197
 198         /* disable any irqs left enabled by previous code */
 199         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 200
 201         if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
 202                 spin_unlock_irq(&ehci->lock);
 203                 return 0;
 204         }
 205
 206         /*
 207          * This routine gets called during probe before ehci->command
 208          * has been initialized, so we can't rely on its value.
 209          */
 210         ehci->command &= ~CMD_RUN;
 211         temp = ehci_readl(ehci, &ehci->regs->command);
 212         temp &= ~(CMD_RUN | CMD_IAAD);
 213         ehci_writel(ehci, temp, &ehci->regs->command);
 214
 215         spin_unlock_irq(&ehci->lock);
 216         synchronize_irq(ehci_to_hcd(ehci)->irq);
 217
 218         return ehci_handshake(ehci, &ehci->regs->status,
 219                           STS_HALT, STS_HALT, 16 * 125);
 220 }
 221
 222 /* put TDI/ARC silicon into EHCI mode */
 223 static void tdi_reset (struct ehci_hcd *ehci)
 224 {
 225         u32             tmp;
 226
 227         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 228         tmp |= USBMODE_CM_HC;
 229         /* The default byte access to MMR space is LE after
 230          * controller reset. Set the required endian mode
 231          * for transfer buffers to match the host microprocessor
 232          */
 233         if (ehci_big_endian_mmio(ehci))
 234                 tmp |= USBMODE_BE;
 235         ehci_writel(ehci, tmp, &ehci->regs->usbmode);
 236 }
 237
 238 /*
 239  * Reset a non-running (STS_HALT == 1) controller.
 240  * Must be called with interrupts enabled and the lock not held.
 241  */
 242 static int ehci_reset (struct ehci_hcd *ehci)
 243 {
 244         int     retval;
 245         u32     command = ehci_readl(ehci, &ehci->regs->command);
 246
 247         /* If the EHCI debug controller is active, special care must be
 248          * taken before and after a host controller reset */
 249         if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
 250                 ehci->debug = NULL;
 251
 252         command |= CMD_RESET;
 253         dbg_cmd (ehci, "reset", command);
 254         ehci_writel(ehci, command, &ehci->regs->command);
 255         ehci->rh_state = EHCI_RH_HALTED;
 256         ehci->next_statechange = jiffies;
 257         retval = ehci_handshake(ehci, &ehci->regs->command,
 258                             CMD_RESET, 0, 250 * 1000);
 259
 260         if (ehci->has_hostpc) {
 261                 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 262                                 &ehci->regs->usbmode_ex);
 263                 ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
 264         }
 265         if (retval)
 266                 return retval;
 267
 268         if (ehci_is_TDI(ehci))
 269                 tdi_reset (ehci);
 270
 271         if (ehci->debug)
 272                 dbgp_external_startup(ehci_to_hcd(ehci));
 273
 274         ehci->port_c_suspend = ehci->suspended_ports =
 275                         ehci->resuming_ports = 0;
 276         return retval;
 277 }
 278
 279 /*
 280  * Idle the controller (turn off the schedules).
 281  * Must be called with interrupts enabled and the lock not held.
 282  */
 283 static void ehci_quiesce (struct ehci_hcd *ehci)
 284 {
 285         u32     temp;
 286
 287         if (ehci->rh_state != EHCI_RH_RUNNING)
 288                 return;
 289
 290         /* wait for any schedule enables/disables to take effect */
 291         temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
 292         ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp,
 293                         16 * 125);
 294
 295         /* then disable anything that's still active */
 296         spin_lock_irq(&ehci->lock);
 297         ehci->command &= ~(CMD_ASE | CMD_PSE);
 298         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 299         spin_unlock_irq(&ehci->lock);
 300
 301         /* hardware can take 16 microframes to turn off ... */
 302         ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0,
 303                         16 * 125);
 304 }
 305
 306 /*-------------------------------------------------------------------------*/
 307
 308 static void end_unlink_async(struct ehci_hcd *ehci);
 309 static void unlink_empty_async(struct ehci_hcd *ehci);
 310 static void unlink_empty_async_suspended(struct ehci_hcd *ehci);
 311 static void ehci_work(struct ehci_hcd *ehci);
 312 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 313 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 314
 315 #include "ehci-timer.c"
 316 #include "ehci-hub.c"
 317 #include "ehci-mem.c"
 318 #include "ehci-q.c"
 319 #include "ehci-sched.c"
 320 #include "ehci-sysfs.c"
 321
 322 /*-------------------------------------------------------------------------*/
 323
 324 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
 325  * The firmware seems to think that powering off is a wakeup event!
 326  * This routine turns off remote wakeup and everything else, on all ports.
 327  */
 328 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 329 {
 330         int     port = HCS_N_PORTS(ehci->hcs_params);
 331
 332         while (port--)
 333                 ehci_writel(ehci, PORT_RWC_BITS,
 334                                 &ehci->regs->port_status[port]);
 335 }
 336
 337 /*
 338  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 339  * Must be called with interrupts enabled and the lock not held.
 340  */
 341 static void ehci_silence_controller(struct ehci_hcd *ehci)
 342 {
 343         ehci_halt(ehci);
 344
 345         spin_lock_irq(&ehci->lock);
 346         ehci->rh_state = EHCI_RH_HALTED;
 347         ehci_turn_off_all_ports(ehci);
 348
 349         /* make BIOS/etc use companion controller during reboot */
 350         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 351
 352         /* unblock posted writes */
 353         ehci_readl(ehci, &ehci->regs->configured_flag);
 354         spin_unlock_irq(&ehci->lock);
 355 }
 356
 357 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 358  * This forcibly disables dma and IRQs, helping kexec and other cases
 359  * where the next system software may expect clean state.
 360  */
 361 static void ehci_shutdown(struct usb_hcd *hcd)
 362 {
 363         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 364
 365         spin_lock_irq(&ehci->lock);
 366         ehci->shutdown = true;
 367         ehci->rh_state = EHCI_RH_STOPPING;
 368         ehci->enabled_hrtimer_events = 0;
 369         spin_unlock_irq(&ehci->lock);
 370
 371         ehci_silence_controller(ehci);
 372
 373         hrtimer_cancel(&ehci->hrtimer);
 374 }
 375
 376 /*-------------------------------------------------------------------------*/
 377
 378 /*
 379  * ehci_work is called from some interrupts, timers, and so on.
 380  * it calls driver completion functions, after dropping ehci->lock.
 381  */
 382 static void ehci_work (struct ehci_hcd *ehci)
 383 {
 384         /* another CPU may drop ehci->lock during a schedule scan while
 385          * it reports urb completions.  this flag guards against bogus
 386          * attempts at re-entrant schedule scanning.
 387          */
 388         if (ehci->scanning) {
 389                 ehci->need_rescan = true;
 390                 return;
 391         }
 392         ehci->scanning = true;
 393
 394  rescan:
 395         ehci->need_rescan = false;
 396         if (ehci->async_count)
 397                 scan_async(ehci);
 398         if (ehci->intr_count > 0)
 399                 scan_intr(ehci);
 400         if (ehci->isoc_count > 0)
 401                 scan_isoc(ehci);
 402         if (ehci->need_rescan)
 403                 goto rescan;
 404         ehci->scanning = false;
 405
 406         /* the IO watchdog guards against hardware or driver bugs that
 407          * misplace IRQs, and should let us run completely without IRQs.
 408          * such lossage has been observed on both VT6202 and VT8235.
 409          */
 410         turn_on_io_watchdog(ehci);
 411 }
 412
 413 /*
 414  * Called when the ehci_hcd module is removed.
 415  */
 416 static void ehci_stop (struct usb_hcd *hcd)
 417 {
 418         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 419
 420         ehci_dbg (ehci, "stop\n");
 421
 422         /* no more interrupts ... */
 423
 424         spin_lock_irq(&ehci->lock);
 425         ehci->enabled_hrtimer_events = 0;
 426         spin_unlock_irq(&ehci->lock);
 427
 428         ehci_quiesce(ehci);
 429         ehci_silence_controller(ehci);
 430         ehci_reset (ehci);
 431
 432         hrtimer_cancel(&ehci->hrtimer);
 433         remove_sysfs_files(ehci);
 434         remove_debug_files (ehci);
 435
 436         /* root hub is shut down separately (first, when possible) */
 437         spin_lock_irq (&ehci->lock);
 438         end_free_itds(ehci);
 439         spin_unlock_irq (&ehci->lock);
 440         ehci_mem_cleanup (ehci);
 441
 442         if (ehci->amd_pll_fix == 1)
 443                 usb_amd_dev_put();
 444
 445         dbg_status (ehci, "ehci_stop completed",
 446                     ehci_readl(ehci, &ehci->regs->status));
 447 }
 448
 449 /* one-time init, only for memory state */
 450 static int ehci_init(struct usb_hcd *hcd)
 451 {
 452         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 453         u32                     temp;
 454         int                     retval;
 455         u32                     hcc_params;
 456         struct ehci_qh_hw       *hw;
 457
 458         spin_lock_init(&ehci->lock);
 459
 460         /*
 461          * keep io watchdog by default, those good HCDs could turn off it later
 462          */
 463         ehci->need_io_watchdog = 1;
 464
 465         hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
 466         ehci->hrtimer.function = ehci_hrtimer_func;
 467         ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
 468
 469         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 470
 471         /*
 472          * by default set standard 80% (== 100 usec/uframe) max periodic
 473          * bandwidth as required by USB 2.0
 474          */
 475         ehci->uframe_periodic_max = 100;
 476
 477         /*
 478          * hw default: 1K periodic list heads, one per frame.
 479          * periodic_size can shrink by USBCMD update if hcc_params allows.
 480          */
 481         ehci->periodic_size = DEFAULT_I_TDPS;
 482         INIT_LIST_HEAD(&ehci->async_unlink);
 483         INIT_LIST_HEAD(&ehci->async_idle);
 484         INIT_LIST_HEAD(&ehci->intr_unlink_wait);
 485         INIT_LIST_HEAD(&ehci->intr_unlink);
 486         INIT_LIST_HEAD(&ehci->intr_qh_list);
 487         INIT_LIST_HEAD(&ehci->cached_itd_list);
 488         INIT_LIST_HEAD(&ehci->cached_sitd_list);
 489         INIT_LIST_HEAD(&ehci->tt_list);
 490
 491         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 492                 /* periodic schedule size can be smaller than default */
 493                 switch (EHCI_TUNE_FLS) {
 494                 case 0: ehci->periodic_size = 1024; break;
 495                 case 1: ehci->periodic_size = 512; break;
 496                 case 2: ehci->periodic_size = 256; break;
 497                 default:        BUG();
 498                 }
 499         }
 500         if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 501                 return retval;
 502
 503         /* controllers may cache some of the periodic schedule ... */
 504         if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
 505                 ehci->i_thresh = 0;
 506         else                                    // N microframes cached
 507                 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 508
 509         /*
 510          * dedicate a qh for the async ring head, since we couldn't unlink
 511          * a 'real' qh without stopping the async schedule [4.8].  use it
 512          * as the 'reclamation list head' too.
 513          * its dummy is used in hw_alt_next of many tds, to prevent the qh
 514          * from automatically advancing to the next td after short reads.
 515          */
 516         ehci->async->qh_next.qh = NULL;
 517         hw = ehci->async->hw;
 518         hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 519         hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 520 #if defined(CONFIG_PPC_PS3)
 521         hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
 522 #endif
 523         hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 524         hw->hw_qtd_next = EHCI_LIST_END(ehci);
 525         ehci->async->qh_state = QH_STATE_LINKED;
 526         hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 527
 528         /* clear interrupt enables, set irq latency */
 529         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 530                 log2_irq_thresh = 0;
 531         temp = 1 << (16 + log2_irq_thresh);
 532         if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
 533                 ehci->has_ppcd = 1;
 534                 ehci_dbg(ehci, "enable per-port change event\n");
 535                 temp |= CMD_PPCEE;
 536         }
 537         if (HCC_CANPARK(hcc_params)) {
 538                 /* HW default park == 3, on hardware that supports it (like
 539                  * NVidia and ALI silicon), maximizes throughput on the async
 540                  * schedule by avoiding QH fetches between transfers.
 541                  *
 542                  * With fast usb storage devices and NForce2, "park" seems to
 543                  * make problems:  throughput reduction (!), data errors...
 544                  */
 545                 if (park) {
 546                         park = min(park, (unsigned) 3);
 547                         temp |= CMD_PARK;
 548                         temp |= park << 8;
 549                 }
 550                 ehci_dbg(ehci, "park %d\n", park);
 551         }
 552         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 553                 /* periodic schedule size can be smaller than default */
 554                 temp &= ~(3 << 2);
 555                 temp |= (EHCI_TUNE_FLS << 2);
 556         }
 557         ehci->command = temp;
 558
 559         /* Accept arbitrarily long scatter-gather lists */
 560         if (!(hcd->driver->flags & HCD_LOCAL_MEM))
 561                 hcd->self.sg_tablesize = ~0;
 562         return 0;
 563 }
 564
 565 /* start HC running; it's halted, ehci_init() has been run (once) */
 566 static int ehci_run (struct usb_hcd *hcd)
 567 {
 568         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 569         u32                     temp;
 570         u32                     hcc_params;
 571
 572         hcd->uses_new_polling = 1;
 573
 574         /* EHCI spec section 4.1 */
 575
 576         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 577         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 578
 579         /*
 580          * hcc_params controls whether ehci->regs->segment must (!!!)
 581          * be used; it constrains QH/ITD/SITD and QTD locations.
 582          * pci_pool consistent memory always uses segment zero.
 583          * streaming mappings for I/O buffers, like pci_map_single(),
 584          * can return segments above 4GB, if the device allows.
 585          *
 586          * NOTE:  the dma mask is visible through dma_supported(), so
 587          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 588          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 589          * host side drivers though.
 590          */
 591         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 592         if (HCC_64BIT_ADDR(hcc_params)) {
 593                 ehci_writel(ehci, 0, &ehci->regs->segment);
 594 #if 0
 595 // this is deeply broken on almost all architectures
 596                 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 597                         ehci_info(ehci, "enabled 64bit DMA\n");
 598 #endif
 599         }
 600
 601
 602         // Philips, Intel, and maybe others need CMD_RUN before the
 603         // root hub will detect new devices (why?); NEC doesn't
 604         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 605         ehci->command |= CMD_RUN;
 606         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 607         dbg_cmd (ehci, "init", ehci->command);
 608
 609         /*
 610          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 611          * are explicitly handed to companion controller(s), so no TT is
 612          * involved with the root hub.  (Except where one is integrated,
 613          * and there's no companion controller unless maybe for USB OTG.)
 614          *
 615          * Turning on the CF flag will transfer ownership of all ports
 616          * from the companions to the EHCI controller.  If any of the
 617          * companions are in the middle of a port reset at the time, it
 618          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 619          * guarantees that no resets are in progress.  After we set CF,
 620          * a short delay lets the hardware catch up; new resets shouldn't
 621          * be started before the port switching actions could complete.
 622          */
 623         down_write(&ehci_cf_port_reset_rwsem);
 624         ehci->rh_state = EHCI_RH_RUNNING;
 625         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 626         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
 627         msleep(5);
 628         up_write(&ehci_cf_port_reset_rwsem);
 629         ehci->last_periodic_enable = ktime_get_real();
 630
 631         temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 632         ehci_info (ehci,
 633                 "USB %x.%x started, EHCI %x.%02x%s\n",
 634                 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 635                 temp >> 8, temp & 0xff,
 636                 ignore_oc ? ", overcurrent ignored" : "");
 637
 638         ehci_writel(ehci, INTR_MASK,
 639                     &ehci->regs->intr_enable); /* Turn On Interrupts */
 640
 641         /* GRR this is run-once init(), being done every time the HC starts.
 642          * So long as they're part of class devices, we can't do it init()
 643          * since the class device isn't created that early.
 644          */
 645         create_debug_files(ehci);
 646         create_sysfs_files(ehci);
 647
 648         return 0;
 649 }
 650
 651 int ehci_setup(struct usb_hcd *hcd)
 652 {
 653         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 654         int retval;
 655
 656         ehci->regs = (void __iomem *)ehci->caps +
 657             HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 658         dbg_hcs_params(ehci, "reset");
 659         dbg_hcc_params(ehci, "reset");
 660
 661         /* cache this readonly data; minimize chip reads */
 662         ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 663
 664         ehci->sbrn = HCD_USB2;
 665
 666         /* data structure init */
 667         retval = ehci_init(hcd);
 668         if (retval)
 669                 return retval;
 670
 671         retval = ehci_halt(ehci);
 672         if (retval)
 673                 return retval;
 674
 675         ehci_reset(ehci);
 676
 677         return 0;
 678 }
 679 EXPORT_SYMBOL_GPL(ehci_setup);
 680
 681 /*-------------------------------------------------------------------------*/
 682
 683 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 684 {
 685         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 686         u32                     status, masked_status, pcd_status = 0, cmd;
 687         int                     bh;
 688         unsigned long           flags;
 689
 690         /*
 691          * For threadirqs option we use spin_lock_irqsave() variant to prevent
 692          * deadlock with ehci hrtimer callback, because hrtimer callbacks run
 693          * in interrupt context even when threadirqs is specified. We can go
 694          * back to spin_lock() variant when hrtimer callbacks become threaded.
 695          */
 696         spin_lock_irqsave(&ehci->lock, flags);
 697
 698         status = ehci_readl(ehci, &ehci->regs->status);
 699
 700         /* e.g. cardbus physical eject */
 701         if (status == ~(u32) 0) {
 702                 ehci_dbg (ehci, "device removed\n");
 703                 goto dead;
 704         }
 705
 706         /*
 707          * We don't use STS_FLR, but some controllers don't like it to
 708          * remain on, so mask it out along with the other status bits.
 709          */
 710         masked_status = status & (INTR_MASK | STS_FLR);
 711
 712         /* Shared IRQ? */
 713         if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
 714                 spin_unlock_irqrestore(&ehci->lock, flags);
 715                 return IRQ_NONE;
 716         }
 717
 718         /* clear (just) interrupts */
 719         ehci_writel(ehci, masked_status, &ehci->regs->status);
 720         cmd = ehci_readl(ehci, &ehci->regs->command);
 721         bh = 0;
 722
 723         /* normal [4.15.1.2] or error [4.15.1.1] completion */
 724         if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 725                 if (likely ((status & STS_ERR) == 0))
 726                         COUNT (ehci->stats.normal);
 727                 else
 728                         COUNT (ehci->stats.error);
 729                 bh = 1;
 730         }
 731
 732         /* complete the unlinking of some qh [4.15.2.3] */
 733         if (status & STS_IAA) {
 734
 735                 /* Turn off the IAA watchdog */
 736                 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
 737
 738                 /*
 739                  * Mild optimization: Allow another IAAD to reset the
 740                  * hrtimer, if one occurs before the next expiration.
 741                  * In theory we could always cancel the hrtimer, but
 742                  * tests show that about half the time it will be reset
 743                  * for some other event anyway.
 744                  */
 745                 if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
 746                         ++ehci->next_hrtimer_event;
 747
 748                 /* guard against (alleged) silicon errata */
 749                 if (cmd & CMD_IAAD)
 750                         ehci_dbg(ehci, "IAA with IAAD still set?\n");
 751                 if (ehci->iaa_in_progress)
 752                         COUNT(ehci->stats.iaa);
 753                 end_unlink_async(ehci);
 754         }
 755
 756         /* remote wakeup [4.3.1] */
 757         if (status & STS_PCD) {
 758                 unsigned        i = HCS_N_PORTS (ehci->hcs_params);
 759                 u32             ppcd = ~0;
 760
 761                 /* kick root hub later */
 762                 pcd_status = status;
 763
 764                 /* resume root hub? */
 765                 if (ehci->rh_state == EHCI_RH_SUSPENDED)
 766                         usb_hcd_resume_root_hub(hcd);
 767
 768                 /* get per-port change detect bits */
 769                 if (ehci->has_ppcd)
 770                         ppcd = status >> 16;
 771
 772                 while (i--) {
 773                         int pstatus;
 774
 775                         /* leverage per-port change bits feature */
 776                         if (!(ppcd & (1 << i)))
 777                                 continue;
 778                         pstatus = ehci_readl(ehci,
 779                                          &ehci->regs->port_status[i]);
 780
 781                         if (pstatus & PORT_OWNER)
 782                                 continue;
 783                         if (!(test_bit(i, &ehci->suspended_ports) &&
 784                                         ((pstatus & PORT_RESUME) ||
 785                                                 !(pstatus & PORT_SUSPEND)) &&
 786                                         (pstatus & PORT_PE) &&
 787                                         ehci->reset_done[i] == 0))
 788                                 continue;
 789
 790                         /* start 20 msec resume signaling from this port,
 791                          * and make khubd collect PORT_STAT_C_SUSPEND to
 792                          * stop that signaling.  Use 5 ms extra for safety,
 793                          * like usb_port_resume() does.
 794                          */
 795                         ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
 796                         set_bit(i, &ehci->resuming_ports);
 797                         ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 798                         usb_hcd_start_port_resume(&hcd->self, i);
 799                         mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 800                 }
 801         }
 802
 803         /* PCI errors [4.15.2.4] */
 804         if (unlikely ((status & STS_FATAL) != 0)) {
 805                 ehci_err(ehci, "fatal error\n");
 806                 dbg_cmd(ehci, "fatal", cmd);
 807                 dbg_status(ehci, "fatal", status);
 808 dead:
 809                 usb_hc_died(hcd);
 810
 811                 /* Don't let the controller do anything more */
 812                 ehci->shutdown = true;
 813                 ehci->rh_state = EHCI_RH_STOPPING;
 814                 ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
 815                 ehci_writel(ehci, ehci->command, &ehci->regs->command);
 816                 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 817                 ehci_handle_controller_death(ehci);
 818
 819                 /* Handle completions when the controller stops */
 820                 bh = 0;
 821         }
 822
 823         if (bh)
 824                 ehci_work (ehci);
 825         spin_unlock_irqrestore(&ehci->lock, flags);
 826         if (pcd_status)
 827                 usb_hcd_poll_rh_status(hcd);
 828         return IRQ_HANDLED;
 829 }
 830
 831 /*-------------------------------------------------------------------------*/
 832
 833 /*
 834  * non-error returns are a promise to giveback() the urb later
 835  * we drop ownership so next owner (or urb unlink) can get it
 836  *
 837  * urb + dev is in hcd.self.controller.urb_list
 838  * we're queueing TDs onto software and hardware lists
 839  *
 840  * hcd-specific init for hcpriv hasn't been done yet
 841  *
 842  * NOTE:  control, bulk, and interrupt share the same code to append TDs
 843  * to a (possibly active) QH, and the same QH scanning code.
 844  */
 845 static int ehci_urb_enqueue (
 846         struct usb_hcd  *hcd,
 847         struct urb      *urb,
 848         gfp_t           mem_flags
 849 ) {
 850         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 851         struct list_head        qtd_list;
 852
 853         INIT_LIST_HEAD (&qtd_list);
 854
 855         switch (usb_pipetype (urb->pipe)) {
 856         case PIPE_CONTROL:
 857                 /* qh_completions() code doesn't handle all the fault cases
 858                  * in multi-TD control transfers.  Even 1KB is rare anyway.
 859                  */
 860                 if (urb->transfer_buffer_length > (16 * 1024))
 861                         return -EMSGSIZE;
 862                 /* FALLTHROUGH */
 863         /* case PIPE_BULK: */
 864         default:
 865                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 866                         return -ENOMEM;
 867                 return submit_async(ehci, urb, &qtd_list, mem_flags);
 868
 869         case PIPE_INTERRUPT:
 870                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 871                         return -ENOMEM;
 872                 return intr_submit(ehci, urb, &qtd_list, mem_flags);
 873
 874         case PIPE_ISOCHRONOUS:
 875                 if (urb->dev->speed == USB_SPEED_HIGH)
 876                         return itd_submit (ehci, urb, mem_flags);
 877                 else
 878                         return sitd_submit (ehci, urb, mem_flags);
 879         }
 880 }
 881
 882 /* remove from hardware lists
 883  * completions normally happen asynchronously
 884  */
 885
 886 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 887 {
 888         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 889         struct ehci_qh          *qh;
 890         unsigned long           flags;
 891         int                     rc;
 892
 893         spin_lock_irqsave (&ehci->lock, flags);
 894         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 895         if (rc)
 896                 goto done;
 897
 898         if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
 899                 /*
 900                  * We don't expedite dequeue for isochronous URBs.
 901                  * Just wait until they complete normally or their
 902                  * time slot expires.
 903                  */
 904         } else {
 905                 qh = (struct ehci_qh *) urb->hcpriv;
 906                 qh->exception = 1;
 907                 switch (qh->qh_state) {
 908                 case QH_STATE_LINKED:
 909                         if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)
 910                                 start_unlink_intr(ehci, qh);
 911                         else
 912                                 start_unlink_async(ehci, qh);
 913                         break;
 914                 case QH_STATE_COMPLETING:
 915                         qh->dequeue_during_giveback = 1;
 916                         break;
 917                 case QH_STATE_UNLINK:
 918                 case QH_STATE_UNLINK_WAIT:
 919                         /* already started */
 920                         break;
 921                 case QH_STATE_IDLE:
 922                         /* QH might be waiting for a Clear-TT-Buffer */
 923                         qh_completions(ehci, qh);
 924                         break;
 925                 }
 926         }
 927 done:
 928         spin_unlock_irqrestore (&ehci->lock, flags);
 929         return rc;
 930 }
 931
 932 /*-------------------------------------------------------------------------*/
 933
 934 // bulk qh holds the data toggle
 935
 936 static void
 937 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 938 {
 939         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 940         unsigned long           flags;
 941         struct ehci_qh          *qh;
 942
 943         /* ASSERT:  any requests/urbs are being unlinked */
 944         /* ASSERT:  nobody can be submitting urbs for this any more */
 945
 946 rescan:
 947         spin_lock_irqsave (&ehci->lock, flags);
 948         qh = ep->hcpriv;
 949         if (!qh)
 950                 goto done;
 951
 952         /* endpoints can be iso streams.  for now, we don't
 953          * accelerate iso completions ... so spin a while.
 954          */
 955         if (qh->hw == NULL) {
 956                 struct ehci_iso_stream  *stream = ep->hcpriv;
 957
 958                 if (!list_empty(&stream->td_list))
 959                         goto idle_timeout;
 960
 961                 /* BUG_ON(!list_empty(&stream->free_list)); */
 962                 reserve_release_iso_bandwidth(ehci, stream, -1);
 963                 kfree(stream);
 964                 goto done;
 965         }
 966
 967         qh->exception = 1;
 968         if (ehci->rh_state < EHCI_RH_RUNNING)
 969                 qh->qh_state = QH_STATE_IDLE;
 970         switch (qh->qh_state) {
 971         case QH_STATE_LINKED:
 972                 WARN_ON(!list_empty(&qh->qtd_list));
 973                 if (usb_endpoint_type(&ep->desc) != USB_ENDPOINT_XFER_INT)
 974                         start_unlink_async(ehci, qh);
 975                 else
 976                         start_unlink_intr(ehci, qh);
 977                 /* FALL THROUGH */
 978         case QH_STATE_COMPLETING:       /* already in unlinking */
 979         case QH_STATE_UNLINK:           /* wait for hw to finish? */
 980         case QH_STATE_UNLINK_WAIT:
 981 idle_timeout:
 982                 spin_unlock_irqrestore (&ehci->lock, flags);
 983                 schedule_timeout_uninterruptible(1);
 984                 goto rescan;
 985         case QH_STATE_IDLE:             /* fully unlinked */
 986                 if (qh->clearing_tt)
 987                         goto idle_timeout;
 988                 if (list_empty (&qh->qtd_list)) {
 989                         if (qh->ps.bw_uperiod)
 990                                 reserve_release_intr_bandwidth(ehci, qh, -1);
 991                         qh_destroy(ehci, qh);
 992                         break;
 993                 }
 994                 /* else FALL THROUGH */
 995         default:
 996                 /* caller was supposed to have unlinked any requests;
 997                  * that's not our job.  just leak this memory.
 998                  */
 999                 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1000                         qh, ep->desc.bEndpointAddress, qh->qh_state,
1001                         list_empty (&qh->qtd_list) ? "" : "(has tds)");
1002                 break;
1003         }
1004  done:
1005         ep->hcpriv = NULL;
1006         spin_unlock_irqrestore (&ehci->lock, flags);
1007 }
1008
1009 static void
1010 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1011 {
1012         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1013         struct ehci_qh          *qh;
1014         int                     eptype = usb_endpoint_type(&ep->desc);
1015         int                     epnum = usb_endpoint_num(&ep->desc);
1016         int                     is_out = usb_endpoint_dir_out(&ep->desc);
1017         unsigned long           flags;
1018
1019         if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1020                 return;
1021
1022         spin_lock_irqsave(&ehci->lock, flags);
1023         qh = ep->hcpriv;
1024
1025         /* For Bulk and Interrupt endpoints we maintain the toggle state
1026          * in the hardware; the toggle bits in udev aren't used at all.
1027          * When an endpoint is reset by usb_clear_halt() we must reset
1028          * the toggle bit in the QH.
1029          */
1030         if (qh) {
1031                 if (!list_empty(&qh->qtd_list)) {
1032                         WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1033                 } else {
1034                         /* The toggle value in the QH can't be updated
1035                          * while the QH is active.  Unlink it now;
1036                          * re-linking will call qh_refresh().
1037                          */
1038                         usb_settoggle(qh->ps.udev, epnum, is_out, 0);
1039                         qh->exception = 1;
1040                         if (eptype == USB_ENDPOINT_XFER_BULK)
1041                                 start_unlink_async(ehci, qh);
1042                         else
1043                                 start_unlink_intr(ehci, qh);
1044                 }
1045         }
1046         spin_unlock_irqrestore(&ehci->lock, flags);
1047 }
1048
1049 static int ehci_get_frame (struct usb_hcd *hcd)
1050 {
1051         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1052         return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1053 }
1054
1055 /*-------------------------------------------------------------------------*/
1056
1057 /* Device addition and removal */
1058
1059 static void ehci_remove_device(struct usb_hcd *hcd, struct usb_device *udev)
1060 {
1061         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1062
1063         spin_lock_irq(&ehci->lock);
1064         drop_tt(udev);
1065         spin_unlock_irq(&ehci->lock);
1066 }
1067
1068 /*-------------------------------------------------------------------------*/
1069
1070 #ifdef  CONFIG_PM
1071
1072 /* suspend/resume, section 4.3 */
1073
1074 /* These routines handle the generic parts of controller suspend/resume */
1075
1076 int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1077 {
1078         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1079
1080         if (time_before(jiffies, ehci->next_statechange))
1081                 msleep(10);
1082
1083         /*
1084          * Root hub was already suspended.  Disable IRQ emission and
1085          * mark HW unaccessible.  The PM and USB cores make sure that
1086          * the root hub is either suspended or stopped.
1087          */
1088         ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1089
1090         spin_lock_irq(&ehci->lock);
1091         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1092         (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1093
1094         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1095         spin_unlock_irq(&ehci->lock);
1096
1097         synchronize_irq(hcd->irq);
1098
1099         /* Check for race with a wakeup request */
1100         if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1101                 ehci_resume(hcd, false);
1102                 return -EBUSY;
1103         }
1104
1105         return 0;
1106 }
1107 EXPORT_SYMBOL_GPL(ehci_suspend);
1108
1109 /* Returns 0 if power was preserved, 1 if power was lost */
1110 int ehci_resume(struct usb_hcd *hcd, bool hibernated)
1111 {
1112         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1113
1114         if (time_before(jiffies, ehci->next_statechange))
1115                 msleep(100);
1116
1117         /* Mark hardware accessible again as we are back to full power by now */
1118         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1119
1120         if (ehci->shutdown)
1121                 return 0;               /* Controller is dead */
1122
1123         /*
1124          * If CF is still set and we aren't resuming from hibernation
1125          * then we maintained suspend power.
1126          * Just undo the effect of ehci_suspend().
1127          */
1128         if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1129                         !hibernated) {
1130                 int     mask = INTR_MASK;
1131
1132                 ehci_prepare_ports_for_controller_resume(ehci);
1133
1134                 spin_lock_irq(&ehci->lock);
1135                 if (ehci->shutdown)
1136                         goto skip;
1137
1138                 if (!hcd->self.root_hub->do_remote_wakeup)
1139                         mask &= ~STS_PCD;
1140                 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1141                 ehci_readl(ehci, &ehci->regs->intr_enable);
1142  skip:
1143                 spin_unlock_irq(&ehci->lock);
1144                 return 0;
1145         }
1146
1147         /*
1148          * Else reset, to cope with power loss or resume from hibernation
1149          * having let the firmware kick in during reboot.
1150          */
1151         usb_root_hub_lost_power(hcd->self.root_hub);
1152         (void) ehci_halt(ehci);
1153         (void) ehci_reset(ehci);
1154
1155         spin_lock_irq(&ehci->lock);
1156         if (ehci->shutdown)
1157                 goto skip;
1158
1159         ehci_writel(ehci, ehci->command, &ehci->regs->command);
1160         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1161         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1162
1163         ehci->rh_state = EHCI_RH_SUSPENDED;
1164         spin_unlock_irq(&ehci->lock);
1165
1166         return 1;
1167 }
1168 EXPORT_SYMBOL_GPL(ehci_resume);
1169
1170 #endif
1171
1172 /*-------------------------------------------------------------------------*/
1173
1174 /*
1175  * Generic structure: This gets copied for platform drivers so that
1176  * individual entries can be overridden as needed.
1177  */
1178
1179 static const struct hc_driver ehci_hc_driver = {
1180         .description =          hcd_name,
1181         .product_desc =         "EHCI Host Controller",
1182         .hcd_priv_size =        sizeof(struct ehci_hcd),
1183
1184         /*
1185          * generic hardware linkage
1186          */
1187         .irq =                  ehci_irq,
1188         .flags =                HCD_MEMORY | HCD_USB2 | HCD_BH,
1189
1190         /*
1191          * basic lifecycle operations
1192          */
1193         .reset =                ehci_setup,
1194         .start =                ehci_run,
1195         .stop =                 ehci_stop,
1196         .shutdown =             ehci_shutdown,
1197
1198         /*
1199          * managing i/o requests and associated device resources
1200          */
1201         .urb_enqueue =          ehci_urb_enqueue,
1202         .urb_dequeue =          ehci_urb_dequeue,
1203         .endpoint_disable =     ehci_endpoint_disable,
1204         .endpoint_reset =       ehci_endpoint_reset,
1205         .clear_tt_buffer_complete =     ehci_clear_tt_buffer_complete,
1206
1207         /*
1208          * scheduling support
1209          */
1210         .get_frame_number =     ehci_get_frame,
1211
1212         /*
1213          * root hub support
1214          */
1215         .hub_status_data =      ehci_hub_status_data,
1216         .hub_control =          ehci_hub_control,
1217         .bus_suspend =          ehci_bus_suspend,
1218         .bus_resume =           ehci_bus_resume,
1219         .relinquish_port =      ehci_relinquish_port,
1220         .port_handed_over =     ehci_port_handed_over,
1221
1222         /*
1223          * device support
1224          */
1225         .free_dev =             ehci_remove_device,
1226 };
1227
1228 void ehci_init_driver(struct hc_driver *drv,
1229                 const struct ehci_driver_overrides *over)
1230 {
1231         /* Copy the generic table to drv and then apply the overrides */
1232         *drv = ehci_hc_driver;
1233
1234         if (over) {
1235                 drv->hcd_priv_size += over->extra_priv_size;
1236                 if (over->reset)
1237                         drv->reset = over->reset;
1238         }
1239 }
1240 EXPORT_SYMBOL_GPL(ehci_init_driver);
1241
1242 /*-------------------------------------------------------------------------*/
1243
1244 MODULE_DESCRIPTION(DRIVER_DESC);
1245 MODULE_AUTHOR (DRIVER_AUTHOR);
1246 MODULE_LICENSE ("GPL");
1247
1248 #ifdef CONFIG_USB_EHCI_FSL
1249 #include "ehci-fsl.c"
1250 #define PLATFORM_DRIVER         ehci_fsl_driver
1251 #endif
1252
1253 #ifdef CONFIG_USB_EHCI_SH
1254 #include "ehci-sh.c"
1255 #define PLATFORM_DRIVER         ehci_hcd_sh_driver
1256 #endif
1257
1258 #ifdef CONFIG_PPC_PS3
1259 #include "ehci-ps3.c"
1260 #define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1261 #endif
1262
1263 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1264 #include "ehci-ppc-of.c"
1265 #define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1266 #endif
1267
1268 #ifdef CONFIG_XPS_USB_HCD_XILINX
1269 #include "ehci-xilinx-of.c"
1270 #define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1271 #endif
1272
1273 #ifdef CONFIG_USB_OCTEON_EHCI
1274 #include "ehci-octeon.c"
1275 #define PLATFORM_DRIVER         ehci_octeon_driver
1276 #endif
1277
1278 #ifdef CONFIG_TILE_USB
1279 #include "ehci-tilegx.c"
1280 #define PLATFORM_DRIVER         ehci_hcd_tilegx_driver
1281 #endif
1282
1283 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1284 #include "ehci-pmcmsp.c"
1285 #define PLATFORM_DRIVER         ehci_hcd_msp_driver
1286 #endif
1287
1288 #ifdef CONFIG_SPARC_LEON
1289 #include "ehci-grlib.c"
1290 #define PLATFORM_DRIVER         ehci_grlib_driver
1291 #endif
1292
1293 #ifdef CONFIG_USB_EHCI_MV
1294 #include "ehci-mv.c"
1295 #define        PLATFORM_DRIVER         ehci_mv_driver
1296 #endif
1297
1298 #ifdef CONFIG_MIPS_SEAD3
1299 #include "ehci-sead3.c"
1300 #define PLATFORM_DRIVER         ehci_hcd_sead3_driver
1301 #endif
1302
1303 static int __init ehci_hcd_init(void)
1304 {
1305         int retval = 0;
1306
1307         if (usb_disabled())
1308                 return -ENODEV;
1309
1310         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1311         set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1312         if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1313                         test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1314                 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1315                                 " before uhci_hcd and ohci_hcd, not after\n");
1316
1317         pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1318                  hcd_name,
1319                  sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1320                  sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1321
1322 #ifdef CONFIG_DYNAMIC_DEBUG
1323         ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1324         if (!ehci_debug_root) {
1325                 retval = -ENOENT;
1326                 goto err_debug;
1327         }
1328 #endif
1329
1330 #ifdef PLATFORM_DRIVER
1331         retval = platform_driver_register(&PLATFORM_DRIVER);
1332         if (retval < 0)
1333                 goto clean0;
1334 #endif
1335
1336 #ifdef PS3_SYSTEM_BUS_DRIVER
1337         retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1338         if (retval < 0)
1339                 goto clean2;
1340 #endif
1341
1342 #ifdef OF_PLATFORM_DRIVER
1343         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1344         if (retval < 0)
1345                 goto clean3;
1346 #endif
1347
1348 #ifdef XILINX_OF_PLATFORM_DRIVER
1349         retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1350         if (retval < 0)
1351                 goto clean4;
1352 #endif
1353         return retval;
1354
1355 #ifdef XILINX_OF_PLATFORM_DRIVER
1356         /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1357 clean4:
1358 #endif
1359 #ifdef OF_PLATFORM_DRIVER
1360         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1361 clean3:
1362 #endif
1363 #ifdef PS3_SYSTEM_BUS_DRIVER
1364         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1365 clean2:
1366 #endif
1367 #ifdef PLATFORM_DRIVER
1368         platform_driver_unregister(&PLATFORM_DRIVER);
1369 clean0:
1370 #endif
1371 #ifdef CONFIG_DYNAMIC_DEBUG
1372         debugfs_remove(ehci_debug_root);
1373         ehci_debug_root = NULL;
1374 err_debug:
1375 #endif
1376         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1377         return retval;
1378 }
1379 module_init(ehci_hcd_init);
1380
1381 static void __exit ehci_hcd_cleanup(void)
1382 {
1383 #ifdef XILINX_OF_PLATFORM_DRIVER
1384         platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1385 #endif
1386 #ifdef OF_PLATFORM_DRIVER
1387         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1388 #endif
1389 #ifdef PLATFORM_DRIVER
1390         platform_driver_unregister(&PLATFORM_DRIVER);
1391 #endif
1392 #ifdef PS3_SYSTEM_BUS_DRIVER
1393         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1394 #endif
1395 #ifdef CONFIG_DYNAMIC_DEBUG
1396         debugfs_remove(ehci_debug_root);
1397 #endif
1398         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1399 }
1400 module_exit(ehci_hcd_cleanup);