Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
[cascardo/linux.git] / drivers / video / omap2 / dss / dpi.c
1 /*
2  * linux/drivers/video/omap2/dss/dpi.c
3  *
4  * Copyright (C) 2009 Nokia Corporation
5  * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6  *
7  * Some code and ideas taken from drivers/video/omap/ driver
8  * by Imre Deak.
9  *
10  * This program is free software; you can redistribute it and/or modify it
11  * under the terms of the GNU General Public License version 2 as published by
12  * the Free Software Foundation.
13  *
14  * This program is distributed in the hope that it will be useful, but WITHOUT
15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
17  * more details.
18  *
19  * You should have received a copy of the GNU General Public License along with
20  * this program.  If not, see <http://www.gnu.org/licenses/>.
21  */
22
23 #define DSS_SUBSYS_NAME "DPI"
24
25 #include <linux/kernel.h>
26 #include <linux/delay.h>
27 #include <linux/export.h>
28 #include <linux/err.h>
29 #include <linux/errno.h>
30 #include <linux/platform_device.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/string.h>
33
34 #include <video/omapdss.h>
35
36 #include "dss.h"
37 #include "dss_features.h"
38
39 static struct {
40         struct platform_device *pdev;
41
42         struct regulator *vdds_dsi_reg;
43         struct platform_device *dsidev;
44
45         struct mutex lock;
46
47         struct omap_video_timings timings;
48         struct dss_lcd_mgr_config mgr_config;
49         int data_lines;
50
51         struct omap_dss_device output;
52 } dpi;
53
54 static struct platform_device *dpi_get_dsidev(enum omap_channel channel)
55 {
56         /*
57          * XXX we can't currently use DSI PLL for DPI with OMAP3, as the DSI PLL
58          * would also be used for DISPC fclk. Meaning, when the DPI output is
59          * disabled, DISPC clock will be disabled, and TV out will stop.
60          */
61         switch (omapdss_get_version()) {
62         case OMAPDSS_VER_OMAP24xx:
63         case OMAPDSS_VER_OMAP34xx_ES1:
64         case OMAPDSS_VER_OMAP34xx_ES3:
65         case OMAPDSS_VER_OMAP3630:
66         case OMAPDSS_VER_AM35xx:
67                 return NULL;
68
69         case OMAPDSS_VER_OMAP4430_ES1:
70         case OMAPDSS_VER_OMAP4430_ES2:
71         case OMAPDSS_VER_OMAP4:
72                 switch (channel) {
73                 case OMAP_DSS_CHANNEL_LCD:
74                         return dsi_get_dsidev_from_id(0);
75                 case OMAP_DSS_CHANNEL_LCD2:
76                         return dsi_get_dsidev_from_id(1);
77                 default:
78                         return NULL;
79                 }
80
81         case OMAPDSS_VER_OMAP5:
82                 switch (channel) {
83                 case OMAP_DSS_CHANNEL_LCD:
84                         return dsi_get_dsidev_from_id(0);
85                 case OMAP_DSS_CHANNEL_LCD3:
86                         return dsi_get_dsidev_from_id(1);
87                 default:
88                         return NULL;
89                 }
90
91         default:
92                 return NULL;
93         }
94 }
95
96 static enum omap_dss_clk_source dpi_get_alt_clk_src(enum omap_channel channel)
97 {
98         switch (channel) {
99         case OMAP_DSS_CHANNEL_LCD:
100                 return OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC;
101         case OMAP_DSS_CHANNEL_LCD2:
102                 return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
103         default:
104                 /* this shouldn't happen */
105                 WARN_ON(1);
106                 return OMAP_DSS_CLK_SRC_FCK;
107         }
108 }
109
110 struct dpi_clk_calc_ctx {
111         struct platform_device *dsidev;
112
113         /* inputs */
114
115         unsigned long pck_min, pck_max;
116
117         /* outputs */
118
119         struct dsi_clock_info dsi_cinfo;
120         struct dss_clock_info dss_cinfo;
121         struct dispc_clock_info dispc_cinfo;
122 };
123
124 static bool dpi_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
125                 unsigned long pck, void *data)
126 {
127         struct dpi_clk_calc_ctx *ctx = data;
128
129         /*
130          * Odd dividers give us uneven duty cycle, causing problem when level
131          * shifted. So skip all odd dividers when the pixel clock is on the
132          * higher side.
133          */
134         if (ctx->pck_min >= 100000000) {
135                 if (lckd > 1 && lckd % 2 != 0)
136                         return false;
137
138                 if (pckd > 1 && pckd % 2 != 0)
139                         return false;
140         }
141
142         ctx->dispc_cinfo.lck_div = lckd;
143         ctx->dispc_cinfo.pck_div = pckd;
144         ctx->dispc_cinfo.lck = lck;
145         ctx->dispc_cinfo.pck = pck;
146
147         return true;
148 }
149
150
151 static bool dpi_calc_hsdiv_cb(int regm_dispc, unsigned long dispc,
152                 void *data)
153 {
154         struct dpi_clk_calc_ctx *ctx = data;
155
156         /*
157          * Odd dividers give us uneven duty cycle, causing problem when level
158          * shifted. So skip all odd dividers when the pixel clock is on the
159          * higher side.
160          */
161         if (regm_dispc > 1 && regm_dispc % 2 != 0 && ctx->pck_min >= 100000000)
162                 return false;
163
164         ctx->dsi_cinfo.regm_dispc = regm_dispc;
165         ctx->dsi_cinfo.dsi_pll_hsdiv_dispc_clk = dispc;
166
167         return dispc_div_calc(dispc, ctx->pck_min, ctx->pck_max,
168                         dpi_calc_dispc_cb, ctx);
169 }
170
171
172 static bool dpi_calc_pll_cb(int regn, int regm, unsigned long fint,
173                 unsigned long pll,
174                 void *data)
175 {
176         struct dpi_clk_calc_ctx *ctx = data;
177
178         ctx->dsi_cinfo.regn = regn;
179         ctx->dsi_cinfo.regm = regm;
180         ctx->dsi_cinfo.fint = fint;
181         ctx->dsi_cinfo.clkin4ddr = pll;
182
183         return dsi_hsdiv_calc(ctx->dsidev, pll, ctx->pck_min,
184                         dpi_calc_hsdiv_cb, ctx);
185 }
186
187 static bool dpi_calc_dss_cb(int fckd, unsigned long fck, void *data)
188 {
189         struct dpi_clk_calc_ctx *ctx = data;
190
191         ctx->dss_cinfo.fck = fck;
192         ctx->dss_cinfo.fck_div = fckd;
193
194         return dispc_div_calc(fck, ctx->pck_min, ctx->pck_max,
195                         dpi_calc_dispc_cb, ctx);
196 }
197
198 static bool dpi_dsi_clk_calc(unsigned long pck, struct dpi_clk_calc_ctx *ctx)
199 {
200         unsigned long clkin;
201         unsigned long pll_min, pll_max;
202
203         clkin = dsi_get_pll_clkin(dpi.dsidev);
204
205         memset(ctx, 0, sizeof(*ctx));
206         ctx->dsidev = dpi.dsidev;
207         ctx->pck_min = pck - 1000;
208         ctx->pck_max = pck + 1000;
209         ctx->dsi_cinfo.clkin = clkin;
210
211         pll_min = 0;
212         pll_max = 0;
213
214         return dsi_pll_calc(dpi.dsidev, clkin,
215                         pll_min, pll_max,
216                         dpi_calc_pll_cb, ctx);
217 }
218
219 static bool dpi_dss_clk_calc(unsigned long pck, struct dpi_clk_calc_ctx *ctx)
220 {
221         int i;
222
223         /*
224          * DSS fck gives us very few possibilities, so finding a good pixel
225          * clock may not be possible. We try multiple times to find the clock,
226          * each time widening the pixel clock range we look for, up to
227          * +/- ~15MHz.
228          */
229
230         for (i = 0; i < 25; ++i) {
231                 bool ok;
232
233                 memset(ctx, 0, sizeof(*ctx));
234                 if (pck > 1000 * i * i * i)
235                         ctx->pck_min = max(pck - 1000 * i * i * i, 0lu);
236                 else
237                         ctx->pck_min = 0;
238                 ctx->pck_max = pck + 1000 * i * i * i;
239
240                 ok = dss_div_calc(ctx->pck_min, dpi_calc_dss_cb, ctx);
241                 if (ok)
242                         return ok;
243         }
244
245         return false;
246 }
247
248
249
250 static int dpi_set_dsi_clk(enum omap_channel channel,
251                 unsigned long pck_req, unsigned long *fck, int *lck_div,
252                 int *pck_div)
253 {
254         struct dpi_clk_calc_ctx ctx;
255         int r;
256         bool ok;
257
258         ok = dpi_dsi_clk_calc(pck_req, &ctx);
259         if (!ok)
260                 return -EINVAL;
261
262         r = dsi_pll_set_clock_div(dpi.dsidev, &ctx.dsi_cinfo);
263         if (r)
264                 return r;
265
266         dss_select_lcd_clk_source(channel,
267                         dpi_get_alt_clk_src(channel));
268
269         dpi.mgr_config.clock_info = ctx.dispc_cinfo;
270
271         *fck = ctx.dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
272         *lck_div = ctx.dispc_cinfo.lck_div;
273         *pck_div = ctx.dispc_cinfo.pck_div;
274
275         return 0;
276 }
277
278 static int dpi_set_dispc_clk(unsigned long pck_req, unsigned long *fck,
279                 int *lck_div, int *pck_div)
280 {
281         struct dpi_clk_calc_ctx ctx;
282         int r;
283         bool ok;
284
285         ok = dpi_dss_clk_calc(pck_req, &ctx);
286         if (!ok)
287                 return -EINVAL;
288
289         r = dss_set_clock_div(&ctx.dss_cinfo);
290         if (r)
291                 return r;
292
293         dpi.mgr_config.clock_info = ctx.dispc_cinfo;
294
295         *fck = ctx.dss_cinfo.fck;
296         *lck_div = ctx.dispc_cinfo.lck_div;
297         *pck_div = ctx.dispc_cinfo.pck_div;
298
299         return 0;
300 }
301
302 static int dpi_set_mode(struct omap_overlay_manager *mgr)
303 {
304         struct omap_video_timings *t = &dpi.timings;
305         int lck_div = 0, pck_div = 0;
306         unsigned long fck = 0;
307         unsigned long pck;
308         int r = 0;
309
310         if (dpi.dsidev)
311                 r = dpi_set_dsi_clk(mgr->id, t->pixel_clock * 1000, &fck,
312                                 &lck_div, &pck_div);
313         else
314                 r = dpi_set_dispc_clk(t->pixel_clock * 1000, &fck,
315                                 &lck_div, &pck_div);
316         if (r)
317                 return r;
318
319         pck = fck / lck_div / pck_div / 1000;
320
321         if (pck != t->pixel_clock) {
322                 DSSWARN("Could not find exact pixel clock. "
323                                 "Requested %d kHz, got %lu kHz\n",
324                                 t->pixel_clock, pck);
325
326                 t->pixel_clock = pck;
327         }
328
329         dss_mgr_set_timings(mgr, t);
330
331         return 0;
332 }
333
334 static void dpi_config_lcd_manager(struct omap_overlay_manager *mgr)
335 {
336         dpi.mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
337
338         dpi.mgr_config.stallmode = false;
339         dpi.mgr_config.fifohandcheck = false;
340
341         dpi.mgr_config.video_port_width = dpi.data_lines;
342
343         dpi.mgr_config.lcden_sig_polarity = 0;
344
345         dss_mgr_set_lcd_config(mgr, &dpi.mgr_config);
346 }
347
348 static int dpi_display_enable(struct omap_dss_device *dssdev)
349 {
350         struct omap_dss_device *out = &dpi.output;
351         int r;
352
353         mutex_lock(&dpi.lock);
354
355         if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI) && !dpi.vdds_dsi_reg) {
356                 DSSERR("no VDSS_DSI regulator\n");
357                 r = -ENODEV;
358                 goto err_no_reg;
359         }
360
361         if (out == NULL || out->manager == NULL) {
362                 DSSERR("failed to enable display: no output/manager\n");
363                 r = -ENODEV;
364                 goto err_no_out_mgr;
365         }
366
367         if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI)) {
368                 r = regulator_enable(dpi.vdds_dsi_reg);
369                 if (r)
370                         goto err_reg_enable;
371         }
372
373         r = dispc_runtime_get();
374         if (r)
375                 goto err_get_dispc;
376
377         r = dss_dpi_select_source(out->manager->id);
378         if (r)
379                 goto err_src_sel;
380
381         if (dpi.dsidev) {
382                 r = dsi_runtime_get(dpi.dsidev);
383                 if (r)
384                         goto err_get_dsi;
385
386                 r = dsi_pll_init(dpi.dsidev, 0, 1);
387                 if (r)
388                         goto err_dsi_pll_init;
389         }
390
391         r = dpi_set_mode(out->manager);
392         if (r)
393                 goto err_set_mode;
394
395         dpi_config_lcd_manager(out->manager);
396
397         mdelay(2);
398
399         r = dss_mgr_enable(out->manager);
400         if (r)
401                 goto err_mgr_enable;
402
403         mutex_unlock(&dpi.lock);
404
405         return 0;
406
407 err_mgr_enable:
408 err_set_mode:
409         if (dpi.dsidev)
410                 dsi_pll_uninit(dpi.dsidev, true);
411 err_dsi_pll_init:
412         if (dpi.dsidev)
413                 dsi_runtime_put(dpi.dsidev);
414 err_get_dsi:
415 err_src_sel:
416         dispc_runtime_put();
417 err_get_dispc:
418         if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
419                 regulator_disable(dpi.vdds_dsi_reg);
420 err_reg_enable:
421 err_no_out_mgr:
422 err_no_reg:
423         mutex_unlock(&dpi.lock);
424         return r;
425 }
426
427 static void dpi_display_disable(struct omap_dss_device *dssdev)
428 {
429         struct omap_overlay_manager *mgr = dpi.output.manager;
430
431         mutex_lock(&dpi.lock);
432
433         dss_mgr_disable(mgr);
434
435         if (dpi.dsidev) {
436                 dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK);
437                 dsi_pll_uninit(dpi.dsidev, true);
438                 dsi_runtime_put(dpi.dsidev);
439         }
440
441         dispc_runtime_put();
442
443         if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
444                 regulator_disable(dpi.vdds_dsi_reg);
445
446         mutex_unlock(&dpi.lock);
447 }
448
449 static void dpi_set_timings(struct omap_dss_device *dssdev,
450                 struct omap_video_timings *timings)
451 {
452         DSSDBG("dpi_set_timings\n");
453
454         mutex_lock(&dpi.lock);
455
456         dpi.timings = *timings;
457
458         mutex_unlock(&dpi.lock);
459 }
460
461 static void dpi_get_timings(struct omap_dss_device *dssdev,
462                 struct omap_video_timings *timings)
463 {
464         mutex_lock(&dpi.lock);
465
466         *timings = dpi.timings;
467
468         mutex_unlock(&dpi.lock);
469 }
470
471 static int dpi_check_timings(struct omap_dss_device *dssdev,
472                         struct omap_video_timings *timings)
473 {
474         struct omap_overlay_manager *mgr = dpi.output.manager;
475         int lck_div, pck_div;
476         unsigned long fck;
477         unsigned long pck;
478         struct dpi_clk_calc_ctx ctx;
479         bool ok;
480
481         if (mgr && !dispc_mgr_timings_ok(mgr->id, timings))
482                 return -EINVAL;
483
484         if (timings->pixel_clock == 0)
485                 return -EINVAL;
486
487         if (dpi.dsidev) {
488                 ok = dpi_dsi_clk_calc(timings->pixel_clock * 1000, &ctx);
489                 if (!ok)
490                         return -EINVAL;
491
492                 fck = ctx.dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
493         } else {
494                 ok = dpi_dss_clk_calc(timings->pixel_clock * 1000, &ctx);
495                 if (!ok)
496                         return -EINVAL;
497
498                 fck = ctx.dss_cinfo.fck;
499         }
500
501         lck_div = ctx.dispc_cinfo.lck_div;
502         pck_div = ctx.dispc_cinfo.pck_div;
503
504         pck = fck / lck_div / pck_div / 1000;
505
506         timings->pixel_clock = pck;
507
508         return 0;
509 }
510
511 static void dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines)
512 {
513         mutex_lock(&dpi.lock);
514
515         dpi.data_lines = data_lines;
516
517         mutex_unlock(&dpi.lock);
518 }
519
520 static int dpi_verify_dsi_pll(struct platform_device *dsidev)
521 {
522         int r;
523
524         /* do initial setup with the PLL to see if it is operational */
525
526         r = dsi_runtime_get(dsidev);
527         if (r)
528                 return r;
529
530         r = dsi_pll_init(dsidev, 0, 1);
531         if (r) {
532                 dsi_runtime_put(dsidev);
533                 return r;
534         }
535
536         dsi_pll_uninit(dsidev, true);
537         dsi_runtime_put(dsidev);
538
539         return 0;
540 }
541
542 static int dpi_init_regulator(void)
543 {
544         struct regulator *vdds_dsi;
545
546         if (!dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
547                 return 0;
548
549         if (dpi.vdds_dsi_reg)
550                 return 0;
551
552         vdds_dsi = devm_regulator_get(&dpi.pdev->dev, "vdds_dsi");
553         if (IS_ERR(vdds_dsi)) {
554                 DSSERR("can't get VDDS_DSI regulator\n");
555                 return PTR_ERR(vdds_dsi);
556         }
557
558         dpi.vdds_dsi_reg = vdds_dsi;
559
560         return 0;
561 }
562
563 static void dpi_init_pll(void)
564 {
565         struct platform_device *dsidev;
566
567         if (dpi.dsidev)
568                 return;
569
570         dsidev = dpi_get_dsidev(dpi.output.dispc_channel);
571         if (!dsidev)
572                 return;
573
574         if (dpi_verify_dsi_pll(dsidev)) {
575                 DSSWARN("DSI PLL not operational\n");
576                 return;
577         }
578
579         dpi.dsidev = dsidev;
580 }
581
582 /*
583  * Return a hardcoded channel for the DPI output. This should work for
584  * current use cases, but this can be later expanded to either resolve
585  * the channel in some more dynamic manner, or get the channel as a user
586  * parameter.
587  */
588 static enum omap_channel dpi_get_channel(void)
589 {
590         switch (omapdss_get_version()) {
591         case OMAPDSS_VER_OMAP24xx:
592         case OMAPDSS_VER_OMAP34xx_ES1:
593         case OMAPDSS_VER_OMAP34xx_ES3:
594         case OMAPDSS_VER_OMAP3630:
595         case OMAPDSS_VER_AM35xx:
596                 return OMAP_DSS_CHANNEL_LCD;
597
598         case OMAPDSS_VER_OMAP4430_ES1:
599         case OMAPDSS_VER_OMAP4430_ES2:
600         case OMAPDSS_VER_OMAP4:
601                 return OMAP_DSS_CHANNEL_LCD2;
602
603         case OMAPDSS_VER_OMAP5:
604                 return OMAP_DSS_CHANNEL_LCD3;
605
606         default:
607                 DSSWARN("unsupported DSS version\n");
608                 return OMAP_DSS_CHANNEL_LCD;
609         }
610 }
611
612 static int dpi_connect(struct omap_dss_device *dssdev,
613                 struct omap_dss_device *dst)
614 {
615         struct omap_overlay_manager *mgr;
616         int r;
617
618         r = dpi_init_regulator();
619         if (r)
620                 return r;
621
622         dpi_init_pll();
623
624         mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
625         if (!mgr)
626                 return -ENODEV;
627
628         r = dss_mgr_connect(mgr, dssdev);
629         if (r)
630                 return r;
631
632         r = omapdss_output_set_device(dssdev, dst);
633         if (r) {
634                 DSSERR("failed to connect output to new device: %s\n",
635                                 dst->name);
636                 dss_mgr_disconnect(mgr, dssdev);
637                 return r;
638         }
639
640         return 0;
641 }
642
643 static void dpi_disconnect(struct omap_dss_device *dssdev,
644                 struct omap_dss_device *dst)
645 {
646         WARN_ON(dst != dssdev->dst);
647
648         if (dst != dssdev->dst)
649                 return;
650
651         omapdss_output_unset_device(dssdev);
652
653         if (dssdev->manager)
654                 dss_mgr_disconnect(dssdev->manager, dssdev);
655 }
656
657 static const struct omapdss_dpi_ops dpi_ops = {
658         .connect = dpi_connect,
659         .disconnect = dpi_disconnect,
660
661         .enable = dpi_display_enable,
662         .disable = dpi_display_disable,
663
664         .check_timings = dpi_check_timings,
665         .set_timings = dpi_set_timings,
666         .get_timings = dpi_get_timings,
667
668         .set_data_lines = dpi_set_data_lines,
669 };
670
671 static void dpi_init_output(struct platform_device *pdev)
672 {
673         struct omap_dss_device *out = &dpi.output;
674
675         out->dev = &pdev->dev;
676         out->id = OMAP_DSS_OUTPUT_DPI;
677         out->output_type = OMAP_DISPLAY_TYPE_DPI;
678         out->name = "dpi.0";
679         out->dispc_channel = dpi_get_channel();
680         out->ops.dpi = &dpi_ops;
681         out->owner = THIS_MODULE;
682
683         omapdss_register_output(out);
684 }
685
686 static void __exit dpi_uninit_output(struct platform_device *pdev)
687 {
688         struct omap_dss_device *out = &dpi.output;
689
690         omapdss_unregister_output(out);
691 }
692
693 static int omap_dpi_probe(struct platform_device *pdev)
694 {
695         dpi.pdev = pdev;
696
697         mutex_init(&dpi.lock);
698
699         dpi_init_output(pdev);
700
701         return 0;
702 }
703
704 static int __exit omap_dpi_remove(struct platform_device *pdev)
705 {
706         dpi_uninit_output(pdev);
707
708         return 0;
709 }
710
711 static struct platform_driver omap_dpi_driver = {
712         .probe          = omap_dpi_probe,
713         .remove         = __exit_p(omap_dpi_remove),
714         .driver         = {
715                 .name   = "omapdss_dpi",
716                 .owner  = THIS_MODULE,
717         },
718 };
719
720 int __init dpi_init_platform_driver(void)
721 {
722         return platform_driver_register(&omap_dpi_driver);
723 }
724
725 void __exit dpi_uninit_platform_driver(void)
726 {
727         platform_driver_unregister(&omap_dpi_driver);
728 }