drivers/video/sgivwfb.c

   1 /*
   2  *  linux/drivers/video/sgivwfb.c -- SGI DBE frame buffer device
   3  *
   4  *      Copyright (C) 1999 Silicon Graphics, Inc.
   5  *      Jeffrey Newquist, newquist@engr.sgi.som
   6  *
   7  *  This file is subject to the terms and conditions of the GNU General Public
   8  *  License. See the file COPYING in the main directory of this archive for
   9  *  more details.
  10  */
  11
  12 #include <linux/config.h>
  13 #include <linux/module.h>
  14 #include <linux/kernel.h>
  15 #include <linux/mm.h>
  16 #include <linux/errno.h>
  17 #include <linux/delay.h>
  18 #include <linux/fb.h>
  19 #include <linux/init.h>
  20 #include <linux/ioport.h>
  21 #include <linux/platform_device.h>
  22
  23 #include <asm/io.h>
  24 #include <asm/mtrr.h>
  25
  26 #include <setup_arch.h>
  27
  28 #define INCLUDE_TIMING_TABLE_DATA
  29 #define DBE_REG_BASE par->regs
  30 #include <video/sgivw.h>
  31
  32 struct sgivw_par {
  33         struct asregs *regs;
  34         u32 cmap_fifo;
  35         u_long timing_num;
  36 };
  37
  38 #define FLATPANEL_SGI_1600SW    5
  39
  40 /*
  41  *  RAM we reserve for the frame buffer. This defines the maximum screen
  42  *  size
  43  *
  44  *  The default can be overridden if the driver is compiled as a module
  45  */
  46
  47 static int ypan = 0;
  48 static int ywrap = 0;
  49
  50 static int flatpanel_id = -1;
  51
  52 static struct fb_fix_screeninfo sgivwfb_fix __initdata = {
  53         .id             = "SGI Vis WS FB",
  54         .type           = FB_TYPE_PACKED_PIXELS,
  55         .visual         = FB_VISUAL_PSEUDOCOLOR,
  56         .mmio_start     = DBE_REG_PHYS,
  57         .mmio_len       = DBE_REG_SIZE,
  58         .accel          = FB_ACCEL_NONE,
  59         .line_length    = 640,
  60 };
  61
  62 static struct fb_var_screeninfo sgivwfb_var __initdata = {
  63         /* 640x480, 8 bpp */
  64         .xres           = 640,
  65         .yres           = 480,
  66         .xres_virtual   = 640,
  67         .yres_virtual   = 480,
  68         .bits_per_pixel = 8,
  69         .red            = { 0, 8, 0 },
  70         .green          = { 0, 8, 0 },
  71         .blue           = { 0, 8, 0 },
  72         .height         = -1,
  73         .width          = -1,
  74         .pixclock       = 20000,
  75         .left_margin    = 64,
  76         .right_margin   = 64,
  77         .upper_margin   = 32,
  78         .lower_margin   = 32,
  79         .hsync_len      = 64,
  80         .vsync_len      = 2,
  81         .vmode          = FB_VMODE_NONINTERLACED
  82 };
  83
  84 static struct fb_var_screeninfo sgivwfb_var1600sw __initdata = {
  85         /* 1600x1024, 8 bpp */
  86         .xres           = 1600,
  87         .yres           = 1024,
  88         .xres_virtual   = 1600,
  89         .yres_virtual   = 1024,
  90         .bits_per_pixel = 8,
  91         .red            = { 0, 8, 0 },
  92         .green          = { 0, 8, 0 },
  93         .blue           = { 0, 8, 0 },
  94         .height         = -1,
  95         .width          = -1,
  96         .pixclock       = 9353,
  97         .left_margin    = 20,
  98         .right_margin   = 30,
  99         .upper_margin   = 37,
 100         .lower_margin   = 3,
 101         .hsync_len      = 20,
 102         .vsync_len      = 3,
 103         .vmode          = FB_VMODE_NONINTERLACED
 104 };
 105
 106 /*
 107  *  Interface used by the world
 108  */
 109 int sgivwfb_init(void);
 110
 111 static int sgivwfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info);
 112 static int sgivwfb_set_par(struct fb_info *info);
 113 static int sgivwfb_setcolreg(u_int regno, u_int red, u_int green,
 114                              u_int blue, u_int transp,
 115                              struct fb_info *info);
 116 static int sgivwfb_mmap(struct fb_info *info,
 117                         struct vm_area_struct *vma);
 118
 119 static struct fb_ops sgivwfb_ops = {
 120         .owner          = THIS_MODULE,
 121         .fb_check_var   = sgivwfb_check_var,
 122         .fb_set_par     = sgivwfb_set_par,
 123         .fb_setcolreg   = sgivwfb_setcolreg,
 124         .fb_fillrect    = cfb_fillrect,
 125         .fb_copyarea    = cfb_copyarea,
 126         .fb_imageblit   = cfb_imageblit,
 127         .fb_mmap        = sgivwfb_mmap,
 128 };
 129
 130 /*
 131  *  Internal routines
 132  */
 133 static unsigned long bytes_per_pixel(int bpp)
 134 {
 135         switch (bpp) {
 136                 case 8:
 137                         return 1;
 138                 case 16:
 139                         return 2;
 140                 case 32:
 141                         return 4;
 142                 default:
 143                         printk(KERN_INFO "sgivwfb: unsupported bpp %d\n", bpp);
 144                         return 0;
 145         }
 146 }
 147
 148 static unsigned long get_line_length(int xres_virtual, int bpp)
 149 {
 150         return (xres_virtual * bytes_per_pixel(bpp));
 151 }
 152
 153 /*
 154  * Function:    dbe_TurnOffDma
 155  * Parameters:  (None)
 156  * Description: This should turn off the monitor and dbe.  This is used
 157  *              when switching between the serial console and the graphics
 158  *              console.
 159  */
 160
 161 static void dbe_TurnOffDma(struct sgivw_par *par)
 162 {
 163         unsigned int readVal;
 164         int i;
 165
 166         // Check to see if things are already turned off:
 167         // 1) Check to see if dbe is not using the internal dotclock.
 168         // 2) Check to see if the xy counter in dbe is already off.
 169
 170         DBE_GETREG(ctrlstat, readVal);
 171         if (GET_DBE_FIELD(CTRLSTAT, PCLKSEL, readVal) < 2)
 172                 return;
 173
 174         DBE_GETREG(vt_xy, readVal);
 175         if (GET_DBE_FIELD(VT_XY, VT_FREEZE, readVal) == 1)
 176                 return;
 177
 178         // Otherwise, turn off dbe
 179
 180         DBE_GETREG(ovr_control, readVal);
 181         SET_DBE_FIELD(OVR_CONTROL, OVR_DMA_ENABLE, readVal, 0);
 182         DBE_SETREG(ovr_control, readVal);
 183         udelay(1000);
 184         DBE_GETREG(frm_control, readVal);
 185         SET_DBE_FIELD(FRM_CONTROL, FRM_DMA_ENABLE, readVal, 0);
 186         DBE_SETREG(frm_control, readVal);
 187         udelay(1000);
 188         DBE_GETREG(did_control, readVal);
 189         SET_DBE_FIELD(DID_CONTROL, DID_DMA_ENABLE, readVal, 0);
 190         DBE_SETREG(did_control, readVal);
 191         udelay(1000);
 192
 193         // XXX HACK:
 194         //
 195         //    This was necessary for GBE--we had to wait through two
 196         //    vertical retrace periods before the pixel DMA was
 197         //    turned off for sure.  I've left this in for now, in
 198         //    case dbe needs it.
 199
 200         for (i = 0; i < 10000; i++) {
 201                 DBE_GETREG(frm_inhwctrl, readVal);
 202                 if (GET_DBE_FIELD(FRM_INHWCTRL, FRM_DMA_ENABLE, readVal) ==
 203                     0)
 204                         udelay(10);
 205                 else {
 206                         DBE_GETREG(ovr_inhwctrl, readVal);
 207                         if (GET_DBE_FIELD
 208                             (OVR_INHWCTRL, OVR_DMA_ENABLE, readVal) == 0)
 209                                 udelay(10);
 210                         else {
 211                                 DBE_GETREG(did_inhwctrl, readVal);
 212                                 if (GET_DBE_FIELD
 213                                     (DID_INHWCTRL, DID_DMA_ENABLE,
 214                                      readVal) == 0)
 215                                         udelay(10);
 216                                 else
 217                                         break;
 218                         }
 219                 }
 220         }
 221 }
 222
 223 /*
 224  *  Set the User Defined Part of the Display. Again if par use it to get
 225  *  real video mode.
 226  */
 227 static int sgivwfb_check_var(struct fb_var_screeninfo *var,
 228                              struct fb_info *info)
 229 {
 230         struct sgivw_par *par = (struct sgivw_par *)info->par;
 231         struct dbe_timing_info *timing;
 232         u_long line_length;
 233         u_long min_mode;
 234         int req_dot;
 235         int test_mode;
 236
 237         /*
 238          *  FB_VMODE_CONUPDATE and FB_VMODE_SMOOTH_XPAN are equal!
 239          *  as FB_VMODE_SMOOTH_XPAN is only used internally
 240          */
 241
 242         if (var->vmode & FB_VMODE_CONUPDATE) {
 243                 var->vmode |= FB_VMODE_YWRAP;
 244                 var->xoffset = info->var.xoffset;
 245                 var->yoffset = info->var.yoffset;
 246         }
 247
 248         /* XXX FIXME - forcing var's */
 249         var->xoffset = 0;
 250         var->yoffset = 0;
 251
 252         /* Limit bpp to 8, 16, and 32 */
 253         if (var->bits_per_pixel <= 8)
 254                 var->bits_per_pixel = 8;
 255         else if (var->bits_per_pixel <= 16)
 256                 var->bits_per_pixel = 16;
 257         else if (var->bits_per_pixel <= 32)
 258                 var->bits_per_pixel = 32;
 259         else
 260                 return -EINVAL;
 261
 262         var->grayscale = 0;     /* No grayscale for now */
 263
 264         /* determine valid resolution and timing */
 265         for (min_mode = 0; min_mode < DBE_VT_SIZE; min_mode++) {
 266                 if (dbeVTimings[min_mode].width >= var->xres &&
 267                     dbeVTimings[min_mode].height >= var->yres)
 268                         break;
 269         }
 270
 271         if (min_mode == DBE_VT_SIZE)
 272                 return -EINVAL; /* Resolution to high */
 273
 274         /* XXX FIXME - should try to pick best refresh rate */
 275         /* for now, pick closest dot-clock within 3MHz */
 276         req_dot = PICOS2KHZ(var->pixclock);
 277         printk(KERN_INFO "sgivwfb: requested pixclock=%d ps (%d KHz)\n",
 278                var->pixclock, req_dot);
 279         test_mode = min_mode;
 280         while (dbeVTimings[min_mode].width == dbeVTimings[test_mode].width) {
 281                 if (dbeVTimings[test_mode].cfreq + 3000 > req_dot)
 282                         break;
 283                 test_mode++;
 284         }
 285         if (dbeVTimings[min_mode].width != dbeVTimings[test_mode].width)
 286                 test_mode--;
 287         min_mode = test_mode;
 288         timing = &dbeVTimings[min_mode];
 289         printk(KERN_INFO "sgivwfb: granted dot-clock=%d KHz\n", timing->cfreq);
 290
 291         /* Adjust virtual resolution, if necessary */
 292         if (var->xres > var->xres_virtual || (!ywrap && !ypan))
 293                 var->xres_virtual = var->xres;
 294         if (var->yres > var->yres_virtual || (!ywrap && !ypan))
 295                 var->yres_virtual = var->yres;
 296
 297         /*
 298          *  Memory limit
 299          */
 300         line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
 301         if (line_length * var->yres_virtual > sgivwfb_mem_size)
 302                 return -ENOMEM; /* Virtual resolution to high */
 303
 304         info->fix.line_length = line_length;
 305
 306         switch (var->bits_per_pixel) {
 307         case 8:
 308                 var->red.offset = 0;
 309                 var->red.length = 8;
 310                 var->green.offset = 0;
 311                 var->green.length = 8;
 312                 var->blue.offset = 0;
 313                 var->blue.length = 8;
 314                 var->transp.offset = 0;
 315                 var->transp.length = 0;
 316                 break;
 317         case 16:                /* RGBA 5551 */
 318                 var->red.offset = 11;
 319                 var->red.length = 5;
 320                 var->green.offset = 6;
 321                 var->green.length = 5;
 322                 var->blue.offset = 1;
 323                 var->blue.length = 5;
 324                 var->transp.offset = 0;
 325                 var->transp.length = 0;
 326                 break;
 327         case 32:                /* RGB 8888 */
 328                 var->red.offset = 0;
 329                 var->red.length = 8;
 330                 var->green.offset = 8;
 331                 var->green.length = 8;
 332                 var->blue.offset = 16;
 333                 var->blue.length = 8;
 334                 var->transp.offset = 24;
 335                 var->transp.length = 8;
 336                 break;
 337         }
 338         var->red.msb_right = 0;
 339         var->green.msb_right = 0;
 340         var->blue.msb_right = 0;
 341         var->transp.msb_right = 0;
 342
 343         /* set video timing information */
 344         var->pixclock = KHZ2PICOS(timing->cfreq);
 345         var->left_margin = timing->htotal - timing->hsync_end;
 346         var->right_margin = timing->hsync_start - timing->width;
 347         var->upper_margin = timing->vtotal - timing->vsync_end;
 348         var->lower_margin = timing->vsync_start - timing->height;
 349         var->hsync_len = timing->hsync_end - timing->hsync_start;
 350         var->vsync_len = timing->vsync_end - timing->vsync_start;
 351
 352         /* Ouch. This breaks the rules but timing_num is only important if you
 353         * change a video mode */
 354         par->timing_num = min_mode;
 355
 356         printk(KERN_INFO "sgivwfb: new video mode xres=%d yres=%d bpp=%d\n",
 357                 var->xres, var->yres, var->bits_per_pixel);
 358         printk(KERN_INFO "         vxres=%d vyres=%d\n", var->xres_virtual,
 359                 var->yres_virtual);
 360         return 0;
 361 }
 362
 363 /*
 364  *  Setup flatpanel related registers.
 365  */
 366 static void sgivwfb_setup_flatpanel(struct sgivw_par *par, struct dbe_timing_info *currentTiming)
 367 {
 368         int fp_wid, fp_hgt, fp_vbs, fp_vbe;
 369         u32 outputVal = 0;
 370
 371         SET_DBE_FIELD(VT_FLAGS, HDRV_INVERT, outputVal,
 372                 (currentTiming->flags & FB_SYNC_HOR_HIGH_ACT) ? 0 : 1);
 373         SET_DBE_FIELD(VT_FLAGS, VDRV_INVERT, outputVal,
 374                 (currentTiming->flags & FB_SYNC_VERT_HIGH_ACT) ? 0 : 1);
 375         DBE_SETREG(vt_flags, outputVal);
 376
 377         /* Turn on the flat panel */
 378         switch (flatpanel_id) {
 379                 case FLATPANEL_SGI_1600SW:
 380                         fp_wid = 1600;
 381                         fp_hgt = 1024;
 382                         fp_vbs = 0;
 383                         fp_vbe = 1600;
 384                         currentTiming->pll_m = 4;
 385                         currentTiming->pll_n = 1;
 386                         currentTiming->pll_p = 0;
 387                         break;
 388                 default:
 389                         fp_wid = fp_hgt = fp_vbs = fp_vbe = 0xfff;
 390         }
 391
 392         outputVal = 0;
 393         SET_DBE_FIELD(FP_DE, FP_DE_ON, outputVal, fp_vbs);
 394         SET_DBE_FIELD(FP_DE, FP_DE_OFF, outputVal, fp_vbe);
 395         DBE_SETREG(fp_de, outputVal);
 396         outputVal = 0;
 397         SET_DBE_FIELD(FP_HDRV, FP_HDRV_OFF, outputVal, fp_wid);
 398         DBE_SETREG(fp_hdrv, outputVal);
 399         outputVal = 0;
 400         SET_DBE_FIELD(FP_VDRV, FP_VDRV_ON, outputVal, 1);
 401         SET_DBE_FIELD(FP_VDRV, FP_VDRV_OFF, outputVal, fp_hgt + 1);
 402         DBE_SETREG(fp_vdrv, outputVal);
 403 }
 404
 405 /*
 406  *  Set the hardware according to 'par'.
 407  */
 408 static int sgivwfb_set_par(struct fb_info *info)
 409 {
 410         struct sgivw_par *par = info->par;
 411         int i, j, htmp, temp;
 412         u32 readVal, outputVal;
 413         int wholeTilesX, maxPixelsPerTileX;
 414         int frmWrite1, frmWrite2, frmWrite3b;
 415         struct dbe_timing_info *currentTiming; /* Current Video Timing */
 416         int xpmax, ypmax;       // Monitor resolution
 417         int bytesPerPixel;      // Bytes per pixel
 418
 419         currentTiming = &dbeVTimings[par->timing_num];
 420         bytesPerPixel = bytes_per_pixel(info->var.bits_per_pixel);
 421         xpmax = currentTiming->width;
 422         ypmax = currentTiming->height;
 423
 424         /* dbe_InitGraphicsBase(); */
 425         /* Turn on dotclock PLL */
 426         DBE_SETREG(ctrlstat, 0x20000000);
 427
 428         dbe_TurnOffDma(par);
 429
 430         /* dbe_CalculateScreenParams(); */
 431         maxPixelsPerTileX = 512 / bytesPerPixel;
 432         wholeTilesX = xpmax / maxPixelsPerTileX;
 433         if (wholeTilesX * maxPixelsPerTileX < xpmax)
 434                 wholeTilesX++;
 435
 436         printk(KERN_DEBUG "sgivwfb: pixPerTile=%d wholeTilesX=%d\n",
 437                maxPixelsPerTileX, wholeTilesX);
 438
 439         /* dbe_InitGammaMap(); */
 440         udelay(10);
 441
 442         for (i = 0; i < 256; i++) {
 443                 DBE_ISETREG(gmap, i, (i << 24) | (i << 16) | (i << 8));
 444         }
 445
 446         /* dbe_TurnOn(); */
 447         DBE_GETREG(vt_xy, readVal);
 448         if (GET_DBE_FIELD(VT_XY, VT_FREEZE, readVal) == 1) {
 449                 DBE_SETREG(vt_xy, 0x00000000);
 450                 udelay(1);
 451         } else
 452                 dbe_TurnOffDma(par);
 453
 454         /* dbe_Initdbe(); */
 455         for (i = 0; i < 256; i++) {
 456                 for (j = 0; j < 100; j++) {
 457                         DBE_GETREG(cm_fifo, readVal);
 458                         if (readVal != 0x00000000)
 459                                 break;
 460                         else
 461                                 udelay(10);
 462                 }
 463
 464                 // DBE_ISETREG(cmap, i, 0x00000000);
 465                 DBE_ISETREG(cmap, i, (i << 8) | (i << 16) | (i << 24));
 466         }
 467
 468         /* dbe_InitFramebuffer(); */
 469         frmWrite1 = 0;
 470         SET_DBE_FIELD(FRM_SIZE_TILE, FRM_WIDTH_TILE, frmWrite1,
 471                       wholeTilesX);
 472         SET_DBE_FIELD(FRM_SIZE_TILE, FRM_RHS, frmWrite1, 0);
 473
 474         switch (bytesPerPixel) {
 475         case 1:
 476                 SET_DBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, frmWrite1,
 477                               DBE_FRM_DEPTH_8);
 478                 break;
 479         case 2:
 480                 SET_DBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, frmWrite1,
 481                               DBE_FRM_DEPTH_16);
 482                 break;
 483         case 4:
 484                 SET_DBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, frmWrite1,
 485                               DBE_FRM_DEPTH_32);
 486                 break;
 487         }
 488
 489         frmWrite2 = 0;
 490         SET_DBE_FIELD(FRM_SIZE_PIXEL, FB_HEIGHT_PIX, frmWrite2, ypmax);
 491
 492         // Tell dbe about the framebuffer location and type
 493         // XXX What format is the FRM_TILE_PTR??  64K aligned address?
 494         frmWrite3b = 0;
 495         SET_DBE_FIELD(FRM_CONTROL, FRM_TILE_PTR, frmWrite3b,
 496                       sgivwfb_mem_phys >> 9);
 497         SET_DBE_FIELD(FRM_CONTROL, FRM_DMA_ENABLE, frmWrite3b, 1);
 498         SET_DBE_FIELD(FRM_CONTROL, FRM_LINEAR, frmWrite3b, 1);
 499
 500         /* Initialize DIDs */
 501
 502         outputVal = 0;
 503         switch (bytesPerPixel) {
 504         case 1:
 505                 SET_DBE_FIELD(WID, TYP, outputVal, DBE_CMODE_I8);
 506                 break;
 507         case 2:
 508                 SET_DBE_FIELD(WID, TYP, outputVal, DBE_CMODE_RGBA5);
 509                 break;
 510         case 4:
 511                 SET_DBE_FIELD(WID, TYP, outputVal, DBE_CMODE_RGB8);
 512                 break;
 513         }
 514         SET_DBE_FIELD(WID, BUF, outputVal, DBE_BMODE_BOTH);
 515
 516         for (i = 0; i < 32; i++) {
 517                 DBE_ISETREG(mode_regs, i, outputVal);
 518         }
 519
 520         /* dbe_InitTiming(); */
 521         DBE_SETREG(vt_intr01, 0xffffffff);
 522         DBE_SETREG(vt_intr23, 0xffffffff);
 523
 524         DBE_GETREG(dotclock, readVal);
 525         DBE_SETREG(dotclock, readVal & 0xffff);
 526
 527         DBE_SETREG(vt_xymax, 0x00000000);
 528         outputVal = 0;
 529         SET_DBE_FIELD(VT_VSYNC, VT_VSYNC_ON, outputVal,
 530                       currentTiming->vsync_start);
 531         SET_DBE_FIELD(VT_VSYNC, VT_VSYNC_OFF, outputVal,
 532                       currentTiming->vsync_end);
 533         DBE_SETREG(vt_vsync, outputVal);
 534         outputVal = 0;
 535         SET_DBE_FIELD(VT_HSYNC, VT_HSYNC_ON, outputVal,
 536                       currentTiming->hsync_start);
 537         SET_DBE_FIELD(VT_HSYNC, VT_HSYNC_OFF, outputVal,
 538                       currentTiming->hsync_end);
 539         DBE_SETREG(vt_hsync, outputVal);
 540         outputVal = 0;
 541         SET_DBE_FIELD(VT_VBLANK, VT_VBLANK_ON, outputVal,
 542                       currentTiming->vblank_start);
 543         SET_DBE_FIELD(VT_VBLANK, VT_VBLANK_OFF, outputVal,
 544                       currentTiming->vblank_end);
 545         DBE_SETREG(vt_vblank, outputVal);
 546         outputVal = 0;
 547         SET_DBE_FIELD(VT_HBLANK, VT_HBLANK_ON, outputVal,
 548                       currentTiming->hblank_start);
 549         SET_DBE_FIELD(VT_HBLANK, VT_HBLANK_OFF, outputVal,
 550                       currentTiming->hblank_end - 3);
 551         DBE_SETREG(vt_hblank, outputVal);
 552         outputVal = 0;
 553         SET_DBE_FIELD(VT_VCMAP, VT_VCMAP_ON, outputVal,
 554                       currentTiming->vblank_start);
 555         SET_DBE_FIELD(VT_VCMAP, VT_VCMAP_OFF, outputVal,
 556                       currentTiming->vblank_end);
 557         DBE_SETREG(vt_vcmap, outputVal);
 558         outputVal = 0;
 559         SET_DBE_FIELD(VT_HCMAP, VT_HCMAP_ON, outputVal,
 560                       currentTiming->hblank_start);
 561         SET_DBE_FIELD(VT_HCMAP, VT_HCMAP_OFF, outputVal,
 562                       currentTiming->hblank_end - 3);
 563         DBE_SETREG(vt_hcmap, outputVal);
 564
 565         if (flatpanel_id != -1)
 566                 sgivwfb_setup_flatpanel(par, currentTiming);
 567
 568         outputVal = 0;
 569         temp = currentTiming->vblank_start - currentTiming->vblank_end - 1;
 570         if (temp > 0)
 571                 temp = -temp;
 572
 573         SET_DBE_FIELD(DID_START_XY, DID_STARTY, outputVal, (u32) temp);
 574         if (currentTiming->hblank_end >= 20)
 575                 SET_DBE_FIELD(DID_START_XY, DID_STARTX, outputVal,
 576                               currentTiming->hblank_end - 20);
 577         else
 578                 SET_DBE_FIELD(DID_START_XY, DID_STARTX, outputVal,
 579                               currentTiming->htotal - (20 -
 580                                                        currentTiming->
 581                                                        hblank_end));
 582         DBE_SETREG(did_start_xy, outputVal);
 583
 584         outputVal = 0;
 585         SET_DBE_FIELD(CRS_START_XY, CRS_STARTY, outputVal,
 586                       (u32) (temp + 1));
 587         if (currentTiming->hblank_end >= DBE_CRS_MAGIC)
 588                 SET_DBE_FIELD(CRS_START_XY, CRS_STARTX, outputVal,
 589                               currentTiming->hblank_end - DBE_CRS_MAGIC);
 590         else
 591                 SET_DBE_FIELD(CRS_START_XY, CRS_STARTX, outputVal,
 592                               currentTiming->htotal - (DBE_CRS_MAGIC -
 593                                                        currentTiming->
 594                                                        hblank_end));
 595         DBE_SETREG(crs_start_xy, outputVal);
 596
 597         outputVal = 0;
 598         SET_DBE_FIELD(VC_START_XY, VC_STARTY, outputVal, (u32) temp);
 599         SET_DBE_FIELD(VC_START_XY, VC_STARTX, outputVal,
 600                       currentTiming->hblank_end - 4);
 601         DBE_SETREG(vc_start_xy, outputVal);
 602
 603         DBE_SETREG(frm_size_tile, frmWrite1);
 604         DBE_SETREG(frm_size_pixel, frmWrite2);
 605
 606         outputVal = 0;
 607         SET_DBE_FIELD(DOTCLK, M, outputVal, currentTiming->pll_m - 1);
 608         SET_DBE_FIELD(DOTCLK, N, outputVal, currentTiming->pll_n - 1);
 609         SET_DBE_FIELD(DOTCLK, P, outputVal, currentTiming->pll_p);
 610         SET_DBE_FIELD(DOTCLK, RUN, outputVal, 1);
 611         DBE_SETREG(dotclock, outputVal);
 612
 613         udelay(11 * 1000);
 614
 615         DBE_SETREG(vt_vpixen, 0xffffff);
 616         DBE_SETREG(vt_hpixen, 0xffffff);
 617
 618         outputVal = 0;
 619         SET_DBE_FIELD(VT_XYMAX, VT_MAXX, outputVal, currentTiming->htotal);
 620         SET_DBE_FIELD(VT_XYMAX, VT_MAXY, outputVal, currentTiming->vtotal);
 621         DBE_SETREG(vt_xymax, outputVal);
 622
 623         outputVal = frmWrite1;
 624         SET_DBE_FIELD(FRM_SIZE_TILE, FRM_FIFO_RESET, outputVal, 1);
 625         DBE_SETREG(frm_size_tile, outputVal);
 626         DBE_SETREG(frm_size_tile, frmWrite1);
 627
 628         outputVal = 0;
 629         SET_DBE_FIELD(OVR_WIDTH_TILE, OVR_FIFO_RESET, outputVal, 1);
 630         DBE_SETREG(ovr_width_tile, outputVal);
 631         DBE_SETREG(ovr_width_tile, 0);
 632
 633         DBE_SETREG(frm_control, frmWrite3b);
 634         DBE_SETREG(did_control, 0);
 635
 636         // Wait for dbe to take frame settings
 637         for (i = 0; i < 100000; i++) {
 638                 DBE_GETREG(frm_inhwctrl, readVal);
 639                 if (GET_DBE_FIELD(FRM_INHWCTRL, FRM_DMA_ENABLE, readVal) !=
 640                     0)
 641                         break;
 642                 else
 643                         udelay(1);
 644         }
 645
 646         if (i == 100000)
 647                 printk(KERN_INFO
 648                        "sgivwfb: timeout waiting for frame DMA enable.\n");
 649
 650         outputVal = 0;
 651         htmp = currentTiming->hblank_end - 19;
 652         if (htmp < 0)
 653                 htmp += currentTiming->htotal;  /* allow blank to wrap around */
 654         SET_DBE_FIELD(VT_HPIXEN, VT_HPIXEN_ON, outputVal, htmp);
 655         SET_DBE_FIELD(VT_HPIXEN, VT_HPIXEN_OFF, outputVal,
 656                       ((htmp + currentTiming->width -
 657                         2) % currentTiming->htotal));
 658         DBE_SETREG(vt_hpixen, outputVal);
 659
 660         outputVal = 0;
 661         SET_DBE_FIELD(VT_VPIXEN, VT_VPIXEN_OFF, outputVal,
 662                       currentTiming->vblank_start);
 663         SET_DBE_FIELD(VT_VPIXEN, VT_VPIXEN_ON, outputVal,
 664                       currentTiming->vblank_end);
 665         DBE_SETREG(vt_vpixen, outputVal);
 666
 667         // Turn off mouse cursor
 668         par->regs->crs_ctl = 0;
 669
 670         // XXX What's this section for??
 671         DBE_GETREG(ctrlstat, readVal);
 672         readVal &= 0x02000000;
 673
 674         if (readVal != 0) {
 675                 DBE_SETREG(ctrlstat, 0x30000000);
 676         }
 677         return 0;
 678 }
 679
 680 /*
 681  *  Set a single color register. The values supplied are already
 682  *  rounded down to the hardware's capabilities (according to the
 683  *  entries in the var structure). Return != 0 for invalid regno.
 684  */
 685
 686 static int sgivwfb_setcolreg(u_int regno, u_int red, u_int green,
 687                              u_int blue, u_int transp,
 688                              struct fb_info *info)
 689 {
 690         struct sgivw_par *par = (struct sgivw_par *) info->par;
 691
 692         if (regno > 255)
 693                 return 1;
 694         red >>= 8;
 695         green >>= 8;
 696         blue >>= 8;
 697
 698         /* wait for the color map FIFO to have a free entry */
 699         while (par->cmap_fifo == 0)
 700                 par->cmap_fifo = par->regs->cm_fifo;
 701
 702         par->regs->cmap[regno] = (red << 24) | (green << 16) | (blue << 8);
 703         par->cmap_fifo--;       /* assume FIFO is filling up */
 704         return 0;
 705 }
 706
 707 static int sgivwfb_mmap(struct fb_info *info,
 708                         struct vm_area_struct *vma)
 709 {
 710         unsigned long size = vma->vm_end - vma->vm_start;
 711         unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
 712
 713         if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
 714                 return -EINVAL;
 715         if (offset + size > sgivwfb_mem_size)
 716                 return -EINVAL;
 717         offset += sgivwfb_mem_phys;
 718         pgprot_val(vma->vm_page_prot) =
 719             pgprot_val(vma->vm_page_prot) | _PAGE_PCD;
 720         vma->vm_flags |= VM_IO;
 721         if (remap_pfn_range(vma, vma->vm_start, offset >> PAGE_SHIFT,
 722                                                 size, vma->vm_page_prot))
 723                 return -EAGAIN;
 724         printk(KERN_DEBUG "sgivwfb: mmap framebuffer P(%lx)->V(%lx)\n",
 725                offset, vma->vm_start);
 726         return 0;
 727 }
 728
 729 int __init sgivwfb_setup(char *options)
 730 {
 731         char *this_opt;
 732
 733         if (!options || !*options)
 734                 return 0;
 735
 736         while ((this_opt = strsep(&options, ",")) != NULL) {
 737                 if (!strncmp(this_opt, "monitor:", 8)) {
 738                         if (!strncmp(this_opt + 8, "crt", 3))
 739                                 flatpanel_id = -1;
 740                         else if (!strncmp(this_opt + 8, "1600sw", 6))
 741                                 flatpanel_id = FLATPANEL_SGI_1600SW;
 742                 }
 743         }
 744         return 0;
 745 }
 746
 747 /*
 748  *  Initialisation
 749  */
 750 static int __init sgivwfb_probe(struct platform_device *dev)
 751 {
 752         struct sgivw_par *par;
 753         struct fb_info *info;
 754         char *monitor;
 755
 756         info = framebuffer_alloc(sizeof(struct sgivw_par) + sizeof(u32) * 256, &dev->dev);
 757         if (!info)
 758                 return -ENOMEM;
 759         par = info->par;
 760
 761         if (!request_mem_region(DBE_REG_PHYS, DBE_REG_SIZE, "sgivwfb")) {
 762                 printk(KERN_ERR "sgivwfb: couldn't reserve mmio region\n");
 763                 framebuffer_release(info);
 764                 return -EBUSY;
 765         }
 766
 767         par->regs = (struct asregs *) ioremap_nocache(DBE_REG_PHYS, DBE_REG_SIZE);
 768         if (!par->regs) {
 769                 printk(KERN_ERR "sgivwfb: couldn't ioremap registers\n");
 770                 goto fail_ioremap_regs;
 771         }
 772
 773         mtrr_add(sgivwfb_mem_phys, sgivwfb_mem_size, MTRR_TYPE_WRCOMB, 1);
 774
 775         sgivwfb_fix.smem_start = sgivwfb_mem_phys;
 776         sgivwfb_fix.smem_len = sgivwfb_mem_size;
 777         sgivwfb_fix.ywrapstep = ywrap;
 778         sgivwfb_fix.ypanstep = ypan;
 779
 780         info->fix = sgivwfb_fix;
 781
 782         switch (flatpanel_id) {
 783                 case FLATPANEL_SGI_1600SW:
 784                         info->var = sgivwfb_var1600sw;
 785                         monitor = "SGI 1600SW flatpanel";
 786                         break;
 787                 default:
 788                         info->var = sgivwfb_var;
 789                         monitor = "CRT";
 790         }
 791
 792         printk(KERN_INFO "sgivwfb: %s monitor selected\n", monitor);
 793
 794         info->fbops = &sgivwfb_ops;
 795         info->pseudo_palette = (void *) (par + 1);
 796         info->flags = FBINFO_DEFAULT;
 797
 798         info->screen_base = ioremap_nocache((unsigned long) sgivwfb_mem_phys, sgivwfb_mem_size);
 799         if (!info->screen_base) {
 800                 printk(KERN_ERR "sgivwfb: couldn't ioremap screen_base\n");
 801                 goto fail_ioremap_fbmem;
 802         }
 803
 804         if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
 805                 goto fail_color_map;
 806
 807         if (register_framebuffer(info) < 0) {
 808                 printk(KERN_ERR "sgivwfb: couldn't register framebuffer\n");
 809                 goto fail_register_framebuffer;
 810         }
 811
 812         platform_set_drvdata(dev, info);
 813
 814         printk(KERN_INFO "fb%d: SGI DBE frame buffer device, using %ldK of video memory at %#lx\n",
 815                 info->node, sgivwfb_mem_size >> 10, sgivwfb_mem_phys);
 816         return 0;
 817
 818 fail_register_framebuffer:
 819         fb_dealloc_cmap(&info->cmap);
 820 fail_color_map:
 821         iounmap((char *) info->screen_base);
 822 fail_ioremap_fbmem:
 823         iounmap(par->regs);
 824 fail_ioremap_regs:
 825         release_mem_region(DBE_REG_PHYS, DBE_REG_SIZE);
 826         framebuffer_release(info);
 827         return -ENXIO;
 828 }
 829
 830 static int sgivwfb_remove(struct platform_device *dev)
 831 {
 832         struct fb_info *info = platform_get_drvdata(dev);
 833
 834         if (info) {
 835                 struct sgivw_par *par = info->par;
 836
 837                 unregister_framebuffer(info);
 838                 dbe_TurnOffDma(par);
 839                 iounmap(par->regs);
 840                 iounmap(info->screen_base);
 841                 release_mem_region(DBE_REG_PHYS, DBE_REG_SIZE);
 842         }
 843         return 0;
 844 }
 845
 846 static struct platform_driver sgivwfb_driver = {
 847         .probe  = sgivwfb_probe,
 848         .remove = sgivwfb_remove,
 849         .driver = {
 850                 .name   = "sgivwfb",
 851         },
 852 };
 853
 854 static struct platform_device *sgivwfb_device;
 855
 856 int __init sgivwfb_init(void)
 857 {
 858         int ret;
 859
 860 #ifndef MODULE
 861         char *option = NULL;
 862
 863         if (fb_get_options("sgivwfb", &option))
 864                 return -ENODEV;
 865         sgivwfb_setup(option);
 866 #endif
 867         ret = platform_driver_register(&sgivwfb_driver);
 868         if (!ret) {
 869                 sgivwfb_device = platform_device_alloc("sgivwfb", 0);
 870                 if (sgivwfb_device) {
 871                         ret = platform_device_add(sgivwfb_device);
 872                 } else
 873                         ret = -ENOMEM;
 874                 if (ret) {
 875                         platform_driver_unregister(&sgivwfb_driver);
 876                         platform_device_put(sgivwfb_device);
 877                 }
 878         }
 879         return ret;
 880 }
 881
 882 module_init(sgivwfb_init);
 883
 884 #ifdef MODULE
 885 MODULE_LICENSE("GPL");
 886
 887 static void __exit sgivwfb_exit(void)
 888 {
 889         platform_device_unregister(sgivwfb_device);
 890         platform_driver_unregister(&sgivwfb_driver);
 891 }
 892
 893 module_exit(sgivwfb_exit);
 894
 895 #endif                          /* MODULE */