ARM: dts: Add I2S dt node for exynos3250
[cascardo/linux.git] / include / dt-bindings / clock / r8a7791-clock.h
1 /*
2  * Copyright 2013 Ideas On Board SPRL
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  */
9
10 #ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
11 #define __DT_BINDINGS_CLOCK_R8A7791_H__
12
13 /* CPG */
14 #define R8A7791_CLK_MAIN                0
15 #define R8A7791_CLK_PLL0                1
16 #define R8A7791_CLK_PLL1                2
17 #define R8A7791_CLK_PLL3                3
18 #define R8A7791_CLK_LB                  4
19 #define R8A7791_CLK_QSPI                5
20 #define R8A7791_CLK_SDH                 6
21 #define R8A7791_CLK_SD0                 7
22 #define R8A7791_CLK_Z                   8
23
24 /* MSTP0 */
25 #define R8A7791_CLK_MSIOF0              0
26
27 /* MSTP1 */
28 #define R8A7791_CLK_TMU1                11
29 #define R8A7791_CLK_TMU3                21
30 #define R8A7791_CLK_TMU2                22
31 #define R8A7791_CLK_CMT0                24
32 #define R8A7791_CLK_TMU0                25
33 #define R8A7791_CLK_VSP1_DU1            27
34 #define R8A7791_CLK_VSP1_DU0            28
35 #define R8A7791_CLK_VSP1_S              31
36
37 /* MSTP2 */
38 #define R8A7791_CLK_SCIFA2              2
39 #define R8A7791_CLK_SCIFA1              3
40 #define R8A7791_CLK_SCIFA0              4
41 #define R8A7791_CLK_MSIOF2              5
42 #define R8A7791_CLK_SCIFB0              6
43 #define R8A7791_CLK_SCIFB1              7
44 #define R8A7791_CLK_MSIOF1              8
45 #define R8A7791_CLK_SCIFB2              16
46 #define R8A7791_CLK_SYS_DMAC1           18
47 #define R8A7791_CLK_SYS_DMAC0           19
48
49 /* MSTP3 */
50 #define R8A7791_CLK_TPU0                4
51 #define R8A7791_CLK_SDHI2               11
52 #define R8A7791_CLK_SDHI1               12
53 #define R8A7791_CLK_SDHI0               14
54 #define R8A7791_CLK_MMCIF0              15
55 #define R8A7791_CLK_IIC0                18
56 #define R8A7791_CLK_IIC1                23
57 #define R8A7791_CLK_SSUSB               28
58 #define R8A7791_CLK_CMT1                29
59 #define R8A7791_CLK_USBDMAC0            30
60 #define R8A7791_CLK_USBDMAC1            31
61
62 /* MSTP5 */
63 #define R8A7791_CLK_THERMAL             22
64 #define R8A7791_CLK_PWM                 23
65
66 /* MSTP7 */
67 #define R8A7791_CLK_EHCI                3
68 #define R8A7791_CLK_HSUSB               4
69 #define R8A7791_CLK_HSCIF2              13
70 #define R8A7791_CLK_SCIF5               14
71 #define R8A7791_CLK_SCIF4               15
72 #define R8A7791_CLK_HSCIF1              16
73 #define R8A7791_CLK_HSCIF0              17
74 #define R8A7791_CLK_SCIF3               18
75 #define R8A7791_CLK_SCIF2               19
76 #define R8A7791_CLK_SCIF1               20
77 #define R8A7791_CLK_SCIF0               21
78 #define R8A7791_CLK_DU1                 23
79 #define R8A7791_CLK_DU0                 24
80 #define R8A7791_CLK_LVDS0               26
81
82 /* MSTP8 */
83 #define R8A7791_CLK_VIN2                9
84 #define R8A7791_CLK_VIN1                10
85 #define R8A7791_CLK_VIN0                11
86 #define R8A7791_CLK_ETHER               13
87 #define R8A7791_CLK_SATA1               14
88 #define R8A7791_CLK_SATA0               15
89
90 /* MSTP9 */
91 #define R8A7791_CLK_GPIO7               4
92 #define R8A7791_CLK_GPIO6               5
93 #define R8A7791_CLK_GPIO5               7
94 #define R8A7791_CLK_GPIO4               8
95 #define R8A7791_CLK_GPIO3               9
96 #define R8A7791_CLK_GPIO2               10
97 #define R8A7791_CLK_GPIO1               11
98 #define R8A7791_CLK_GPIO0               12
99 #define R8A7791_CLK_RCAN1               15
100 #define R8A7791_CLK_RCAN0               16
101 #define R8A7791_CLK_QSPI_MOD            17
102 #define R8A7791_CLK_I2C5                25
103 #define R8A7791_CLK_IICDVFS             26
104 #define R8A7791_CLK_I2C4                27
105 #define R8A7791_CLK_I2C3                28
106 #define R8A7791_CLK_I2C2                29
107 #define R8A7791_CLK_I2C1                30
108 #define R8A7791_CLK_I2C0                31
109
110 /* MSTP11 */
111 #define R8A7791_CLK_SCIFA3              6
112 #define R8A7791_CLK_SCIFA4              7
113 #define R8A7791_CLK_SCIFA5              8
114
115 #endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */