include/linux/qed/qed_if.h

   1 /* QLogic qed NIC Driver
   2  *
   3  * Copyright (c) 2015 QLogic Corporation
   4  *
   5  * This software is available under the terms of the GNU General Public License
   6  * (GPL) Version 2, available from the file COPYING in the main directory of
   7  * this source tree.
   8  */
   9
  10 #ifndef _QED_IF_H
  11 #define _QED_IF_H
  12
  13 #include <linux/types.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/netdevice.h>
  16 #include <linux/pci.h>
  17 #include <linux/skbuff.h>
  18 #include <linux/types.h>
  19 #include <asm/byteorder.h>
  20 #include <linux/io.h>
  21 #include <linux/compiler.h>
  22 #include <linux/kernel.h>
  23 #include <linux/list.h>
  24 #include <linux/slab.h>
  25 #include <linux/qed/common_hsi.h>
  26 #include <linux/qed/qed_chain.h>
  27
  28 enum dcbx_protocol_type {
  29         DCBX_PROTOCOL_ISCSI,
  30         DCBX_PROTOCOL_FCOE,
  31         DCBX_PROTOCOL_ROCE,
  32         DCBX_PROTOCOL_ROCE_V2,
  33         DCBX_PROTOCOL_ETH,
  34         DCBX_MAX_PROTOCOL_TYPE
  35 };
  36
  37 #define QED_ROCE_PROTOCOL_INDEX (3)
  38
  39 #ifdef CONFIG_DCB
  40 #define QED_LLDP_CHASSIS_ID_STAT_LEN 4
  41 #define QED_LLDP_PORT_ID_STAT_LEN 4
  42 #define QED_DCBX_MAX_APP_PROTOCOL 32
  43 #define QED_MAX_PFC_PRIORITIES 8
  44 #define QED_DCBX_DSCP_SIZE 64
  45
  46 struct qed_dcbx_lldp_remote {
  47         u32 peer_chassis_id[QED_LLDP_CHASSIS_ID_STAT_LEN];
  48         u32 peer_port_id[QED_LLDP_PORT_ID_STAT_LEN];
  49         bool enable_rx;
  50         bool enable_tx;
  51         u32 tx_interval;
  52         u32 max_credit;
  53 };
  54
  55 struct qed_dcbx_lldp_local {
  56         u32 local_chassis_id[QED_LLDP_CHASSIS_ID_STAT_LEN];
  57         u32 local_port_id[QED_LLDP_PORT_ID_STAT_LEN];
  58 };
  59
  60 struct qed_dcbx_app_prio {
  61         u8 roce;
  62         u8 roce_v2;
  63         u8 fcoe;
  64         u8 iscsi;
  65         u8 eth;
  66 };
  67
  68 struct qed_dbcx_pfc_params {
  69         bool willing;
  70         bool enabled;
  71         u8 prio[QED_MAX_PFC_PRIORITIES];
  72         u8 max_tc;
  73 };
  74
  75 enum qed_dcbx_sf_ieee_type {
  76         QED_DCBX_SF_IEEE_ETHTYPE,
  77         QED_DCBX_SF_IEEE_TCP_PORT,
  78         QED_DCBX_SF_IEEE_UDP_PORT,
  79         QED_DCBX_SF_IEEE_TCP_UDP_PORT
  80 };
  81
  82 struct qed_app_entry {
  83         bool ethtype;
  84         enum qed_dcbx_sf_ieee_type sf_ieee;
  85         bool enabled;
  86         u8 prio;
  87         u16 proto_id;
  88         enum dcbx_protocol_type proto_type;
  89 };
  90
  91 struct qed_dcbx_params {
  92         struct qed_app_entry app_entry[QED_DCBX_MAX_APP_PROTOCOL];
  93         u16 num_app_entries;
  94         bool app_willing;
  95         bool app_valid;
  96         bool app_error;
  97         bool ets_willing;
  98         bool ets_enabled;
  99         bool ets_cbs;
 100         bool valid;
 101         u8 ets_pri_tc_tbl[QED_MAX_PFC_PRIORITIES];
 102         u8 ets_tc_bw_tbl[QED_MAX_PFC_PRIORITIES];
 103         u8 ets_tc_tsa_tbl[QED_MAX_PFC_PRIORITIES];
 104         struct qed_dbcx_pfc_params pfc;
 105         u8 max_ets_tc;
 106 };
 107
 108 struct qed_dcbx_admin_params {
 109         struct qed_dcbx_params params;
 110         bool valid;
 111 };
 112
 113 struct qed_dcbx_remote_params {
 114         struct qed_dcbx_params params;
 115         bool valid;
 116 };
 117
 118 struct qed_dcbx_operational_params {
 119         struct qed_dcbx_app_prio app_prio;
 120         struct qed_dcbx_params params;
 121         bool valid;
 122         bool enabled;
 123         bool ieee;
 124         bool cee;
 125         u32 err;
 126 };
 127
 128 struct qed_dcbx_get {
 129         struct qed_dcbx_operational_params operational;
 130         struct qed_dcbx_lldp_remote lldp_remote;
 131         struct qed_dcbx_lldp_local lldp_local;
 132         struct qed_dcbx_remote_params remote;
 133         struct qed_dcbx_admin_params local;
 134 };
 135 #endif
 136
 137 enum qed_led_mode {
 138         QED_LED_MODE_OFF,
 139         QED_LED_MODE_ON,
 140         QED_LED_MODE_RESTORE
 141 };
 142
 143 #define DIRECT_REG_WR(reg_addr, val) writel((u32)val, \
 144                                             (void __iomem *)(reg_addr))
 145
 146 #define DIRECT_REG_RD(reg_addr) readl((void __iomem *)(reg_addr))
 147
 148 #define QED_COALESCE_MAX 0xFF
 149
 150 /* forward */
 151 struct qed_dev;
 152
 153 struct qed_eth_pf_params {
 154         /* The following parameters are used during HW-init
 155          * and these parameters need to be passed as arguments
 156          * to update_pf_params routine invoked before slowpath start
 157          */
 158         u16 num_cons;
 159 };
 160
 161 /* Most of the the parameters below are described in the FW iSCSI / TCP HSI */
 162 struct qed_iscsi_pf_params {
 163         u64 glbl_q_params_addr;
 164         u64 bdq_pbl_base_addr[2];
 165         u32 max_cwnd;
 166         u16 cq_num_entries;
 167         u16 cmdq_num_entries;
 168         u16 dup_ack_threshold;
 169         u16 tx_sws_timer;
 170         u16 min_rto;
 171         u16 min_rto_rt;
 172         u16 max_rto;
 173
 174         /* The following parameters are used during HW-init
 175          * and these parameters need to be passed as arguments
 176          * to update_pf_params routine invoked before slowpath start
 177          */
 178         u16 num_cons;
 179         u16 num_tasks;
 180
 181         /* The following parameters are used during protocol-init */
 182         u16 half_way_close_timeout;
 183         u16 bdq_xoff_threshold[2];
 184         u16 bdq_xon_threshold[2];
 185         u16 cmdq_xoff_threshold;
 186         u16 cmdq_xon_threshold;
 187         u16 rq_buffer_size;
 188
 189         u8 num_sq_pages_in_ring;
 190         u8 num_r2tq_pages_in_ring;
 191         u8 num_uhq_pages_in_ring;
 192         u8 num_queues;
 193         u8 log_page_size;
 194         u8 rqe_log_size;
 195         u8 max_fin_rt;
 196         u8 gl_rq_pi;
 197         u8 gl_cmd_pi;
 198         u8 debug_mode;
 199         u8 ll2_ooo_queue_id;
 200         u8 ooo_enable;
 201
 202         u8 is_target;
 203         u8 bdq_pbl_num_entries[2];
 204 };
 205
 206 struct qed_rdma_pf_params {
 207         /* Supplied to QED during resource allocation (may affect the ILT and
 208          * the doorbell BAR).
 209          */
 210         u32 min_dpis;           /* number of requested DPIs */
 211         u32 num_mrs;            /* number of requested memory regions */
 212         u32 num_qps;            /* number of requested Queue Pairs */
 213         u32 num_srqs;           /* number of requested SRQ */
 214         u8 roce_edpm_mode;      /* see QED_ROCE_EDPM_MODE_ENABLE */
 215         u8 gl_pi;               /* protocol index */
 216
 217         /* Will allocate rate limiters to be used with QPs */
 218         u8 enable_dcqcn;
 219 };
 220
 221 struct qed_pf_params {
 222         struct qed_eth_pf_params eth_pf_params;
 223         struct qed_iscsi_pf_params iscsi_pf_params;
 224         struct qed_rdma_pf_params rdma_pf_params;
 225 };
 226
 227 enum qed_int_mode {
 228         QED_INT_MODE_INTA,
 229         QED_INT_MODE_MSIX,
 230         QED_INT_MODE_MSI,
 231         QED_INT_MODE_POLL,
 232 };
 233
 234 struct qed_sb_info {
 235         struct status_block     *sb_virt;
 236         dma_addr_t              sb_phys;
 237         u32                     sb_ack; /* Last given ack */
 238         u16                     igu_sb_id;
 239         void __iomem            *igu_addr;
 240         u8                      flags;
 241 #define QED_SB_INFO_INIT        0x1
 242 #define QED_SB_INFO_SETUP       0x2
 243
 244         struct qed_dev          *cdev;
 245 };
 246
 247 struct qed_dev_info {
 248         unsigned long   pci_mem_start;
 249         unsigned long   pci_mem_end;
 250         unsigned int    pci_irq;
 251         u8              num_hwfns;
 252
 253         u8              hw_mac[ETH_ALEN];
 254         bool            is_mf_default;
 255
 256         /* FW version */
 257         u16             fw_major;
 258         u16             fw_minor;
 259         u16             fw_rev;
 260         u16             fw_eng;
 261
 262         /* MFW version */
 263         u32             mfw_rev;
 264
 265         u32             flash_size;
 266         u8              mf_mode;
 267         bool            tx_switching;
 268         bool            rdma_supported;
 269 };
 270
 271 enum qed_sb_type {
 272         QED_SB_TYPE_L2_QUEUE,
 273         QED_SB_TYPE_CNQ,
 274 };
 275
 276 enum qed_protocol {
 277         QED_PROTOCOL_ETH,
 278         QED_PROTOCOL_ISCSI,
 279 };
 280
 281 enum qed_link_mode_bits {
 282         QED_LM_FIBRE_BIT = BIT(0),
 283         QED_LM_Autoneg_BIT = BIT(1),
 284         QED_LM_Asym_Pause_BIT = BIT(2),
 285         QED_LM_Pause_BIT = BIT(3),
 286         QED_LM_1000baseT_Half_BIT = BIT(4),
 287         QED_LM_1000baseT_Full_BIT = BIT(5),
 288         QED_LM_10000baseKR_Full_BIT = BIT(6),
 289         QED_LM_25000baseKR_Full_BIT = BIT(7),
 290         QED_LM_40000baseLR4_Full_BIT = BIT(8),
 291         QED_LM_50000baseKR2_Full_BIT = BIT(9),
 292         QED_LM_100000baseKR4_Full_BIT = BIT(10),
 293         QED_LM_COUNT = 11
 294 };
 295
 296 struct qed_link_params {
 297         bool    link_up;
 298
 299 #define QED_LINK_OVERRIDE_SPEED_AUTONEG         BIT(0)
 300 #define QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS      BIT(1)
 301 #define QED_LINK_OVERRIDE_SPEED_FORCED_SPEED    BIT(2)
 302 #define QED_LINK_OVERRIDE_PAUSE_CONFIG          BIT(3)
 303 #define QED_LINK_OVERRIDE_LOOPBACK_MODE         BIT(4)
 304         u32     override_flags;
 305         bool    autoneg;
 306         u32     adv_speeds;
 307         u32     forced_speed;
 308 #define QED_LINK_PAUSE_AUTONEG_ENABLE           BIT(0)
 309 #define QED_LINK_PAUSE_RX_ENABLE                BIT(1)
 310 #define QED_LINK_PAUSE_TX_ENABLE                BIT(2)
 311         u32     pause_config;
 312 #define QED_LINK_LOOPBACK_NONE                  BIT(0)
 313 #define QED_LINK_LOOPBACK_INT_PHY               BIT(1)
 314 #define QED_LINK_LOOPBACK_EXT_PHY               BIT(2)
 315 #define QED_LINK_LOOPBACK_EXT                   BIT(3)
 316 #define QED_LINK_LOOPBACK_MAC                   BIT(4)
 317         u32     loopback_mode;
 318 };
 319
 320 struct qed_link_output {
 321         bool    link_up;
 322
 323         /* In QED_LM_* defs */
 324         u32     supported_caps;
 325         u32     advertised_caps;
 326         u32     lp_caps;
 327
 328         u32     speed;                  /* In Mb/s */
 329         u8      duplex;                 /* In DUPLEX defs */
 330         u8      port;                   /* In PORT defs */
 331         bool    autoneg;
 332         u32     pause_config;
 333 };
 334
 335 struct qed_probe_params {
 336         enum qed_protocol protocol;
 337         u32 dp_module;
 338         u8 dp_level;
 339         bool is_vf;
 340 };
 341
 342 #define QED_DRV_VER_STR_SIZE 12
 343 struct qed_slowpath_params {
 344         u32     int_mode;
 345         u8      drv_major;
 346         u8      drv_minor;
 347         u8      drv_rev;
 348         u8      drv_eng;
 349         u8      name[QED_DRV_VER_STR_SIZE];
 350 };
 351
 352 #define ILT_PAGE_SIZE_TCFC 0x8000 /* 32KB */
 353
 354 struct qed_int_info {
 355         struct msix_entry       *msix;
 356         u8                      msix_cnt;
 357
 358         /* This should be updated by the protocol driver */
 359         u8                      used_cnt;
 360 };
 361
 362 struct qed_common_cb_ops {
 363         void    (*link_update)(void                     *dev,
 364                                struct qed_link_output   *link);
 365 };
 366
 367 struct qed_selftest_ops {
 368 /**
 369  * @brief selftest_interrupt - Perform interrupt test
 370  *
 371  * @param cdev
 372  *
 373  * @return 0 on success, error otherwise.
 374  */
 375         int (*selftest_interrupt)(struct qed_dev *cdev);
 376
 377 /**
 378  * @brief selftest_memory - Perform memory test
 379  *
 380  * @param cdev
 381  *
 382  * @return 0 on success, error otherwise.
 383  */
 384         int (*selftest_memory)(struct qed_dev *cdev);
 385
 386 /**
 387  * @brief selftest_register - Perform register test
 388  *
 389  * @param cdev
 390  *
 391  * @return 0 on success, error otherwise.
 392  */
 393         int (*selftest_register)(struct qed_dev *cdev);
 394
 395 /**
 396  * @brief selftest_clock - Perform clock test
 397  *
 398  * @param cdev
 399  *
 400  * @return 0 on success, error otherwise.
 401  */
 402         int (*selftest_clock)(struct qed_dev *cdev);
 403 };
 404
 405 struct qed_common_ops {
 406         struct qed_selftest_ops *selftest;
 407
 408         struct qed_dev* (*probe)(struct pci_dev *dev,
 409                                  struct qed_probe_params *params);
 410
 411         void            (*remove)(struct qed_dev *cdev);
 412
 413         int             (*set_power_state)(struct qed_dev *cdev,
 414                                            pci_power_t state);
 415
 416         void            (*set_id)(struct qed_dev *cdev,
 417                                   char name[],
 418                                   char ver_str[]);
 419
 420         /* Client drivers need to make this call before slowpath_start.
 421          * PF params required for the call before slowpath_start is
 422          * documented within the qed_pf_params structure definition.
 423          */
 424         void            (*update_pf_params)(struct qed_dev *cdev,
 425                                             struct qed_pf_params *params);
 426         int             (*slowpath_start)(struct qed_dev *cdev,
 427                                           struct qed_slowpath_params *params);
 428
 429         int             (*slowpath_stop)(struct qed_dev *cdev);
 430
 431         /* Requests to use `cnt' interrupts for fastpath.
 432          * upon success, returns number of interrupts allocated for fastpath.
 433          */
 434         int             (*set_fp_int)(struct qed_dev *cdev,
 435                                       u16 cnt);
 436
 437         /* Fills `info' with pointers required for utilizing interrupts */
 438         int             (*get_fp_int)(struct qed_dev *cdev,
 439                                       struct qed_int_info *info);
 440
 441         u32             (*sb_init)(struct qed_dev *cdev,
 442                                    struct qed_sb_info *sb_info,
 443                                    void *sb_virt_addr,
 444                                    dma_addr_t sb_phy_addr,
 445                                    u16 sb_id,
 446                                    enum qed_sb_type type);
 447
 448         u32             (*sb_release)(struct qed_dev *cdev,
 449                                       struct qed_sb_info *sb_info,
 450                                       u16 sb_id);
 451
 452         void            (*simd_handler_config)(struct qed_dev *cdev,
 453                                                void *token,
 454                                                int index,
 455                                                void (*handler)(void *));
 456
 457         void            (*simd_handler_clean)(struct qed_dev *cdev,
 458                                               int index);
 459
 460         int (*dbg_all_data) (struct qed_dev *cdev, void *buffer);
 461
 462         int (*dbg_all_data_size) (struct qed_dev *cdev);
 463
 464 /**
 465  * @brief can_link_change - can the instance change the link or not
 466  *
 467  * @param cdev
 468  *
 469  * @return true if link-change is allowed, false otherwise.
 470  */
 471         bool (*can_link_change)(struct qed_dev *cdev);
 472
 473 /**
 474  * @brief set_link - set links according to params
 475  *
 476  * @param cdev
 477  * @param params - values used to override the default link configuration
 478  *
 479  * @return 0 on success, error otherwise.
 480  */
 481         int             (*set_link)(struct qed_dev *cdev,
 482                                     struct qed_link_params *params);
 483
 484 /**
 485  * @brief get_link - returns the current link state.
 486  *
 487  * @param cdev
 488  * @param if_link - structure to be filled with current link configuration.
 489  */
 490         void            (*get_link)(struct qed_dev *cdev,
 491                                     struct qed_link_output *if_link);
 492
 493 /**
 494  * @brief - drains chip in case Tx completions fail to arrive due to pause.
 495  *
 496  * @param cdev
 497  */
 498         int             (*drain)(struct qed_dev *cdev);
 499
 500 /**
 501  * @brief update_msglvl - update module debug level
 502  *
 503  * @param cdev
 504  * @param dp_module
 505  * @param dp_level
 506  */
 507         void            (*update_msglvl)(struct qed_dev *cdev,
 508                                          u32 dp_module,
 509                                          u8 dp_level);
 510
 511         int             (*chain_alloc)(struct qed_dev *cdev,
 512                                        enum qed_chain_use_mode intended_use,
 513                                        enum qed_chain_mode mode,
 514                                        enum qed_chain_cnt_type cnt_type,
 515                                        u32 num_elems,
 516                                        size_t elem_size,
 517                                        struct qed_chain *p_chain);
 518
 519         void            (*chain_free)(struct qed_dev *cdev,
 520                                       struct qed_chain *p_chain);
 521
 522 /**
 523  * @brief get_coalesce - Get coalesce parameters in usec
 524  *
 525  * @param cdev
 526  * @param rx_coal - Rx coalesce value in usec
 527  * @param tx_coal - Tx coalesce value in usec
 528  *
 529  */
 530         void (*get_coalesce)(struct qed_dev *cdev, u16 *rx_coal, u16 *tx_coal);
 531
 532 /**
 533  * @brief set_coalesce - Configure Rx coalesce value in usec
 534  *
 535  * @param cdev
 536  * @param rx_coal - Rx coalesce value in usec
 537  * @param tx_coal - Tx coalesce value in usec
 538  * @param qid - Queue index
 539  * @param sb_id - Status Block Id
 540  *
 541  * @return 0 on success, error otherwise.
 542  */
 543         int (*set_coalesce)(struct qed_dev *cdev, u16 rx_coal, u16 tx_coal,
 544                             u8 qid, u16 sb_id);
 545
 546 /**
 547  * @brief set_led - Configure LED mode
 548  *
 549  * @param cdev
 550  * @param mode - LED mode
 551  *
 552  * @return 0 on success, error otherwise.
 553  */
 554         int (*set_led)(struct qed_dev *cdev,
 555                        enum qed_led_mode mode);
 556 };
 557
 558 #define MASK_FIELD(_name, _value) \
 559         ((_value) &= (_name ## _MASK))
 560
 561 #define FIELD_VALUE(_name, _value) \
 562         ((_value & _name ## _MASK) << _name ## _SHIFT)
 563
 564 #define SET_FIELD(value, name, flag)                           \
 565         do {                                                   \
 566                 (value) &= ~(name ## _MASK << name ## _SHIFT); \
 567                 (value) |= (((u64)flag) << (name ## _SHIFT));  \
 568         } while (0)
 569
 570 #define GET_FIELD(value, name) \
 571         (((value) >> (name ## _SHIFT)) & name ## _MASK)
 572
 573 /* Debug print definitions */
 574 #define DP_ERR(cdev, fmt, ...)                                               \
 575                 pr_err("[%s:%d(%s)]" fmt,                                    \
 576                        __func__, __LINE__,                                   \
 577                        DP_NAME(cdev) ? DP_NAME(cdev) : "",                   \
 578                        ## __VA_ARGS__)                                       \
 579
 580 #define DP_NOTICE(cdev, fmt, ...)                                     \
 581         do {                                                          \
 582                 if (unlikely((cdev)->dp_level <= QED_LEVEL_NOTICE)) { \
 583                         pr_notice("[%s:%d(%s)]" fmt,                  \
 584                                   __func__, __LINE__,                 \
 585                                   DP_NAME(cdev) ? DP_NAME(cdev) : "", \
 586                                   ## __VA_ARGS__);                    \
 587                                                                       \
 588                 }                                                     \
 589         } while (0)
 590
 591 #define DP_INFO(cdev, fmt, ...)                                       \
 592         do {                                                          \
 593                 if (unlikely((cdev)->dp_level <= QED_LEVEL_INFO)) {   \
 594                         pr_notice("[%s:%d(%s)]" fmt,                  \
 595                                   __func__, __LINE__,                 \
 596                                   DP_NAME(cdev) ? DP_NAME(cdev) : "", \
 597                                   ## __VA_ARGS__);                    \
 598                 }                                                     \
 599         } while (0)
 600
 601 #define DP_VERBOSE(cdev, module, fmt, ...)                              \
 602         do {                                                            \
 603                 if (unlikely(((cdev)->dp_level <= QED_LEVEL_VERBOSE) && \
 604                              ((cdev)->dp_module & module))) {           \
 605                         pr_notice("[%s:%d(%s)]" fmt,                    \
 606                                   __func__, __LINE__,                   \
 607                                   DP_NAME(cdev) ? DP_NAME(cdev) : "",   \
 608                                   ## __VA_ARGS__);                      \
 609                 }                                                       \
 610         } while (0)
 611
 612 enum DP_LEVEL {
 613         QED_LEVEL_VERBOSE       = 0x0,
 614         QED_LEVEL_INFO          = 0x1,
 615         QED_LEVEL_NOTICE        = 0x2,
 616         QED_LEVEL_ERR           = 0x3,
 617 };
 618
 619 #define QED_LOG_LEVEL_SHIFT     (30)
 620 #define QED_LOG_VERBOSE_MASK    (0x3fffffff)
 621 #define QED_LOG_INFO_MASK       (0x40000000)
 622 #define QED_LOG_NOTICE_MASK     (0x80000000)
 623
 624 enum DP_MODULE {
 625         QED_MSG_SPQ     = 0x10000,
 626         QED_MSG_STATS   = 0x20000,
 627         QED_MSG_DCB     = 0x40000,
 628         QED_MSG_IOV     = 0x80000,
 629         QED_MSG_SP      = 0x100000,
 630         QED_MSG_STORAGE = 0x200000,
 631         QED_MSG_CXT     = 0x800000,
 632         QED_MSG_LL2     = 0x1000000,
 633         QED_MSG_ILT     = 0x2000000,
 634         QED_MSG_RDMA    = 0x4000000,
 635         QED_MSG_DEBUG   = 0x8000000,
 636         /* to be added...up to 0x8000000 */
 637 };
 638
 639 enum qed_mf_mode {
 640         QED_MF_DEFAULT,
 641         QED_MF_OVLAN,
 642         QED_MF_NPAR,
 643 };
 644
 645 struct qed_eth_stats {
 646         u64     no_buff_discards;
 647         u64     packet_too_big_discard;
 648         u64     ttl0_discard;
 649         u64     rx_ucast_bytes;
 650         u64     rx_mcast_bytes;
 651         u64     rx_bcast_bytes;
 652         u64     rx_ucast_pkts;
 653         u64     rx_mcast_pkts;
 654         u64     rx_bcast_pkts;
 655         u64     mftag_filter_discards;
 656         u64     mac_filter_discards;
 657         u64     tx_ucast_bytes;
 658         u64     tx_mcast_bytes;
 659         u64     tx_bcast_bytes;
 660         u64     tx_ucast_pkts;
 661         u64     tx_mcast_pkts;
 662         u64     tx_bcast_pkts;
 663         u64     tx_err_drop_pkts;
 664         u64     tpa_coalesced_pkts;
 665         u64     tpa_coalesced_events;
 666         u64     tpa_aborts_num;
 667         u64     tpa_not_coalesced_pkts;
 668         u64     tpa_coalesced_bytes;
 669
 670         /* port */
 671         u64     rx_64_byte_packets;
 672         u64     rx_65_to_127_byte_packets;
 673         u64     rx_128_to_255_byte_packets;
 674         u64     rx_256_to_511_byte_packets;
 675         u64     rx_512_to_1023_byte_packets;
 676         u64     rx_1024_to_1518_byte_packets;
 677         u64     rx_1519_to_1522_byte_packets;
 678         u64     rx_1519_to_2047_byte_packets;
 679         u64     rx_2048_to_4095_byte_packets;
 680         u64     rx_4096_to_9216_byte_packets;
 681         u64     rx_9217_to_16383_byte_packets;
 682         u64     rx_crc_errors;
 683         u64     rx_mac_crtl_frames;
 684         u64     rx_pause_frames;
 685         u64     rx_pfc_frames;
 686         u64     rx_align_errors;
 687         u64     rx_carrier_errors;
 688         u64     rx_oversize_packets;
 689         u64     rx_jabbers;
 690         u64     rx_undersize_packets;
 691         u64     rx_fragments;
 692         u64     tx_64_byte_packets;
 693         u64     tx_65_to_127_byte_packets;
 694         u64     tx_128_to_255_byte_packets;
 695         u64     tx_256_to_511_byte_packets;
 696         u64     tx_512_to_1023_byte_packets;
 697         u64     tx_1024_to_1518_byte_packets;
 698         u64     tx_1519_to_2047_byte_packets;
 699         u64     tx_2048_to_4095_byte_packets;
 700         u64     tx_4096_to_9216_byte_packets;
 701         u64     tx_9217_to_16383_byte_packets;
 702         u64     tx_pause_frames;
 703         u64     tx_pfc_frames;
 704         u64     tx_lpi_entry_count;
 705         u64     tx_total_collisions;
 706         u64     brb_truncates;
 707         u64     brb_discards;
 708         u64     rx_mac_bytes;
 709         u64     rx_mac_uc_packets;
 710         u64     rx_mac_mc_packets;
 711         u64     rx_mac_bc_packets;
 712         u64     rx_mac_frames_ok;
 713         u64     tx_mac_bytes;
 714         u64     tx_mac_uc_packets;
 715         u64     tx_mac_mc_packets;
 716         u64     tx_mac_bc_packets;
 717         u64     tx_mac_ctrl_frames;
 718 };
 719
 720 #define QED_SB_IDX              0x0002
 721
 722 #define RX_PI           0
 723 #define TX_PI(tc)       (RX_PI + 1 + tc)
 724
 725 struct qed_sb_cnt_info {
 726         int     sb_cnt;
 727         int     sb_iov_cnt;
 728         int     sb_free_blk;
 729 };
 730
 731 static inline u16 qed_sb_update_sb_idx(struct qed_sb_info *sb_info)
 732 {
 733         u32 prod = 0;
 734         u16 rc = 0;
 735
 736         prod = le32_to_cpu(sb_info->sb_virt->prod_index) &
 737                STATUS_BLOCK_PROD_INDEX_MASK;
 738         if (sb_info->sb_ack != prod) {
 739                 sb_info->sb_ack = prod;
 740                 rc |= QED_SB_IDX;
 741         }
 742
 743         /* Let SB update */
 744         mmiowb();
 745         return rc;
 746 }
 747
 748 /**
 749  *
 750  * @brief This function creates an update command for interrupts that is
 751  *        written to the IGU.
 752  *
 753  * @param sb_info       - This is the structure allocated and
 754  *                 initialized per status block. Assumption is
 755  *                 that it was initialized using qed_sb_init
 756  * @param int_cmd       - Enable/Disable/Nop
 757  * @param upd_flg       - whether igu consumer should be
 758  *                 updated.
 759  *
 760  * @return inline void
 761  */
 762 static inline void qed_sb_ack(struct qed_sb_info *sb_info,
 763                               enum igu_int_cmd int_cmd,
 764                               u8 upd_flg)
 765 {
 766         struct igu_prod_cons_update igu_ack = { 0 };
 767
 768         igu_ack.sb_id_and_flags =
 769                 ((sb_info->sb_ack << IGU_PROD_CONS_UPDATE_SB_INDEX_SHIFT) |
 770                  (upd_flg << IGU_PROD_CONS_UPDATE_UPDATE_FLAG_SHIFT) |
 771                  (int_cmd << IGU_PROD_CONS_UPDATE_ENABLE_INT_SHIFT) |
 772                  (IGU_SEG_ACCESS_REG <<
 773                   IGU_PROD_CONS_UPDATE_SEGMENT_ACCESS_SHIFT));
 774
 775         DIRECT_REG_WR(sb_info->igu_addr, igu_ack.sb_id_and_flags);
 776
 777         /* Both segments (interrupts & acks) are written to same place address;
 778          * Need to guarantee all commands will be received (in-order) by HW.
 779          */
 780         mmiowb();
 781         barrier();
 782 }
 783
 784 static inline void __internal_ram_wr(void *p_hwfn,
 785                                      void __iomem *addr,
 786                                      int size,
 787                                      u32 *data)
 788
 789 {
 790         unsigned int i;
 791
 792         for (i = 0; i < size / sizeof(*data); i++)
 793                 DIRECT_REG_WR(&((u32 __iomem *)addr)[i], data[i]);
 794 }
 795
 796 static inline void internal_ram_wr(void __iomem *addr,
 797                                    int size,
 798                                    u32 *data)
 799 {
 800         __internal_ram_wr(NULL, addr, size, data);
 801 }
 802
 803 enum qed_rss_caps {
 804         QED_RSS_IPV4            = 0x1,
 805         QED_RSS_IPV6            = 0x2,
 806         QED_RSS_IPV4_TCP        = 0x4,
 807         QED_RSS_IPV6_TCP        = 0x8,
 808         QED_RSS_IPV4_UDP        = 0x10,
 809         QED_RSS_IPV6_UDP        = 0x20,
 810 };
 811
 812 #define QED_RSS_IND_TABLE_SIZE 128
 813 #define QED_RSS_KEY_SIZE 10 /* size in 32b chunks */
 814 #endif