sound/pci/emu10k1/emu10k1_main.c

   1 /*
   2  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
   3  *                   Creative Labs, Inc.
   4  *  Routines for control of EMU10K1 chips
   5  *
   6  *  Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
   7  *      Added support for Audigy 2 Value.
   8  *      Added EMU 1010 support.
   9  *      General bug fixes and enhancements.
  10  *
  11  *
  12  *  BUGS:
  13  *    --
  14  *
  15  *  TODO:
  16  *    --
  17  *
  18  *   This program is free software; you can redistribute it and/or modify
  19  *   it under the terms of the GNU General Public License as published by
  20  *   the Free Software Foundation; either version 2 of the License, or
  21  *   (at your option) any later version.
  22  *
  23  *   This program is distributed in the hope that it will be useful,
  24  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  *   GNU General Public License for more details.
  27  *
  28  *   You should have received a copy of the GNU General Public License
  29  *   along with this program; if not, write to the Free Software
  30  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  31  *
  32  */
  33
  34 #include <linux/sched.h>
  35 #include <linux/kthread.h>
  36 #include <linux/delay.h>
  37 #include <linux/init.h>
  38 #include <linux/module.h>
  39 #include <linux/interrupt.h>
  40 #include <linux/pci.h>
  41 #include <linux/slab.h>
  42 #include <linux/vmalloc.h>
  43 #include <linux/mutex.h>
  44
  45
  46 #include <sound/core.h>
  47 #include <sound/emu10k1.h>
  48 #include <linux/firmware.h>
  49 #include "p16v.h"
  50 #include "tina2.h"
  51 #include "p17v.h"
  52
  53
  54 #define HANA_FILENAME "emu/hana.fw"
  55 #define DOCK_FILENAME "emu/audio_dock.fw"
  56 #define EMU1010B_FILENAME "emu/emu1010b.fw"
  57 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
  58 #define EMU0404_FILENAME "emu/emu0404.fw"
  59 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
  60
  61 MODULE_FIRMWARE(HANA_FILENAME);
  62 MODULE_FIRMWARE(DOCK_FILENAME);
  63 MODULE_FIRMWARE(EMU1010B_FILENAME);
  64 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
  65 MODULE_FIRMWARE(EMU0404_FILENAME);
  66 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
  67
  68
  69 /*************************************************************************
  70  * EMU10K1 init / done
  71  *************************************************************************/
  72
  73 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
  74 {
  75         snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
  76         snd_emu10k1_ptr_write(emu, IP, ch, 0);
  77         snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
  78         snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
  79         snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
  80         snd_emu10k1_ptr_write(emu, CPF, ch, 0);
  81         snd_emu10k1_ptr_write(emu, CCR, ch, 0);
  82
  83         snd_emu10k1_ptr_write(emu, PSST, ch, 0);
  84         snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
  85         snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
  86         snd_emu10k1_ptr_write(emu, Z1, ch, 0);
  87         snd_emu10k1_ptr_write(emu, Z2, ch, 0);
  88         snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
  89
  90         snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
  91         snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
  92         snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
  93         snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
  94         snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
  95         snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24);    /* 1 Hz */
  96         snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24);    /* 1 Hz */
  97         snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
  98
  99         /*** these are last so OFF prevents writing ***/
 100         snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
 101         snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
 102         snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
 103         snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
 104         snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
 105
 106         /* Audigy extra stuffs */
 107         if (emu->audigy) {
 108                 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
 109                 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
 110                 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
 111                 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
 112                 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
 113                 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
 114                 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
 115         }
 116 }
 117
 118 static unsigned int spi_dac_init[] = {
 119                 0x00ff,
 120                 0x02ff,
 121                 0x0400,
 122                 0x0520,
 123                 0x0600,
 124                 0x08ff,
 125                 0x0aff,
 126                 0x0cff,
 127                 0x0eff,
 128                 0x10ff,
 129                 0x1200,
 130                 0x1400,
 131                 0x1480,
 132                 0x1800,
 133                 0x1aff,
 134                 0x1cff,
 135                 0x1e00,
 136                 0x0530,
 137                 0x0602,
 138                 0x0622,
 139                 0x1400,
 140 };
 141
 142 static unsigned int i2c_adc_init[][2] = {
 143         { 0x17, 0x00 }, /* Reset */
 144         { 0x07, 0x00 }, /* Timeout */
 145         { 0x0b, 0x22 },  /* Interface control */
 146         { 0x0c, 0x22 },  /* Master mode control */
 147         { 0x0d, 0x08 },  /* Powerdown control */
 148         { 0x0e, 0xcf },  /* Attenuation Left  0x01 = -103dB, 0xff = 24dB */
 149         { 0x0f, 0xcf },  /* Attenuation Right 0.5dB steps */
 150         { 0x10, 0x7b },  /* ALC Control 1 */
 151         { 0x11, 0x00 },  /* ALC Control 2 */
 152         { 0x12, 0x32 },  /* ALC Control 3 */
 153         { 0x13, 0x00 },  /* Noise gate control */
 154         { 0x14, 0xa6 },  /* Limiter control */
 155         { 0x15, ADC_MUX_2 },  /* ADC Mixer control. Mic for A2ZS Notebook */
 156 };
 157
 158 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
 159 {
 160         unsigned int silent_page;
 161         int ch;
 162         u32 tmp;
 163
 164         /* disable audio and lock cache */
 165         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
 166                 HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
 167
 168         /* reset recording buffers */
 169         snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
 170         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
 171         snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
 172         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
 173         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
 174         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
 175
 176         /* disable channel interrupt */
 177         outl(0, emu->port + INTE);
 178         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
 179         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
 180         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
 181         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
 182
 183         if (emu->audigy) {
 184                 /* set SPDIF bypass mode */
 185                 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
 186                 /* enable rear left + rear right AC97 slots */
 187                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
 188                                       AC97SLOT_REAR_LEFT);
 189         }
 190
 191         /* init envelope engine */
 192         for (ch = 0; ch < NUM_G; ch++)
 193                 snd_emu10k1_voice_init(emu, ch);
 194
 195         snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
 196         snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
 197         snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
 198
 199         if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
 200                 /* Hacks for Alice3 to work independent of haP16V driver */
 201                 /* Setup SRCMulti_I2S SamplingRate */
 202                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
 203                 tmp &= 0xfffff1ff;
 204                 tmp |= (0x2<<9);
 205                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
 206
 207                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
 208                 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
 209                 /* Setup SRCMulti Input Audio Enable */
 210                 /* Use 0xFFFFFFFF to enable P16V sounds. */
 211                 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
 212
 213                 /* Enabled Phased (8-channel) P16V playback */
 214                 outl(0x0201, emu->port + HCFG2);
 215                 /* Set playback routing. */
 216                 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
 217         }
 218         if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
 219                 /* Hacks for Alice3 to work independent of haP16V driver */
 220                 dev_info(emu->card->dev, "Audigy2 value: Special config.\n");
 221                 /* Setup SRCMulti_I2S SamplingRate */
 222                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
 223                 tmp &= 0xfffff1ff;
 224                 tmp |= (0x2<<9);
 225                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
 226
 227                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
 228                 outl(0x600000, emu->port + 0x20);
 229                 outl(0x14, emu->port + 0x24);
 230
 231                 /* Setup SRCMulti Input Audio Enable */
 232                 outl(0x7b0000, emu->port + 0x20);
 233                 outl(0xFF000000, emu->port + 0x24);
 234
 235                 /* Setup SPDIF Out Audio Enable */
 236                 /* The Audigy 2 Value has a separate SPDIF out,
 237                  * so no need for a mixer switch
 238                  */
 239                 outl(0x7a0000, emu->port + 0x20);
 240                 outl(0xFF000000, emu->port + 0x24);
 241                 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
 242                 outl(tmp, emu->port + A_IOCFG);
 243         }
 244         if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
 245                 int size, n;
 246
 247                 size = ARRAY_SIZE(spi_dac_init);
 248                 for (n = 0; n < size; n++)
 249                         snd_emu10k1_spi_write(emu, spi_dac_init[n]);
 250
 251                 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
 252                 /* Enable GPIOs
 253                  * GPIO0: Unknown
 254                  * GPIO1: Speakers-enabled.
 255                  * GPIO2: Unknown
 256                  * GPIO3: Unknown
 257                  * GPIO4: IEC958 Output on.
 258                  * GPIO5: Unknown
 259                  * GPIO6: Unknown
 260                  * GPIO7: Unknown
 261                  */
 262                 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
 263         }
 264         if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
 265                 int size, n;
 266
 267                 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
 268                 tmp = inl(emu->port + A_IOCFG);
 269                 outl(tmp | 0x4, emu->port + A_IOCFG);  /* Set bit 2 for mic input */
 270                 tmp = inl(emu->port + A_IOCFG);
 271                 size = ARRAY_SIZE(i2c_adc_init);
 272                 for (n = 0; n < size; n++)
 273                         snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
 274                 for (n = 0; n < 4; n++) {
 275                         emu->i2c_capture_volume[n][0] = 0xcf;
 276                         emu->i2c_capture_volume[n][1] = 0xcf;
 277                 }
 278         }
 279
 280
 281         snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
 282         snd_emu10k1_ptr_write(emu, TCB, 0, 0);  /* taken from original driver */
 283         snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
 284
 285         silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
 286         for (ch = 0; ch < NUM_G; ch++) {
 287                 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
 288                 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
 289         }
 290
 291         if (emu->card_capabilities->emu_model) {
 292                 outl(HCFG_AUTOMUTE_ASYNC |
 293                         HCFG_EMU32_SLAVE |
 294                         HCFG_AUDIOENABLE, emu->port + HCFG);
 295         /*
 296          *  Hokay, setup HCFG
 297          *   Mute Disable Audio = 0
 298          *   Lock Tank Memory = 1
 299          *   Lock Sound Memory = 0
 300          *   Auto Mute = 1
 301          */
 302         } else if (emu->audigy) {
 303                 if (emu->revision == 4) /* audigy2 */
 304                         outl(HCFG_AUDIOENABLE |
 305                              HCFG_AC3ENABLE_CDSPDIF |
 306                              HCFG_AC3ENABLE_GPSPDIF |
 307                              HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 308                 else
 309                         outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 310         /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
 311          * e.g. card_capabilities->joystick */
 312         } else if (emu->model == 0x20 ||
 313             emu->model == 0xc400 ||
 314             (emu->model == 0x21 && emu->revision < 6))
 315                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
 316         else
 317                 /* With on-chip joystick */
 318                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 319
 320         if (enable_ir) {        /* enable IR for SB Live */
 321                 if (emu->card_capabilities->emu_model) {
 322                         ;  /* Disable all access to A_IOCFG for the emu1010 */
 323                 } else if (emu->card_capabilities->i2c_adc) {
 324                         ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 325                 } else if (emu->audigy) {
 326                         unsigned int reg = inl(emu->port + A_IOCFG);
 327                         outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
 328                         udelay(500);
 329                         outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
 330                         udelay(100);
 331                         outl(reg, emu->port + A_IOCFG);
 332                 } else {
 333                         unsigned int reg = inl(emu->port + HCFG);
 334                         outl(reg | HCFG_GPOUT2, emu->port + HCFG);
 335                         udelay(500);
 336                         outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
 337                         udelay(100);
 338                         outl(reg, emu->port + HCFG);
 339                 }
 340         }
 341
 342         if (emu->card_capabilities->emu_model) {
 343                 ;  /* Disable all access to A_IOCFG for the emu1010 */
 344         } else if (emu->card_capabilities->i2c_adc) {
 345                 ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 346         } else if (emu->audigy) {       /* enable analog output */
 347                 unsigned int reg = inl(emu->port + A_IOCFG);
 348                 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
 349         }
 350
 351         return 0;
 352 }
 353
 354 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
 355 {
 356         /*
 357          *  Enable the audio bit
 358          */
 359         outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
 360
 361         /* Enable analog/digital outs on audigy */
 362         if (emu->card_capabilities->emu_model) {
 363                 ;  /* Disable all access to A_IOCFG for the emu1010 */
 364         } else if (emu->card_capabilities->i2c_adc) {
 365                 ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 366         } else if (emu->audigy) {
 367                 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
 368
 369                 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
 370                         /* Unmute Analog now.  Set GPO6 to 1 for Apollo.
 371                          * This has to be done after init ALice3 I2SOut beyond 48KHz.
 372                          * So, sequence is important. */
 373                         outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
 374                 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
 375                         /* Unmute Analog now. */
 376                         outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
 377                 } else {
 378                         /* Disable routing from AC97 line out to Front speakers */
 379                         outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
 380                 }
 381         }
 382
 383 #if 0
 384         {
 385         unsigned int tmp;
 386         /* FIXME: the following routine disables LiveDrive-II !! */
 387         /* TOSLink detection */
 388         emu->tos_link = 0;
 389         tmp = inl(emu->port + HCFG);
 390         if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
 391                 outl(tmp|0x800, emu->port + HCFG);
 392                 udelay(50);
 393                 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
 394                         emu->tos_link = 1;
 395                         outl(tmp, emu->port + HCFG);
 396                 }
 397         }
 398         }
 399 #endif
 400
 401         snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
 402 }
 403
 404 int snd_emu10k1_done(struct snd_emu10k1 *emu)
 405 {
 406         int ch;
 407
 408         outl(0, emu->port + INTE);
 409
 410         /*
 411          *  Shutdown the chip
 412          */
 413         for (ch = 0; ch < NUM_G; ch++)
 414                 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
 415         for (ch = 0; ch < NUM_G; ch++) {
 416                 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
 417                 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
 418                 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
 419                 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
 420         }
 421
 422         /* reset recording buffers */
 423         snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
 424         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
 425         snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
 426         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
 427         snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
 428         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
 429         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
 430         snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
 431         snd_emu10k1_ptr_write(emu, TCB, 0, 0);
 432         if (emu->audigy)
 433                 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
 434         else
 435                 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
 436
 437         /* disable channel interrupt */
 438         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
 439         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
 440         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
 441         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
 442
 443         /* disable audio and lock cache */
 444         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
 445         snd_emu10k1_ptr_write(emu, PTB, 0, 0);
 446
 447         return 0;
 448 }
 449
 450 /*************************************************************************
 451  * ECARD functional implementation
 452  *************************************************************************/
 453
 454 /* In A1 Silicon, these bits are in the HC register */
 455 #define HOOKN_BIT               (1L << 12)
 456 #define HANDN_BIT               (1L << 11)
 457 #define PULSEN_BIT              (1L << 10)
 458
 459 #define EC_GDI1                 (1 << 13)
 460 #define EC_GDI0                 (1 << 14)
 461
 462 #define EC_NUM_CONTROL_BITS     20
 463
 464 #define EC_AC3_DATA_SELN        0x0001L
 465 #define EC_EE_DATA_SEL          0x0002L
 466 #define EC_EE_CNTRL_SELN        0x0004L
 467 #define EC_EECLK                0x0008L
 468 #define EC_EECS                 0x0010L
 469 #define EC_EESDO                0x0020L
 470 #define EC_TRIM_CSN             0x0040L
 471 #define EC_TRIM_SCLK            0x0080L
 472 #define EC_TRIM_SDATA           0x0100L
 473 #define EC_TRIM_MUTEN           0x0200L
 474 #define EC_ADCCAL               0x0400L
 475 #define EC_ADCRSTN              0x0800L
 476 #define EC_DACCAL               0x1000L
 477 #define EC_DACMUTEN             0x2000L
 478 #define EC_LEDN                 0x4000L
 479
 480 #define EC_SPDIF0_SEL_SHIFT     15
 481 #define EC_SPDIF1_SEL_SHIFT     17
 482 #define EC_SPDIF0_SEL_MASK      (0x3L << EC_SPDIF0_SEL_SHIFT)
 483 #define EC_SPDIF1_SEL_MASK      (0x7L << EC_SPDIF1_SEL_SHIFT)
 484 #define EC_SPDIF0_SELECT(_x)    (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
 485 #define EC_SPDIF1_SELECT(_x)    (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
 486 #define EC_CURRENT_PROM_VERSION 0x01    /* Self-explanatory.  This should
 487                                          * be incremented any time the EEPROM's
 488                                          * format is changed.  */
 489
 490 #define EC_EEPROM_SIZE          0x40    /* ECARD EEPROM has 64 16-bit words */
 491
 492 /* Addresses for special values stored in to EEPROM */
 493 #define EC_PROM_VERSION_ADDR    0x20    /* Address of the current prom version */
 494 #define EC_BOARDREV0_ADDR       0x21    /* LSW of board rev */
 495 #define EC_BOARDREV1_ADDR       0x22    /* MSW of board rev */
 496
 497 #define EC_LAST_PROMFILE_ADDR   0x2f
 498
 499 #define EC_SERIALNUM_ADDR       0x30    /* First word of serial number.  The
 500                                          * can be up to 30 characters in length
 501                                          * and is stored as a NULL-terminated
 502                                          * ASCII string.  Any unused bytes must be
 503                                          * filled with zeros */
 504 #define EC_CHECKSUM_ADDR        0x3f    /* Location at which checksum is stored */
 505
 506
 507 /* Most of this stuff is pretty self-evident.  According to the hardware
 508  * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
 509  * offset problem.  Weird.
 510  */
 511 #define EC_RAW_RUN_MODE         (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
 512                                  EC_TRIM_CSN)
 513
 514
 515 #define EC_DEFAULT_ADC_GAIN     0xC4C4
 516 #define EC_DEFAULT_SPDIF0_SEL   0x0
 517 #define EC_DEFAULT_SPDIF1_SEL   0x4
 518
 519 /**************************************************************************
 520  * @func Clock bits into the Ecard's control latch.  The Ecard uses a
 521  *  control latch will is loaded bit-serially by toggling the Modem control
 522  *  lines from function 2 on the E8010.  This function hides these details
 523  *  and presents the illusion that we are actually writing to a distinct
 524  *  register.
 525  */
 526
 527 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
 528 {
 529         unsigned short count;
 530         unsigned int data;
 531         unsigned long hc_port;
 532         unsigned int hc_value;
 533
 534         hc_port = emu->port + HCFG;
 535         hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
 536         outl(hc_value, hc_port);
 537
 538         for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
 539
 540                 /* Set up the value */
 541                 data = ((value & 0x1) ? PULSEN_BIT : 0);
 542                 value >>= 1;
 543
 544                 outl(hc_value | data, hc_port);
 545
 546                 /* Clock the shift register */
 547                 outl(hc_value | data | HANDN_BIT, hc_port);
 548                 outl(hc_value | data, hc_port);
 549         }
 550
 551         /* Latch the bits */
 552         outl(hc_value | HOOKN_BIT, hc_port);
 553         outl(hc_value, hc_port);
 554 }
 555
 556 /**************************************************************************
 557  * @func Set the gain of the ECARD's CS3310 Trim/gain controller.  The
 558  * trim value consists of a 16bit value which is composed of two
 559  * 8 bit gain/trim values, one for the left channel and one for the
 560  * right channel.  The following table maps from the Gain/Attenuation
 561  * value in decibels into the corresponding bit pattern for a single
 562  * channel.
 563  */
 564
 565 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
 566                                          unsigned short gain)
 567 {
 568         unsigned int bit;
 569
 570         /* Enable writing to the TRIM registers */
 571         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
 572
 573         /* Do it again to insure that we meet hold time requirements */
 574         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
 575
 576         for (bit = (1 << 15); bit; bit >>= 1) {
 577                 unsigned int value;
 578
 579                 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
 580
 581                 if (gain & bit)
 582                         value |= EC_TRIM_SDATA;
 583
 584                 /* Clock the bit */
 585                 snd_emu10k1_ecard_write(emu, value);
 586                 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
 587                 snd_emu10k1_ecard_write(emu, value);
 588         }
 589
 590         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
 591 }
 592
 593 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
 594 {
 595         unsigned int hc_value;
 596
 597         /* Set up the initial settings */
 598         emu->ecard_ctrl = EC_RAW_RUN_MODE |
 599                           EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
 600                           EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
 601
 602         /* Step 0: Set the codec type in the hardware control register
 603          * and enable audio output */
 604         hc_value = inl(emu->port + HCFG);
 605         outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
 606         inl(emu->port + HCFG);
 607
 608         /* Step 1: Turn off the led and deassert TRIM_CS */
 609         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
 610
 611         /* Step 2: Calibrate the ADC and DAC */
 612         snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
 613
 614         /* Step 3: Wait for awhile;   XXX We can't get away with this
 615          * under a real operating system; we'll need to block and wait that
 616          * way. */
 617         snd_emu10k1_wait(emu, 48000);
 618
 619         /* Step 4: Switch off the DAC and ADC calibration.  Note
 620          * That ADC_CAL is actually an inverted signal, so we assert
 621          * it here to stop calibration.  */
 622         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
 623
 624         /* Step 4: Switch into run mode */
 625         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
 626
 627         /* Step 5: Set the analog input gain */
 628         snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
 629
 630         return 0;
 631 }
 632
 633 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
 634 {
 635         unsigned long special_port;
 636         unsigned int value;
 637
 638         /* Special initialisation routine
 639          * before the rest of the IO-Ports become active.
 640          */
 641         special_port = emu->port + 0x38;
 642         value = inl(special_port);
 643         outl(0x00d00000, special_port);
 644         value = inl(special_port);
 645         outl(0x00d00001, special_port);
 646         value = inl(special_port);
 647         outl(0x00d0005f, special_port);
 648         value = inl(special_port);
 649         outl(0x00d0007f, special_port);
 650         value = inl(special_port);
 651         outl(0x0090007f, special_port);
 652         value = inl(special_port);
 653
 654         snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
 655         /* Delay to give time for ADC chip to switch on. It needs 113ms */
 656         msleep(200);
 657         return 0;
 658 }
 659
 660 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu,
 661                                      const struct firmware *fw_entry)
 662 {
 663         int n, i;
 664         int reg;
 665         int value;
 666         unsigned int write_post;
 667         unsigned long flags;
 668
 669         if (!fw_entry)
 670                 return -EIO;
 671
 672         /* The FPGA is a Xilinx Spartan IIE XC2S50E */
 673         /* GPIO7 -> FPGA PGMN
 674          * GPIO6 -> FPGA CCLK
 675          * GPIO5 -> FPGA DIN
 676          * FPGA CONFIG OFF -> FPGA PGMN
 677          */
 678         spin_lock_irqsave(&emu->emu_lock, flags);
 679         outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
 680         write_post = inl(emu->port + A_IOCFG);
 681         udelay(100);
 682         outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
 683         write_post = inl(emu->port + A_IOCFG);
 684         udelay(100); /* Allow FPGA memory to clean */
 685         for (n = 0; n < fw_entry->size; n++) {
 686                 value = fw_entry->data[n];
 687                 for (i = 0; i < 8; i++) {
 688                         reg = 0x80;
 689                         if (value & 0x1)
 690                                 reg = reg | 0x20;
 691                         value = value >> 1;
 692                         outl(reg, emu->port + A_IOCFG);
 693                         write_post = inl(emu->port + A_IOCFG);
 694                         outl(reg | 0x40, emu->port + A_IOCFG);
 695                         write_post = inl(emu->port + A_IOCFG);
 696                 }
 697         }
 698         /* After programming, set GPIO bit 4 high again. */
 699         outl(0x10, emu->port + A_IOCFG);
 700         write_post = inl(emu->port + A_IOCFG);
 701         spin_unlock_irqrestore(&emu->emu_lock, flags);
 702
 703         return 0;
 704 }
 705
 706 static int emu1010_firmware_thread(void *data)
 707 {
 708         struct snd_emu10k1 *emu = data;
 709         u32 tmp, tmp2, reg;
 710         u32 last_reg = 0;
 711         int err;
 712
 713         for (;;) {
 714                 /* Delay to allow Audio Dock to settle */
 715                 msleep_interruptible(1000);
 716                 if (kthread_should_stop())
 717                         break;
 718 #ifdef CONFIG_PM_SLEEP
 719                 if (emu->suspend)
 720                         continue;
 721 #endif
 722                 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */
 723                 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg); /* OPTIONS: Which cards are attached to the EMU */
 724                 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
 725                         /* Audio Dock attached */
 726                         /* Return to Audio Dock programming mode */
 727                         dev_info(emu->card->dev,
 728                                  "emu1010: Loading Audio Dock Firmware\n");
 729                         snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK);
 730
 731                         if (!emu->dock_fw) {
 732                                 const char *filename = NULL;
 733                                 switch (emu->card_capabilities->emu_model) {
 734                                 case EMU_MODEL_EMU1010:
 735                                         filename = DOCK_FILENAME;
 736                                         break;
 737                                 case EMU_MODEL_EMU1010B:
 738                                         filename = MICRO_DOCK_FILENAME;
 739                                         break;
 740                                 case EMU_MODEL_EMU1616:
 741                                         filename = MICRO_DOCK_FILENAME;
 742                                         break;
 743                                 }
 744                                 if (filename) {
 745                                         err = request_firmware(&emu->dock_fw,
 746                                                                filename,
 747                                                                &emu->pci->dev);
 748                                         if (err)
 749                                                 continue;
 750                                 }
 751                         }
 752
 753                         if (emu->dock_fw) {
 754                                 err = snd_emu1010_load_firmware(emu, emu->dock_fw);
 755                                 if (err)
 756                                         continue;
 757                         }
 758
 759                         snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
 760                         snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg);
 761                         dev_info(emu->card->dev,
 762                                  "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n",
 763                                  reg);
 764                         /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
 765                         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
 766                         dev_info(emu->card->dev,
 767                                  "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", reg);
 768                         if ((reg & 0x1f) != 0x15) {
 769                                 /* FPGA failed to be programmed */
 770                                 dev_info(emu->card->dev,
 771                                          "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n",
 772                                          reg);
 773                                 continue;
 774                         }
 775                         dev_info(emu->card->dev,
 776                                  "emu1010: Audio Dock Firmware loaded\n");
 777                         snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
 778                         snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
 779                         dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n",
 780                                    tmp, tmp2);
 781                         /* Sync clocking between 1010 and Dock */
 782                         /* Allow DLL to settle */
 783                         msleep(10);
 784                         /* Unmute all. Default is muted after a firmware load */
 785                         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
 786                 } else if (!reg && last_reg) {
 787                         /* Audio Dock removed */
 788                         dev_info(emu->card->dev,
 789                                  "emu1010: Audio Dock detached\n");
 790                         /* Unmute all */
 791                         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
 792                 }
 793
 794                 last_reg = reg;
 795         }
 796         dev_info(emu->card->dev, "emu1010: firmware thread stopping\n");
 797         return 0;
 798 }
 799
 800 /*
 801  * EMU-1010 - details found out from this driver, official MS Win drivers,
 802  * testing the card:
 803  *
 804  * Audigy2 (aka Alice2):
 805  * ---------------------
 806  *      * communication over PCI
 807  *      * conversion of 32-bit data coming over EMU32 links from HANA FPGA
 808  *        to 2 x 16-bit, using internal DSP instructions
 809  *      * slave mode, clock supplied by HANA
 810  *      * linked to HANA using:
 811  *              32 x 32-bit serial EMU32 output channels
 812  *              16 x EMU32 input channels
 813  *              (?) x I2S I/O channels (?)
 814  *
 815  * FPGA (aka HANA):
 816  * ---------------
 817  *      * provides all (?) physical inputs and outputs of the card
 818  *              (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
 819  *      * provides clock signal for the card and Alice2
 820  *      * two crystals - for 44.1kHz and 48kHz multiples
 821  *      * provides internal routing of signal sources to signal destinations
 822  *      * inputs/outputs to Alice2 - see above
 823  *
 824  * Current status of the driver:
 825  * ----------------------------
 826  *      * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
 827  *      * PCM device nb. 2:
 828  *              16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
 829  *              16 x 32-bit capture - snd_emu10k1_capture_efx_ops
 830  */
 831 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
 832 {
 833         unsigned int i;
 834         u32 tmp, tmp2, reg;
 835         int err;
 836
 837         dev_info(emu->card->dev, "emu1010: Special config.\n");
 838         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 839          * Lock Sound Memory Cache, Lock Tank Memory Cache,
 840          * Mute all codecs.
 841          */
 842         outl(0x0005a00c, emu->port + HCFG);
 843         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 844          * Lock Tank Memory Cache,
 845          * Mute all codecs.
 846          */
 847         outl(0x0005a004, emu->port + HCFG);
 848         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 849          * Mute all codecs.
 850          */
 851         outl(0x0005a000, emu->port + HCFG);
 852         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 853          * Mute all codecs.
 854          */
 855         outl(0x0005a000, emu->port + HCFG);
 856
 857         /* Disable 48Volt power to Audio Dock */
 858         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
 859
 860         /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
 861         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
 862         dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg);
 863         if ((reg & 0x3f) == 0x15) {
 864                 /* FPGA netlist already present so clear it */
 865                 /* Return to programming mode */
 866
 867                 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02);
 868         }
 869         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
 870         dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg);
 871         if ((reg & 0x3f) == 0x15) {
 872                 /* FPGA failed to return to programming mode */
 873                 dev_info(emu->card->dev,
 874                          "emu1010: FPGA failed to return to programming mode\n");
 875                 return -ENODEV;
 876         }
 877         dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg);
 878
 879         if (!emu->firmware) {
 880                 const char *filename;
 881                 switch (emu->card_capabilities->emu_model) {
 882                 case EMU_MODEL_EMU1010:
 883                         filename = HANA_FILENAME;
 884                         break;
 885                 case EMU_MODEL_EMU1010B:
 886                         filename = EMU1010B_FILENAME;
 887                         break;
 888                 case EMU_MODEL_EMU1616:
 889                         filename = EMU1010_NOTEBOOK_FILENAME;
 890                         break;
 891                 case EMU_MODEL_EMU0404:
 892                         filename = EMU0404_FILENAME;
 893                         break;
 894                 default:
 895                         return -ENODEV;
 896                 }
 897
 898                 err = request_firmware(&emu->firmware, filename, &emu->pci->dev);
 899                 if (err != 0) {
 900                         dev_info(emu->card->dev,
 901                                  "emu1010: firmware: %s not found. Err = %d\n",
 902                                  filename, err);
 903                         return err;
 904                 }
 905                 dev_info(emu->card->dev,
 906                          "emu1010: firmware file = %s, size = 0x%zx\n",
 907                            filename, emu->firmware->size);
 908         }
 909
 910         err = snd_emu1010_load_firmware(emu, emu->firmware);
 911         if (err != 0) {
 912                 dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n");
 913                 return err;
 914         }
 915
 916         /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
 917         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
 918         if ((reg & 0x3f) != 0x15) {
 919                 /* FPGA failed to be programmed */
 920                 dev_info(emu->card->dev,
 921                          "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n",
 922                          reg);
 923                 return -ENODEV;
 924         }
 925
 926         dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n");
 927         snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
 928         snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
 929         dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2);
 930         /* Enable 48Volt power to Audio Dock */
 931         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
 932
 933         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
 934         dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
 935         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
 936         dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
 937         snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp);
 938         /* Optical -> ADAT I/O  */
 939         /* 0 : SPDIF
 940          * 1 : ADAT
 941          */
 942         emu->emu1010.optical_in = 1; /* IN_ADAT */
 943         emu->emu1010.optical_out = 1; /* IN_ADAT */
 944         tmp = 0;
 945         tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
 946                 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
 947         snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
 948         snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp);
 949         /* Set no attenuation on Audio Dock pads. */
 950         snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00);
 951         emu->emu1010.adc_pads = 0x00;
 952         snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
 953         /* Unmute Audio dock DACs, Headphone source DAC-4. */
 954         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
 955         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
 956         snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp);
 957         /* DAC PADs. */
 958         snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f);
 959         emu->emu1010.dac_pads = 0x0f;
 960         snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
 961         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
 962         snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
 963         /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
 964         snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10);
 965         /* MIDI routing */
 966         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
 967         /* Unknown. */
 968         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
 969         /* IRQ Enable: All on */
 970         /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
 971         /* IRQ Enable: All off */
 972         snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
 973
 974         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
 975         dev_info(emu->card->dev, "emu1010: Card options3 = 0x%x\n", reg);
 976         /* Default WCLK set to 48kHz. */
 977         snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00);
 978         /* Word Clock source, Internal 48kHz x1 */
 979         snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
 980         /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
 981         /* Audio Dock LEDs. */
 982         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
 983
 984 #if 0
 985         /* For 96kHz */
 986         snd_emu1010_fpga_link_dst_src_write(emu,
 987                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
 988         snd_emu1010_fpga_link_dst_src_write(emu,
 989                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
 990         snd_emu1010_fpga_link_dst_src_write(emu,
 991                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
 992         snd_emu1010_fpga_link_dst_src_write(emu,
 993                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
 994 #endif
 995 #if 0
 996         /* For 192kHz */
 997         snd_emu1010_fpga_link_dst_src_write(emu,
 998                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
 999         snd_emu1010_fpga_link_dst_src_write(emu,
1000                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
1001         snd_emu1010_fpga_link_dst_src_write(emu,
1002                 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
1003         snd_emu1010_fpga_link_dst_src_write(emu,
1004                 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
1005         snd_emu1010_fpga_link_dst_src_write(emu,
1006                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
1007         snd_emu1010_fpga_link_dst_src_write(emu,
1008                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
1009         snd_emu1010_fpga_link_dst_src_write(emu,
1010                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
1011         snd_emu1010_fpga_link_dst_src_write(emu,
1012                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
1013 #endif
1014 #if 1
1015         /* For 48kHz */
1016         snd_emu1010_fpga_link_dst_src_write(emu,
1017                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
1018         snd_emu1010_fpga_link_dst_src_write(emu,
1019                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
1020         snd_emu1010_fpga_link_dst_src_write(emu,
1021                 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
1022         snd_emu1010_fpga_link_dst_src_write(emu,
1023                 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
1024         snd_emu1010_fpga_link_dst_src_write(emu,
1025                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
1026         snd_emu1010_fpga_link_dst_src_write(emu,
1027                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
1028         snd_emu1010_fpga_link_dst_src_write(emu,
1029                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
1030         snd_emu1010_fpga_link_dst_src_write(emu,
1031                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
1032         /* Pavel Hofman - setting defaults for 8 more capture channels
1033          * Defaults only, users will set their own values anyways, let's
1034          * just copy/paste.
1035          */
1036
1037         snd_emu1010_fpga_link_dst_src_write(emu,
1038                 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
1039         snd_emu1010_fpga_link_dst_src_write(emu,
1040                 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
1041         snd_emu1010_fpga_link_dst_src_write(emu,
1042                 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
1043         snd_emu1010_fpga_link_dst_src_write(emu,
1044                 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1045         snd_emu1010_fpga_link_dst_src_write(emu,
1046                 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1047         snd_emu1010_fpga_link_dst_src_write(emu,
1048                 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1049         snd_emu1010_fpga_link_dst_src_write(emu,
1050                 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1051         snd_emu1010_fpga_link_dst_src_write(emu,
1052                 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
1053 #endif
1054 #if 0
1055         /* Original */
1056         snd_emu1010_fpga_link_dst_src_write(emu,
1057                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1058         snd_emu1010_fpga_link_dst_src_write(emu,
1059                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1060         snd_emu1010_fpga_link_dst_src_write(emu,
1061                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1062         snd_emu1010_fpga_link_dst_src_write(emu,
1063                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1064         snd_emu1010_fpga_link_dst_src_write(emu,
1065                 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1066         snd_emu1010_fpga_link_dst_src_write(emu,
1067                 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1068         snd_emu1010_fpga_link_dst_src_write(emu,
1069                 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1070         snd_emu1010_fpga_link_dst_src_write(emu,
1071                 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1072         snd_emu1010_fpga_link_dst_src_write(emu,
1073                 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1074         snd_emu1010_fpga_link_dst_src_write(emu,
1075                 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1076         snd_emu1010_fpga_link_dst_src_write(emu,
1077                 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1078         snd_emu1010_fpga_link_dst_src_write(emu,
1079                 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1080 #endif
1081         for (i = 0; i < 0x20; i++) {
1082                 /* AudioDock Elink <- Silence */
1083                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE);
1084         }
1085         for (i = 0; i < 4; i++) {
1086                 /* Hana SPDIF Out <- Silence */
1087                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE);
1088         }
1089         for (i = 0; i < 7; i++) {
1090                 /* Hamoa DAC <- Silence */
1091                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE);
1092         }
1093         for (i = 0; i < 7; i++) {
1094                 /* Hana ADAT Out <- Silence */
1095                 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1096         }
1097         snd_emu1010_fpga_link_dst_src_write(emu,
1098                 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1099         snd_emu1010_fpga_link_dst_src_write(emu,
1100                 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1101         snd_emu1010_fpga_link_dst_src_write(emu,
1102                 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1103         snd_emu1010_fpga_link_dst_src_write(emu,
1104                 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1105         snd_emu1010_fpga_link_dst_src_write(emu,
1106                 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1107         snd_emu1010_fpga_link_dst_src_write(emu,
1108                 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1109         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */
1110
1111         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1112
1113         /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1114          * Lock Sound Memory Cache, Lock Tank Memory Cache,
1115          * Mute all codecs.
1116          */
1117         outl(0x0000a000, emu->port + HCFG);
1118         /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1119          * Lock Sound Memory Cache, Lock Tank Memory Cache,
1120          * Un-Mute all codecs.
1121          */
1122         outl(0x0000a001, emu->port + HCFG);
1123
1124         /* Initial boot complete. Now patches */
1125
1126         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1127         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1128         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1129         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1130         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1131         snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
1132         snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif  (or 0x11 for aes/ebu) */
1133
1134         /* Start Micro/Audio Dock firmware loader thread */
1135         if (!emu->emu1010.firmware_thread) {
1136                 emu->emu1010.firmware_thread =
1137                         kthread_create(emu1010_firmware_thread, emu,
1138                                        "emu1010_firmware");
1139                 wake_up_process(emu->emu1010.firmware_thread);
1140         }
1141
1142 #if 0
1143         snd_emu1010_fpga_link_dst_src_write(emu,
1144                 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1145         snd_emu1010_fpga_link_dst_src_write(emu,
1146                 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1147         snd_emu1010_fpga_link_dst_src_write(emu,
1148                 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1149         snd_emu1010_fpga_link_dst_src_write(emu,
1150                 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1151 #endif
1152         /* Default outputs */
1153         if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1154                 /* 1616(M) cardbus default outputs */
1155                 /* ALICE2 bus 0xa0 */
1156                 snd_emu1010_fpga_link_dst_src_write(emu,
1157                         EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1158                 emu->emu1010.output_source[0] = 17;
1159                 snd_emu1010_fpga_link_dst_src_write(emu,
1160                         EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1161                 emu->emu1010.output_source[1] = 18;
1162                 snd_emu1010_fpga_link_dst_src_write(emu,
1163                         EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1164                 emu->emu1010.output_source[2] = 19;
1165                 snd_emu1010_fpga_link_dst_src_write(emu,
1166                         EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1167                 emu->emu1010.output_source[3] = 20;
1168                 snd_emu1010_fpga_link_dst_src_write(emu,
1169                         EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1170                 emu->emu1010.output_source[4] = 21;
1171                 snd_emu1010_fpga_link_dst_src_write(emu,
1172                         EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1173                 emu->emu1010.output_source[5] = 22;
1174                 /* ALICE2 bus 0xa0 */
1175                 snd_emu1010_fpga_link_dst_src_write(emu,
1176                         EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1177                 emu->emu1010.output_source[16] = 17;
1178                 snd_emu1010_fpga_link_dst_src_write(emu,
1179                         EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1180                 emu->emu1010.output_source[17] = 18;
1181         } else {
1182                 /* ALICE2 bus 0xa0 */
1183                 snd_emu1010_fpga_link_dst_src_write(emu,
1184                         EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1185                 emu->emu1010.output_source[0] = 21;
1186                 snd_emu1010_fpga_link_dst_src_write(emu,
1187                         EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1188                 emu->emu1010.output_source[1] = 22;
1189                 snd_emu1010_fpga_link_dst_src_write(emu,
1190                         EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1191                 emu->emu1010.output_source[2] = 23;
1192                 snd_emu1010_fpga_link_dst_src_write(emu,
1193                         EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1194                 emu->emu1010.output_source[3] = 24;
1195                 snd_emu1010_fpga_link_dst_src_write(emu,
1196                         EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1197                 emu->emu1010.output_source[4] = 25;
1198                 snd_emu1010_fpga_link_dst_src_write(emu,
1199                         EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1200                 emu->emu1010.output_source[5] = 26;
1201                 snd_emu1010_fpga_link_dst_src_write(emu,
1202                         EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1203                 emu->emu1010.output_source[6] = 27;
1204                 snd_emu1010_fpga_link_dst_src_write(emu,
1205                         EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1206                 emu->emu1010.output_source[7] = 28;
1207                 /* ALICE2 bus 0xa0 */
1208                 snd_emu1010_fpga_link_dst_src_write(emu,
1209                         EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1210                 emu->emu1010.output_source[8] = 21;
1211                 snd_emu1010_fpga_link_dst_src_write(emu,
1212                         EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1213                 emu->emu1010.output_source[9] = 22;
1214                 /* ALICE2 bus 0xa0 */
1215                 snd_emu1010_fpga_link_dst_src_write(emu,
1216                         EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1217                 emu->emu1010.output_source[10] = 21;
1218                 snd_emu1010_fpga_link_dst_src_write(emu,
1219                         EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1220                 emu->emu1010.output_source[11] = 22;
1221                 /* ALICE2 bus 0xa0 */
1222                 snd_emu1010_fpga_link_dst_src_write(emu,
1223                         EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1224                 emu->emu1010.output_source[12] = 21;
1225                 snd_emu1010_fpga_link_dst_src_write(emu,
1226                         EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1227                 emu->emu1010.output_source[13] = 22;
1228                 /* ALICE2 bus 0xa0 */
1229                 snd_emu1010_fpga_link_dst_src_write(emu,
1230                         EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1231                 emu->emu1010.output_source[14] = 21;
1232                 snd_emu1010_fpga_link_dst_src_write(emu,
1233                         EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1234                 emu->emu1010.output_source[15] = 22;
1235                 /* ALICE2 bus 0xa0 */
1236                 snd_emu1010_fpga_link_dst_src_write(emu,
1237                         EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1238                 emu->emu1010.output_source[16] = 21;
1239                 snd_emu1010_fpga_link_dst_src_write(emu,
1240                         EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1241                 emu->emu1010.output_source[17] = 22;
1242                 snd_emu1010_fpga_link_dst_src_write(emu,
1243                         EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1244                 emu->emu1010.output_source[18] = 23;
1245                 snd_emu1010_fpga_link_dst_src_write(emu,
1246                         EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1247                 emu->emu1010.output_source[19] = 24;
1248                 snd_emu1010_fpga_link_dst_src_write(emu,
1249                         EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1250                 emu->emu1010.output_source[20] = 25;
1251                 snd_emu1010_fpga_link_dst_src_write(emu,
1252                         EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1253                 emu->emu1010.output_source[21] = 26;
1254                 snd_emu1010_fpga_link_dst_src_write(emu,
1255                         EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1256                 emu->emu1010.output_source[22] = 27;
1257                 snd_emu1010_fpga_link_dst_src_write(emu,
1258                         EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1259                 emu->emu1010.output_source[23] = 28;
1260         }
1261         /* TEMP: Select SPDIF in/out */
1262         /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */
1263
1264         /* TEMP: Select 48kHz SPDIF out */
1265         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1266         snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1267         /* Word Clock source, Internal 48kHz x1 */
1268         snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
1269         /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
1270         emu->emu1010.internal_clock = 1; /* 48000 */
1271         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */
1272         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1273         /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */
1274         /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */
1275         /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */
1276
1277         return 0;
1278 }
1279 /*
1280  *  Create the EMU10K1 instance
1281  */
1282
1283 #ifdef CONFIG_PM_SLEEP
1284 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1285 static void free_pm_buffer(struct snd_emu10k1 *emu);
1286 #endif
1287
1288 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1289 {
1290         if (emu->port) {        /* avoid access to already used hardware */
1291                 snd_emu10k1_fx8010_tram_setup(emu, 0);
1292                 snd_emu10k1_done(emu);
1293                 snd_emu10k1_free_efx(emu);
1294         }
1295         if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
1296                 /* Disable 48Volt power to Audio Dock */
1297                 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
1298         }
1299         if (emu->emu1010.firmware_thread)
1300                 kthread_stop(emu->emu1010.firmware_thread);
1301         release_firmware(emu->firmware);
1302         release_firmware(emu->dock_fw);
1303         if (emu->irq >= 0)
1304                 free_irq(emu->irq, emu);
1305         /* remove reserved page */
1306         if (emu->reserved_page) {
1307                 snd_emu10k1_synth_free(emu,
1308                         (struct snd_util_memblk *)emu->reserved_page);
1309                 emu->reserved_page = NULL;
1310         }
1311         snd_util_memhdr_free(emu->memhdr);
1312         if (emu->silent_page.area)
1313                 snd_dma_free_pages(&emu->silent_page);
1314         if (emu->ptb_pages.area)
1315                 snd_dma_free_pages(&emu->ptb_pages);
1316         vfree(emu->page_ptr_table);
1317         vfree(emu->page_addr_table);
1318 #ifdef CONFIG_PM_SLEEP
1319         free_pm_buffer(emu);
1320 #endif
1321         if (emu->port)
1322                 pci_release_regions(emu->pci);
1323         if (emu->card_capabilities->ca0151_chip) /* P16V */
1324                 snd_p16v_free(emu);
1325         pci_disable_device(emu->pci);
1326         kfree(emu);
1327         return 0;
1328 }
1329
1330 static int snd_emu10k1_dev_free(struct snd_device *device)
1331 {
1332         struct snd_emu10k1 *emu = device->device_data;
1333         return snd_emu10k1_free(emu);
1334 }
1335
1336 static struct snd_emu_chip_details emu_chip_details[] = {
1337         /* Audigy 5/Rx SB1550 */
1338         /* Tested by michael@gernoth.net 28 Mar 2015 */
1339         /* DSP: CA10300-IAT LF
1340          * DAC: Cirrus Logic CS4382-KQZ
1341          * ADC: Philips 1361T
1342          * AC97: Sigmatel STAC9750
1343          * CA0151: None
1344          */
1345         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102,
1346          .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]",
1347          .id = "Audigy2",
1348          .emu10k2_chip = 1,
1349          .ca0108_chip = 1,
1350          .spk71 = 1,
1351          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1352          .ac97_chip = 1},
1353         /* Audigy4 (Not PRO) SB0610 */
1354         /* Tested by James@superbug.co.uk 4th April 2006 */
1355         /* A_IOCFG bits
1356          * Output
1357          * 0: ?
1358          * 1: ?
1359          * 2: ?
1360          * 3: 0 - Digital Out, 1 - Line in
1361          * 4: ?
1362          * 5: ?
1363          * 6: ?
1364          * 7: ?
1365          * Input
1366          * 8: ?
1367          * 9: ?
1368          * A: Green jack sense (Front)
1369          * B: ?
1370          * C: Black jack sense (Rear/Side Right)
1371          * D: Yellow jack sense (Center/LFE/Side Left)
1372          * E: ?
1373          * F: ?
1374          *
1375          * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1376          * 0 - Digital Out
1377          * 1 - Line in
1378          */
1379         /* Mic input not tested.
1380          * Analog CD input not tested
1381          * Digital Out not tested.
1382          * Line in working.
1383          * Audio output 5.1 working. Side outputs not working.
1384          */
1385         /* DSP: CA10300-IAT LF
1386          * DAC: Cirrus Logic CS4382-KQZ
1387          * ADC: Philips 1361T
1388          * AC97: Sigmatel STAC9750
1389          * CA0151: None
1390          */
1391         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1392          .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
1393          .id = "Audigy2",
1394          .emu10k2_chip = 1,
1395          .ca0108_chip = 1,
1396          .spk71 = 1,
1397          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1398          .ac97_chip = 1} ,
1399         /* Audigy 2 Value AC3 out does not work yet.
1400          * Need to find out how to turn off interpolators.
1401          */
1402         /* Tested by James@superbug.co.uk 3rd July 2005 */
1403         /* DSP: CA0108-IAT
1404          * DAC: CS4382-KQ
1405          * ADC: Philips 1361T
1406          * AC97: STAC9750
1407          * CA0151: None
1408          */
1409         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1410          .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1411          .id = "Audigy2",
1412          .emu10k2_chip = 1,
1413          .ca0108_chip = 1,
1414          .spk71 = 1,
1415          .ac97_chip = 1} ,
1416         /* Audigy 2 ZS Notebook Cardbus card.*/
1417         /* Tested by James@superbug.co.uk 6th November 2006 */
1418         /* Audio output 7.1/Headphones working.
1419          * Digital output working. (AC3 not checked, only PCM)
1420          * Audio Mic/Line inputs working.
1421          * Digital input not tested.
1422          */
1423         /* DSP: Tina2
1424          * DAC: Wolfson WM8768/WM8568
1425          * ADC: Wolfson WM8775
1426          * AC97: None
1427          * CA0151: None
1428          */
1429         /* Tested by James@superbug.co.uk 4th April 2006 */
1430         /* A_IOCFG bits
1431          * Output
1432          * 0: Not Used
1433          * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1434          * 2: Analog input 0 = line in, 1 = mic in
1435          * 3: Not Used
1436          * 4: Digital output 0 = off, 1 = on.
1437          * 5: Not Used
1438          * 6: Not Used
1439          * 7: Not Used
1440          * Input
1441          *      All bits 1 (0x3fxx) means nothing plugged in.
1442          * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1443          * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1444          * C-D: 2 = Front/Rear/etc, 3 = nothing.
1445          * E-F: Always 0
1446          *
1447          */
1448         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1449          .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1450          .id = "Audigy2",
1451          .emu10k2_chip = 1,
1452          .ca0108_chip = 1,
1453          .ca_cardbus_chip = 1,
1454          .spi_dac = 1,
1455          .i2c_adc = 1,
1456          .spk71 = 1} ,
1457         /* Tested by James@superbug.co.uk 4th Nov 2007. */
1458         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1459          .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1460          .id = "EMU1010",
1461          .emu10k2_chip = 1,
1462          .ca0108_chip = 1,
1463          .ca_cardbus_chip = 1,
1464          .spk71 = 1 ,
1465          .emu_model = EMU_MODEL_EMU1616},
1466         /* Tested by James@superbug.co.uk 4th Nov 2007. */
1467         /* This is MAEM8960, 0202 is MAEM 8980 */
1468         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1469          .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]",
1470          .id = "EMU1010",
1471          .emu10k2_chip = 1,
1472          .ca0108_chip = 1,
1473          .spk71 = 1,
1474          .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1475         /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */
1476         /* This is MAEM8986, 0202 is MAEM8980 */
1477         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
1478          .driver = "Audigy2", .name = "E-mu 1010 PCIe [MAEM8986]",
1479          .id = "EMU1010",
1480          .emu10k2_chip = 1,
1481          .ca0108_chip = 1,
1482          .spk71 = 1,
1483          .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
1484         /* Tested by James@superbug.co.uk 8th July 2005. */
1485         /* This is MAEM8810, 0202 is MAEM8820 */
1486         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1487          .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]",
1488          .id = "EMU1010",
1489          .emu10k2_chip = 1,
1490          .ca0102_chip = 1,
1491          .spk71 = 1,
1492          .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1493         /* EMU0404b */
1494         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1495          .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]",
1496          .id = "EMU0404",
1497          .emu10k2_chip = 1,
1498          .ca0108_chip = 1,
1499          .spk71 = 1,
1500          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1501         /* Tested by James@superbug.co.uk 20-3-2007. */
1502         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1503          .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]",
1504          .id = "EMU0404",
1505          .emu10k2_chip = 1,
1506          .ca0102_chip = 1,
1507          .spk71 = 1,
1508          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1509         /* EMU0404 PCIe */
1510         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
1511          .driver = "Audigy2", .name = "E-mu 0404 PCIe [MAEM8984]",
1512          .id = "EMU0404",
1513          .emu10k2_chip = 1,
1514          .ca0108_chip = 1,
1515          .spk71 = 1,
1516          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
1517         /* Note that all E-mu cards require kernel 2.6 or newer. */
1518         {.vendor = 0x1102, .device = 0x0008,
1519          .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1520          .id = "Audigy2",
1521          .emu10k2_chip = 1,
1522          .ca0108_chip = 1,
1523          .ac97_chip = 1} ,
1524         /* Tested by James@superbug.co.uk 3rd July 2005 */
1525         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1526          .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1527          .id = "Audigy2",
1528          .emu10k2_chip = 1,
1529          .ca0102_chip = 1,
1530          .ca0151_chip = 1,
1531          .spk71 = 1,
1532          .spdif_bug = 1,
1533          .ac97_chip = 1} ,
1534         /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1535         /* The 0x20061102 does have SB0350 written on it
1536          * Just like 0x20021102
1537          */
1538         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1539          .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1540          .id = "Audigy2",
1541          .emu10k2_chip = 1,
1542          .ca0102_chip = 1,
1543          .ca0151_chip = 1,
1544          .spk71 = 1,
1545          .spdif_bug = 1,
1546          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1547          .ac97_chip = 1} ,
1548         /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by
1549            Creative's Windows driver */
1550         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102,
1551          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]",
1552          .id = "Audigy2",
1553          .emu10k2_chip = 1,
1554          .ca0102_chip = 1,
1555          .ca0151_chip = 1,
1556          .spk71 = 1,
1557          .spdif_bug = 1,
1558          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1559          .ac97_chip = 1} ,
1560         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1561          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1562          .id = "Audigy2",
1563          .emu10k2_chip = 1,
1564          .ca0102_chip = 1,
1565          .ca0151_chip = 1,
1566          .spk71 = 1,
1567          .spdif_bug = 1,
1568          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1569          .ac97_chip = 1} ,
1570         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1571          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1572          .id = "Audigy2",
1573          .emu10k2_chip = 1,
1574          .ca0102_chip = 1,
1575          .ca0151_chip = 1,
1576          .spk71 = 1,
1577          .spdif_bug = 1,
1578          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1579          .ac97_chip = 1} ,
1580         /* Audigy 2 */
1581         /* Tested by James@superbug.co.uk 3rd July 2005 */
1582         /* DSP: CA0102-IAT
1583          * DAC: CS4382-KQ
1584          * ADC: Philips 1361T
1585          * AC97: STAC9721
1586          * CA0151: Yes
1587          */
1588         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1589          .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1590          .id = "Audigy2",
1591          .emu10k2_chip = 1,
1592          .ca0102_chip = 1,
1593          .ca0151_chip = 1,
1594          .spk71 = 1,
1595          .spdif_bug = 1,
1596          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1597          .ac97_chip = 1} ,
1598         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1599          .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]",
1600          .id = "Audigy2",
1601          .emu10k2_chip = 1,
1602          .ca0102_chip = 1,
1603          .ca0151_chip = 1,
1604          .spk71 = 1,
1605          .spdif_bug = 1} ,
1606         /* Dell OEM/Creative Labs Audigy 2 ZS */
1607         /* See ALSA bug#1365 */
1608         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1609          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1610          .id = "Audigy2",
1611          .emu10k2_chip = 1,
1612          .ca0102_chip = 1,
1613          .ca0151_chip = 1,
1614          .spk71 = 1,
1615          .spdif_bug = 1,
1616          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1617          .ac97_chip = 1} ,
1618         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1619          .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1620          .id = "Audigy2",
1621          .emu10k2_chip = 1,
1622          .ca0102_chip = 1,
1623          .ca0151_chip = 1,
1624          .spk71 = 1,
1625          .spdif_bug = 1,
1626          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1627          .adc_1361t = 1,  /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1628          .ac97_chip = 1} ,
1629         {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1630          .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1631          .id = "Audigy2",
1632          .emu10k2_chip = 1,
1633          .ca0102_chip = 1,
1634          .ca0151_chip = 1,
1635          .spdif_bug = 1,
1636          .ac97_chip = 1} ,
1637         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1638          .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1639          .id = "Audigy",
1640          .emu10k2_chip = 1,
1641          .ca0102_chip = 1,
1642          .ac97_chip = 1} ,
1643         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1644          .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1645          .id = "Audigy",
1646          .emu10k2_chip = 1,
1647          .ca0102_chip = 1,
1648          .spdif_bug = 1,
1649          .ac97_chip = 1} ,
1650         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1651          .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1652          .id = "Audigy",
1653          .emu10k2_chip = 1,
1654          .ca0102_chip = 1,
1655          .ac97_chip = 1} ,
1656         {.vendor = 0x1102, .device = 0x0004,
1657          .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1658          .id = "Audigy",
1659          .emu10k2_chip = 1,
1660          .ca0102_chip = 1,
1661          .ac97_chip = 1} ,
1662         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1663          .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1664          .id = "Live",
1665          .emu10k1_chip = 1,
1666          .ac97_chip = 1,
1667          .sblive51 = 1} ,
1668         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1669          .driver = "EMU10K1", .name = "SB Live! [SB0105]",
1670          .id = "Live",
1671          .emu10k1_chip = 1,
1672          .ac97_chip = 1,
1673          .sblive51 = 1} ,
1674         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1675          .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1676          .id = "Live",
1677          .emu10k1_chip = 1,
1678          .ac97_chip = 1,
1679          .sblive51 = 1} ,
1680         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1681          .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1682          .id = "Live",
1683          .emu10k1_chip = 1,
1684          .ac97_chip = 1,
1685          .sblive51 = 1} ,
1686         /* Tested by ALSA bug#1680 26th December 2005 */
1687         /* note: It really has SB0220 written on the card, */
1688         /* but it's SB0228 according to kx.inf */
1689         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1690          .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1691          .id = "Live",
1692          .emu10k1_chip = 1,
1693          .ac97_chip = 1,
1694          .sblive51 = 1} ,
1695         /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1696         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1697          .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1698          .id = "Live",
1699          .emu10k1_chip = 1,
1700          .ac97_chip = 1,
1701          .sblive51 = 1} ,
1702         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1703          .driver = "EMU10K1", .name = "SB Live! 5.1",
1704          .id = "Live",
1705          .emu10k1_chip = 1,
1706          .ac97_chip = 1,
1707          .sblive51 = 1} ,
1708         /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1709         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1710          .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1711          .id = "Live",
1712          .emu10k1_chip = 1,
1713          .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1714                           * share the same IDs!
1715                           */
1716          .sblive51 = 1} ,
1717         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1718          .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1719          .id = "Live",
1720          .emu10k1_chip = 1,
1721          .ac97_chip = 1,
1722          .sblive51 = 1} ,
1723         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1724          .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1725          .id = "Live",
1726          .emu10k1_chip = 1,
1727          .ac97_chip = 1} ,
1728         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1729          .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1730          .id = "Live",
1731          .emu10k1_chip = 1,
1732          .ac97_chip = 1,
1733          .sblive51 = 1} ,
1734         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1735          .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1736          .id = "Live",
1737          .emu10k1_chip = 1,
1738          .ac97_chip = 1,
1739          .sblive51 = 1} ,
1740         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1741          .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1742          .id = "Live",
1743          .emu10k1_chip = 1,
1744          .ac97_chip = 1,
1745          .sblive51 = 1} ,
1746         /* Tested by James@superbug.co.uk 3rd July 2005 */
1747         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1748          .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1749          .id = "Live",
1750          .emu10k1_chip = 1,
1751          .ac97_chip = 1,
1752          .sblive51 = 1} ,
1753         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1754          .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1755          .id = "Live",
1756          .emu10k1_chip = 1,
1757          .ac97_chip = 1,
1758          .sblive51 = 1} ,
1759         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1760          .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1761          .id = "Live",
1762          .emu10k1_chip = 1,
1763          .ac97_chip = 1,
1764          .sblive51 = 1} ,
1765         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1766          .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1767          .id = "Live",
1768          .emu10k1_chip = 1,
1769          .ac97_chip = 1,
1770          .sblive51 = 1} ,
1771         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1772          .driver = "EMU10K1", .name = "E-mu APS [PC545]",
1773          .id = "APS",
1774          .emu10k1_chip = 1,
1775          .ecard = 1} ,
1776         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1777          .driver = "EMU10K1", .name = "SB Live! [CT4620]",
1778          .id = "Live",
1779          .emu10k1_chip = 1,
1780          .ac97_chip = 1,
1781          .sblive51 = 1} ,
1782         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1783          .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1784          .id = "Live",
1785          .emu10k1_chip = 1,
1786          .ac97_chip = 1,
1787          .sblive51 = 1} ,
1788         {.vendor = 0x1102, .device = 0x0002,
1789          .driver = "EMU10K1", .name = "SB Live! [Unknown]",
1790          .id = "Live",
1791          .emu10k1_chip = 1,
1792          .ac97_chip = 1,
1793          .sblive51 = 1} ,
1794         { } /* terminator */
1795 };
1796
1797 int snd_emu10k1_create(struct snd_card *card,
1798                        struct pci_dev *pci,
1799                        unsigned short extin_mask,
1800                        unsigned short extout_mask,
1801                        long max_cache_bytes,
1802                        int enable_ir,
1803                        uint subsystem,
1804                        struct snd_emu10k1 **remu)
1805 {
1806         struct snd_emu10k1 *emu;
1807         int idx, err;
1808         int is_audigy;
1809         unsigned int silent_page;
1810         const struct snd_emu_chip_details *c;
1811         static struct snd_device_ops ops = {
1812                 .dev_free =     snd_emu10k1_dev_free,
1813         };
1814
1815         *remu = NULL;
1816
1817         /* enable PCI device */
1818         err = pci_enable_device(pci);
1819         if (err < 0)
1820                 return err;
1821
1822         emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1823         if (emu == NULL) {
1824                 pci_disable_device(pci);
1825                 return -ENOMEM;
1826         }
1827         emu->card = card;
1828         spin_lock_init(&emu->reg_lock);
1829         spin_lock_init(&emu->emu_lock);
1830         spin_lock_init(&emu->spi_lock);
1831         spin_lock_init(&emu->i2c_lock);
1832         spin_lock_init(&emu->voice_lock);
1833         spin_lock_init(&emu->synth_lock);
1834         spin_lock_init(&emu->memblk_lock);
1835         mutex_init(&emu->fx8010.lock);
1836         INIT_LIST_HEAD(&emu->mapped_link_head);
1837         INIT_LIST_HEAD(&emu->mapped_order_link_head);
1838         emu->pci = pci;
1839         emu->irq = -1;
1840         emu->synth = NULL;
1841         emu->get_synth_voice = NULL;
1842         /* read revision & serial */
1843         emu->revision = pci->revision;
1844         pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1845         pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1846         dev_dbg(card->dev,
1847                 "vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n",
1848                 pci->vendor, pci->device, emu->serial, emu->model);
1849
1850         for (c = emu_chip_details; c->vendor; c++) {
1851                 if (c->vendor == pci->vendor && c->device == pci->device) {
1852                         if (subsystem) {
1853                                 if (c->subsystem && (c->subsystem == subsystem))
1854                                         break;
1855                                 else
1856                                         continue;
1857                         } else {
1858                                 if (c->subsystem && (c->subsystem != emu->serial))
1859                                         continue;
1860                                 if (c->revision && c->revision != emu->revision)
1861                                         continue;
1862                         }
1863                         break;
1864                 }
1865         }
1866         if (c->vendor == 0) {
1867                 dev_err(card->dev, "emu10k1: Card not recognised\n");
1868                 kfree(emu);
1869                 pci_disable_device(pci);
1870                 return -ENOENT;
1871         }
1872         emu->card_capabilities = c;
1873         if (c->subsystem && !subsystem)
1874                 dev_dbg(card->dev, "Sound card name = %s\n", c->name);
1875         else if (subsystem)
1876                 dev_dbg(card->dev, "Sound card name = %s, "
1877                         "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1878                         "Forced to subsystem = 0x%x\n", c->name,
1879                         pci->vendor, pci->device, emu->serial, c->subsystem);
1880         else
1881                 dev_dbg(card->dev, "Sound card name = %s, "
1882                         "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1883                         c->name, pci->vendor, pci->device,
1884                         emu->serial);
1885
1886         if (!*card->id && c->id) {
1887                 int i, n = 0;
1888                 strlcpy(card->id, c->id, sizeof(card->id));
1889                 for (;;) {
1890                         for (i = 0; i < snd_ecards_limit; i++) {
1891                                 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1892                                         break;
1893                         }
1894                         if (i >= snd_ecards_limit)
1895                                 break;
1896                         n++;
1897                         if (n >= SNDRV_CARDS)
1898                                 break;
1899                         snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1900                 }
1901         }
1902
1903         is_audigy = emu->audigy = c->emu10k2_chip;
1904
1905         /* set the DMA transfer mask */
1906         emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1907         if (dma_set_mask(&pci->dev, emu->dma_mask) < 0 ||
1908             dma_set_coherent_mask(&pci->dev, emu->dma_mask) < 0) {
1909                 dev_err(card->dev,
1910                         "architecture does not support PCI busmaster DMA with mask 0x%lx\n",
1911                         emu->dma_mask);
1912                 kfree(emu);
1913                 pci_disable_device(pci);
1914                 return -ENXIO;
1915         }
1916         if (is_audigy)
1917                 emu->gpr_base = A_FXGPREGBASE;
1918         else
1919                 emu->gpr_base = FXGPREGBASE;
1920
1921         err = pci_request_regions(pci, "EMU10K1");
1922         if (err < 0) {
1923                 kfree(emu);
1924                 pci_disable_device(pci);
1925                 return err;
1926         }
1927         emu->port = pci_resource_start(pci, 0);
1928
1929         emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1930         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1931                                 32 * 1024, &emu->ptb_pages) < 0) {
1932                 err = -ENOMEM;
1933                 goto error;
1934         }
1935
1936         emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1937         emu->page_addr_table = vmalloc(emu->max_cache_pages *
1938                                        sizeof(unsigned long));
1939         if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1940                 err = -ENOMEM;
1941                 goto error;
1942         }
1943
1944         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1945                                 EMUPAGESIZE, &emu->silent_page) < 0) {
1946                 err = -ENOMEM;
1947                 goto error;
1948         }
1949         emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1950         if (emu->memhdr == NULL) {
1951                 err = -ENOMEM;
1952                 goto error;
1953         }
1954         emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1955                 sizeof(struct snd_util_memblk);
1956
1957         pci_set_master(pci);
1958
1959         emu->fx8010.fxbus_mask = 0x303f;
1960         if (extin_mask == 0)
1961                 extin_mask = 0x3fcf;
1962         if (extout_mask == 0)
1963                 extout_mask = 0x7fff;
1964         emu->fx8010.extin_mask = extin_mask;
1965         emu->fx8010.extout_mask = extout_mask;
1966         emu->enable_ir = enable_ir;
1967
1968         if (emu->card_capabilities->ca_cardbus_chip) {
1969                 err = snd_emu10k1_cardbus_init(emu);
1970                 if (err < 0)
1971                         goto error;
1972         }
1973         if (emu->card_capabilities->ecard) {
1974                 err = snd_emu10k1_ecard_init(emu);
1975                 if (err < 0)
1976                         goto error;
1977         } else if (emu->card_capabilities->emu_model) {
1978                 err = snd_emu10k1_emu1010_init(emu);
1979                 if (err < 0) {
1980                         snd_emu10k1_free(emu);
1981                         return err;
1982                 }
1983         } else {
1984                 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1985                         does not support this, it shouldn't do any harm */
1986                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1987                                         AC97SLOT_CNTR|AC97SLOT_LFE);
1988         }
1989
1990         /* initialize TRAM setup */
1991         emu->fx8010.itram_size = (16 * 1024)/2;
1992         emu->fx8010.etram_pages.area = NULL;
1993         emu->fx8010.etram_pages.bytes = 0;
1994
1995         /* irq handler must be registered after I/O ports are activated */
1996         if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1997                         KBUILD_MODNAME, emu)) {
1998                 err = -EBUSY;
1999                 goto error;
2000         }
2001         emu->irq = pci->irq;
2002
2003         /*
2004          *  Init to 0x02109204 :
2005          *  Clock accuracy    = 0     (1000ppm)
2006          *  Sample Rate       = 2     (48kHz)
2007          *  Audio Channel     = 1     (Left of 2)
2008          *  Source Number     = 0     (Unspecified)
2009          *  Generation Status = 1     (Original for Cat Code 12)
2010          *  Cat Code          = 12    (Digital Signal Mixer)
2011          *  Mode              = 0     (Mode 0)
2012          *  Emphasis          = 0     (None)
2013          *  CP                = 1     (Copyright unasserted)
2014          *  AN                = 0     (Audio data)
2015          *  P                 = 0     (Consumer)
2016          */
2017         emu->spdif_bits[0] = emu->spdif_bits[1] =
2018                 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
2019                 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
2020                 SPCS_GENERATIONSTATUS | 0x00001200 |
2021                 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
2022
2023         emu->reserved_page = (struct snd_emu10k1_memblk *)
2024                 snd_emu10k1_synth_alloc(emu, 4096);
2025         if (emu->reserved_page)
2026                 emu->reserved_page->map_locked = 1;
2027
2028         /* Clear silent pages and set up pointers */
2029         memset(emu->silent_page.area, 0, PAGE_SIZE);
2030         silent_page = emu->silent_page.addr << 1;
2031         for (idx = 0; idx < MAXPAGES; idx++)
2032                 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
2033
2034         /* set up voice indices */
2035         for (idx = 0; idx < NUM_G; idx++) {
2036                 emu->voices[idx].emu = emu;
2037                 emu->voices[idx].number = idx;
2038         }
2039
2040         err = snd_emu10k1_init(emu, enable_ir, 0);
2041         if (err < 0)
2042                 goto error;
2043 #ifdef CONFIG_PM_SLEEP
2044         err = alloc_pm_buffer(emu);
2045         if (err < 0)
2046                 goto error;
2047 #endif
2048
2049         /*  Initialize the effect engine */
2050         err = snd_emu10k1_init_efx(emu);
2051         if (err < 0)
2052                 goto error;
2053         snd_emu10k1_audio_enable(emu);
2054
2055         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops);
2056         if (err < 0)
2057                 goto error;
2058
2059 #ifdef CONFIG_PROC_FS
2060         snd_emu10k1_proc_init(emu);
2061 #endif
2062
2063         *remu = emu;
2064         return 0;
2065
2066  error:
2067         snd_emu10k1_free(emu);
2068         return err;
2069 }
2070
2071 #ifdef CONFIG_PM_SLEEP
2072 static unsigned char saved_regs[] = {
2073         CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
2074         FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
2075         ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
2076         TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
2077         MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
2078         SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
2079         0xff /* end */
2080 };
2081 static unsigned char saved_regs_audigy[] = {
2082         A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
2083         A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
2084         0xff /* end */
2085 };
2086
2087 static int alloc_pm_buffer(struct snd_emu10k1 *emu)
2088 {
2089         int size;
2090
2091         size = ARRAY_SIZE(saved_regs);
2092         if (emu->audigy)
2093                 size += ARRAY_SIZE(saved_regs_audigy);
2094         emu->saved_ptr = vmalloc(4 * NUM_G * size);
2095         if (!emu->saved_ptr)
2096                 return -ENOMEM;
2097         if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
2098                 return -ENOMEM;
2099         if (emu->card_capabilities->ca0151_chip &&
2100             snd_p16v_alloc_pm_buffer(emu) < 0)
2101                 return -ENOMEM;
2102         return 0;
2103 }
2104
2105 static void free_pm_buffer(struct snd_emu10k1 *emu)
2106 {
2107         vfree(emu->saved_ptr);
2108         snd_emu10k1_efx_free_pm_buffer(emu);
2109         if (emu->card_capabilities->ca0151_chip)
2110                 snd_p16v_free_pm_buffer(emu);
2111 }
2112
2113 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2114 {
2115         int i;
2116         unsigned char *reg;
2117         unsigned int *val;
2118
2119         val = emu->saved_ptr;
2120         for (reg = saved_regs; *reg != 0xff; reg++)
2121                 for (i = 0; i < NUM_G; i++, val++)
2122                         *val = snd_emu10k1_ptr_read(emu, *reg, i);
2123         if (emu->audigy) {
2124                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2125                         for (i = 0; i < NUM_G; i++, val++)
2126                                 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2127         }
2128         if (emu->audigy)
2129                 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2130         emu->saved_hcfg = inl(emu->port + HCFG);
2131 }
2132
2133 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2134 {
2135         if (emu->card_capabilities->ca_cardbus_chip)
2136                 snd_emu10k1_cardbus_init(emu);
2137         if (emu->card_capabilities->ecard)
2138                 snd_emu10k1_ecard_init(emu);
2139         else if (emu->card_capabilities->emu_model)
2140                 snd_emu10k1_emu1010_init(emu);
2141         else
2142                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2143         snd_emu10k1_init(emu, emu->enable_ir, 1);
2144 }
2145
2146 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2147 {
2148         int i;
2149         unsigned char *reg;
2150         unsigned int *val;
2151
2152         snd_emu10k1_audio_enable(emu);
2153
2154         /* resore for spdif */
2155         if (emu->audigy)
2156                 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2157         outl(emu->saved_hcfg, emu->port + HCFG);
2158
2159         val = emu->saved_ptr;
2160         for (reg = saved_regs; *reg != 0xff; reg++)
2161                 for (i = 0; i < NUM_G; i++, val++)
2162                         snd_emu10k1_ptr_write(emu, *reg, i, *val);
2163         if (emu->audigy) {
2164                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2165                         for (i = 0; i < NUM_G; i++, val++)
2166                                 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2167         }
2168 }
2169 #endif