sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10  *
  11  *  Authors:
  12  *                      Wu Fengguang <wfg@linux.intel.com>
  13  *
  14  *  Maintained by:
  15  *                      Wu Fengguang <wfg@linux.intel.com>
  16  *
  17  *  This program is free software; you can redistribute it and/or modify it
  18  *  under the terms of the GNU General Public License as published by the Free
  19  *  Software Foundation; either version 2 of the License, or (at your option)
  20  *  any later version.
  21  *
  22  *  This program is distributed in the hope that it will be useful, but
  23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  25  *  for more details.
  26  *
  27  *  You should have received a copy of the GNU General Public License
  28  *  along with this program; if not, write to the Free Software Foundation,
  29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  30  */
  31
  32 #include <linux/init.h>
  33 #include <linux/delay.h>
  34 #include <linux/slab.h>
  35 #include <linux/module.h>
  36 #include <sound/core.h>
  37 #include <sound/jack.h>
  38 #include <sound/asoundef.h>
  39 #include <sound/tlv.h>
  40 #include "hda_codec.h"
  41 #include "hda_local.h"
  42 #include "hda_jack.h"
  43
  44 static bool static_hdmi_pcm;
  45 module_param(static_hdmi_pcm, bool, 0644);
  46 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  47
  48 #define is_haswell(codec)  ((codec)->vendor_id == 0x80862807)
  49 #define is_broadwell(codec)    ((codec)->vendor_id == 0x80862808)
  50 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec))
  51
  52 #define is_valleyview(codec) ((codec)->vendor_id == 0x80862882)
  53
  54 struct hdmi_spec_per_cvt {
  55         hda_nid_t cvt_nid;
  56         int assigned;
  57         unsigned int channels_min;
  58         unsigned int channels_max;
  59         u32 rates;
  60         u64 formats;
  61         unsigned int maxbps;
  62 };
  63
  64 /* max. connections to a widget */
  65 #define HDA_MAX_CONNECTIONS     32
  66
  67 struct hdmi_spec_per_pin {
  68         hda_nid_t pin_nid;
  69         int num_mux_nids;
  70         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  71         int mux_idx;
  72         hda_nid_t cvt_nid;
  73
  74         struct hda_codec *codec;
  75         struct hdmi_eld sink_eld;
  76         struct mutex lock;
  77         struct delayed_work work;
  78         struct snd_kcontrol *eld_ctl;
  79         int repoll_count;
  80         bool setup; /* the stream has been set up by prepare callback */
  81         int channels; /* current number of channels */
  82         bool non_pcm;
  83         bool chmap_set;         /* channel-map override by ALSA API? */
  84         unsigned char chmap[8]; /* ALSA API channel-map */
  85         char pcm_name[8];       /* filled in build_pcm callbacks */
  86 #ifdef CONFIG_PROC_FS
  87         struct snd_info_entry *proc_entry;
  88 #endif
  89 };
  90
  91 struct cea_channel_speaker_allocation;
  92
  93 /* operations used by generic code that can be overridden by patches */
  94 struct hdmi_ops {
  95         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
  96                            unsigned char *buf, int *eld_size);
  97
  98         /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
  99         int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 100                                     int asp_slot);
 101         int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 102                                     int asp_slot, int channel);
 103
 104         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 105                                     int ca, int active_channels, int conn_type);
 106
 107         /* enable/disable HBR (HD passthrough) */
 108         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 109
 110         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 111                             hda_nid_t pin_nid, u32 stream_tag, int format);
 112
 113         /* Helpers for producing the channel map TLVs. These can be overridden
 114          * for devices that have non-standard mapping requirements. */
 115         int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
 116                                                  int channels);
 117         void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
 118                                        unsigned int *chmap, int channels);
 119
 120         /* check that the user-given chmap is supported */
 121         int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
 122 };
 123
 124 struct hdmi_spec {
 125         int num_cvts;
 126         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 127         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 128
 129         int num_pins;
 130         struct snd_array pins; /* struct hdmi_spec_per_pin */
 131         struct snd_array pcm_rec; /* struct hda_pcm */
 132         unsigned int channels_max; /* max over all cvts */
 133
 134         struct hdmi_eld temp_eld;
 135         struct hdmi_ops ops;
 136
 137         bool dyn_pin_out;
 138
 139         /*
 140          * Non-generic VIA/NVIDIA specific
 141          */
 142         struct hda_multi_out multiout;
 143         struct hda_pcm_stream pcm_playback;
 144 };
 145
 146
 147 struct hdmi_audio_infoframe {
 148         u8 type; /* 0x84 */
 149         u8 ver;  /* 0x01 */
 150         u8 len;  /* 0x0a */
 151
 152         u8 checksum;
 153
 154         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 155         u8 SS01_SF24;
 156         u8 CXT04;
 157         u8 CA;
 158         u8 LFEPBL01_LSV36_DM_INH7;
 159 };
 160
 161 struct dp_audio_infoframe {
 162         u8 type; /* 0x84 */
 163         u8 len;  /* 0x1b */
 164         u8 ver;  /* 0x11 << 2 */
 165
 166         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 167         u8 SS01_SF24;
 168         u8 CXT04;
 169         u8 CA;
 170         u8 LFEPBL01_LSV36_DM_INH7;
 171 };
 172
 173 union audio_infoframe {
 174         struct hdmi_audio_infoframe hdmi;
 175         struct dp_audio_infoframe dp;
 176         u8 bytes[0];
 177 };
 178
 179 /*
 180  * CEA speaker placement:
 181  *
 182  *        FLH       FCH        FRH
 183  *  FLW    FL  FLC   FC   FRC   FR   FRW
 184  *
 185  *                                  LFE
 186  *                     TC
 187  *
 188  *          RL  RLC   RC   RRC   RR
 189  *
 190  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 191  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 192  */
 193 enum cea_speaker_placement {
 194         FL  = (1 <<  0),        /* Front Left           */
 195         FC  = (1 <<  1),        /* Front Center         */
 196         FR  = (1 <<  2),        /* Front Right          */
 197         FLC = (1 <<  3),        /* Front Left Center    */
 198         FRC = (1 <<  4),        /* Front Right Center   */
 199         RL  = (1 <<  5),        /* Rear Left            */
 200         RC  = (1 <<  6),        /* Rear Center          */
 201         RR  = (1 <<  7),        /* Rear Right           */
 202         RLC = (1 <<  8),        /* Rear Left Center     */
 203         RRC = (1 <<  9),        /* Rear Right Center    */
 204         LFE = (1 << 10),        /* Low Frequency Effect */
 205         FLW = (1 << 11),        /* Front Left Wide      */
 206         FRW = (1 << 12),        /* Front Right Wide     */
 207         FLH = (1 << 13),        /* Front Left High      */
 208         FCH = (1 << 14),        /* Front Center High    */
 209         FRH = (1 << 15),        /* Front Right High     */
 210         TC  = (1 << 16),        /* Top Center           */
 211 };
 212
 213 /*
 214  * ELD SA bits in the CEA Speaker Allocation data block
 215  */
 216 static int eld_speaker_allocation_bits[] = {
 217         [0] = FL | FR,
 218         [1] = LFE,
 219         [2] = FC,
 220         [3] = RL | RR,
 221         [4] = RC,
 222         [5] = FLC | FRC,
 223         [6] = RLC | RRC,
 224         /* the following are not defined in ELD yet */
 225         [7] = FLW | FRW,
 226         [8] = FLH | FRH,
 227         [9] = TC,
 228         [10] = FCH,
 229 };
 230
 231 struct cea_channel_speaker_allocation {
 232         int ca_index;
 233         int speakers[8];
 234
 235         /* derived values, just for convenience */
 236         int channels;
 237         int spk_mask;
 238 };
 239
 240 /*
 241  * ALSA sequence is:
 242  *
 243  *       surround40   surround41   surround50   surround51   surround71
 244  * ch0   front left   =            =            =            =
 245  * ch1   front right  =            =            =            =
 246  * ch2   rear left    =            =            =            =
 247  * ch3   rear right   =            =            =            =
 248  * ch4                LFE          center       center       center
 249  * ch5                                          LFE          LFE
 250  * ch6                                                       side left
 251  * ch7                                                       side right
 252  *
 253  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 254  */
 255 static int hdmi_channel_mapping[0x32][8] = {
 256         /* stereo */
 257         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 258         /* 2.1 */
 259         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 260         /* Dolby Surround */
 261         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 262         /* surround40 */
 263         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 264         /* 4ch */
 265         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 266         /* surround41 */
 267         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 268         /* surround50 */
 269         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 270         /* surround51 */
 271         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 272         /* 7.1 */
 273         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 274 };
 275
 276 /*
 277  * This is an ordered list!
 278  *
 279  * The preceding ones have better chances to be selected by
 280  * hdmi_channel_allocation().
 281  */
 282 static struct cea_channel_speaker_allocation channel_allocations[] = {
 283 /*                        channel:   7     6    5    4    3     2    1    0  */
 284 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 285                                  /* 2.1 */
 286 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 287                                  /* Dolby Surround */
 288 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 289                                  /* surround40 */
 290 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 291                                  /* surround41 */
 292 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 293                                  /* surround50 */
 294 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 295                                  /* surround51 */
 296 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 297                                  /* 6.1 */
 298 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 299                                  /* surround71 */
 300 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 301
 302 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 303 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 304 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 305 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 306 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 307 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 308 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 309 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 310 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 311 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 312 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 313 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 314 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 315 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 316 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 317 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 318 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 319 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 320 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 321 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 322 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 323 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 324 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 325 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 326 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 327 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 328 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 329 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 330 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 331 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 332 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 333 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 334 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 335 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 336 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 337 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 338 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 339 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 340 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 341 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 342 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 343 };
 344
 345
 346 /*
 347  * HDMI routines
 348  */
 349
 350 #define get_pin(spec, idx) \
 351         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 352 #define get_cvt(spec, idx) \
 353         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 354 #define get_pcm_rec(spec, idx) \
 355         ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
 356
 357 static int pin_nid_to_pin_index(struct hda_codec *codec, hda_nid_t pin_nid)
 358 {
 359         struct hdmi_spec *spec = codec->spec;
 360         int pin_idx;
 361
 362         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 363                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
 364                         return pin_idx;
 365
 366         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 367         return -EINVAL;
 368 }
 369
 370 static int hinfo_to_pin_index(struct hda_codec *codec,
 371                               struct hda_pcm_stream *hinfo)
 372 {
 373         struct hdmi_spec *spec = codec->spec;
 374         int pin_idx;
 375
 376         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 377                 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
 378                         return pin_idx;
 379
 380         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 381         return -EINVAL;
 382 }
 383
 384 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 385 {
 386         struct hdmi_spec *spec = codec->spec;
 387         int cvt_idx;
 388
 389         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 390                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 391                         return cvt_idx;
 392
 393         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 394         return -EINVAL;
 395 }
 396
 397 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 398                         struct snd_ctl_elem_info *uinfo)
 399 {
 400         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 401         struct hdmi_spec *spec = codec->spec;
 402         struct hdmi_spec_per_pin *per_pin;
 403         struct hdmi_eld *eld;
 404         int pin_idx;
 405
 406         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 407
 408         pin_idx = kcontrol->private_value;
 409         per_pin = get_pin(spec, pin_idx);
 410         eld = &per_pin->sink_eld;
 411
 412         mutex_lock(&per_pin->lock);
 413         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 414         mutex_unlock(&per_pin->lock);
 415
 416         return 0;
 417 }
 418
 419 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 420                         struct snd_ctl_elem_value *ucontrol)
 421 {
 422         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 423         struct hdmi_spec *spec = codec->spec;
 424         struct hdmi_spec_per_pin *per_pin;
 425         struct hdmi_eld *eld;
 426         int pin_idx;
 427
 428         pin_idx = kcontrol->private_value;
 429         per_pin = get_pin(spec, pin_idx);
 430         eld = &per_pin->sink_eld;
 431
 432         mutex_lock(&per_pin->lock);
 433         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
 434                 mutex_unlock(&per_pin->lock);
 435                 snd_BUG();
 436                 return -EINVAL;
 437         }
 438
 439         memset(ucontrol->value.bytes.data, 0,
 440                ARRAY_SIZE(ucontrol->value.bytes.data));
 441         if (eld->eld_valid)
 442                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 443                        eld->eld_size);
 444         mutex_unlock(&per_pin->lock);
 445
 446         return 0;
 447 }
 448
 449 static struct snd_kcontrol_new eld_bytes_ctl = {
 450         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 451         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 452         .name = "ELD",
 453         .info = hdmi_eld_ctl_info,
 454         .get = hdmi_eld_ctl_get,
 455 };
 456
 457 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
 458                         int device)
 459 {
 460         struct snd_kcontrol *kctl;
 461         struct hdmi_spec *spec = codec->spec;
 462         int err;
 463
 464         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 465         if (!kctl)
 466                 return -ENOMEM;
 467         kctl->private_value = pin_idx;
 468         kctl->id.device = device;
 469
 470         err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
 471         if (err < 0)
 472                 return err;
 473
 474         get_pin(spec, pin_idx)->eld_ctl = kctl;
 475         return 0;
 476 }
 477
 478 #ifdef BE_PARANOID
 479 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 480                                 int *packet_index, int *byte_index)
 481 {
 482         int val;
 483
 484         val = snd_hda_codec_read(codec, pin_nid, 0,
 485                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 486
 487         *packet_index = val >> 5;
 488         *byte_index = val & 0x1f;
 489 }
 490 #endif
 491
 492 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 493                                 int packet_index, int byte_index)
 494 {
 495         int val;
 496
 497         val = (packet_index << 5) | (byte_index & 0x1f);
 498
 499         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 500 }
 501
 502 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 503                                 unsigned char val)
 504 {
 505         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 506 }
 507
 508 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 509 {
 510         struct hdmi_spec *spec = codec->spec;
 511         int pin_out;
 512
 513         /* Unmute */
 514         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 515                 snd_hda_codec_write(codec, pin_nid, 0,
 516                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 517
 518         if (spec->dyn_pin_out)
 519                 /* Disable pin out until stream is active */
 520                 pin_out = 0;
 521         else
 522                 /* Enable pin out: some machines with GM965 gets broken output
 523                  * when the pin is disabled or changed while using with HDMI
 524                  */
 525                 pin_out = PIN_OUT;
 526
 527         snd_hda_codec_write(codec, pin_nid, 0,
 528                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 529 }
 530
 531 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
 532 {
 533         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
 534                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 535 }
 536
 537 static void hdmi_set_channel_count(struct hda_codec *codec,
 538                                    hda_nid_t cvt_nid, int chs)
 539 {
 540         if (chs != hdmi_get_channel_count(codec, cvt_nid))
 541                 snd_hda_codec_write(codec, cvt_nid, 0,
 542                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 543 }
 544
 545 /*
 546  * ELD proc files
 547  */
 548
 549 #ifdef CONFIG_PROC_FS
 550 static void print_eld_info(struct snd_info_entry *entry,
 551                            struct snd_info_buffer *buffer)
 552 {
 553         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 554
 555         mutex_lock(&per_pin->lock);
 556         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 557         mutex_unlock(&per_pin->lock);
 558 }
 559
 560 static void write_eld_info(struct snd_info_entry *entry,
 561                            struct snd_info_buffer *buffer)
 562 {
 563         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 564
 565         mutex_lock(&per_pin->lock);
 566         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 567         mutex_unlock(&per_pin->lock);
 568 }
 569
 570 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 571 {
 572         char name[32];
 573         struct hda_codec *codec = per_pin->codec;
 574         struct snd_info_entry *entry;
 575         int err;
 576
 577         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 578         err = snd_card_proc_new(codec->bus->card, name, &entry);
 579         if (err < 0)
 580                 return err;
 581
 582         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 583         entry->c.text.write = write_eld_info;
 584         entry->mode |= S_IWUSR;
 585         per_pin->proc_entry = entry;
 586
 587         return 0;
 588 }
 589
 590 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 591 {
 592         if (!per_pin->codec->bus->shutdown && per_pin->proc_entry) {
 593                 snd_device_free(per_pin->codec->bus->card, per_pin->proc_entry);
 594                 per_pin->proc_entry = NULL;
 595         }
 596 }
 597 #else
 598 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 599                                int index)
 600 {
 601         return 0;
 602 }
 603 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 604 {
 605 }
 606 #endif
 607
 608 /*
 609  * Channel mapping routines
 610  */
 611
 612 /*
 613  * Compute derived values in channel_allocations[].
 614  */
 615 static void init_channel_allocations(void)
 616 {
 617         int i, j;
 618         struct cea_channel_speaker_allocation *p;
 619
 620         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 621                 p = channel_allocations + i;
 622                 p->channels = 0;
 623                 p->spk_mask = 0;
 624                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 625                         if (p->speakers[j]) {
 626                                 p->channels++;
 627                                 p->spk_mask |= p->speakers[j];
 628                         }
 629         }
 630 }
 631
 632 static int get_channel_allocation_order(int ca)
 633 {
 634         int i;
 635
 636         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 637                 if (channel_allocations[i].ca_index == ca)
 638                         break;
 639         }
 640         return i;
 641 }
 642
 643 /*
 644  * The transformation takes two steps:
 645  *
 646  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 647  *            spk_mask => (channel_allocations[])         => ai->CA
 648  *
 649  * TODO: it could select the wrong CA from multiple candidates.
 650 */
 651 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
 652 {
 653         int i;
 654         int ca = 0;
 655         int spk_mask = 0;
 656         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 657
 658         /*
 659          * CA defaults to 0 for basic stereo audio
 660          */
 661         if (channels <= 2)
 662                 return 0;
 663
 664         /*
 665          * expand ELD's speaker allocation mask
 666          *
 667          * ELD tells the speaker mask in a compact(paired) form,
 668          * expand ELD's notions to match the ones used by Audio InfoFrame.
 669          */
 670         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 671                 if (eld->info.spk_alloc & (1 << i))
 672                         spk_mask |= eld_speaker_allocation_bits[i];
 673         }
 674
 675         /* search for the first working match in the CA table */
 676         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 677                 if (channels == channel_allocations[i].channels &&
 678                     (spk_mask & channel_allocations[i].spk_mask) ==
 679                                 channel_allocations[i].spk_mask) {
 680                         ca = channel_allocations[i].ca_index;
 681                         break;
 682                 }
 683         }
 684
 685         if (!ca) {
 686                 /* if there was no match, select the regular ALSA channel
 687                  * allocation with the matching number of channels */
 688                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 689                         if (channels == channel_allocations[i].channels) {
 690                                 ca = channel_allocations[i].ca_index;
 691                                 break;
 692                         }
 693                 }
 694         }
 695
 696         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
 697         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 698                     ca, channels, buf);
 699
 700         return ca;
 701 }
 702
 703 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 704                                        hda_nid_t pin_nid)
 705 {
 706 #ifdef CONFIG_SND_DEBUG_VERBOSE
 707         struct hdmi_spec *spec = codec->spec;
 708         int i;
 709         int channel;
 710
 711         for (i = 0; i < 8; i++) {
 712                 channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
 713                 codec_dbg(codec, "HDMI: ASP channel %d => slot %d\n",
 714                                                 channel, i);
 715         }
 716 #endif
 717 }
 718
 719 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
 720                                        hda_nid_t pin_nid,
 721                                        bool non_pcm,
 722                                        int ca)
 723 {
 724         struct hdmi_spec *spec = codec->spec;
 725         struct cea_channel_speaker_allocation *ch_alloc;
 726         int i;
 727         int err;
 728         int order;
 729         int non_pcm_mapping[8];
 730
 731         order = get_channel_allocation_order(ca);
 732         ch_alloc = &channel_allocations[order];
 733
 734         if (hdmi_channel_mapping[ca][1] == 0) {
 735                 int hdmi_slot = 0;
 736                 /* fill actual channel mappings in ALSA channel (i) order */
 737                 for (i = 0; i < ch_alloc->channels; i++) {
 738                         while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
 739                                 hdmi_slot++; /* skip zero slots */
 740
 741                         hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
 742                 }
 743                 /* fill the rest of the slots with ALSA channel 0xf */
 744                 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
 745                         if (!ch_alloc->speakers[7 - hdmi_slot])
 746                                 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
 747         }
 748
 749         if (non_pcm) {
 750                 for (i = 0; i < ch_alloc->channels; i++)
 751                         non_pcm_mapping[i] = (i << 4) | i;
 752                 for (; i < 8; i++)
 753                         non_pcm_mapping[i] = (0xf << 4) | i;
 754         }
 755
 756         for (i = 0; i < 8; i++) {
 757                 int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
 758                 int hdmi_slot = slotsetup & 0x0f;
 759                 int channel = (slotsetup & 0xf0) >> 4;
 760                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
 761                 if (err) {
 762                         codec_dbg(codec, "HDMI: channel mapping failed\n");
 763                         break;
 764                 }
 765         }
 766 }
 767
 768 struct channel_map_table {
 769         unsigned char map;              /* ALSA API channel map position */
 770         int spk_mask;                   /* speaker position bit mask */
 771 };
 772
 773 static struct channel_map_table map_tables[] = {
 774         { SNDRV_CHMAP_FL,       FL },
 775         { SNDRV_CHMAP_FR,       FR },
 776         { SNDRV_CHMAP_RL,       RL },
 777         { SNDRV_CHMAP_RR,       RR },
 778         { SNDRV_CHMAP_LFE,      LFE },
 779         { SNDRV_CHMAP_FC,       FC },
 780         { SNDRV_CHMAP_RLC,      RLC },
 781         { SNDRV_CHMAP_RRC,      RRC },
 782         { SNDRV_CHMAP_RC,       RC },
 783         { SNDRV_CHMAP_FLC,      FLC },
 784         { SNDRV_CHMAP_FRC,      FRC },
 785         { SNDRV_CHMAP_TFL,      FLH },
 786         { SNDRV_CHMAP_TFR,      FRH },
 787         { SNDRV_CHMAP_FLW,      FLW },
 788         { SNDRV_CHMAP_FRW,      FRW },
 789         { SNDRV_CHMAP_TC,       TC },
 790         { SNDRV_CHMAP_TFC,      FCH },
 791         {} /* terminator */
 792 };
 793
 794 /* from ALSA API channel position to speaker bit mask */
 795 static int to_spk_mask(unsigned char c)
 796 {
 797         struct channel_map_table *t = map_tables;
 798         for (; t->map; t++) {
 799                 if (t->map == c)
 800                         return t->spk_mask;
 801         }
 802         return 0;
 803 }
 804
 805 /* from ALSA API channel position to CEA slot */
 806 static int to_cea_slot(int ordered_ca, unsigned char pos)
 807 {
 808         int mask = to_spk_mask(pos);
 809         int i;
 810
 811         if (mask) {
 812                 for (i = 0; i < 8; i++) {
 813                         if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
 814                                 return i;
 815                 }
 816         }
 817
 818         return -1;
 819 }
 820
 821 /* from speaker bit mask to ALSA API channel position */
 822 static int spk_to_chmap(int spk)
 823 {
 824         struct channel_map_table *t = map_tables;
 825         for (; t->map; t++) {
 826                 if (t->spk_mask == spk)
 827                         return t->map;
 828         }
 829         return 0;
 830 }
 831
 832 /* from CEA slot to ALSA API channel position */
 833 static int from_cea_slot(int ordered_ca, unsigned char slot)
 834 {
 835         int mask = channel_allocations[ordered_ca].speakers[7 - slot];
 836
 837         return spk_to_chmap(mask);
 838 }
 839
 840 /* get the CA index corresponding to the given ALSA API channel map */
 841 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
 842 {
 843         int i, spks = 0, spk_mask = 0;
 844
 845         for (i = 0; i < chs; i++) {
 846                 int mask = to_spk_mask(map[i]);
 847                 if (mask) {
 848                         spk_mask |= mask;
 849                         spks++;
 850                 }
 851         }
 852
 853         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 854                 if ((chs == channel_allocations[i].channels ||
 855                      spks == channel_allocations[i].channels) &&
 856                     (spk_mask & channel_allocations[i].spk_mask) ==
 857                                 channel_allocations[i].spk_mask)
 858                         return channel_allocations[i].ca_index;
 859         }
 860         return -1;
 861 }
 862
 863 /* set up the channel slots for the given ALSA API channel map */
 864 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
 865                                              hda_nid_t pin_nid,
 866                                              int chs, unsigned char *map,
 867                                              int ca)
 868 {
 869         struct hdmi_spec *spec = codec->spec;
 870         int ordered_ca = get_channel_allocation_order(ca);
 871         int alsa_pos, hdmi_slot;
 872         int assignments[8] = {[0 ... 7] = 0xf};
 873
 874         for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
 875
 876                 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
 877
 878                 if (hdmi_slot < 0)
 879                         continue; /* unassigned channel */
 880
 881                 assignments[hdmi_slot] = alsa_pos;
 882         }
 883
 884         for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
 885                 int err;
 886
 887                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
 888                                                      assignments[hdmi_slot]);
 889                 if (err)
 890                         return -EINVAL;
 891         }
 892         return 0;
 893 }
 894
 895 /* store ALSA API channel map from the current default map */
 896 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
 897 {
 898         int i;
 899         int ordered_ca = get_channel_allocation_order(ca);
 900         for (i = 0; i < 8; i++) {
 901                 if (i < channel_allocations[ordered_ca].channels)
 902                         map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
 903                 else
 904                         map[i] = 0;
 905         }
 906 }
 907
 908 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 909                                        hda_nid_t pin_nid, bool non_pcm, int ca,
 910                                        int channels, unsigned char *map,
 911                                        bool chmap_set)
 912 {
 913         if (!non_pcm && chmap_set) {
 914                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
 915                                                   channels, map, ca);
 916         } else {
 917                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
 918                 hdmi_setup_fake_chmap(map, ca);
 919         }
 920
 921         hdmi_debug_channel_mapping(codec, pin_nid);
 922 }
 923
 924 static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 925                                      int asp_slot, int channel)
 926 {
 927         return snd_hda_codec_write(codec, pin_nid, 0,
 928                                    AC_VERB_SET_HDMI_CHAN_SLOT,
 929                                    (channel << 4) | asp_slot);
 930 }
 931
 932 static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 933                                      int asp_slot)
 934 {
 935         return (snd_hda_codec_read(codec, pin_nid, 0,
 936                                    AC_VERB_GET_HDMI_CHAN_SLOT,
 937                                    asp_slot) & 0xf0) >> 4;
 938 }
 939
 940 /*
 941  * Audio InfoFrame routines
 942  */
 943
 944 /*
 945  * Enable Audio InfoFrame Transmission
 946  */
 947 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 948                                        hda_nid_t pin_nid)
 949 {
 950         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 951         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 952                                                 AC_DIPXMIT_BEST);
 953 }
 954
 955 /*
 956  * Disable Audio InfoFrame Transmission
 957  */
 958 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 959                                       hda_nid_t pin_nid)
 960 {
 961         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 962         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 963                                                 AC_DIPXMIT_DISABLE);
 964 }
 965
 966 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 967 {
 968 #ifdef CONFIG_SND_DEBUG_VERBOSE
 969         int i;
 970         int size;
 971
 972         size = snd_hdmi_get_eld_size(codec, pin_nid);
 973         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 974
 975         for (i = 0; i < 8; i++) {
 976                 size = snd_hda_codec_read(codec, pin_nid, 0,
 977                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 978                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 979         }
 980 #endif
 981 }
 982
 983 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 984 {
 985 #ifdef BE_PARANOID
 986         int i, j;
 987         int size;
 988         int pi, bi;
 989         for (i = 0; i < 8; i++) {
 990                 size = snd_hda_codec_read(codec, pin_nid, 0,
 991                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 992                 if (size == 0)
 993                         continue;
 994
 995                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 996                 for (j = 1; j < 1000; j++) {
 997                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 998                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 999                         if (pi != i)
1000                                 codec_dbg(codec, "dip index %d: %d != %d\n",
1001                                                 bi, pi, i);
1002                         if (bi == 0) /* byte index wrapped around */
1003                                 break;
1004                 }
1005                 codec_dbg(codec,
1006                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
1007                         i, size, j);
1008         }
1009 #endif
1010 }
1011
1012 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
1013 {
1014         u8 *bytes = (u8 *)hdmi_ai;
1015         u8 sum = 0;
1016         int i;
1017
1018         hdmi_ai->checksum = 0;
1019
1020         for (i = 0; i < sizeof(*hdmi_ai); i++)
1021                 sum += bytes[i];
1022
1023         hdmi_ai->checksum = -sum;
1024 }
1025
1026 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
1027                                       hda_nid_t pin_nid,
1028                                       u8 *dip, int size)
1029 {
1030         int i;
1031
1032         hdmi_debug_dip_size(codec, pin_nid);
1033         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
1034
1035         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1036         for (i = 0; i < size; i++)
1037                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1038 }
1039
1040 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1041                                     u8 *dip, int size)
1042 {
1043         u8 val;
1044         int i;
1045
1046         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
1047                                                             != AC_DIPXMIT_BEST)
1048                 return false;
1049
1050         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1051         for (i = 0; i < size; i++) {
1052                 val = snd_hda_codec_read(codec, pin_nid, 0,
1053                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
1054                 if (val != dip[i])
1055                         return false;
1056         }
1057
1058         return true;
1059 }
1060
1061 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
1062                                      hda_nid_t pin_nid,
1063                                      int ca, int active_channels,
1064                                      int conn_type)
1065 {
1066         union audio_infoframe ai;
1067
1068         memset(&ai, 0, sizeof(ai));
1069         if (conn_type == 0) { /* HDMI */
1070                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1071
1072                 hdmi_ai->type           = 0x84;
1073                 hdmi_ai->ver            = 0x01;
1074                 hdmi_ai->len            = 0x0a;
1075                 hdmi_ai->CC02_CT47      = active_channels - 1;
1076                 hdmi_ai->CA             = ca;
1077                 hdmi_checksum_audio_infoframe(hdmi_ai);
1078         } else if (conn_type == 1) { /* DisplayPort */
1079                 struct dp_audio_infoframe *dp_ai = &ai.dp;
1080
1081                 dp_ai->type             = 0x84;
1082                 dp_ai->len              = 0x1b;
1083                 dp_ai->ver              = 0x11 << 2;
1084                 dp_ai->CC02_CT47        = active_channels - 1;
1085                 dp_ai->CA               = ca;
1086         } else {
1087                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
1088                             pin_nid);
1089                 return;
1090         }
1091
1092         /*
1093          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1094          * sizeof(*dp_ai) to avoid partial match/update problems when
1095          * the user switches between HDMI/DP monitors.
1096          */
1097         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1098                                         sizeof(ai))) {
1099                 codec_dbg(codec,
1100                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
1101                             pin_nid,
1102                             active_channels, ca);
1103                 hdmi_stop_infoframe_trans(codec, pin_nid);
1104                 hdmi_fill_audio_infoframe(codec, pin_nid,
1105                                             ai.bytes, sizeof(ai));
1106                 hdmi_start_infoframe_trans(codec, pin_nid);
1107         }
1108 }
1109
1110 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1111                                        struct hdmi_spec_per_pin *per_pin,
1112                                        bool non_pcm)
1113 {
1114         struct hdmi_spec *spec = codec->spec;
1115         hda_nid_t pin_nid = per_pin->pin_nid;
1116         int channels = per_pin->channels;
1117         int active_channels;
1118         struct hdmi_eld *eld;
1119         int ca, ordered_ca;
1120
1121         if (!channels)
1122                 return;
1123
1124         if (is_haswell_plus(codec))
1125                 snd_hda_codec_write(codec, pin_nid, 0,
1126                                             AC_VERB_SET_AMP_GAIN_MUTE,
1127                                             AMP_OUT_UNMUTE);
1128
1129         eld = &per_pin->sink_eld;
1130
1131         if (!non_pcm && per_pin->chmap_set)
1132                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1133         else
1134                 ca = hdmi_channel_allocation(eld, channels);
1135         if (ca < 0)
1136                 ca = 0;
1137
1138         ordered_ca = get_channel_allocation_order(ca);
1139         active_channels = channel_allocations[ordered_ca].channels;
1140
1141         hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1142
1143         /*
1144          * always configure channel mapping, it may have been changed by the
1145          * user in the meantime
1146          */
1147         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1148                                    channels, per_pin->chmap,
1149                                    per_pin->chmap_set);
1150
1151         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
1152                                       eld->info.conn_type);
1153
1154         per_pin->non_pcm = non_pcm;
1155 }
1156
1157 /*
1158  * Unsolicited events
1159  */
1160
1161 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1162
1163 static void jack_callback(struct hda_codec *codec, struct hda_jack_tbl *jack)
1164 {
1165         struct hdmi_spec *spec = codec->spec;
1166         int pin_idx = pin_nid_to_pin_index(codec, jack->nid);
1167         if (pin_idx < 0)
1168                 return;
1169
1170         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
1171                 snd_hda_jack_report_sync(codec);
1172 }
1173
1174 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1175 {
1176         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1177         struct hda_jack_tbl *jack;
1178         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1179
1180         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1181         if (!jack)
1182                 return;
1183         jack->jack_dirty = 1;
1184
1185         codec_dbg(codec,
1186                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1187                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1188                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1189
1190         jack_callback(codec, jack);
1191 }
1192
1193 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1194 {
1195         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1196         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1197         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1198         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1199
1200         codec_info(codec,
1201                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1202                 codec->addr,
1203                 tag,
1204                 subtag,
1205                 cp_state,
1206                 cp_ready);
1207
1208         /* TODO */
1209         if (cp_state)
1210                 ;
1211         if (cp_ready)
1212                 ;
1213 }
1214
1215
1216 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1217 {
1218         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1219         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1220
1221         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1222                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
1223                 return;
1224         }
1225
1226         if (subtag == 0)
1227                 hdmi_intrinsic_event(codec, res);
1228         else
1229                 hdmi_non_intrinsic_event(codec, res);
1230 }
1231
1232 static void haswell_verify_D0(struct hda_codec *codec,
1233                 hda_nid_t cvt_nid, hda_nid_t nid)
1234 {
1235         int pwr;
1236
1237         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1238          * thus pins could only choose converter 0 for use. Make sure the
1239          * converters are in correct power state */
1240         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1241                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1242
1243         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1244                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1245                                     AC_PWRST_D0);
1246                 msleep(40);
1247                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1248                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1249                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1250         }
1251 }
1252
1253 /*
1254  * Callbacks
1255  */
1256
1257 /* HBR should be Non-PCM, 8 channels */
1258 #define is_hbr_format(format) \
1259         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1260
1261 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
1262                               bool hbr)
1263 {
1264         int pinctl, new_pinctl;
1265
1266         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1267                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1268                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1269
1270                 if (pinctl < 0)
1271                         return hbr ? -EINVAL : 0;
1272
1273                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1274                 if (hbr)
1275                         new_pinctl |= AC_PINCTL_EPT_HBR;
1276                 else
1277                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1278
1279                 codec_dbg(codec,
1280                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
1281                             pin_nid,
1282                             pinctl == new_pinctl ? "" : "new-",
1283                             new_pinctl);
1284
1285                 if (pinctl != new_pinctl)
1286                         snd_hda_codec_write(codec, pin_nid, 0,
1287                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1288                                             new_pinctl);
1289         } else if (hbr)
1290                 return -EINVAL;
1291
1292         return 0;
1293 }
1294
1295 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1296                               hda_nid_t pin_nid, u32 stream_tag, int format)
1297 {
1298         struct hdmi_spec *spec = codec->spec;
1299         int err;
1300
1301         if (is_haswell_plus(codec))
1302                 haswell_verify_D0(codec, cvt_nid, pin_nid);
1303
1304         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
1305
1306         if (err) {
1307                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
1308                 return err;
1309         }
1310
1311         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1312         return 0;
1313 }
1314
1315 static int hdmi_choose_cvt(struct hda_codec *codec,
1316                         int pin_idx, int *cvt_id, int *mux_id)
1317 {
1318         struct hdmi_spec *spec = codec->spec;
1319         struct hdmi_spec_per_pin *per_pin;
1320         struct hdmi_spec_per_cvt *per_cvt = NULL;
1321         int cvt_idx, mux_idx = 0;
1322
1323         per_pin = get_pin(spec, pin_idx);
1324
1325         /* Dynamically assign converter to stream */
1326         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1327                 per_cvt = get_cvt(spec, cvt_idx);
1328
1329                 /* Must not already be assigned */
1330                 if (per_cvt->assigned)
1331                         continue;
1332                 /* Must be in pin's mux's list of converters */
1333                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1334                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1335                                 break;
1336                 /* Not in mux list */
1337                 if (mux_idx == per_pin->num_mux_nids)
1338                         continue;
1339                 break;
1340         }
1341
1342         /* No free converters */
1343         if (cvt_idx == spec->num_cvts)
1344                 return -ENODEV;
1345
1346         per_pin->mux_idx = mux_idx;
1347
1348         if (cvt_id)
1349                 *cvt_id = cvt_idx;
1350         if (mux_id)
1351                 *mux_id = mux_idx;
1352
1353         return 0;
1354 }
1355
1356 /* Assure the pin select the right convetor */
1357 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1358                         struct hdmi_spec_per_pin *per_pin)
1359 {
1360         hda_nid_t pin_nid = per_pin->pin_nid;
1361         int mux_idx, curr;
1362
1363         mux_idx = per_pin->mux_idx;
1364         curr = snd_hda_codec_read(codec, pin_nid, 0,
1365                                           AC_VERB_GET_CONNECT_SEL, 0);
1366         if (curr != mux_idx)
1367                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1368                                             AC_VERB_SET_CONNECT_SEL,
1369                                             mux_idx);
1370 }
1371
1372 /* Intel HDMI workaround to fix audio routing issue:
1373  * For some Intel display codecs, pins share the same connection list.
1374  * So a conveter can be selected by multiple pins and playback on any of these
1375  * pins will generate sound on the external display, because audio flows from
1376  * the same converter to the display pipeline. Also muting one pin may make
1377  * other pins have no sound output.
1378  * So this function assures that an assigned converter for a pin is not selected
1379  * by any other pins.
1380  */
1381 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1382                         hda_nid_t pin_nid, int mux_idx)
1383 {
1384         struct hdmi_spec *spec = codec->spec;
1385         hda_nid_t nid, end_nid;
1386         int cvt_idx, curr;
1387         struct hdmi_spec_per_cvt *per_cvt;
1388
1389         /* configure all pins, including "no physical connection" ones */
1390         end_nid = codec->start_nid + codec->num_nodes;
1391         for (nid = codec->start_nid; nid < end_nid; nid++) {
1392                 unsigned int wid_caps = get_wcaps(codec, nid);
1393                 unsigned int wid_type = get_wcaps_type(wid_caps);
1394
1395                 if (wid_type != AC_WID_PIN)
1396                         continue;
1397
1398                 if (nid == pin_nid)
1399                         continue;
1400
1401                 curr = snd_hda_codec_read(codec, nid, 0,
1402                                           AC_VERB_GET_CONNECT_SEL, 0);
1403                 if (curr != mux_idx)
1404                         continue;
1405
1406                 /* choose an unassigned converter. The conveters in the
1407                  * connection list are in the same order as in the codec.
1408                  */
1409                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1410                         per_cvt = get_cvt(spec, cvt_idx);
1411                         if (!per_cvt->assigned) {
1412                                 codec_dbg(codec,
1413                                           "choose cvt %d for pin nid %d\n",
1414                                         cvt_idx, nid);
1415                                 snd_hda_codec_write_cache(codec, nid, 0,
1416                                             AC_VERB_SET_CONNECT_SEL,
1417                                             cvt_idx);
1418                                 break;
1419                         }
1420                 }
1421         }
1422 }
1423
1424 /*
1425  * HDA PCM callbacks
1426  */
1427 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1428                          struct hda_codec *codec,
1429                          struct snd_pcm_substream *substream)
1430 {
1431         struct hdmi_spec *spec = codec->spec;
1432         struct snd_pcm_runtime *runtime = substream->runtime;
1433         int pin_idx, cvt_idx, mux_idx = 0;
1434         struct hdmi_spec_per_pin *per_pin;
1435         struct hdmi_eld *eld;
1436         struct hdmi_spec_per_cvt *per_cvt = NULL;
1437         int err;
1438
1439         /* Validate hinfo */
1440         pin_idx = hinfo_to_pin_index(codec, hinfo);
1441         if (snd_BUG_ON(pin_idx < 0))
1442                 return -EINVAL;
1443         per_pin = get_pin(spec, pin_idx);
1444         eld = &per_pin->sink_eld;
1445
1446         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1447         if (err < 0)
1448                 return err;
1449
1450         per_cvt = get_cvt(spec, cvt_idx);
1451         /* Claim converter */
1452         per_cvt->assigned = 1;
1453         per_pin->cvt_nid = per_cvt->cvt_nid;
1454         hinfo->nid = per_cvt->cvt_nid;
1455
1456         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1457                             AC_VERB_SET_CONNECT_SEL,
1458                             mux_idx);
1459
1460         /* configure unused pins to choose other converters */
1461         if (is_haswell_plus(codec) || is_valleyview(codec))
1462                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1463
1464         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1465
1466         /* Initially set the converter's capabilities */
1467         hinfo->channels_min = per_cvt->channels_min;
1468         hinfo->channels_max = per_cvt->channels_max;
1469         hinfo->rates = per_cvt->rates;
1470         hinfo->formats = per_cvt->formats;
1471         hinfo->maxbps = per_cvt->maxbps;
1472
1473         /* Restrict capabilities by ELD if this isn't disabled */
1474         if (!static_hdmi_pcm && eld->eld_valid) {
1475                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1476                 if (hinfo->channels_min > hinfo->channels_max ||
1477                     !hinfo->rates || !hinfo->formats) {
1478                         per_cvt->assigned = 0;
1479                         hinfo->nid = 0;
1480                         snd_hda_spdif_ctls_unassign(codec, pin_idx);
1481                         return -ENODEV;
1482                 }
1483         }
1484
1485         /* Store the updated parameters */
1486         runtime->hw.channels_min = hinfo->channels_min;
1487         runtime->hw.channels_max = hinfo->channels_max;
1488         runtime->hw.formats = hinfo->formats;
1489         runtime->hw.rates = hinfo->rates;
1490
1491         snd_pcm_hw_constraint_step(substream->runtime, 0,
1492                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1493         return 0;
1494 }
1495
1496 /*
1497  * HDA/HDMI auto parsing
1498  */
1499 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1500 {
1501         struct hdmi_spec *spec = codec->spec;
1502         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1503         hda_nid_t pin_nid = per_pin->pin_nid;
1504
1505         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1506                 codec_warn(codec,
1507                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1508                            pin_nid, get_wcaps(codec, pin_nid));
1509                 return -EINVAL;
1510         }
1511
1512         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1513                                                         per_pin->mux_nids,
1514                                                         HDA_MAX_CONNECTIONS);
1515
1516         return 0;
1517 }
1518
1519 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1520 {
1521         struct hda_jack_tbl *jack;
1522         struct hda_codec *codec = per_pin->codec;
1523         struct hdmi_spec *spec = codec->spec;
1524         struct hdmi_eld *eld = &spec->temp_eld;
1525         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1526         hda_nid_t pin_nid = per_pin->pin_nid;
1527         /*
1528          * Always execute a GetPinSense verb here, even when called from
1529          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1530          * response's PD bit is not the real PD value, but indicates that
1531          * the real PD value changed. An older version of the HD-audio
1532          * specification worked this way. Hence, we just ignore the data in
1533          * the unsolicited response to avoid custom WARs.
1534          */
1535         int present;
1536         bool update_eld = false;
1537         bool eld_changed = false;
1538         bool ret;
1539
1540         snd_hda_power_up(codec);
1541         present = snd_hda_pin_sense(codec, pin_nid);
1542
1543         mutex_lock(&per_pin->lock);
1544         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1545         if (pin_eld->monitor_present)
1546                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1547         else
1548                 eld->eld_valid = false;
1549
1550         codec_dbg(codec,
1551                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1552                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1553
1554         if (eld->eld_valid) {
1555                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1556                                                      &eld->eld_size) < 0)
1557                         eld->eld_valid = false;
1558                 else {
1559                         memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1560                         if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1561                                                     eld->eld_size) < 0)
1562                                 eld->eld_valid = false;
1563                 }
1564
1565                 if (eld->eld_valid) {
1566                         snd_hdmi_show_eld(&eld->info);
1567                         update_eld = true;
1568                 }
1569                 else if (repoll) {
1570                         queue_delayed_work(codec->bus->workq,
1571                                            &per_pin->work,
1572                                            msecs_to_jiffies(300));
1573                         goto unlock;
1574                 }
1575         }
1576
1577         if (pin_eld->eld_valid && !eld->eld_valid) {
1578                 update_eld = true;
1579                 eld_changed = true;
1580         }
1581         if (update_eld) {
1582                 bool old_eld_valid = pin_eld->eld_valid;
1583                 pin_eld->eld_valid = eld->eld_valid;
1584                 eld_changed = pin_eld->eld_size != eld->eld_size ||
1585                               memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1586                                      eld->eld_size) != 0;
1587                 if (eld_changed)
1588                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1589                                eld->eld_size);
1590                 pin_eld->eld_size = eld->eld_size;
1591                 pin_eld->info = eld->info;
1592
1593                 /*
1594                  * Re-setup pin and infoframe. This is needed e.g. when
1595                  * - sink is first plugged-in (infoframe is not set up if !monitor_present)
1596                  * - transcoder can change during stream playback on Haswell
1597                  *   and this can make HW reset converter selection on a pin.
1598                  */
1599                 if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1600                         if (is_haswell_plus(codec) || is_valleyview(codec)) {
1601                                 intel_verify_pin_cvt_connect(codec, per_pin);
1602                                 intel_not_share_assigned_cvt(codec, pin_nid,
1603                                                         per_pin->mux_idx);
1604                         }
1605
1606                         hdmi_setup_audio_infoframe(codec, per_pin,
1607                                                    per_pin->non_pcm);
1608                 }
1609         }
1610
1611         if (eld_changed)
1612                 snd_ctl_notify(codec->bus->card,
1613                                SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1614                                &per_pin->eld_ctl->id);
1615  unlock:
1616         ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1617
1618         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1619         if (jack)
1620                 jack->block_report = !ret;
1621
1622         mutex_unlock(&per_pin->lock);
1623         snd_hda_power_down(codec);
1624         return ret;
1625 }
1626
1627 static void hdmi_repoll_eld(struct work_struct *work)
1628 {
1629         struct hdmi_spec_per_pin *per_pin =
1630         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1631
1632         if (per_pin->repoll_count++ > 6)
1633                 per_pin->repoll_count = 0;
1634
1635         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1636                 snd_hda_jack_report_sync(per_pin->codec);
1637 }
1638
1639 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1640                                              hda_nid_t nid);
1641
1642 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1643 {
1644         struct hdmi_spec *spec = codec->spec;
1645         unsigned int caps, config;
1646         int pin_idx;
1647         struct hdmi_spec_per_pin *per_pin;
1648         int err;
1649
1650         caps = snd_hda_query_pin_caps(codec, pin_nid);
1651         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1652                 return 0;
1653
1654         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1655         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1656                 return 0;
1657
1658         if (is_haswell_plus(codec))
1659                 intel_haswell_fixup_connect_list(codec, pin_nid);
1660
1661         pin_idx = spec->num_pins;
1662         per_pin = snd_array_new(&spec->pins);
1663         if (!per_pin)
1664                 return -ENOMEM;
1665
1666         per_pin->pin_nid = pin_nid;
1667         per_pin->non_pcm = false;
1668
1669         err = hdmi_read_pin_conn(codec, pin_idx);
1670         if (err < 0)
1671                 return err;
1672
1673         spec->num_pins++;
1674
1675         return 0;
1676 }
1677
1678 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1679 {
1680         struct hdmi_spec *spec = codec->spec;
1681         struct hdmi_spec_per_cvt *per_cvt;
1682         unsigned int chans;
1683         int err;
1684
1685         chans = get_wcaps(codec, cvt_nid);
1686         chans = get_wcaps_channels(chans);
1687
1688         per_cvt = snd_array_new(&spec->cvts);
1689         if (!per_cvt)
1690                 return -ENOMEM;
1691
1692         per_cvt->cvt_nid = cvt_nid;
1693         per_cvt->channels_min = 2;
1694         if (chans <= 16) {
1695                 per_cvt->channels_max = chans;
1696                 if (chans > spec->channels_max)
1697                         spec->channels_max = chans;
1698         }
1699
1700         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1701                                           &per_cvt->rates,
1702                                           &per_cvt->formats,
1703                                           &per_cvt->maxbps);
1704         if (err < 0)
1705                 return err;
1706
1707         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1708                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1709         spec->num_cvts++;
1710
1711         return 0;
1712 }
1713
1714 static int hdmi_parse_codec(struct hda_codec *codec)
1715 {
1716         hda_nid_t nid;
1717         int i, nodes;
1718
1719         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1720         if (!nid || nodes < 0) {
1721                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1722                 return -EINVAL;
1723         }
1724
1725         for (i = 0; i < nodes; i++, nid++) {
1726                 unsigned int caps;
1727                 unsigned int type;
1728
1729                 caps = get_wcaps(codec, nid);
1730                 type = get_wcaps_type(caps);
1731
1732                 if (!(caps & AC_WCAP_DIGITAL))
1733                         continue;
1734
1735                 switch (type) {
1736                 case AC_WID_AUD_OUT:
1737                         hdmi_add_cvt(codec, nid);
1738                         break;
1739                 case AC_WID_PIN:
1740                         hdmi_add_pin(codec, nid);
1741                         break;
1742                 }
1743         }
1744
1745         return 0;
1746 }
1747
1748 /*
1749  */
1750 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1751 {
1752         struct hda_spdif_out *spdif;
1753         bool non_pcm;
1754
1755         mutex_lock(&codec->spdif_mutex);
1756         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1757         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1758         mutex_unlock(&codec->spdif_mutex);
1759         return non_pcm;
1760 }
1761
1762
1763 /*
1764  * HDMI callbacks
1765  */
1766
1767 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1768                                            struct hda_codec *codec,
1769                                            unsigned int stream_tag,
1770                                            unsigned int format,
1771                                            struct snd_pcm_substream *substream)
1772 {
1773         hda_nid_t cvt_nid = hinfo->nid;
1774         struct hdmi_spec *spec = codec->spec;
1775         int pin_idx = hinfo_to_pin_index(codec, hinfo);
1776         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1777         hda_nid_t pin_nid = per_pin->pin_nid;
1778         bool non_pcm;
1779         int pinctl;
1780
1781         if (is_haswell_plus(codec) || is_valleyview(codec)) {
1782                 /* Verify pin:cvt selections to avoid silent audio after S3.
1783                  * After S3, the audio driver restores pin:cvt selections
1784                  * but this can happen before gfx is ready and such selection
1785                  * is overlooked by HW. Thus multiple pins can share a same
1786                  * default convertor and mute control will affect each other,
1787                  * which can cause a resumed audio playback become silent
1788                  * after S3.
1789                  */
1790                 intel_verify_pin_cvt_connect(codec, per_pin);
1791                 intel_not_share_assigned_cvt(codec, pin_nid, per_pin->mux_idx);
1792         }
1793
1794         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1795         mutex_lock(&per_pin->lock);
1796         per_pin->channels = substream->runtime->channels;
1797         per_pin->setup = true;
1798
1799         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1800         mutex_unlock(&per_pin->lock);
1801
1802         if (spec->dyn_pin_out) {
1803                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1804                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1805                 snd_hda_codec_write(codec, pin_nid, 0,
1806                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1807                                     pinctl | PIN_OUT);
1808         }
1809
1810         return spec->ops.setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1811 }
1812
1813 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1814                                              struct hda_codec *codec,
1815                                              struct snd_pcm_substream *substream)
1816 {
1817         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1818         return 0;
1819 }
1820
1821 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1822                           struct hda_codec *codec,
1823                           struct snd_pcm_substream *substream)
1824 {
1825         struct hdmi_spec *spec = codec->spec;
1826         int cvt_idx, pin_idx;
1827         struct hdmi_spec_per_cvt *per_cvt;
1828         struct hdmi_spec_per_pin *per_pin;
1829         int pinctl;
1830
1831         if (hinfo->nid) {
1832                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
1833                 if (snd_BUG_ON(cvt_idx < 0))
1834                         return -EINVAL;
1835                 per_cvt = get_cvt(spec, cvt_idx);
1836
1837                 snd_BUG_ON(!per_cvt->assigned);
1838                 per_cvt->assigned = 0;
1839                 hinfo->nid = 0;
1840
1841                 pin_idx = hinfo_to_pin_index(codec, hinfo);
1842                 if (snd_BUG_ON(pin_idx < 0))
1843                         return -EINVAL;
1844                 per_pin = get_pin(spec, pin_idx);
1845
1846                 if (spec->dyn_pin_out) {
1847                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1848                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1849                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1850                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1851                                             pinctl & ~PIN_OUT);
1852                 }
1853
1854                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1855
1856                 mutex_lock(&per_pin->lock);
1857                 per_pin->chmap_set = false;
1858                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1859
1860                 per_pin->setup = false;
1861                 per_pin->channels = 0;
1862                 mutex_unlock(&per_pin->lock);
1863         }
1864
1865         return 0;
1866 }
1867
1868 static const struct hda_pcm_ops generic_ops = {
1869         .open = hdmi_pcm_open,
1870         .close = hdmi_pcm_close,
1871         .prepare = generic_hdmi_playback_pcm_prepare,
1872         .cleanup = generic_hdmi_playback_pcm_cleanup,
1873 };
1874
1875 /*
1876  * ALSA API channel-map control callbacks
1877  */
1878 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1879                                struct snd_ctl_elem_info *uinfo)
1880 {
1881         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1882         struct hda_codec *codec = info->private_data;
1883         struct hdmi_spec *spec = codec->spec;
1884         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1885         uinfo->count = spec->channels_max;
1886         uinfo->value.integer.min = 0;
1887         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1888         return 0;
1889 }
1890
1891 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
1892                                                   int channels)
1893 {
1894         /* If the speaker allocation matches the channel count, it is OK.*/
1895         if (cap->channels != channels)
1896                 return -1;
1897
1898         /* all channels are remappable freely */
1899         return SNDRV_CTL_TLVT_CHMAP_VAR;
1900 }
1901
1902 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
1903                                         unsigned int *chmap, int channels)
1904 {
1905         int count = 0;
1906         int c;
1907
1908         for (c = 7; c >= 0; c--) {
1909                 int spk = cap->speakers[c];
1910                 if (!spk)
1911                         continue;
1912
1913                 chmap[count++] = spk_to_chmap(spk);
1914         }
1915
1916         WARN_ON(count != channels);
1917 }
1918
1919 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1920                               unsigned int size, unsigned int __user *tlv)
1921 {
1922         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1923         struct hda_codec *codec = info->private_data;
1924         struct hdmi_spec *spec = codec->spec;
1925         unsigned int __user *dst;
1926         int chs, count = 0;
1927
1928         if (size < 8)
1929                 return -ENOMEM;
1930         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1931                 return -EFAULT;
1932         size -= 8;
1933         dst = tlv + 2;
1934         for (chs = 2; chs <= spec->channels_max; chs++) {
1935                 int i;
1936                 struct cea_channel_speaker_allocation *cap;
1937                 cap = channel_allocations;
1938                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1939                         int chs_bytes = chs * 4;
1940                         int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
1941                         unsigned int tlv_chmap[8];
1942
1943                         if (type < 0)
1944                                 continue;
1945                         if (size < 8)
1946                                 return -ENOMEM;
1947                         if (put_user(type, dst) ||
1948                             put_user(chs_bytes, dst + 1))
1949                                 return -EFAULT;
1950                         dst += 2;
1951                         size -= 8;
1952                         count += 8;
1953                         if (size < chs_bytes)
1954                                 return -ENOMEM;
1955                         size -= chs_bytes;
1956                         count += chs_bytes;
1957                         spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
1958                         if (copy_to_user(dst, tlv_chmap, chs_bytes))
1959                                 return -EFAULT;
1960                         dst += chs;
1961                 }
1962         }
1963         if (put_user(count, tlv + 1))
1964                 return -EFAULT;
1965         return 0;
1966 }
1967
1968 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1969                               struct snd_ctl_elem_value *ucontrol)
1970 {
1971         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1972         struct hda_codec *codec = info->private_data;
1973         struct hdmi_spec *spec = codec->spec;
1974         int pin_idx = kcontrol->private_value;
1975         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1976         int i;
1977
1978         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1979                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1980         return 0;
1981 }
1982
1983 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1984                               struct snd_ctl_elem_value *ucontrol)
1985 {
1986         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1987         struct hda_codec *codec = info->private_data;
1988         struct hdmi_spec *spec = codec->spec;
1989         int pin_idx = kcontrol->private_value;
1990         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1991         unsigned int ctl_idx;
1992         struct snd_pcm_substream *substream;
1993         unsigned char chmap[8];
1994         int i, err, ca, prepared = 0;
1995
1996         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1997         substream = snd_pcm_chmap_substream(info, ctl_idx);
1998         if (!substream || !substream->runtime)
1999                 return 0; /* just for avoiding error from alsactl restore */
2000         switch (substream->runtime->status->state) {
2001         case SNDRV_PCM_STATE_OPEN:
2002         case SNDRV_PCM_STATE_SETUP:
2003                 break;
2004         case SNDRV_PCM_STATE_PREPARED:
2005                 prepared = 1;
2006                 break;
2007         default:
2008                 return -EBUSY;
2009         }
2010         memset(chmap, 0, sizeof(chmap));
2011         for (i = 0; i < ARRAY_SIZE(chmap); i++)
2012                 chmap[i] = ucontrol->value.integer.value[i];
2013         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
2014                 return 0;
2015         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
2016         if (ca < 0)
2017                 return -EINVAL;
2018         if (spec->ops.chmap_validate) {
2019                 err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
2020                 if (err)
2021                         return err;
2022         }
2023         mutex_lock(&per_pin->lock);
2024         per_pin->chmap_set = true;
2025         memcpy(per_pin->chmap, chmap, sizeof(chmap));
2026         if (prepared)
2027                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2028         mutex_unlock(&per_pin->lock);
2029
2030         return 0;
2031 }
2032
2033 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2034 {
2035         struct hdmi_spec *spec = codec->spec;
2036         int pin_idx;
2037
2038         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2039                 struct hda_pcm *info;
2040                 struct hda_pcm_stream *pstr;
2041                 struct hdmi_spec_per_pin *per_pin;
2042
2043                 per_pin = get_pin(spec, pin_idx);
2044                 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
2045                 info = snd_array_new(&spec->pcm_rec);
2046                 if (!info)
2047                         return -ENOMEM;
2048                 info->name = per_pin->pcm_name;
2049                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2050                 info->own_chmap = true;
2051
2052                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2053                 pstr->substreams = 1;
2054                 pstr->ops = generic_ops;
2055                 /* other pstr fields are set in open */
2056         }
2057
2058         codec->num_pcms = spec->num_pins;
2059         codec->pcm_info = spec->pcm_rec.list;
2060
2061         return 0;
2062 }
2063
2064 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
2065 {
2066         char hdmi_str[32] = "HDMI/DP";
2067         struct hdmi_spec *spec = codec->spec;
2068         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2069         int pcmdev = get_pcm_rec(spec, pin_idx)->device;
2070
2071         if (pcmdev > 0)
2072                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2073         if (!is_jack_detectable(codec, per_pin->pin_nid))
2074                 strncat(hdmi_str, " Phantom",
2075                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2076
2077         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
2078 }
2079
2080 static int generic_hdmi_build_controls(struct hda_codec *codec)
2081 {
2082         struct hdmi_spec *spec = codec->spec;
2083         int err;
2084         int pin_idx;
2085
2086         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2087                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2088
2089                 err = generic_hdmi_build_jack(codec, pin_idx);
2090                 if (err < 0)
2091                         return err;
2092
2093                 err = snd_hda_create_dig_out_ctls(codec,
2094                                                   per_pin->pin_nid,
2095                                                   per_pin->mux_nids[0],
2096                                                   HDA_PCM_TYPE_HDMI);
2097                 if (err < 0)
2098                         return err;
2099                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
2100
2101                 /* add control for ELD Bytes */
2102                 err = hdmi_create_eld_ctl(codec, pin_idx,
2103                                           get_pcm_rec(spec, pin_idx)->device);
2104
2105                 if (err < 0)
2106                         return err;
2107
2108                 hdmi_present_sense(per_pin, 0);
2109         }
2110
2111         /* add channel maps */
2112         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2113                 struct snd_pcm_chmap *chmap;
2114                 struct snd_kcontrol *kctl;
2115                 int i;
2116
2117                 if (!codec->pcm_info[pin_idx].pcm)
2118                         break;
2119                 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
2120                                              SNDRV_PCM_STREAM_PLAYBACK,
2121                                              NULL, 0, pin_idx, &chmap);
2122                 if (err < 0)
2123                         return err;
2124                 /* override handlers */
2125                 chmap->private_data = codec;
2126                 kctl = chmap->kctl;
2127                 for (i = 0; i < kctl->count; i++)
2128                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2129                 kctl->info = hdmi_chmap_ctl_info;
2130                 kctl->get = hdmi_chmap_ctl_get;
2131                 kctl->put = hdmi_chmap_ctl_put;
2132                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
2133         }
2134
2135         return 0;
2136 }
2137
2138 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2139 {
2140         struct hdmi_spec *spec = codec->spec;
2141         int pin_idx;
2142
2143         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2144                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2145
2146                 per_pin->codec = codec;
2147                 mutex_init(&per_pin->lock);
2148                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2149                 eld_proc_new(per_pin, pin_idx);
2150         }
2151         return 0;
2152 }
2153
2154 static int generic_hdmi_init(struct hda_codec *codec)
2155 {
2156         struct hdmi_spec *spec = codec->spec;
2157         int pin_idx;
2158
2159         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2160                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2161                 hda_nid_t pin_nid = per_pin->pin_nid;
2162
2163                 hdmi_init_pin(codec, pin_nid);
2164                 snd_hda_jack_detect_enable_callback(codec, pin_nid, pin_nid,
2165                         codec->jackpoll_interval > 0 ? jack_callback : NULL);
2166         }
2167         return 0;
2168 }
2169
2170 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2171 {
2172         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2173         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2174         snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
2175 }
2176
2177 static void hdmi_array_free(struct hdmi_spec *spec)
2178 {
2179         snd_array_free(&spec->pins);
2180         snd_array_free(&spec->cvts);
2181         snd_array_free(&spec->pcm_rec);
2182 }
2183
2184 static void generic_hdmi_free(struct hda_codec *codec)
2185 {
2186         struct hdmi_spec *spec = codec->spec;
2187         int pin_idx;
2188
2189         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2190                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2191
2192                 cancel_delayed_work(&per_pin->work);
2193                 eld_proc_free(per_pin);
2194         }
2195
2196         flush_workqueue(codec->bus->workq);
2197         hdmi_array_free(spec);
2198         kfree(spec);
2199 }
2200
2201 #ifdef CONFIG_PM
2202 static int generic_hdmi_resume(struct hda_codec *codec)
2203 {
2204         struct hdmi_spec *spec = codec->spec;
2205         int pin_idx;
2206
2207         generic_hdmi_init(codec);
2208         snd_hda_codec_resume_amp(codec);
2209         snd_hda_codec_resume_cache(codec);
2210
2211         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2212                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2213                 hdmi_present_sense(per_pin, 1);
2214         }
2215         return 0;
2216 }
2217 #endif
2218
2219 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2220         .init                   = generic_hdmi_init,
2221         .free                   = generic_hdmi_free,
2222         .build_pcms             = generic_hdmi_build_pcms,
2223         .build_controls         = generic_hdmi_build_controls,
2224         .unsol_event            = hdmi_unsol_event,
2225 #ifdef CONFIG_PM
2226         .resume                 = generic_hdmi_resume,
2227 #endif
2228 };
2229
2230 static const struct hdmi_ops generic_standard_hdmi_ops = {
2231         .pin_get_eld                            = snd_hdmi_get_eld,
2232         .pin_get_slot_channel                   = hdmi_pin_get_slot_channel,
2233         .pin_set_slot_channel                   = hdmi_pin_set_slot_channel,
2234         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2235         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2236         .setup_stream                           = hdmi_setup_stream,
2237         .chmap_cea_alloc_validate_get_type      = hdmi_chmap_cea_alloc_validate_get_type,
2238         .cea_alloc_to_tlv_chmap                 = hdmi_cea_alloc_to_tlv_chmap,
2239 };
2240
2241
2242 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2243                                              hda_nid_t nid)
2244 {
2245         struct hdmi_spec *spec = codec->spec;
2246         hda_nid_t conns[4];
2247         int nconns;
2248
2249         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2250         if (nconns == spec->num_cvts &&
2251             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2252                 return;
2253
2254         /* override pins connection list */
2255         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2256         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2257 }
2258
2259 #define INTEL_VENDOR_NID 0x08
2260 #define INTEL_GET_VENDOR_VERB 0xf81
2261 #define INTEL_SET_VENDOR_VERB 0x781
2262 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2263 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2264
2265 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2266                                           bool update_tree)
2267 {
2268         unsigned int vendor_param;
2269
2270         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2271                                 INTEL_GET_VENDOR_VERB, 0);
2272         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2273                 return;
2274
2275         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2276         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2277                                 INTEL_SET_VENDOR_VERB, vendor_param);
2278         if (vendor_param == -1)
2279                 return;
2280
2281         if (update_tree)
2282                 snd_hda_codec_update_widgets(codec);
2283 }
2284
2285 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2286 {
2287         unsigned int vendor_param;
2288
2289         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2290                                 INTEL_GET_VENDOR_VERB, 0);
2291         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2292                 return;
2293
2294         /* enable DP1.2 mode */
2295         vendor_param |= INTEL_EN_DP12;
2296         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2297                                 INTEL_SET_VENDOR_VERB, vendor_param);
2298 }
2299
2300 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2301  * Otherwise you may get severe h/w communication errors.
2302  */
2303 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2304                                 unsigned int power_state)
2305 {
2306         if (power_state == AC_PWRST_D0) {
2307                 intel_haswell_enable_all_pins(codec, false);
2308                 intel_haswell_fixup_enable_dp12(codec);
2309         }
2310
2311         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2312         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2313 }
2314
2315 static int patch_generic_hdmi(struct hda_codec *codec)
2316 {
2317         struct hdmi_spec *spec;
2318
2319         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2320         if (spec == NULL)
2321                 return -ENOMEM;
2322
2323         spec->ops = generic_standard_hdmi_ops;
2324         codec->spec = spec;
2325         hdmi_array_init(spec, 4);
2326
2327         if (is_haswell_plus(codec)) {
2328                 intel_haswell_enable_all_pins(codec, true);
2329                 intel_haswell_fixup_enable_dp12(codec);
2330         }
2331
2332         if (is_haswell(codec) || is_valleyview(codec)) {
2333                 codec->depop_delay = 0;
2334         }
2335
2336         if (hdmi_parse_codec(codec) < 0) {
2337                 codec->spec = NULL;
2338                 kfree(spec);
2339                 return -EINVAL;
2340         }
2341         codec->patch_ops = generic_hdmi_patch_ops;
2342         if (is_haswell_plus(codec)) {
2343                 codec->patch_ops.set_power_state = haswell_set_power_state;
2344                 codec->dp_mst = true;
2345         }
2346
2347         generic_hdmi_init_per_pins(codec);
2348
2349         init_channel_allocations();
2350
2351         return 0;
2352 }
2353
2354 /*
2355  * Shared non-generic implementations
2356  */
2357
2358 static int simple_playback_build_pcms(struct hda_codec *codec)
2359 {
2360         struct hdmi_spec *spec = codec->spec;
2361         struct hda_pcm *info;
2362         unsigned int chans;
2363         struct hda_pcm_stream *pstr;
2364         struct hdmi_spec_per_cvt *per_cvt;
2365
2366         per_cvt = get_cvt(spec, 0);
2367         chans = get_wcaps(codec, per_cvt->cvt_nid);
2368         chans = get_wcaps_channels(chans);
2369
2370         info = snd_array_new(&spec->pcm_rec);
2371         if (!info)
2372                 return -ENOMEM;
2373         info->name = get_pin(spec, 0)->pcm_name;
2374         sprintf(info->name, "HDMI 0");
2375         info->pcm_type = HDA_PCM_TYPE_HDMI;
2376         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2377         *pstr = spec->pcm_playback;
2378         pstr->nid = per_cvt->cvt_nid;
2379         if (pstr->channels_max <= 2 && chans && chans <= 16)
2380                 pstr->channels_max = chans;
2381
2382         codec->num_pcms = 1;
2383         codec->pcm_info = info;
2384
2385         return 0;
2386 }
2387
2388 /* unsolicited event for jack sensing */
2389 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2390                                     unsigned int res)
2391 {
2392         snd_hda_jack_set_dirty_all(codec);
2393         snd_hda_jack_report_sync(codec);
2394 }
2395
2396 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2397  * as long as spec->pins[] is set correctly
2398  */
2399 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2400
2401 static int simple_playback_build_controls(struct hda_codec *codec)
2402 {
2403         struct hdmi_spec *spec = codec->spec;
2404         struct hdmi_spec_per_cvt *per_cvt;
2405         int err;
2406
2407         per_cvt = get_cvt(spec, 0);
2408         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2409                                           per_cvt->cvt_nid,
2410                                           HDA_PCM_TYPE_HDMI);
2411         if (err < 0)
2412                 return err;
2413         return simple_hdmi_build_jack(codec, 0);
2414 }
2415
2416 static int simple_playback_init(struct hda_codec *codec)
2417 {
2418         struct hdmi_spec *spec = codec->spec;
2419         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2420         hda_nid_t pin = per_pin->pin_nid;
2421
2422         snd_hda_codec_write(codec, pin, 0,
2423                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2424         /* some codecs require to unmute the pin */
2425         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2426                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2427                                     AMP_OUT_UNMUTE);
2428         snd_hda_jack_detect_enable(codec, pin, pin);
2429         return 0;
2430 }
2431
2432 static void simple_playback_free(struct hda_codec *codec)
2433 {
2434         struct hdmi_spec *spec = codec->spec;
2435
2436         hdmi_array_free(spec);
2437         kfree(spec);
2438 }
2439
2440 /*
2441  * Nvidia specific implementations
2442  */
2443
2444 #define Nv_VERB_SET_Channel_Allocation          0xF79
2445 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2446 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2447 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2448
2449 #define nvhdmi_master_con_nid_7x        0x04
2450 #define nvhdmi_master_pin_nid_7x        0x05
2451
2452 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2453         /*front, rear, clfe, rear_surr */
2454         0x6, 0x8, 0xa, 0xc,
2455 };
2456
2457 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2458         /* set audio protect on */
2459         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2460         /* enable digital output on pin widget */
2461         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2462         {} /* terminator */
2463 };
2464
2465 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2466         /* set audio protect on */
2467         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2468         /* enable digital output on pin widget */
2469         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2470         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2471         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2472         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2473         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2474         {} /* terminator */
2475 };
2476
2477 #ifdef LIMITED_RATE_FMT_SUPPORT
2478 /* support only the safe format and rate */
2479 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2480 #define SUPPORTED_MAXBPS        16
2481 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2482 #else
2483 /* support all rates and formats */
2484 #define SUPPORTED_RATES \
2485         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2486         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2487          SNDRV_PCM_RATE_192000)
2488 #define SUPPORTED_MAXBPS        24
2489 #define SUPPORTED_FORMATS \
2490         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2491 #endif
2492
2493 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2494 {
2495         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2496         return 0;
2497 }
2498
2499 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2500 {
2501         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2502         return 0;
2503 }
2504
2505 static unsigned int channels_2_6_8[] = {
2506         2, 6, 8
2507 };
2508
2509 static unsigned int channels_2_8[] = {
2510         2, 8
2511 };
2512
2513 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2514         .count = ARRAY_SIZE(channels_2_6_8),
2515         .list = channels_2_6_8,
2516         .mask = 0,
2517 };
2518
2519 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2520         .count = ARRAY_SIZE(channels_2_8),
2521         .list = channels_2_8,
2522         .mask = 0,
2523 };
2524
2525 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2526                                     struct hda_codec *codec,
2527                                     struct snd_pcm_substream *substream)
2528 {
2529         struct hdmi_spec *spec = codec->spec;
2530         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2531
2532         switch (codec->preset->id) {
2533         case 0x10de0002:
2534         case 0x10de0003:
2535         case 0x10de0005:
2536         case 0x10de0006:
2537                 hw_constraints_channels = &hw_constraints_2_8_channels;
2538                 break;
2539         case 0x10de0007:
2540                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2541                 break;
2542         default:
2543                 break;
2544         }
2545
2546         if (hw_constraints_channels != NULL) {
2547                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2548                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2549                                 hw_constraints_channels);
2550         } else {
2551                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2552                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2553         }
2554
2555         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2556 }
2557
2558 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2559                                      struct hda_codec *codec,
2560                                      struct snd_pcm_substream *substream)
2561 {
2562         struct hdmi_spec *spec = codec->spec;
2563         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2564 }
2565
2566 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2567                                        struct hda_codec *codec,
2568                                        unsigned int stream_tag,
2569                                        unsigned int format,
2570                                        struct snd_pcm_substream *substream)
2571 {
2572         struct hdmi_spec *spec = codec->spec;
2573         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2574                                              stream_tag, format, substream);
2575 }
2576
2577 static const struct hda_pcm_stream simple_pcm_playback = {
2578         .substreams = 1,
2579         .channels_min = 2,
2580         .channels_max = 2,
2581         .ops = {
2582                 .open = simple_playback_pcm_open,
2583                 .close = simple_playback_pcm_close,
2584                 .prepare = simple_playback_pcm_prepare
2585         },
2586 };
2587
2588 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2589         .build_controls = simple_playback_build_controls,
2590         .build_pcms = simple_playback_build_pcms,
2591         .init = simple_playback_init,
2592         .free = simple_playback_free,
2593         .unsol_event = simple_hdmi_unsol_event,
2594 };
2595
2596 static int patch_simple_hdmi(struct hda_codec *codec,
2597                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2598 {
2599         struct hdmi_spec *spec;
2600         struct hdmi_spec_per_cvt *per_cvt;
2601         struct hdmi_spec_per_pin *per_pin;
2602
2603         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2604         if (!spec)
2605                 return -ENOMEM;
2606
2607         codec->spec = spec;
2608         hdmi_array_init(spec, 1);
2609
2610         spec->multiout.num_dacs = 0;  /* no analog */
2611         spec->multiout.max_channels = 2;
2612         spec->multiout.dig_out_nid = cvt_nid;
2613         spec->num_cvts = 1;
2614         spec->num_pins = 1;
2615         per_pin = snd_array_new(&spec->pins);
2616         per_cvt = snd_array_new(&spec->cvts);
2617         if (!per_pin || !per_cvt) {
2618                 simple_playback_free(codec);
2619                 return -ENOMEM;
2620         }
2621         per_cvt->cvt_nid = cvt_nid;
2622         per_pin->pin_nid = pin_nid;
2623         spec->pcm_playback = simple_pcm_playback;
2624
2625         codec->patch_ops = simple_hdmi_patch_ops;
2626
2627         return 0;
2628 }
2629
2630 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2631                                                     int channels)
2632 {
2633         unsigned int chanmask;
2634         int chan = channels ? (channels - 1) : 1;
2635
2636         switch (channels) {
2637         default:
2638         case 0:
2639         case 2:
2640                 chanmask = 0x00;
2641                 break;
2642         case 4:
2643                 chanmask = 0x08;
2644                 break;
2645         case 6:
2646                 chanmask = 0x0b;
2647                 break;
2648         case 8:
2649                 chanmask = 0x13;
2650                 break;
2651         }
2652
2653         /* Set the audio infoframe channel allocation and checksum fields.  The
2654          * channel count is computed implicitly by the hardware. */
2655         snd_hda_codec_write(codec, 0x1, 0,
2656                         Nv_VERB_SET_Channel_Allocation, chanmask);
2657
2658         snd_hda_codec_write(codec, 0x1, 0,
2659                         Nv_VERB_SET_Info_Frame_Checksum,
2660                         (0x71 - chan - chanmask));
2661 }
2662
2663 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2664                                    struct hda_codec *codec,
2665                                    struct snd_pcm_substream *substream)
2666 {
2667         struct hdmi_spec *spec = codec->spec;
2668         int i;
2669
2670         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2671                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2672         for (i = 0; i < 4; i++) {
2673                 /* set the stream id */
2674                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2675                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2676                 /* set the stream format */
2677                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2678                                 AC_VERB_SET_STREAM_FORMAT, 0);
2679         }
2680
2681         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2682          * streams are disabled. */
2683         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2684
2685         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2686 }
2687
2688 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2689                                      struct hda_codec *codec,
2690                                      unsigned int stream_tag,
2691                                      unsigned int format,
2692                                      struct snd_pcm_substream *substream)
2693 {
2694         int chs;
2695         unsigned int dataDCC2, channel_id;
2696         int i;
2697         struct hdmi_spec *spec = codec->spec;
2698         struct hda_spdif_out *spdif;
2699         struct hdmi_spec_per_cvt *per_cvt;
2700
2701         mutex_lock(&codec->spdif_mutex);
2702         per_cvt = get_cvt(spec, 0);
2703         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2704
2705         chs = substream->runtime->channels;
2706
2707         dataDCC2 = 0x2;
2708
2709         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2710         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2711                 snd_hda_codec_write(codec,
2712                                 nvhdmi_master_con_nid_7x,
2713                                 0,
2714                                 AC_VERB_SET_DIGI_CONVERT_1,
2715                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2716
2717         /* set the stream id */
2718         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2719                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2720
2721         /* set the stream format */
2722         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2723                         AC_VERB_SET_STREAM_FORMAT, format);
2724
2725         /* turn on again (if needed) */
2726         /* enable and set the channel status audio/data flag */
2727         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2728                 snd_hda_codec_write(codec,
2729                                 nvhdmi_master_con_nid_7x,
2730                                 0,
2731                                 AC_VERB_SET_DIGI_CONVERT_1,
2732                                 spdif->ctls & 0xff);
2733                 snd_hda_codec_write(codec,
2734                                 nvhdmi_master_con_nid_7x,
2735                                 0,
2736                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2737         }
2738
2739         for (i = 0; i < 4; i++) {
2740                 if (chs == 2)
2741                         channel_id = 0;
2742                 else
2743                         channel_id = i * 2;
2744
2745                 /* turn off SPDIF once;
2746                  *otherwise the IEC958 bits won't be updated
2747                  */
2748                 if (codec->spdif_status_reset &&
2749                 (spdif->ctls & AC_DIG1_ENABLE))
2750                         snd_hda_codec_write(codec,
2751                                 nvhdmi_con_nids_7x[i],
2752                                 0,
2753                                 AC_VERB_SET_DIGI_CONVERT_1,
2754                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2755                 /* set the stream id */
2756                 snd_hda_codec_write(codec,
2757                                 nvhdmi_con_nids_7x[i],
2758                                 0,
2759                                 AC_VERB_SET_CHANNEL_STREAMID,
2760                                 (stream_tag << 4) | channel_id);
2761                 /* set the stream format */
2762                 snd_hda_codec_write(codec,
2763                                 nvhdmi_con_nids_7x[i],
2764                                 0,
2765                                 AC_VERB_SET_STREAM_FORMAT,
2766                                 format);
2767                 /* turn on again (if needed) */
2768                 /* enable and set the channel status audio/data flag */
2769                 if (codec->spdif_status_reset &&
2770                 (spdif->ctls & AC_DIG1_ENABLE)) {
2771                         snd_hda_codec_write(codec,
2772                                         nvhdmi_con_nids_7x[i],
2773                                         0,
2774                                         AC_VERB_SET_DIGI_CONVERT_1,
2775                                         spdif->ctls & 0xff);
2776                         snd_hda_codec_write(codec,
2777                                         nvhdmi_con_nids_7x[i],
2778                                         0,
2779                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2780                 }
2781         }
2782
2783         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2784
2785         mutex_unlock(&codec->spdif_mutex);
2786         return 0;
2787 }
2788
2789 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2790         .substreams = 1,
2791         .channels_min = 2,
2792         .channels_max = 8,
2793         .nid = nvhdmi_master_con_nid_7x,
2794         .rates = SUPPORTED_RATES,
2795         .maxbps = SUPPORTED_MAXBPS,
2796         .formats = SUPPORTED_FORMATS,
2797         .ops = {
2798                 .open = simple_playback_pcm_open,
2799                 .close = nvhdmi_8ch_7x_pcm_close,
2800                 .prepare = nvhdmi_8ch_7x_pcm_prepare
2801         },
2802 };
2803
2804 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2805 {
2806         struct hdmi_spec *spec;
2807         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2808                                     nvhdmi_master_pin_nid_7x);
2809         if (err < 0)
2810                 return err;
2811
2812         codec->patch_ops.init = nvhdmi_7x_init_2ch;
2813         /* override the PCM rates, etc, as the codec doesn't give full list */
2814         spec = codec->spec;
2815         spec->pcm_playback.rates = SUPPORTED_RATES;
2816         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2817         spec->pcm_playback.formats = SUPPORTED_FORMATS;
2818         return 0;
2819 }
2820
2821 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2822 {
2823         struct hdmi_spec *spec = codec->spec;
2824         int err = simple_playback_build_pcms(codec);
2825         if (!err) {
2826                 struct hda_pcm *info = get_pcm_rec(spec, 0);
2827                 info->own_chmap = true;
2828         }
2829         return err;
2830 }
2831
2832 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2833 {
2834         struct hdmi_spec *spec = codec->spec;
2835         struct hda_pcm *info;
2836         struct snd_pcm_chmap *chmap;
2837         int err;
2838
2839         err = simple_playback_build_controls(codec);
2840         if (err < 0)
2841                 return err;
2842
2843         /* add channel maps */
2844         info = get_pcm_rec(spec, 0);
2845         err = snd_pcm_add_chmap_ctls(info->pcm,
2846                                      SNDRV_PCM_STREAM_PLAYBACK,
2847                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
2848         if (err < 0)
2849                 return err;
2850         switch (codec->preset->id) {
2851         case 0x10de0002:
2852         case 0x10de0003:
2853         case 0x10de0005:
2854         case 0x10de0006:
2855                 chmap->channel_mask = (1U << 2) | (1U << 8);
2856                 break;
2857         case 0x10de0007:
2858                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2859         }
2860         return 0;
2861 }
2862
2863 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2864 {
2865         struct hdmi_spec *spec;
2866         int err = patch_nvhdmi_2ch(codec);
2867         if (err < 0)
2868                 return err;
2869         spec = codec->spec;
2870         spec->multiout.max_channels = 8;
2871         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2872         codec->patch_ops.init = nvhdmi_7x_init_8ch;
2873         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2874         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2875
2876         /* Initialize the audio infoframe channel mask and checksum to something
2877          * valid */
2878         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2879
2880         return 0;
2881 }
2882
2883 /*
2884  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
2885  * - 0x10de0015
2886  * - 0x10de0040
2887  */
2888 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
2889                                                     int channels)
2890 {
2891         if (cap->ca_index == 0x00 && channels == 2)
2892                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
2893
2894         return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
2895 }
2896
2897 static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
2898 {
2899         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
2900                 return -EINVAL;
2901
2902         return 0;
2903 }
2904
2905 static int patch_nvhdmi(struct hda_codec *codec)
2906 {
2907         struct hdmi_spec *spec;
2908         int err;
2909
2910         err = patch_generic_hdmi(codec);
2911         if (err)
2912                 return err;
2913
2914         spec = codec->spec;
2915         spec->dyn_pin_out = true;
2916
2917         spec->ops.chmap_cea_alloc_validate_get_type =
2918                 nvhdmi_chmap_cea_alloc_validate_get_type;
2919         spec->ops.chmap_validate = nvhdmi_chmap_validate;
2920
2921         return 0;
2922 }
2923
2924 /*
2925  * ATI/AMD-specific implementations
2926  */
2927
2928 #define is_amdhdmi_rev3_or_later(codec) \
2929         ((codec)->vendor_id == 0x1002aa01 && ((codec)->revision_id & 0xff00) >= 0x0300)
2930 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
2931
2932 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
2933 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
2934 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
2935 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
2936 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
2937 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
2938 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
2939 #define ATI_VERB_SET_HBR_CONTROL        0x77c
2940 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
2941 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
2942 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
2943 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
2944 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
2945 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
2946 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
2947 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
2948 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
2949 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
2950 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
2951 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
2952 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
2953 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
2954 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
2955 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
2956 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
2957
2958 /* AMD specific HDA cvt verbs */
2959 #define ATI_VERB_SET_RAMP_RATE          0x770
2960 #define ATI_VERB_GET_RAMP_RATE          0xf70
2961
2962 #define ATI_OUT_ENABLE 0x1
2963
2964 #define ATI_MULTICHANNEL_MODE_PAIRED    0
2965 #define ATI_MULTICHANNEL_MODE_SINGLE    1
2966
2967 #define ATI_HBR_CAPABLE 0x01
2968 #define ATI_HBR_ENABLE 0x10
2969
2970 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
2971                            unsigned char *buf, int *eld_size)
2972 {
2973         /* call hda_eld.c ATI/AMD-specific function */
2974         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
2975                                     is_amdhdmi_rev3_or_later(codec));
2976 }
2977
2978 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
2979                                         int active_channels, int conn_type)
2980 {
2981         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
2982 }
2983
2984 static int atihdmi_paired_swap_fc_lfe(int pos)
2985 {
2986         /*
2987          * ATI/AMD have automatic FC/LFE swap built-in
2988          * when in pairwise mapping mode.
2989          */
2990
2991         switch (pos) {
2992                 /* see channel_allocations[].speakers[] */
2993                 case 2: return 3;
2994                 case 3: return 2;
2995                 default: break;
2996         }
2997
2998         return pos;
2999 }
3000
3001 static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
3002 {
3003         struct cea_channel_speaker_allocation *cap;
3004         int i, j;
3005
3006         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3007
3008         cap = &channel_allocations[get_channel_allocation_order(ca)];
3009         for (i = 0; i < chs; ++i) {
3010                 int mask = to_spk_mask(map[i]);
3011                 bool ok = false;
3012                 bool companion_ok = false;
3013
3014                 if (!mask)
3015                         continue;
3016
3017                 for (j = 0 + i % 2; j < 8; j += 2) {
3018                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3019                         if (cap->speakers[chan_idx] == mask) {
3020                                 /* channel is in a supported position */
3021                                 ok = true;
3022
3023                                 if (i % 2 == 0 && i + 1 < chs) {
3024                                         /* even channel, check the odd companion */
3025                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3026                                         int comp_mask_req = to_spk_mask(map[i+1]);
3027                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3028
3029                                         if (comp_mask_req == comp_mask_act)
3030                                                 companion_ok = true;
3031                                         else
3032                                                 return -EINVAL;
3033                                 }
3034                                 break;
3035                         }
3036                 }
3037
3038                 if (!ok)
3039                         return -EINVAL;
3040
3041                 if (companion_ok)
3042                         i++; /* companion channel already checked */
3043         }
3044
3045         return 0;
3046 }
3047
3048 static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3049                                         int hdmi_slot, int stream_channel)
3050 {
3051         int verb;
3052         int ati_channel_setup = 0;
3053
3054         if (hdmi_slot > 7)
3055                 return -EINVAL;
3056
3057         if (!has_amd_full_remap_support(codec)) {
3058                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3059
3060                 /* In case this is an odd slot but without stream channel, do not
3061                  * disable the slot since the corresponding even slot could have a
3062                  * channel. In case neither have a channel, the slot pair will be
3063                  * disabled when this function is called for the even slot. */
3064                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3065                         return 0;
3066
3067                 hdmi_slot -= hdmi_slot % 2;
3068
3069                 if (stream_channel != 0xf)
3070                         stream_channel -= stream_channel % 2;
3071         }
3072
3073         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3074
3075         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3076
3077         if (stream_channel != 0xf)
3078                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3079
3080         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3081 }
3082
3083 static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3084                                         int asp_slot)
3085 {
3086         bool was_odd = false;
3087         int ati_asp_slot = asp_slot;
3088         int verb;
3089         int ati_channel_setup;
3090
3091         if (asp_slot > 7)
3092                 return -EINVAL;
3093
3094         if (!has_amd_full_remap_support(codec)) {
3095                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3096                 if (ati_asp_slot % 2 != 0) {
3097                         ati_asp_slot -= 1;
3098                         was_odd = true;
3099                 }
3100         }
3101
3102         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3103
3104         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3105
3106         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3107                 return 0xf;
3108
3109         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3110 }
3111
3112 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3113                                                             int channels)
3114 {
3115         int c;
3116
3117         /*
3118          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3119          * we need to take that into account (a single channel may take 2
3120          * channel slots if we need to carry a silent channel next to it).
3121          * On Rev3+ AMD codecs this function is not used.
3122          */
3123         int chanpairs = 0;
3124
3125         /* We only produce even-numbered channel count TLVs */
3126         if ((channels % 2) != 0)
3127                 return -1;
3128
3129         for (c = 0; c < 7; c += 2) {
3130                 if (cap->speakers[c] || cap->speakers[c+1])
3131                         chanpairs++;
3132         }
3133
3134         if (chanpairs * 2 != channels)
3135                 return -1;
3136
3137         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3138 }
3139
3140 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
3141                                                   unsigned int *chmap, int channels)
3142 {
3143         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3144         int count = 0;
3145         int c;
3146
3147         for (c = 7; c >= 0; c--) {
3148                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3149                 int spk = cap->speakers[chan];
3150                 if (!spk) {
3151                         /* add N/A channel if the companion channel is occupied */
3152                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3153                                 chmap[count++] = SNDRV_CHMAP_NA;
3154
3155                         continue;
3156                 }
3157
3158                 chmap[count++] = spk_to_chmap(spk);
3159         }
3160
3161         WARN_ON(count != channels);
3162 }
3163
3164 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3165                                  bool hbr)
3166 {
3167         int hbr_ctl, hbr_ctl_new;
3168
3169         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3170         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3171                 if (hbr)
3172                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3173                 else
3174                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3175
3176                 codec_dbg(codec,
3177                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3178                                 pin_nid,
3179                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3180                                 hbr_ctl_new);
3181
3182                 if (hbr_ctl != hbr_ctl_new)
3183                         snd_hda_codec_write(codec, pin_nid, 0,
3184                                                 ATI_VERB_SET_HBR_CONTROL,
3185                                                 hbr_ctl_new);
3186
3187         } else if (hbr)
3188                 return -EINVAL;
3189
3190         return 0;
3191 }
3192
3193 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3194                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3195 {
3196
3197         if (is_amdhdmi_rev3_or_later(codec)) {
3198                 int ramp_rate = 180; /* default as per AMD spec */
3199                 /* disable ramp-up/down for non-pcm as per AMD spec */
3200                 if (format & AC_FMT_TYPE_NON_PCM)
3201                         ramp_rate = 0;
3202
3203                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3204         }
3205
3206         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3207 }
3208
3209
3210 static int atihdmi_init(struct hda_codec *codec)
3211 {
3212         struct hdmi_spec *spec = codec->spec;
3213         int pin_idx, err;
3214
3215         err = generic_hdmi_init(codec);
3216
3217         if (err)
3218                 return err;
3219
3220         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3221                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3222
3223                 /* make sure downmix information in infoframe is zero */
3224                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3225
3226                 /* enable channel-wise remap mode if supported */
3227                 if (has_amd_full_remap_support(codec))
3228                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3229                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3230                                             ATI_MULTICHANNEL_MODE_SINGLE);
3231         }
3232
3233         return 0;
3234 }
3235
3236 static int patch_atihdmi(struct hda_codec *codec)
3237 {
3238         struct hdmi_spec *spec;
3239         struct hdmi_spec_per_cvt *per_cvt;
3240         int err, cvt_idx;
3241
3242         err = patch_generic_hdmi(codec);
3243
3244         if (err)
3245                 return err;
3246
3247         codec->patch_ops.init = atihdmi_init;
3248
3249         spec = codec->spec;
3250
3251         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3252         spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3253         spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3254         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3255         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3256         spec->ops.setup_stream = atihdmi_setup_stream;
3257
3258         if (!has_amd_full_remap_support(codec)) {
3259                 /* override to ATI/AMD-specific versions with pairwise mapping */
3260                 spec->ops.chmap_cea_alloc_validate_get_type =
3261                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3262                 spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
3263                 spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
3264         }
3265
3266         /* ATI/AMD converters do not advertise all of their capabilities */
3267         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3268                 per_cvt = get_cvt(spec, cvt_idx);
3269                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3270                 per_cvt->rates |= SUPPORTED_RATES;
3271                 per_cvt->formats |= SUPPORTED_FORMATS;
3272                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3273         }
3274
3275         spec->channels_max = max(spec->channels_max, 8u);
3276
3277         return 0;
3278 }
3279
3280 /* VIA HDMI Implementation */
3281 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3282 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3283
3284 static int patch_via_hdmi(struct hda_codec *codec)
3285 {
3286         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3287 }
3288
3289 /*
3290  * called from hda_codec.c for generic HDMI support
3291  */
3292 int snd_hda_parse_hdmi_codec(struct hda_codec *codec)
3293 {
3294         return patch_generic_hdmi(codec);
3295 }
3296 EXPORT_SYMBOL_GPL(snd_hda_parse_hdmi_codec);
3297
3298 /*
3299  * patch entries
3300  */
3301 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
3302 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
3303 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
3304 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
3305 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_atihdmi },
3306 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
3307 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
3308 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
3309 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3310 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3311 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3312 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3313 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
3314 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_nvhdmi },
3315 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_nvhdmi },
3316 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_nvhdmi },
3317 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_nvhdmi },
3318 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_nvhdmi },
3319 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_nvhdmi },
3320 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_nvhdmi },
3321 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_nvhdmi },
3322 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_nvhdmi },
3323 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_nvhdmi },
3324 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_nvhdmi },
3325 /* 17 is known to be absent */
3326 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_nvhdmi },
3327 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_nvhdmi },
3328 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_nvhdmi },
3329 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_nvhdmi },
3330 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_nvhdmi },
3331 { .id = 0x10de0028, .name = "Tegra12x HDMI",    .patch = patch_nvhdmi },
3332 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_nvhdmi },
3333 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_nvhdmi },
3334 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_nvhdmi },
3335 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_nvhdmi },
3336 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_nvhdmi },
3337 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP",   .patch = patch_nvhdmi },
3338 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP",   .patch = patch_nvhdmi },
3339 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
3340 { .id = 0x10de0071, .name = "GPU 71 HDMI/DP",   .patch = patch_nvhdmi },
3341 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
3342 { .id = 0x11069f80, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
3343 { .id = 0x11069f81, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
3344 { .id = 0x11069f84, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
3345 { .id = 0x11069f85, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
3346 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
3347 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
3348 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
3349 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
3350 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
3351 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
3352 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
3353 { .id = 0x80862807, .name = "Haswell HDMI",     .patch = patch_generic_hdmi },
3354 { .id = 0x80862808, .name = "Broadwell HDMI",   .patch = patch_generic_hdmi },
3355 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
3356 { .id = 0x80862882, .name = "Valleyview2 HDMI", .patch = patch_generic_hdmi },
3357 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
3358 {} /* terminator */
3359 };
3360
3361 MODULE_ALIAS("snd-hda-codec-id:1002793c");
3362 MODULE_ALIAS("snd-hda-codec-id:10027919");
3363 MODULE_ALIAS("snd-hda-codec-id:1002791a");
3364 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
3365 MODULE_ALIAS("snd-hda-codec-id:10951390");
3366 MODULE_ALIAS("snd-hda-codec-id:10951392");
3367 MODULE_ALIAS("snd-hda-codec-id:10de0002");
3368 MODULE_ALIAS("snd-hda-codec-id:10de0003");
3369 MODULE_ALIAS("snd-hda-codec-id:10de0005");
3370 MODULE_ALIAS("snd-hda-codec-id:10de0006");
3371 MODULE_ALIAS("snd-hda-codec-id:10de0007");
3372 MODULE_ALIAS("snd-hda-codec-id:10de000a");
3373 MODULE_ALIAS("snd-hda-codec-id:10de000b");
3374 MODULE_ALIAS("snd-hda-codec-id:10de000c");
3375 MODULE_ALIAS("snd-hda-codec-id:10de000d");
3376 MODULE_ALIAS("snd-hda-codec-id:10de0010");
3377 MODULE_ALIAS("snd-hda-codec-id:10de0011");
3378 MODULE_ALIAS("snd-hda-codec-id:10de0012");
3379 MODULE_ALIAS("snd-hda-codec-id:10de0013");
3380 MODULE_ALIAS("snd-hda-codec-id:10de0014");
3381 MODULE_ALIAS("snd-hda-codec-id:10de0015");
3382 MODULE_ALIAS("snd-hda-codec-id:10de0016");
3383 MODULE_ALIAS("snd-hda-codec-id:10de0018");
3384 MODULE_ALIAS("snd-hda-codec-id:10de0019");
3385 MODULE_ALIAS("snd-hda-codec-id:10de001a");
3386 MODULE_ALIAS("snd-hda-codec-id:10de001b");
3387 MODULE_ALIAS("snd-hda-codec-id:10de001c");
3388 MODULE_ALIAS("snd-hda-codec-id:10de0028");
3389 MODULE_ALIAS("snd-hda-codec-id:10de0040");
3390 MODULE_ALIAS("snd-hda-codec-id:10de0041");
3391 MODULE_ALIAS("snd-hda-codec-id:10de0042");
3392 MODULE_ALIAS("snd-hda-codec-id:10de0043");
3393 MODULE_ALIAS("snd-hda-codec-id:10de0044");
3394 MODULE_ALIAS("snd-hda-codec-id:10de0051");
3395 MODULE_ALIAS("snd-hda-codec-id:10de0060");
3396 MODULE_ALIAS("snd-hda-codec-id:10de0067");
3397 MODULE_ALIAS("snd-hda-codec-id:10de0071");
3398 MODULE_ALIAS("snd-hda-codec-id:10de8001");
3399 MODULE_ALIAS("snd-hda-codec-id:11069f80");
3400 MODULE_ALIAS("snd-hda-codec-id:11069f81");
3401 MODULE_ALIAS("snd-hda-codec-id:11069f84");
3402 MODULE_ALIAS("snd-hda-codec-id:11069f85");
3403 MODULE_ALIAS("snd-hda-codec-id:17e80047");
3404 MODULE_ALIAS("snd-hda-codec-id:80860054");
3405 MODULE_ALIAS("snd-hda-codec-id:80862801");
3406 MODULE_ALIAS("snd-hda-codec-id:80862802");
3407 MODULE_ALIAS("snd-hda-codec-id:80862803");
3408 MODULE_ALIAS("snd-hda-codec-id:80862804");
3409 MODULE_ALIAS("snd-hda-codec-id:80862805");
3410 MODULE_ALIAS("snd-hda-codec-id:80862806");
3411 MODULE_ALIAS("snd-hda-codec-id:80862807");
3412 MODULE_ALIAS("snd-hda-codec-id:80862808");
3413 MODULE_ALIAS("snd-hda-codec-id:80862880");
3414 MODULE_ALIAS("snd-hda-codec-id:80862882");
3415 MODULE_ALIAS("snd-hda-codec-id:808629fb");
3416
3417 MODULE_LICENSE("GPL");
3418 MODULE_DESCRIPTION("HDMI HD-audio codec");
3419 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3420 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3421 MODULE_ALIAS("snd-hda-codec-atihdmi");
3422
3423 static struct hda_codec_preset_list intel_list = {
3424         .preset = snd_hda_preset_hdmi,
3425         .owner = THIS_MODULE,
3426 };
3427
3428 static int __init patch_hdmi_init(void)
3429 {
3430         return snd_hda_add_codec_preset(&intel_list);
3431 }
3432
3433 static void __exit patch_hdmi_exit(void)
3434 {
3435         snd_hda_delete_codec_preset(&intel_list);
3436 }
3437
3438 module_init(patch_hdmi_init)
3439 module_exit(patch_hdmi_exit)