sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10  *
  11  *  Authors:
  12  *                      Wu Fengguang <wfg@linux.intel.com>
  13  *
  14  *  Maintained by:
  15  *                      Wu Fengguang <wfg@linux.intel.com>
  16  *
  17  *  This program is free software; you can redistribute it and/or modify it
  18  *  under the terms of the GNU General Public License as published by the Free
  19  *  Software Foundation; either version 2 of the License, or (at your option)
  20  *  any later version.
  21  *
  22  *  This program is distributed in the hope that it will be useful, but
  23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  25  *  for more details.
  26  *
  27  *  You should have received a copy of the GNU General Public License
  28  *  along with this program; if not, write to the Free Software Foundation,
  29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  30  */
  31
  32 #include <linux/init.h>
  33 #include <linux/delay.h>
  34 #include <linux/slab.h>
  35 #include <linux/module.h>
  36 #include <sound/core.h>
  37 #include <sound/jack.h>
  38 #include <sound/asoundef.h>
  39 #include <sound/tlv.h>
  40 #include <sound/hdaudio.h>
  41 #include <sound/hda_i915.h>
  42 #include <sound/hda_chmap.h>
  43 #include "hda_codec.h"
  44 #include "hda_local.h"
  45 #include "hda_jack.h"
  46
  47 static bool static_hdmi_pcm;
  48 module_param(static_hdmi_pcm, bool, 0644);
  49 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  50
  51 #define is_haswell(codec)  ((codec)->core.vendor_id == 0x80862807)
  52 #define is_broadwell(codec)    ((codec)->core.vendor_id == 0x80862808)
  53 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
  54 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
  55 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
  56 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
  57                                 || is_skylake(codec) || is_broxton(codec) \
  58                                 || is_kabylake(codec))
  59
  60 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
  61 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
  62 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
  63
  64 struct hdmi_spec_per_cvt {
  65         hda_nid_t cvt_nid;
  66         int assigned;
  67         unsigned int channels_min;
  68         unsigned int channels_max;
  69         u32 rates;
  70         u64 formats;
  71         unsigned int maxbps;
  72 };
  73
  74 /* max. connections to a widget */
  75 #define HDA_MAX_CONNECTIONS     32
  76
  77 struct hdmi_spec_per_pin {
  78         hda_nid_t pin_nid;
  79         /* pin idx, different device entries on the same pin use the same idx */
  80         int pin_nid_idx;
  81         int num_mux_nids;
  82         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  83         int mux_idx;
  84         hda_nid_t cvt_nid;
  85
  86         struct hda_codec *codec;
  87         struct hdmi_eld sink_eld;
  88         struct mutex lock;
  89         struct delayed_work work;
  90         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  91         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  92         int repoll_count;
  93         bool setup; /* the stream has been set up by prepare callback */
  94         int channels; /* current number of channels */
  95         bool non_pcm;
  96         bool chmap_set;         /* channel-map override by ALSA API? */
  97         unsigned char chmap[8]; /* ALSA API channel-map */
  98 #ifdef CONFIG_SND_PROC_FS
  99         struct snd_info_entry *proc_entry;
 100 #endif
 101 };
 102
 103 /* operations used by generic code that can be overridden by patches */
 104 struct hdmi_ops {
 105         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
 106                            unsigned char *buf, int *eld_size);
 107
 108         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 109                                     int ca, int active_channels, int conn_type);
 110
 111         /* enable/disable HBR (HD passthrough) */
 112         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 113
 114         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 115                             hda_nid_t pin_nid, u32 stream_tag, int format);
 116
 117 };
 118
 119 struct hdmi_pcm {
 120         struct hda_pcm *pcm;
 121         struct snd_jack *jack;
 122         struct snd_kcontrol *eld_ctl;
 123 };
 124
 125 struct hdmi_spec {
 126         int num_cvts;
 127         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 128         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 129
 130         int num_pins;
 131         struct snd_array pins; /* struct hdmi_spec_per_pin */
 132         struct hdmi_pcm pcm_rec[16];
 133         struct mutex pcm_lock;
 134         /* pcm_bitmap means which pcms have been assigned to pins*/
 135         unsigned long pcm_bitmap;
 136         int pcm_used;   /* counter of pcm_rec[] */
 137         /* bitmap shows whether the pcm is opened in user space
 138          * bit 0 means the first playback PCM (PCM3);
 139          * bit 1 means the second playback PCM, and so on.
 140          */
 141         unsigned long pcm_in_use;
 142
 143         struct hdmi_eld temp_eld;
 144         struct hdmi_ops ops;
 145
 146         bool dyn_pin_out;
 147         bool dyn_pcm_assign;
 148         /*
 149          * Non-generic VIA/NVIDIA specific
 150          */
 151         struct hda_multi_out multiout;
 152         struct hda_pcm_stream pcm_playback;
 153
 154         /* i915/powerwell (Haswell+/Valleyview+) specific */
 155         bool use_acomp_notifier; /* use i915 eld_notify callback for hotplug */
 156         struct i915_audio_component_audio_ops i915_audio_ops;
 157         bool i915_bound; /* was i915 bound in this driver? */
 158
 159         struct hdac_chmap chmap;
 160 };
 161
 162 #ifdef CONFIG_SND_HDA_I915
 163 static inline bool codec_has_acomp(struct hda_codec *codec)
 164 {
 165         struct hdmi_spec *spec = codec->spec;
 166         return spec->use_acomp_notifier;
 167 }
 168 #else
 169 #define codec_has_acomp(codec)  false
 170 #endif
 171
 172 struct hdmi_audio_infoframe {
 173         u8 type; /* 0x84 */
 174         u8 ver;  /* 0x01 */
 175         u8 len;  /* 0x0a */
 176
 177         u8 checksum;
 178
 179         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 180         u8 SS01_SF24;
 181         u8 CXT04;
 182         u8 CA;
 183         u8 LFEPBL01_LSV36_DM_INH7;
 184 };
 185
 186 struct dp_audio_infoframe {
 187         u8 type; /* 0x84 */
 188         u8 len;  /* 0x1b */
 189         u8 ver;  /* 0x11 << 2 */
 190
 191         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 192         u8 SS01_SF24;
 193         u8 CXT04;
 194         u8 CA;
 195         u8 LFEPBL01_LSV36_DM_INH7;
 196 };
 197
 198 union audio_infoframe {
 199         struct hdmi_audio_infoframe hdmi;
 200         struct dp_audio_infoframe dp;
 201         u8 bytes[0];
 202 };
 203
 204 /*
 205  * HDMI routines
 206  */
 207
 208 #define get_pin(spec, idx) \
 209         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 210 #define get_cvt(spec, idx) \
 211         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 212 /* obtain hdmi_pcm object assigned to idx */
 213 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 214 /* obtain hda_pcm object assigned to idx */
 215 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 216
 217 static int pin_nid_to_pin_index(struct hda_codec *codec, hda_nid_t pin_nid)
 218 {
 219         struct hdmi_spec *spec = codec->spec;
 220         int pin_idx;
 221
 222         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 223                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
 224                         return pin_idx;
 225
 226         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 227         return -EINVAL;
 228 }
 229
 230 static int hinfo_to_pcm_index(struct hda_codec *codec,
 231                         struct hda_pcm_stream *hinfo)
 232 {
 233         struct hdmi_spec *spec = codec->spec;
 234         int pcm_idx;
 235
 236         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 237                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 238                         return pcm_idx;
 239
 240         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 241         return -EINVAL;
 242 }
 243
 244 static int hinfo_to_pin_index(struct hda_codec *codec,
 245                               struct hda_pcm_stream *hinfo)
 246 {
 247         struct hdmi_spec *spec = codec->spec;
 248         struct hdmi_spec_per_pin *per_pin;
 249         int pin_idx;
 250
 251         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 252                 per_pin = get_pin(spec, pin_idx);
 253                 if (per_pin->pcm &&
 254                         per_pin->pcm->pcm->stream == hinfo)
 255                         return pin_idx;
 256         }
 257
 258         codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
 259         return -EINVAL;
 260 }
 261
 262 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 263                                                 int pcm_idx)
 264 {
 265         int i;
 266         struct hdmi_spec_per_pin *per_pin;
 267
 268         for (i = 0; i < spec->num_pins; i++) {
 269                 per_pin = get_pin(spec, i);
 270                 if (per_pin->pcm_idx == pcm_idx)
 271                         return per_pin;
 272         }
 273         return NULL;
 274 }
 275
 276 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 277 {
 278         struct hdmi_spec *spec = codec->spec;
 279         int cvt_idx;
 280
 281         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 282                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 283                         return cvt_idx;
 284
 285         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 286         return -EINVAL;
 287 }
 288
 289 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 290                         struct snd_ctl_elem_info *uinfo)
 291 {
 292         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 293         struct hdmi_spec *spec = codec->spec;
 294         struct hdmi_spec_per_pin *per_pin;
 295         struct hdmi_eld *eld;
 296         int pcm_idx;
 297
 298         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 299
 300         pcm_idx = kcontrol->private_value;
 301         mutex_lock(&spec->pcm_lock);
 302         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 303         if (!per_pin) {
 304                 /* no pin is bound to the pcm */
 305                 uinfo->count = 0;
 306                 mutex_unlock(&spec->pcm_lock);
 307                 return 0;
 308         }
 309         eld = &per_pin->sink_eld;
 310         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 311         mutex_unlock(&spec->pcm_lock);
 312
 313         return 0;
 314 }
 315
 316 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 317                         struct snd_ctl_elem_value *ucontrol)
 318 {
 319         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 320         struct hdmi_spec *spec = codec->spec;
 321         struct hdmi_spec_per_pin *per_pin;
 322         struct hdmi_eld *eld;
 323         int pcm_idx;
 324
 325         pcm_idx = kcontrol->private_value;
 326         mutex_lock(&spec->pcm_lock);
 327         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 328         if (!per_pin) {
 329                 /* no pin is bound to the pcm */
 330                 memset(ucontrol->value.bytes.data, 0,
 331                        ARRAY_SIZE(ucontrol->value.bytes.data));
 332                 mutex_unlock(&spec->pcm_lock);
 333                 return 0;
 334         }
 335         eld = &per_pin->sink_eld;
 336
 337         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 338             eld->eld_size > ELD_MAX_SIZE) {
 339                 mutex_unlock(&spec->pcm_lock);
 340                 snd_BUG();
 341                 return -EINVAL;
 342         }
 343
 344         memset(ucontrol->value.bytes.data, 0,
 345                ARRAY_SIZE(ucontrol->value.bytes.data));
 346         if (eld->eld_valid)
 347                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 348                        eld->eld_size);
 349         mutex_unlock(&spec->pcm_lock);
 350
 351         return 0;
 352 }
 353
 354 static struct snd_kcontrol_new eld_bytes_ctl = {
 355         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 356         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 357         .name = "ELD",
 358         .info = hdmi_eld_ctl_info,
 359         .get = hdmi_eld_ctl_get,
 360 };
 361
 362 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
 363                         int device)
 364 {
 365         struct snd_kcontrol *kctl;
 366         struct hdmi_spec *spec = codec->spec;
 367         int err;
 368
 369         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 370         if (!kctl)
 371                 return -ENOMEM;
 372         kctl->private_value = pcm_idx;
 373         kctl->id.device = device;
 374
 375         /* no pin nid is associated with the kctl now
 376          * tbd: associate pin nid to eld ctl later
 377          */
 378         err = snd_hda_ctl_add(codec, 0, kctl);
 379         if (err < 0)
 380                 return err;
 381
 382         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
 383         return 0;
 384 }
 385
 386 #ifdef BE_PARANOID
 387 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 388                                 int *packet_index, int *byte_index)
 389 {
 390         int val;
 391
 392         val = snd_hda_codec_read(codec, pin_nid, 0,
 393                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 394
 395         *packet_index = val >> 5;
 396         *byte_index = val & 0x1f;
 397 }
 398 #endif
 399
 400 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 401                                 int packet_index, int byte_index)
 402 {
 403         int val;
 404
 405         val = (packet_index << 5) | (byte_index & 0x1f);
 406
 407         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 408 }
 409
 410 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 411                                 unsigned char val)
 412 {
 413         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 414 }
 415
 416 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 417 {
 418         struct hdmi_spec *spec = codec->spec;
 419         int pin_out;
 420
 421         /* Unmute */
 422         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 423                 snd_hda_codec_write(codec, pin_nid, 0,
 424                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 425
 426         if (spec->dyn_pin_out)
 427                 /* Disable pin out until stream is active */
 428                 pin_out = 0;
 429         else
 430                 /* Enable pin out: some machines with GM965 gets broken output
 431                  * when the pin is disabled or changed while using with HDMI
 432                  */
 433                 pin_out = PIN_OUT;
 434
 435         snd_hda_codec_write(codec, pin_nid, 0,
 436                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 437 }
 438
 439 /*
 440  * ELD proc files
 441  */
 442
 443 #ifdef CONFIG_SND_PROC_FS
 444 static void print_eld_info(struct snd_info_entry *entry,
 445                            struct snd_info_buffer *buffer)
 446 {
 447         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 448
 449         mutex_lock(&per_pin->lock);
 450         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 451         mutex_unlock(&per_pin->lock);
 452 }
 453
 454 static void write_eld_info(struct snd_info_entry *entry,
 455                            struct snd_info_buffer *buffer)
 456 {
 457         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 458
 459         mutex_lock(&per_pin->lock);
 460         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 461         mutex_unlock(&per_pin->lock);
 462 }
 463
 464 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 465 {
 466         char name[32];
 467         struct hda_codec *codec = per_pin->codec;
 468         struct snd_info_entry *entry;
 469         int err;
 470
 471         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 472         err = snd_card_proc_new(codec->card, name, &entry);
 473         if (err < 0)
 474                 return err;
 475
 476         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 477         entry->c.text.write = write_eld_info;
 478         entry->mode |= S_IWUSR;
 479         per_pin->proc_entry = entry;
 480
 481         return 0;
 482 }
 483
 484 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 485 {
 486         if (!per_pin->codec->bus->shutdown) {
 487                 snd_info_free_entry(per_pin->proc_entry);
 488                 per_pin->proc_entry = NULL;
 489         }
 490 }
 491 #else
 492 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 493                                int index)
 494 {
 495         return 0;
 496 }
 497 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 498 {
 499 }
 500 #endif
 501
 502 /*
 503  * Audio InfoFrame routines
 504  */
 505
 506 /*
 507  * Enable Audio InfoFrame Transmission
 508  */
 509 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 510                                        hda_nid_t pin_nid)
 511 {
 512         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 513         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 514                                                 AC_DIPXMIT_BEST);
 515 }
 516
 517 /*
 518  * Disable Audio InfoFrame Transmission
 519  */
 520 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 521                                       hda_nid_t pin_nid)
 522 {
 523         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 524         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 525                                                 AC_DIPXMIT_DISABLE);
 526 }
 527
 528 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 529 {
 530 #ifdef CONFIG_SND_DEBUG_VERBOSE
 531         int i;
 532         int size;
 533
 534         size = snd_hdmi_get_eld_size(codec, pin_nid);
 535         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 536
 537         for (i = 0; i < 8; i++) {
 538                 size = snd_hda_codec_read(codec, pin_nid, 0,
 539                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 540                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 541         }
 542 #endif
 543 }
 544
 545 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 546 {
 547 #ifdef BE_PARANOID
 548         int i, j;
 549         int size;
 550         int pi, bi;
 551         for (i = 0; i < 8; i++) {
 552                 size = snd_hda_codec_read(codec, pin_nid, 0,
 553                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 554                 if (size == 0)
 555                         continue;
 556
 557                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 558                 for (j = 1; j < 1000; j++) {
 559                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 560                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 561                         if (pi != i)
 562                                 codec_dbg(codec, "dip index %d: %d != %d\n",
 563                                                 bi, pi, i);
 564                         if (bi == 0) /* byte index wrapped around */
 565                                 break;
 566                 }
 567                 codec_dbg(codec,
 568                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 569                         i, size, j);
 570         }
 571 #endif
 572 }
 573
 574 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 575 {
 576         u8 *bytes = (u8 *)hdmi_ai;
 577         u8 sum = 0;
 578         int i;
 579
 580         hdmi_ai->checksum = 0;
 581
 582         for (i = 0; i < sizeof(*hdmi_ai); i++)
 583                 sum += bytes[i];
 584
 585         hdmi_ai->checksum = -sum;
 586 }
 587
 588 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 589                                       hda_nid_t pin_nid,
 590                                       u8 *dip, int size)
 591 {
 592         int i;
 593
 594         hdmi_debug_dip_size(codec, pin_nid);
 595         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 596
 597         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 598         for (i = 0; i < size; i++)
 599                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 600 }
 601
 602 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 603                                     u8 *dip, int size)
 604 {
 605         u8 val;
 606         int i;
 607
 608         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 609                                                             != AC_DIPXMIT_BEST)
 610                 return false;
 611
 612         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 613         for (i = 0; i < size; i++) {
 614                 val = snd_hda_codec_read(codec, pin_nid, 0,
 615                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 616                 if (val != dip[i])
 617                         return false;
 618         }
 619
 620         return true;
 621 }
 622
 623 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
 624                                      hda_nid_t pin_nid,
 625                                      int ca, int active_channels,
 626                                      int conn_type)
 627 {
 628         union audio_infoframe ai;
 629
 630         memset(&ai, 0, sizeof(ai));
 631         if (conn_type == 0) { /* HDMI */
 632                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 633
 634                 hdmi_ai->type           = 0x84;
 635                 hdmi_ai->ver            = 0x01;
 636                 hdmi_ai->len            = 0x0a;
 637                 hdmi_ai->CC02_CT47      = active_channels - 1;
 638                 hdmi_ai->CA             = ca;
 639                 hdmi_checksum_audio_infoframe(hdmi_ai);
 640         } else if (conn_type == 1) { /* DisplayPort */
 641                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 642
 643                 dp_ai->type             = 0x84;
 644                 dp_ai->len              = 0x1b;
 645                 dp_ai->ver              = 0x11 << 2;
 646                 dp_ai->CC02_CT47        = active_channels - 1;
 647                 dp_ai->CA               = ca;
 648         } else {
 649                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
 650                             pin_nid);
 651                 return;
 652         }
 653
 654         /*
 655          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 656          * sizeof(*dp_ai) to avoid partial match/update problems when
 657          * the user switches between HDMI/DP monitors.
 658          */
 659         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 660                                         sizeof(ai))) {
 661                 codec_dbg(codec,
 662                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
 663                             pin_nid,
 664                             active_channels, ca);
 665                 hdmi_stop_infoframe_trans(codec, pin_nid);
 666                 hdmi_fill_audio_infoframe(codec, pin_nid,
 667                                             ai.bytes, sizeof(ai));
 668                 hdmi_start_infoframe_trans(codec, pin_nid);
 669         }
 670 }
 671
 672 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 673                                        struct hdmi_spec_per_pin *per_pin,
 674                                        bool non_pcm)
 675 {
 676         struct hdmi_spec *spec = codec->spec;
 677         struct hdac_chmap *chmap = &spec->chmap;
 678         hda_nid_t pin_nid = per_pin->pin_nid;
 679         int channels = per_pin->channels;
 680         int active_channels;
 681         struct hdmi_eld *eld;
 682         int ca;
 683
 684         if (!channels)
 685                 return;
 686
 687         if (is_haswell_plus(codec))
 688                 snd_hda_codec_write(codec, pin_nid, 0,
 689                                             AC_VERB_SET_AMP_GAIN_MUTE,
 690                                             AMP_OUT_UNMUTE);
 691
 692         eld = &per_pin->sink_eld;
 693
 694         ca = snd_hdac_channel_allocation(&codec->core,
 695                         eld->info.spk_alloc, channels,
 696                         per_pin->chmap_set, non_pcm, per_pin->chmap);
 697
 698         active_channels = snd_hdac_get_active_channels(ca);
 699
 700         chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
 701                                                 active_channels);
 702
 703         /*
 704          * always configure channel mapping, it may have been changed by the
 705          * user in the meantime
 706          */
 707         snd_hdac_setup_channel_mapping(&spec->chmap,
 708                                 pin_nid, non_pcm, ca, channels,
 709                                 per_pin->chmap, per_pin->chmap_set);
 710
 711         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
 712                                       eld->info.conn_type);
 713
 714         per_pin->non_pcm = non_pcm;
 715 }
 716
 717 /*
 718  * Unsolicited events
 719  */
 720
 721 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 722
 723 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid)
 724 {
 725         struct hdmi_spec *spec = codec->spec;
 726         int pin_idx = pin_nid_to_pin_index(codec, nid);
 727
 728         if (pin_idx < 0)
 729                 return;
 730         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
 731                 snd_hda_jack_report_sync(codec);
 732 }
 733
 734 static void jack_callback(struct hda_codec *codec,
 735                           struct hda_jack_callback *jack)
 736 {
 737         check_presence_and_report(codec, jack->nid);
 738 }
 739
 740 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 741 {
 742         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 743         struct hda_jack_tbl *jack;
 744         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 745
 746         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
 747         if (!jack)
 748                 return;
 749         jack->jack_dirty = 1;
 750
 751         codec_dbg(codec,
 752                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
 753                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
 754                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 755
 756         check_presence_and_report(codec, jack->nid);
 757 }
 758
 759 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 760 {
 761         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 762         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 763         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 764         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 765
 766         codec_info(codec,
 767                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 768                 codec->addr,
 769                 tag,
 770                 subtag,
 771                 cp_state,
 772                 cp_ready);
 773
 774         /* TODO */
 775         if (cp_state)
 776                 ;
 777         if (cp_ready)
 778                 ;
 779 }
 780
 781
 782 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 783 {
 784         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 785         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 786
 787         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
 788                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
 789                 return;
 790         }
 791
 792         if (subtag == 0)
 793                 hdmi_intrinsic_event(codec, res);
 794         else
 795                 hdmi_non_intrinsic_event(codec, res);
 796 }
 797
 798 static void haswell_verify_D0(struct hda_codec *codec,
 799                 hda_nid_t cvt_nid, hda_nid_t nid)
 800 {
 801         int pwr;
 802
 803         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
 804          * thus pins could only choose converter 0 for use. Make sure the
 805          * converters are in correct power state */
 806         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
 807                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
 808
 809         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
 810                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
 811                                     AC_PWRST_D0);
 812                 msleep(40);
 813                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
 814                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
 815                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
 816         }
 817 }
 818
 819 /*
 820  * Callbacks
 821  */
 822
 823 /* HBR should be Non-PCM, 8 channels */
 824 #define is_hbr_format(format) \
 825         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 826
 827 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
 828                               bool hbr)
 829 {
 830         int pinctl, new_pinctl;
 831
 832         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 833                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 834                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 835
 836                 if (pinctl < 0)
 837                         return hbr ? -EINVAL : 0;
 838
 839                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 840                 if (hbr)
 841                         new_pinctl |= AC_PINCTL_EPT_HBR;
 842                 else
 843                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 844
 845                 codec_dbg(codec,
 846                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
 847                             pin_nid,
 848                             pinctl == new_pinctl ? "" : "new-",
 849                             new_pinctl);
 850
 851                 if (pinctl != new_pinctl)
 852                         snd_hda_codec_write(codec, pin_nid, 0,
 853                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 854                                             new_pinctl);
 855         } else if (hbr)
 856                 return -EINVAL;
 857
 858         return 0;
 859 }
 860
 861 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 862                               hda_nid_t pin_nid, u32 stream_tag, int format)
 863 {
 864         struct hdmi_spec *spec = codec->spec;
 865         int err;
 866
 867         if (is_haswell_plus(codec))
 868                 haswell_verify_D0(codec, cvt_nid, pin_nid);
 869
 870         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
 871
 872         if (err) {
 873                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
 874                 return err;
 875         }
 876
 877         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 878         return 0;
 879 }
 880
 881 /* Try to find an available converter
 882  * If pin_idx is less then zero, just try to find an available converter.
 883  * Otherwise, try to find an available converter and get the cvt mux index
 884  * of the pin.
 885  */
 886 static int hdmi_choose_cvt(struct hda_codec *codec,
 887                         int pin_idx, int *cvt_id, int *mux_id)
 888 {
 889         struct hdmi_spec *spec = codec->spec;
 890         struct hdmi_spec_per_pin *per_pin;
 891         struct hdmi_spec_per_cvt *per_cvt = NULL;
 892         int cvt_idx, mux_idx = 0;
 893
 894         /* pin_idx < 0 means no pin will be bound to the converter */
 895         if (pin_idx < 0)
 896                 per_pin = NULL;
 897         else
 898                 per_pin = get_pin(spec, pin_idx);
 899
 900         /* Dynamically assign converter to stream */
 901         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 902                 per_cvt = get_cvt(spec, cvt_idx);
 903
 904                 /* Must not already be assigned */
 905                 if (per_cvt->assigned)
 906                         continue;
 907                 if (per_pin == NULL)
 908                         break;
 909                 /* Must be in pin's mux's list of converters */
 910                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
 911                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
 912                                 break;
 913                 /* Not in mux list */
 914                 if (mux_idx == per_pin->num_mux_nids)
 915                         continue;
 916                 break;
 917         }
 918
 919         /* No free converters */
 920         if (cvt_idx == spec->num_cvts)
 921                 return -EBUSY;
 922
 923         if (per_pin != NULL)
 924                 per_pin->mux_idx = mux_idx;
 925
 926         if (cvt_id)
 927                 *cvt_id = cvt_idx;
 928         if (mux_id)
 929                 *mux_id = mux_idx;
 930
 931         return 0;
 932 }
 933
 934 /* Assure the pin select the right convetor */
 935 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
 936                         struct hdmi_spec_per_pin *per_pin)
 937 {
 938         hda_nid_t pin_nid = per_pin->pin_nid;
 939         int mux_idx, curr;
 940
 941         mux_idx = per_pin->mux_idx;
 942         curr = snd_hda_codec_read(codec, pin_nid, 0,
 943                                           AC_VERB_GET_CONNECT_SEL, 0);
 944         if (curr != mux_idx)
 945                 snd_hda_codec_write_cache(codec, pin_nid, 0,
 946                                             AC_VERB_SET_CONNECT_SEL,
 947                                             mux_idx);
 948 }
 949
 950 /* get the mux index for the converter of the pins
 951  * converter's mux index is the same for all pins on Intel platform
 952  */
 953 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
 954                         hda_nid_t cvt_nid)
 955 {
 956         int i;
 957
 958         for (i = 0; i < spec->num_cvts; i++)
 959                 if (spec->cvt_nids[i] == cvt_nid)
 960                         return i;
 961         return -EINVAL;
 962 }
 963
 964 /* Intel HDMI workaround to fix audio routing issue:
 965  * For some Intel display codecs, pins share the same connection list.
 966  * So a conveter can be selected by multiple pins and playback on any of these
 967  * pins will generate sound on the external display, because audio flows from
 968  * the same converter to the display pipeline. Also muting one pin may make
 969  * other pins have no sound output.
 970  * So this function assures that an assigned converter for a pin is not selected
 971  * by any other pins.
 972  */
 973 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
 974                         hda_nid_t pin_nid, int mux_idx)
 975 {
 976         struct hdmi_spec *spec = codec->spec;
 977         hda_nid_t nid;
 978         int cvt_idx, curr;
 979         struct hdmi_spec_per_cvt *per_cvt;
 980
 981         /* configure all pins, including "no physical connection" ones */
 982         for_each_hda_codec_node(nid, codec) {
 983                 unsigned int wid_caps = get_wcaps(codec, nid);
 984                 unsigned int wid_type = get_wcaps_type(wid_caps);
 985
 986                 if (wid_type != AC_WID_PIN)
 987                         continue;
 988
 989                 if (nid == pin_nid)
 990                         continue;
 991
 992                 curr = snd_hda_codec_read(codec, nid, 0,
 993                                           AC_VERB_GET_CONNECT_SEL, 0);
 994                 if (curr != mux_idx)
 995                         continue;
 996
 997                 /* choose an unassigned converter. The conveters in the
 998                  * connection list are in the same order as in the codec.
 999                  */
1000                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1001                         per_cvt = get_cvt(spec, cvt_idx);
1002                         if (!per_cvt->assigned) {
1003                                 codec_dbg(codec,
1004                                           "choose cvt %d for pin nid %d\n",
1005                                         cvt_idx, nid);
1006                                 snd_hda_codec_write_cache(codec, nid, 0,
1007                                             AC_VERB_SET_CONNECT_SEL,
1008                                             cvt_idx);
1009                                 break;
1010                         }
1011                 }
1012         }
1013 }
1014
1015 /* A wrapper of intel_not_share_asigned_cvt() */
1016 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1017                         hda_nid_t pin_nid, hda_nid_t cvt_nid)
1018 {
1019         int mux_idx;
1020         struct hdmi_spec *spec = codec->spec;
1021
1022         if (!is_haswell_plus(codec) && !is_valleyview_plus(codec))
1023                 return;
1024
1025         /* On Intel platform, the mapping of converter nid to
1026          * mux index of the pins are always the same.
1027          * The pin nid may be 0, this means all pins will not
1028          * share the converter.
1029          */
1030         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1031         if (mux_idx >= 0)
1032                 intel_not_share_assigned_cvt(codec, pin_nid, mux_idx);
1033 }
1034
1035 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1036  * in dyn_pcm_assign mode.
1037  */
1038 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1039                          struct hda_codec *codec,
1040                          struct snd_pcm_substream *substream)
1041 {
1042         struct hdmi_spec *spec = codec->spec;
1043         struct snd_pcm_runtime *runtime = substream->runtime;
1044         int cvt_idx, pcm_idx;
1045         struct hdmi_spec_per_cvt *per_cvt = NULL;
1046         int err;
1047
1048         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1049         if (pcm_idx < 0)
1050                 return -EINVAL;
1051
1052         err = hdmi_choose_cvt(codec, -1, &cvt_idx, NULL);
1053         if (err)
1054                 return err;
1055
1056         per_cvt = get_cvt(spec, cvt_idx);
1057         per_cvt->assigned = 1;
1058         hinfo->nid = per_cvt->cvt_nid;
1059
1060         intel_not_share_assigned_cvt_nid(codec, 0, per_cvt->cvt_nid);
1061
1062         set_bit(pcm_idx, &spec->pcm_in_use);
1063         /* todo: setup spdif ctls assign */
1064
1065         /* Initially set the converter's capabilities */
1066         hinfo->channels_min = per_cvt->channels_min;
1067         hinfo->channels_max = per_cvt->channels_max;
1068         hinfo->rates = per_cvt->rates;
1069         hinfo->formats = per_cvt->formats;
1070         hinfo->maxbps = per_cvt->maxbps;
1071
1072         /* Store the updated parameters */
1073         runtime->hw.channels_min = hinfo->channels_min;
1074         runtime->hw.channels_max = hinfo->channels_max;
1075         runtime->hw.formats = hinfo->formats;
1076         runtime->hw.rates = hinfo->rates;
1077
1078         snd_pcm_hw_constraint_step(substream->runtime, 0,
1079                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1080         return 0;
1081 }
1082
1083 /*
1084  * HDA PCM callbacks
1085  */
1086 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1087                          struct hda_codec *codec,
1088                          struct snd_pcm_substream *substream)
1089 {
1090         struct hdmi_spec *spec = codec->spec;
1091         struct snd_pcm_runtime *runtime = substream->runtime;
1092         int pin_idx, cvt_idx, pcm_idx, mux_idx = 0;
1093         struct hdmi_spec_per_pin *per_pin;
1094         struct hdmi_eld *eld;
1095         struct hdmi_spec_per_cvt *per_cvt = NULL;
1096         int err;
1097
1098         /* Validate hinfo */
1099         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1100         if (pcm_idx < 0)
1101                 return -EINVAL;
1102
1103         mutex_lock(&spec->pcm_lock);
1104         pin_idx = hinfo_to_pin_index(codec, hinfo);
1105         if (!spec->dyn_pcm_assign) {
1106                 if (snd_BUG_ON(pin_idx < 0)) {
1107                         mutex_unlock(&spec->pcm_lock);
1108                         return -EINVAL;
1109                 }
1110         } else {
1111                 /* no pin is assigned to the PCM
1112                  * PA need pcm open successfully when probe
1113                  */
1114                 if (pin_idx < 0) {
1115                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1116                         mutex_unlock(&spec->pcm_lock);
1117                         return err;
1118                 }
1119         }
1120
1121         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1122         if (err < 0) {
1123                 mutex_unlock(&spec->pcm_lock);
1124                 return err;
1125         }
1126
1127         per_cvt = get_cvt(spec, cvt_idx);
1128         /* Claim converter */
1129         per_cvt->assigned = 1;
1130
1131         set_bit(pcm_idx, &spec->pcm_in_use);
1132         per_pin = get_pin(spec, pin_idx);
1133         per_pin->cvt_nid = per_cvt->cvt_nid;
1134         hinfo->nid = per_cvt->cvt_nid;
1135
1136         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1137                             AC_VERB_SET_CONNECT_SEL,
1138                             mux_idx);
1139
1140         /* configure unused pins to choose other converters */
1141         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
1142                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1143
1144         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1145
1146         /* Initially set the converter's capabilities */
1147         hinfo->channels_min = per_cvt->channels_min;
1148         hinfo->channels_max = per_cvt->channels_max;
1149         hinfo->rates = per_cvt->rates;
1150         hinfo->formats = per_cvt->formats;
1151         hinfo->maxbps = per_cvt->maxbps;
1152
1153         eld = &per_pin->sink_eld;
1154         /* Restrict capabilities by ELD if this isn't disabled */
1155         if (!static_hdmi_pcm && eld->eld_valid) {
1156                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1157                 if (hinfo->channels_min > hinfo->channels_max ||
1158                     !hinfo->rates || !hinfo->formats) {
1159                         per_cvt->assigned = 0;
1160                         hinfo->nid = 0;
1161                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1162                         mutex_unlock(&spec->pcm_lock);
1163                         return -ENODEV;
1164                 }
1165         }
1166
1167         mutex_unlock(&spec->pcm_lock);
1168         /* Store the updated parameters */
1169         runtime->hw.channels_min = hinfo->channels_min;
1170         runtime->hw.channels_max = hinfo->channels_max;
1171         runtime->hw.formats = hinfo->formats;
1172         runtime->hw.rates = hinfo->rates;
1173
1174         snd_pcm_hw_constraint_step(substream->runtime, 0,
1175                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1176         return 0;
1177 }
1178
1179 /*
1180  * HDA/HDMI auto parsing
1181  */
1182 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1183 {
1184         struct hdmi_spec *spec = codec->spec;
1185         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1186         hda_nid_t pin_nid = per_pin->pin_nid;
1187
1188         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1189                 codec_warn(codec,
1190                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1191                            pin_nid, get_wcaps(codec, pin_nid));
1192                 return -EINVAL;
1193         }
1194
1195         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1196                                                         per_pin->mux_nids,
1197                                                         HDA_MAX_CONNECTIONS);
1198
1199         return 0;
1200 }
1201
1202 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1203                                 struct hdmi_spec_per_pin *per_pin)
1204 {
1205         int i;
1206
1207         /* try the prefer PCM */
1208         if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1209                 return per_pin->pin_nid_idx;
1210
1211         /* have a second try; check the "reserved area" over num_pins */
1212         for (i = spec->num_pins; i < spec->pcm_used; i++) {
1213                 if (!test_bit(i, &spec->pcm_bitmap))
1214                         return i;
1215         }
1216
1217         /* the last try; check the empty slots in pins */
1218         for (i = 0; i < spec->num_pins; i++) {
1219                 if (!test_bit(i, &spec->pcm_bitmap))
1220                         return i;
1221         }
1222         return -EBUSY;
1223 }
1224
1225 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1226                                 struct hdmi_spec_per_pin *per_pin)
1227 {
1228         int idx;
1229
1230         /* pcm already be attached to the pin */
1231         if (per_pin->pcm)
1232                 return;
1233         idx = hdmi_find_pcm_slot(spec, per_pin);
1234         if (idx == -EBUSY)
1235                 return;
1236         per_pin->pcm_idx = idx;
1237         per_pin->pcm = get_hdmi_pcm(spec, idx);
1238         set_bit(idx, &spec->pcm_bitmap);
1239 }
1240
1241 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1242                                 struct hdmi_spec_per_pin *per_pin)
1243 {
1244         int idx;
1245
1246         /* pcm already be detached from the pin */
1247         if (!per_pin->pcm)
1248                 return;
1249         idx = per_pin->pcm_idx;
1250         per_pin->pcm_idx = -1;
1251         per_pin->pcm = NULL;
1252         if (idx >= 0 && idx < spec->pcm_used)
1253                 clear_bit(idx, &spec->pcm_bitmap);
1254 }
1255
1256 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1257                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1258 {
1259         int mux_idx;
1260
1261         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1262                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1263                         break;
1264         return mux_idx;
1265 }
1266
1267 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1268
1269 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1270                            struct hdmi_spec_per_pin *per_pin)
1271 {
1272         struct hda_codec *codec = per_pin->codec;
1273         struct hda_pcm *pcm;
1274         struct hda_pcm_stream *hinfo;
1275         struct snd_pcm_substream *substream;
1276         int mux_idx;
1277         bool non_pcm;
1278
1279         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1280                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1281         else
1282                 return;
1283         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1284                 return;
1285
1286         /* hdmi audio only uses playback and one substream */
1287         hinfo = pcm->stream;
1288         substream = pcm->pcm->streams[0].substream;
1289
1290         per_pin->cvt_nid = hinfo->nid;
1291
1292         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1293         if (mux_idx < per_pin->num_mux_nids)
1294                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1295                                 AC_VERB_SET_CONNECT_SEL,
1296                                 mux_idx);
1297         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1298
1299         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1300         if (substream->runtime)
1301                 per_pin->channels = substream->runtime->channels;
1302         per_pin->setup = true;
1303         per_pin->mux_idx = mux_idx;
1304
1305         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1306 }
1307
1308 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1309                            struct hdmi_spec_per_pin *per_pin)
1310 {
1311         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1312                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1313
1314         per_pin->chmap_set = false;
1315         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1316
1317         per_pin->setup = false;
1318         per_pin->channels = 0;
1319 }
1320
1321 /* update per_pin ELD from the given new ELD;
1322  * setup info frame and notification accordingly
1323  */
1324 static void update_eld(struct hda_codec *codec,
1325                        struct hdmi_spec_per_pin *per_pin,
1326                        struct hdmi_eld *eld)
1327 {
1328         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1329         struct hdmi_spec *spec = codec->spec;
1330         bool old_eld_valid = pin_eld->eld_valid;
1331         bool eld_changed;
1332         int pcm_idx = -1;
1333
1334         /* for monitor disconnection, save pcm_idx firstly */
1335         pcm_idx = per_pin->pcm_idx;
1336         if (spec->dyn_pcm_assign) {
1337                 if (eld->eld_valid) {
1338                         hdmi_attach_hda_pcm(spec, per_pin);
1339                         hdmi_pcm_setup_pin(spec, per_pin);
1340                 } else {
1341                         hdmi_pcm_reset_pin(spec, per_pin);
1342                         hdmi_detach_hda_pcm(spec, per_pin);
1343                 }
1344         }
1345         /* if pcm_idx == -1, it means this is in monitor connection event
1346          * we can get the correct pcm_idx now.
1347          */
1348         if (pcm_idx == -1)
1349                 pcm_idx = per_pin->pcm_idx;
1350
1351         if (eld->eld_valid)
1352                 snd_hdmi_show_eld(codec, &eld->info);
1353
1354         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1355         if (eld->eld_valid && pin_eld->eld_valid)
1356                 if (pin_eld->eld_size != eld->eld_size ||
1357                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1358                            eld->eld_size) != 0)
1359                         eld_changed = true;
1360
1361         pin_eld->monitor_present = eld->monitor_present;
1362         pin_eld->eld_valid = eld->eld_valid;
1363         pin_eld->eld_size = eld->eld_size;
1364         if (eld->eld_valid)
1365                 memcpy(pin_eld->eld_buffer, eld->eld_buffer, eld->eld_size);
1366         pin_eld->info = eld->info;
1367
1368         /*
1369          * Re-setup pin and infoframe. This is needed e.g. when
1370          * - sink is first plugged-in
1371          * - transcoder can change during stream playback on Haswell
1372          *   and this can make HW reset converter selection on a pin.
1373          */
1374         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1375                 if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
1376                         intel_verify_pin_cvt_connect(codec, per_pin);
1377                         intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
1378                                                      per_pin->mux_idx);
1379                 }
1380
1381                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1382         }
1383
1384         if (eld_changed && pcm_idx >= 0)
1385                 snd_ctl_notify(codec->card,
1386                                SNDRV_CTL_EVENT_MASK_VALUE |
1387                                SNDRV_CTL_EVENT_MASK_INFO,
1388                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1389 }
1390
1391 /* update ELD and jack state via HD-audio verbs */
1392 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1393                                          int repoll)
1394 {
1395         struct hda_jack_tbl *jack;
1396         struct hda_codec *codec = per_pin->codec;
1397         struct hdmi_spec *spec = codec->spec;
1398         struct hdmi_eld *eld = &spec->temp_eld;
1399         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1400         hda_nid_t pin_nid = per_pin->pin_nid;
1401         /*
1402          * Always execute a GetPinSense verb here, even when called from
1403          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1404          * response's PD bit is not the real PD value, but indicates that
1405          * the real PD value changed. An older version of the HD-audio
1406          * specification worked this way. Hence, we just ignore the data in
1407          * the unsolicited response to avoid custom WARs.
1408          */
1409         int present;
1410         bool ret;
1411         bool do_repoll = false;
1412
1413         present = snd_hda_pin_sense(codec, pin_nid);
1414
1415         mutex_lock(&per_pin->lock);
1416         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1417         if (pin_eld->monitor_present)
1418                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1419         else
1420                 eld->eld_valid = false;
1421
1422         codec_dbg(codec,
1423                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1424                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1425
1426         if (eld->eld_valid) {
1427                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1428                                                      &eld->eld_size) < 0)
1429                         eld->eld_valid = false;
1430                 else {
1431                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1432                                                     eld->eld_size) < 0)
1433                                 eld->eld_valid = false;
1434                 }
1435                 if (!eld->eld_valid && repoll)
1436                         do_repoll = true;
1437         }
1438
1439         if (do_repoll)
1440                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1441         else
1442                 update_eld(codec, per_pin, eld);
1443
1444         ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1445
1446         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1447         if (jack)
1448                 jack->block_report = !ret;
1449
1450         mutex_unlock(&per_pin->lock);
1451         return ret;
1452 }
1453
1454 static struct snd_jack *pin_idx_to_jack(struct hda_codec *codec,
1455                                  struct hdmi_spec_per_pin *per_pin)
1456 {
1457         struct hdmi_spec *spec = codec->spec;
1458         struct snd_jack *jack = NULL;
1459         struct hda_jack_tbl *jack_tbl;
1460
1461         /* if !dyn_pcm_assign, get jack from hda_jack_tbl
1462          * in !dyn_pcm_assign case, spec->pcm_rec[].jack is not
1463          * NULL even after snd_hda_jack_tbl_clear() is called to
1464          * free snd_jack. This may cause access invalid memory
1465          * when calling snd_jack_report
1466          */
1467         if (per_pin->pcm_idx >= 0 && spec->dyn_pcm_assign)
1468                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1469         else if (!spec->dyn_pcm_assign) {
1470                 jack_tbl = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1471                 if (jack_tbl)
1472                         jack = jack_tbl->jack;
1473         }
1474         return jack;
1475 }
1476
1477 /* update ELD and jack state via audio component */
1478 static void sync_eld_via_acomp(struct hda_codec *codec,
1479                                struct hdmi_spec_per_pin *per_pin)
1480 {
1481         struct hdmi_spec *spec = codec->spec;
1482         struct hdmi_eld *eld = &spec->temp_eld;
1483         struct snd_jack *jack = NULL;
1484         int size;
1485
1486         mutex_lock(&per_pin->lock);
1487         eld->monitor_present = false;
1488         size = snd_hdac_acomp_get_eld(&codec->bus->core, per_pin->pin_nid,
1489                                       &eld->monitor_present, eld->eld_buffer,
1490                                       ELD_MAX_SIZE);
1491         if (size > 0) {
1492                 size = min(size, ELD_MAX_SIZE);
1493                 if (snd_hdmi_parse_eld(codec, &eld->info,
1494                                        eld->eld_buffer, size) < 0)
1495                         size = -EINVAL;
1496         }
1497
1498         if (size > 0) {
1499                 eld->eld_valid = true;
1500                 eld->eld_size = size;
1501         } else {
1502                 eld->eld_valid = false;
1503                 eld->eld_size = 0;
1504         }
1505
1506         /* pcm_idx >=0 before update_eld() means it is in monitor
1507          * disconnected event. Jack must be fetched before update_eld()
1508          */
1509         jack = pin_idx_to_jack(codec, per_pin);
1510         update_eld(codec, per_pin, eld);
1511         if (jack == NULL)
1512                 jack = pin_idx_to_jack(codec, per_pin);
1513         if (jack == NULL)
1514                 goto unlock;
1515         snd_jack_report(jack,
1516                         eld->monitor_present ? SND_JACK_AVOUT : 0);
1517  unlock:
1518         mutex_unlock(&per_pin->lock);
1519 }
1520
1521 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1522 {
1523         struct hda_codec *codec = per_pin->codec;
1524         struct hdmi_spec *spec = codec->spec;
1525         int ret;
1526
1527         /* no temporary power up/down needed for component notifier */
1528         if (!codec_has_acomp(codec))
1529                 snd_hda_power_up_pm(codec);
1530
1531         mutex_lock(&spec->pcm_lock);
1532         if (codec_has_acomp(codec)) {
1533                 sync_eld_via_acomp(codec, per_pin);
1534                 ret = false; /* don't call snd_hda_jack_report_sync() */
1535         } else {
1536                 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
1537         }
1538         mutex_unlock(&spec->pcm_lock);
1539
1540         if (!codec_has_acomp(codec))
1541                 snd_hda_power_down_pm(codec);
1542
1543         return ret;
1544 }
1545
1546 static void hdmi_repoll_eld(struct work_struct *work)
1547 {
1548         struct hdmi_spec_per_pin *per_pin =
1549         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1550
1551         if (per_pin->repoll_count++ > 6)
1552                 per_pin->repoll_count = 0;
1553
1554         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1555                 snd_hda_jack_report_sync(per_pin->codec);
1556 }
1557
1558 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1559                                              hda_nid_t nid);
1560
1561 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1562 {
1563         struct hdmi_spec *spec = codec->spec;
1564         unsigned int caps, config;
1565         int pin_idx;
1566         struct hdmi_spec_per_pin *per_pin;
1567         int err;
1568
1569         caps = snd_hda_query_pin_caps(codec, pin_nid);
1570         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1571                 return 0;
1572
1573         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1574         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1575                 return 0;
1576
1577         if (is_haswell_plus(codec))
1578                 intel_haswell_fixup_connect_list(codec, pin_nid);
1579
1580         pin_idx = spec->num_pins;
1581         per_pin = snd_array_new(&spec->pins);
1582         if (!per_pin)
1583                 return -ENOMEM;
1584
1585         per_pin->pin_nid = pin_nid;
1586         per_pin->non_pcm = false;
1587         if (spec->dyn_pcm_assign)
1588                 per_pin->pcm_idx = -1;
1589         else {
1590                 per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1591                 per_pin->pcm_idx = pin_idx;
1592         }
1593         per_pin->pin_nid_idx = pin_idx;
1594
1595         err = hdmi_read_pin_conn(codec, pin_idx);
1596         if (err < 0)
1597                 return err;
1598
1599         spec->num_pins++;
1600
1601         return 0;
1602 }
1603
1604 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1605 {
1606         struct hdmi_spec *spec = codec->spec;
1607         struct hdmi_spec_per_cvt *per_cvt;
1608         unsigned int chans;
1609         int err;
1610
1611         chans = get_wcaps(codec, cvt_nid);
1612         chans = get_wcaps_channels(chans);
1613
1614         per_cvt = snd_array_new(&spec->cvts);
1615         if (!per_cvt)
1616                 return -ENOMEM;
1617
1618         per_cvt->cvt_nid = cvt_nid;
1619         per_cvt->channels_min = 2;
1620         if (chans <= 16) {
1621                 per_cvt->channels_max = chans;
1622                 if (chans > spec->chmap.channels_max)
1623                         spec->chmap.channels_max = chans;
1624         }
1625
1626         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1627                                           &per_cvt->rates,
1628                                           &per_cvt->formats,
1629                                           &per_cvt->maxbps);
1630         if (err < 0)
1631                 return err;
1632
1633         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1634                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1635         spec->num_cvts++;
1636
1637         return 0;
1638 }
1639
1640 static int hdmi_parse_codec(struct hda_codec *codec)
1641 {
1642         hda_nid_t nid;
1643         int i, nodes;
1644
1645         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
1646         if (!nid || nodes < 0) {
1647                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1648                 return -EINVAL;
1649         }
1650
1651         for (i = 0; i < nodes; i++, nid++) {
1652                 unsigned int caps;
1653                 unsigned int type;
1654
1655                 caps = get_wcaps(codec, nid);
1656                 type = get_wcaps_type(caps);
1657
1658                 if (!(caps & AC_WCAP_DIGITAL))
1659                         continue;
1660
1661                 switch (type) {
1662                 case AC_WID_AUD_OUT:
1663                         hdmi_add_cvt(codec, nid);
1664                         break;
1665                 case AC_WID_PIN:
1666                         hdmi_add_pin(codec, nid);
1667                         break;
1668                 }
1669         }
1670
1671         return 0;
1672 }
1673
1674 /*
1675  */
1676 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1677 {
1678         struct hda_spdif_out *spdif;
1679         bool non_pcm;
1680
1681         mutex_lock(&codec->spdif_mutex);
1682         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1683         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1684         mutex_unlock(&codec->spdif_mutex);
1685         return non_pcm;
1686 }
1687
1688 /*
1689  * HDMI callbacks
1690  */
1691
1692 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1693                                            struct hda_codec *codec,
1694                                            unsigned int stream_tag,
1695                                            unsigned int format,
1696                                            struct snd_pcm_substream *substream)
1697 {
1698         hda_nid_t cvt_nid = hinfo->nid;
1699         struct hdmi_spec *spec = codec->spec;
1700         int pin_idx;
1701         struct hdmi_spec_per_pin *per_pin;
1702         hda_nid_t pin_nid;
1703         struct snd_pcm_runtime *runtime = substream->runtime;
1704         bool non_pcm;
1705         int pinctl;
1706         int err;
1707
1708         mutex_lock(&spec->pcm_lock);
1709         pin_idx = hinfo_to_pin_index(codec, hinfo);
1710         if (spec->dyn_pcm_assign && pin_idx < 0) {
1711                 /* when dyn_pcm_assign and pcm is not bound to a pin
1712                  * skip pin setup and return 0 to make audio playback
1713                  * be ongoing
1714                  */
1715                 intel_not_share_assigned_cvt_nid(codec, 0, cvt_nid);
1716                 snd_hda_codec_setup_stream(codec, cvt_nid,
1717                                         stream_tag, 0, format);
1718                 mutex_unlock(&spec->pcm_lock);
1719                 return 0;
1720         }
1721
1722         if (snd_BUG_ON(pin_idx < 0)) {
1723                 mutex_unlock(&spec->pcm_lock);
1724                 return -EINVAL;
1725         }
1726         per_pin = get_pin(spec, pin_idx);
1727         pin_nid = per_pin->pin_nid;
1728         if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
1729                 /* Verify pin:cvt selections to avoid silent audio after S3.
1730                  * After S3, the audio driver restores pin:cvt selections
1731                  * but this can happen before gfx is ready and such selection
1732                  * is overlooked by HW. Thus multiple pins can share a same
1733                  * default convertor and mute control will affect each other,
1734                  * which can cause a resumed audio playback become silent
1735                  * after S3.
1736                  */
1737                 intel_verify_pin_cvt_connect(codec, per_pin);
1738                 intel_not_share_assigned_cvt(codec, pin_nid, per_pin->mux_idx);
1739         }
1740
1741         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1742         /* Todo: add DP1.2 MST audio support later */
1743         if (codec_has_acomp(codec))
1744                 snd_hdac_sync_audio_rate(&codec->bus->core, pin_nid, runtime->rate);
1745
1746         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1747         mutex_lock(&per_pin->lock);
1748         per_pin->channels = substream->runtime->channels;
1749         per_pin->setup = true;
1750
1751         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1752         mutex_unlock(&per_pin->lock);
1753         if (spec->dyn_pin_out) {
1754                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1755                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1756                 snd_hda_codec_write(codec, pin_nid, 0,
1757                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1758                                     pinctl | PIN_OUT);
1759         }
1760
1761         err = spec->ops.setup_stream(codec, cvt_nid, pin_nid,
1762                                  stream_tag, format);
1763         mutex_unlock(&spec->pcm_lock);
1764         return err;
1765 }
1766
1767 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1768                                              struct hda_codec *codec,
1769                                              struct snd_pcm_substream *substream)
1770 {
1771         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1772         return 0;
1773 }
1774
1775 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1776                           struct hda_codec *codec,
1777                           struct snd_pcm_substream *substream)
1778 {
1779         struct hdmi_spec *spec = codec->spec;
1780         int cvt_idx, pin_idx, pcm_idx;
1781         struct hdmi_spec_per_cvt *per_cvt;
1782         struct hdmi_spec_per_pin *per_pin;
1783         int pinctl;
1784
1785         if (hinfo->nid) {
1786                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1787                 if (snd_BUG_ON(pcm_idx < 0))
1788                         return -EINVAL;
1789                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
1790                 if (snd_BUG_ON(cvt_idx < 0))
1791                         return -EINVAL;
1792                 per_cvt = get_cvt(spec, cvt_idx);
1793
1794                 snd_BUG_ON(!per_cvt->assigned);
1795                 per_cvt->assigned = 0;
1796                 hinfo->nid = 0;
1797
1798                 mutex_lock(&spec->pcm_lock);
1799                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1800                 clear_bit(pcm_idx, &spec->pcm_in_use);
1801                 pin_idx = hinfo_to_pin_index(codec, hinfo);
1802                 if (spec->dyn_pcm_assign && pin_idx < 0) {
1803                         mutex_unlock(&spec->pcm_lock);
1804                         return 0;
1805                 }
1806
1807                 if (snd_BUG_ON(pin_idx < 0)) {
1808                         mutex_unlock(&spec->pcm_lock);
1809                         return -EINVAL;
1810                 }
1811                 per_pin = get_pin(spec, pin_idx);
1812
1813                 if (spec->dyn_pin_out) {
1814                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1815                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1816                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1817                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1818                                             pinctl & ~PIN_OUT);
1819                 }
1820
1821                 mutex_lock(&per_pin->lock);
1822                 per_pin->chmap_set = false;
1823                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1824
1825                 per_pin->setup = false;
1826                 per_pin->channels = 0;
1827                 mutex_unlock(&per_pin->lock);
1828                 mutex_unlock(&spec->pcm_lock);
1829         }
1830
1831         return 0;
1832 }
1833
1834 static const struct hda_pcm_ops generic_ops = {
1835         .open = hdmi_pcm_open,
1836         .close = hdmi_pcm_close,
1837         .prepare = generic_hdmi_playback_pcm_prepare,
1838         .cleanup = generic_hdmi_playback_pcm_cleanup,
1839 };
1840
1841 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
1842                                         unsigned char *chmap)
1843 {
1844         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1845         struct hdmi_spec *spec = codec->spec;
1846         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1847
1848         /* chmap is already set to 0 in caller */
1849         if (!per_pin)
1850                 return;
1851
1852         memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
1853 }
1854
1855 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
1856                                 unsigned char *chmap, int prepared)
1857 {
1858         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1859         struct hdmi_spec *spec = codec->spec;
1860         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1861
1862         mutex_lock(&per_pin->lock);
1863         per_pin->chmap_set = true;
1864         memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
1865         if (prepared)
1866                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1867         mutex_unlock(&per_pin->lock);
1868 }
1869
1870 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
1871 {
1872         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1873         struct hdmi_spec *spec = codec->spec;
1874         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1875
1876         return per_pin ? true:false;
1877 }
1878
1879 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1880 {
1881         struct hdmi_spec *spec = codec->spec;
1882         int pin_idx;
1883
1884         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1885                 struct hda_pcm *info;
1886                 struct hda_pcm_stream *pstr;
1887
1888                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", pin_idx);
1889                 if (!info)
1890                         return -ENOMEM;
1891
1892                 spec->pcm_rec[pin_idx].pcm = info;
1893                 spec->pcm_used++;
1894                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1895                 info->own_chmap = true;
1896
1897                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1898                 pstr->substreams = 1;
1899                 pstr->ops = generic_ops;
1900                 /* other pstr fields are set in open */
1901         }
1902
1903         return 0;
1904 }
1905
1906 static void free_hdmi_jack_priv(struct snd_jack *jack)
1907 {
1908         struct hdmi_pcm *pcm = jack->private_data;
1909
1910         pcm->jack = NULL;
1911 }
1912
1913 static int add_hdmi_jack_kctl(struct hda_codec *codec,
1914                                struct hdmi_spec *spec,
1915                                int pcm_idx,
1916                                const char *name)
1917 {
1918         struct snd_jack *jack;
1919         int err;
1920
1921         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
1922                            true, false);
1923         if (err < 0)
1924                 return err;
1925
1926         spec->pcm_rec[pcm_idx].jack = jack;
1927         jack->private_data = &spec->pcm_rec[pcm_idx];
1928         jack->private_free = free_hdmi_jack_priv;
1929         return 0;
1930 }
1931
1932 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
1933 {
1934         char hdmi_str[32] = "HDMI/DP";
1935         struct hdmi_spec *spec = codec->spec;
1936         struct hdmi_spec_per_pin *per_pin;
1937         struct hda_jack_tbl *jack;
1938         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
1939         bool phantom_jack;
1940         int ret;
1941
1942         if (pcmdev > 0)
1943                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1944
1945         if (spec->dyn_pcm_assign)
1946                 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
1947
1948         /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
1949         /* if !dyn_pcm_assign, it must be non-MST mode.
1950          * This means pcms and pins are statically mapped.
1951          * And pcm_idx is pin_idx.
1952          */
1953         per_pin = get_pin(spec, pcm_idx);
1954         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
1955         if (phantom_jack)
1956                 strncat(hdmi_str, " Phantom",
1957                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
1958         ret = snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str,
1959                                     phantom_jack);
1960         if (ret < 0)
1961                 return ret;
1962         jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1963         if (jack == NULL)
1964                 return 0;
1965         /* assign jack->jack to pcm_rec[].jack to
1966          * align with dyn_pcm_assign mode
1967          */
1968         spec->pcm_rec[pcm_idx].jack = jack->jack;
1969         return 0;
1970 }
1971
1972 static int generic_hdmi_build_controls(struct hda_codec *codec)
1973 {
1974         struct hdmi_spec *spec = codec->spec;
1975         int err;
1976         int pin_idx, pcm_idx;
1977
1978
1979         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
1980                 err = generic_hdmi_build_jack(codec, pcm_idx);
1981                 if (err < 0)
1982                         return err;
1983
1984                 /* create the spdif for each pcm
1985                  * pin will be bound when monitor is connected
1986                  */
1987                 if (spec->dyn_pcm_assign)
1988                         err = snd_hda_create_dig_out_ctls(codec,
1989                                           0, spec->cvt_nids[0],
1990                                           HDA_PCM_TYPE_HDMI);
1991                 else {
1992                         struct hdmi_spec_per_pin *per_pin =
1993                                 get_pin(spec, pcm_idx);
1994                         err = snd_hda_create_dig_out_ctls(codec,
1995                                                   per_pin->pin_nid,
1996                                                   per_pin->mux_nids[0],
1997                                                   HDA_PCM_TYPE_HDMI);
1998                 }
1999                 if (err < 0)
2000                         return err;
2001                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2002
2003                 /* add control for ELD Bytes */
2004                 err = hdmi_create_eld_ctl(codec, pcm_idx,
2005                                         get_pcm_rec(spec, pcm_idx)->device);
2006                 if (err < 0)
2007                         return err;
2008         }
2009
2010         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2011                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2012
2013                 hdmi_present_sense(per_pin, 0);
2014         }
2015
2016         /* add channel maps */
2017         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2018                 struct hda_pcm *pcm;
2019
2020                 pcm = get_pcm_rec(spec, pcm_idx);
2021                 if (!pcm || !pcm->pcm)
2022                         break;
2023                 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2024                 if (err < 0)
2025                         return err;
2026         }
2027
2028         return 0;
2029 }
2030
2031 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2032 {
2033         struct hdmi_spec *spec = codec->spec;
2034         int pin_idx;
2035
2036         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2037                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2038
2039                 per_pin->codec = codec;
2040                 mutex_init(&per_pin->lock);
2041                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2042                 eld_proc_new(per_pin, pin_idx);
2043         }
2044         return 0;
2045 }
2046
2047 static int generic_hdmi_init(struct hda_codec *codec)
2048 {
2049         struct hdmi_spec *spec = codec->spec;
2050         int pin_idx;
2051
2052         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2053                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2054                 hda_nid_t pin_nid = per_pin->pin_nid;
2055
2056                 hdmi_init_pin(codec, pin_nid);
2057                 if (!codec_has_acomp(codec))
2058                         snd_hda_jack_detect_enable_callback(codec, pin_nid,
2059                                 codec->jackpoll_interval > 0 ?
2060                                 jack_callback : NULL);
2061         }
2062         return 0;
2063 }
2064
2065 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2066 {
2067         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2068         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2069 }
2070
2071 static void hdmi_array_free(struct hdmi_spec *spec)
2072 {
2073         snd_array_free(&spec->pins);
2074         snd_array_free(&spec->cvts);
2075 }
2076
2077 static void generic_hdmi_free(struct hda_codec *codec)
2078 {
2079         struct hdmi_spec *spec = codec->spec;
2080         int pin_idx, pcm_idx;
2081
2082         if (codec_has_acomp(codec))
2083                 snd_hdac_i915_register_notifier(NULL);
2084
2085         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2086                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2087                 cancel_delayed_work_sync(&per_pin->work);
2088                 eld_proc_free(per_pin);
2089         }
2090
2091         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2092                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2093                         continue;
2094                 if (spec->dyn_pcm_assign)
2095                         snd_device_free(codec->card,
2096                                         spec->pcm_rec[pcm_idx].jack);
2097                 else
2098                         spec->pcm_rec[pcm_idx].jack = NULL;
2099         }
2100
2101         if (spec->i915_bound)
2102                 snd_hdac_i915_exit(&codec->bus->core);
2103         hdmi_array_free(spec);
2104         kfree(spec);
2105 }
2106
2107 #ifdef CONFIG_PM
2108 static int generic_hdmi_resume(struct hda_codec *codec)
2109 {
2110         struct hdmi_spec *spec = codec->spec;
2111         int pin_idx;
2112
2113         codec->patch_ops.init(codec);
2114         regcache_sync(codec->core.regmap);
2115
2116         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2117                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2118                 hdmi_present_sense(per_pin, 1);
2119         }
2120         return 0;
2121 }
2122 #endif
2123
2124 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2125         .init                   = generic_hdmi_init,
2126         .free                   = generic_hdmi_free,
2127         .build_pcms             = generic_hdmi_build_pcms,
2128         .build_controls         = generic_hdmi_build_controls,
2129         .unsol_event            = hdmi_unsol_event,
2130 #ifdef CONFIG_PM
2131         .resume                 = generic_hdmi_resume,
2132 #endif
2133 };
2134
2135 static const struct hdmi_ops generic_standard_hdmi_ops = {
2136         .pin_get_eld                            = snd_hdmi_get_eld,
2137         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2138         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2139         .setup_stream                           = hdmi_setup_stream,
2140 };
2141
2142 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2143                                              hda_nid_t nid)
2144 {
2145         struct hdmi_spec *spec = codec->spec;
2146         hda_nid_t conns[4];
2147         int nconns;
2148
2149         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2150         if (nconns == spec->num_cvts &&
2151             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2152                 return;
2153
2154         /* override pins connection list */
2155         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2156         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2157 }
2158
2159 #define INTEL_VENDOR_NID 0x08
2160 #define INTEL_GET_VENDOR_VERB 0xf81
2161 #define INTEL_SET_VENDOR_VERB 0x781
2162 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2163 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2164
2165 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2166                                           bool update_tree)
2167 {
2168         unsigned int vendor_param;
2169
2170         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2171                                 INTEL_GET_VENDOR_VERB, 0);
2172         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2173                 return;
2174
2175         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2176         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2177                                 INTEL_SET_VENDOR_VERB, vendor_param);
2178         if (vendor_param == -1)
2179                 return;
2180
2181         if (update_tree)
2182                 snd_hda_codec_update_widgets(codec);
2183 }
2184
2185 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2186 {
2187         unsigned int vendor_param;
2188
2189         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2190                                 INTEL_GET_VENDOR_VERB, 0);
2191         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2192                 return;
2193
2194         /* enable DP1.2 mode */
2195         vendor_param |= INTEL_EN_DP12;
2196         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2197         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2198                                 INTEL_SET_VENDOR_VERB, vendor_param);
2199 }
2200
2201 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2202  * Otherwise you may get severe h/w communication errors.
2203  */
2204 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2205                                 unsigned int power_state)
2206 {
2207         if (power_state == AC_PWRST_D0) {
2208                 intel_haswell_enable_all_pins(codec, false);
2209                 intel_haswell_fixup_enable_dp12(codec);
2210         }
2211
2212         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2213         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2214 }
2215
2216 static void intel_pin_eld_notify(void *audio_ptr, int port)
2217 {
2218         struct hda_codec *codec = audio_ptr;
2219         int pin_nid = port + 0x04;
2220
2221         /* we assume only from port-B to port-D */
2222         if (port < 1 || port > 3)
2223                 return;
2224
2225         /* skip notification during system suspend (but not in runtime PM);
2226          * the state will be updated at resume
2227          */
2228         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2229                 return;
2230         /* ditto during suspend/resume process itself */
2231         if (atomic_read(&(codec)->core.in_pm))
2232                 return;
2233
2234         check_presence_and_report(codec, pin_nid);
2235 }
2236
2237 static int patch_generic_hdmi(struct hda_codec *codec)
2238 {
2239         struct hdmi_spec *spec;
2240
2241         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2242         if (spec == NULL)
2243                 return -ENOMEM;
2244
2245         spec->ops = generic_standard_hdmi_ops;
2246         mutex_init(&spec->pcm_lock);
2247         snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2248
2249         spec->chmap.ops.get_chmap = hdmi_get_chmap;
2250         spec->chmap.ops.set_chmap = hdmi_set_chmap;
2251         spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2252
2253         codec->spec = spec;
2254         hdmi_array_init(spec, 4);
2255
2256 #ifdef CONFIG_SND_HDA_I915
2257         /* Try to bind with i915 for Intel HSW+ codecs (if not done yet) */
2258         if ((codec->core.vendor_id >> 16) == 0x8086 &&
2259             is_haswell_plus(codec)) {
2260 #if 0
2261                 /* on-demand binding leads to an unbalanced refcount when
2262                  * both i915 and hda drivers are probed concurrently;
2263                  * disabled temporarily for now
2264                  */
2265                 if (!codec->bus->core.audio_component)
2266                         if (!snd_hdac_i915_init(&codec->bus->core))
2267                                 spec->i915_bound = true;
2268 #endif
2269                 /* use i915 audio component notifier for hotplug */
2270                 if (codec->bus->core.audio_component)
2271                         spec->use_acomp_notifier = true;
2272         }
2273 #endif
2274
2275         if (is_haswell_plus(codec)) {
2276                 intel_haswell_enable_all_pins(codec, true);
2277                 intel_haswell_fixup_enable_dp12(codec);
2278         }
2279
2280         /* For Valleyview/Cherryview, only the display codec is in the display
2281          * power well and can use link_power ops to request/release the power.
2282          * For Haswell/Broadwell, the controller is also in the power well and
2283          * can cover the codec power request, and so need not set this flag.
2284          * For previous platforms, there is no such power well feature.
2285          */
2286         if (is_valleyview_plus(codec) || is_skylake(codec) ||
2287                         is_broxton(codec))
2288                 codec->core.link_power_control = 1;
2289
2290         if (hdmi_parse_codec(codec) < 0) {
2291                 if (spec->i915_bound)
2292                         snd_hdac_i915_exit(&codec->bus->core);
2293                 codec->spec = NULL;
2294                 kfree(spec);
2295                 return -EINVAL;
2296         }
2297         codec->patch_ops = generic_hdmi_patch_ops;
2298         if (is_haswell_plus(codec)) {
2299                 codec->patch_ops.set_power_state = haswell_set_power_state;
2300                 codec->dp_mst = true;
2301         }
2302
2303         /* Enable runtime pm for HDMI audio codec of HSW/BDW/SKL/BYT/BSW */
2304         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
2305                 codec->auto_runtime_pm = 1;
2306
2307         generic_hdmi_init_per_pins(codec);
2308
2309
2310         if (codec_has_acomp(codec)) {
2311                 codec->depop_delay = 0;
2312                 spec->i915_audio_ops.audio_ptr = codec;
2313                 /* intel_audio_codec_enable() or intel_audio_codec_disable()
2314                  * will call pin_eld_notify with using audio_ptr pointer
2315                  * We need make sure audio_ptr is really setup
2316                  */
2317                 wmb();
2318                 spec->i915_audio_ops.pin_eld_notify = intel_pin_eld_notify;
2319                 snd_hdac_i915_register_notifier(&spec->i915_audio_ops);
2320         }
2321
2322         WARN_ON(spec->dyn_pcm_assign && !codec_has_acomp(codec));
2323         return 0;
2324 }
2325
2326 /*
2327  * Shared non-generic implementations
2328  */
2329
2330 static int simple_playback_build_pcms(struct hda_codec *codec)
2331 {
2332         struct hdmi_spec *spec = codec->spec;
2333         struct hda_pcm *info;
2334         unsigned int chans;
2335         struct hda_pcm_stream *pstr;
2336         struct hdmi_spec_per_cvt *per_cvt;
2337
2338         per_cvt = get_cvt(spec, 0);
2339         chans = get_wcaps(codec, per_cvt->cvt_nid);
2340         chans = get_wcaps_channels(chans);
2341
2342         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2343         if (!info)
2344                 return -ENOMEM;
2345         spec->pcm_rec[0].pcm = info;
2346         info->pcm_type = HDA_PCM_TYPE_HDMI;
2347         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2348         *pstr = spec->pcm_playback;
2349         pstr->nid = per_cvt->cvt_nid;
2350         if (pstr->channels_max <= 2 && chans && chans <= 16)
2351                 pstr->channels_max = chans;
2352
2353         return 0;
2354 }
2355
2356 /* unsolicited event for jack sensing */
2357 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2358                                     unsigned int res)
2359 {
2360         snd_hda_jack_set_dirty_all(codec);
2361         snd_hda_jack_report_sync(codec);
2362 }
2363
2364 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2365  * as long as spec->pins[] is set correctly
2366  */
2367 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2368
2369 static int simple_playback_build_controls(struct hda_codec *codec)
2370 {
2371         struct hdmi_spec *spec = codec->spec;
2372         struct hdmi_spec_per_cvt *per_cvt;
2373         int err;
2374
2375         per_cvt = get_cvt(spec, 0);
2376         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2377                                           per_cvt->cvt_nid,
2378                                           HDA_PCM_TYPE_HDMI);
2379         if (err < 0)
2380                 return err;
2381         return simple_hdmi_build_jack(codec, 0);
2382 }
2383
2384 static int simple_playback_init(struct hda_codec *codec)
2385 {
2386         struct hdmi_spec *spec = codec->spec;
2387         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2388         hda_nid_t pin = per_pin->pin_nid;
2389
2390         snd_hda_codec_write(codec, pin, 0,
2391                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2392         /* some codecs require to unmute the pin */
2393         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2394                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2395                                     AMP_OUT_UNMUTE);
2396         snd_hda_jack_detect_enable(codec, pin);
2397         return 0;
2398 }
2399
2400 static void simple_playback_free(struct hda_codec *codec)
2401 {
2402         struct hdmi_spec *spec = codec->spec;
2403
2404         hdmi_array_free(spec);
2405         kfree(spec);
2406 }
2407
2408 /*
2409  * Nvidia specific implementations
2410  */
2411
2412 #define Nv_VERB_SET_Channel_Allocation          0xF79
2413 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2414 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2415 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2416
2417 #define nvhdmi_master_con_nid_7x        0x04
2418 #define nvhdmi_master_pin_nid_7x        0x05
2419
2420 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2421         /*front, rear, clfe, rear_surr */
2422         0x6, 0x8, 0xa, 0xc,
2423 };
2424
2425 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2426         /* set audio protect on */
2427         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2428         /* enable digital output on pin widget */
2429         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2430         {} /* terminator */
2431 };
2432
2433 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2434         /* set audio protect on */
2435         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2436         /* enable digital output on pin widget */
2437         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2438         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2439         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2440         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2441         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2442         {} /* terminator */
2443 };
2444
2445 #ifdef LIMITED_RATE_FMT_SUPPORT
2446 /* support only the safe format and rate */
2447 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2448 #define SUPPORTED_MAXBPS        16
2449 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2450 #else
2451 /* support all rates and formats */
2452 #define SUPPORTED_RATES \
2453         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2454         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2455          SNDRV_PCM_RATE_192000)
2456 #define SUPPORTED_MAXBPS        24
2457 #define SUPPORTED_FORMATS \
2458         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2459 #endif
2460
2461 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2462 {
2463         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2464         return 0;
2465 }
2466
2467 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2468 {
2469         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2470         return 0;
2471 }
2472
2473 static unsigned int channels_2_6_8[] = {
2474         2, 6, 8
2475 };
2476
2477 static unsigned int channels_2_8[] = {
2478         2, 8
2479 };
2480
2481 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2482         .count = ARRAY_SIZE(channels_2_6_8),
2483         .list = channels_2_6_8,
2484         .mask = 0,
2485 };
2486
2487 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2488         .count = ARRAY_SIZE(channels_2_8),
2489         .list = channels_2_8,
2490         .mask = 0,
2491 };
2492
2493 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2494                                     struct hda_codec *codec,
2495                                     struct snd_pcm_substream *substream)
2496 {
2497         struct hdmi_spec *spec = codec->spec;
2498         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2499
2500         switch (codec->preset->vendor_id) {
2501         case 0x10de0002:
2502         case 0x10de0003:
2503         case 0x10de0005:
2504         case 0x10de0006:
2505                 hw_constraints_channels = &hw_constraints_2_8_channels;
2506                 break;
2507         case 0x10de0007:
2508                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2509                 break;
2510         default:
2511                 break;
2512         }
2513
2514         if (hw_constraints_channels != NULL) {
2515                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2516                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2517                                 hw_constraints_channels);
2518         } else {
2519                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2520                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2521         }
2522
2523         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2524 }
2525
2526 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2527                                      struct hda_codec *codec,
2528                                      struct snd_pcm_substream *substream)
2529 {
2530         struct hdmi_spec *spec = codec->spec;
2531         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2532 }
2533
2534 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2535                                        struct hda_codec *codec,
2536                                        unsigned int stream_tag,
2537                                        unsigned int format,
2538                                        struct snd_pcm_substream *substream)
2539 {
2540         struct hdmi_spec *spec = codec->spec;
2541         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2542                                              stream_tag, format, substream);
2543 }
2544
2545 static const struct hda_pcm_stream simple_pcm_playback = {
2546         .substreams = 1,
2547         .channels_min = 2,
2548         .channels_max = 2,
2549         .ops = {
2550                 .open = simple_playback_pcm_open,
2551                 .close = simple_playback_pcm_close,
2552                 .prepare = simple_playback_pcm_prepare
2553         },
2554 };
2555
2556 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2557         .build_controls = simple_playback_build_controls,
2558         .build_pcms = simple_playback_build_pcms,
2559         .init = simple_playback_init,
2560         .free = simple_playback_free,
2561         .unsol_event = simple_hdmi_unsol_event,
2562 };
2563
2564 static int patch_simple_hdmi(struct hda_codec *codec,
2565                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2566 {
2567         struct hdmi_spec *spec;
2568         struct hdmi_spec_per_cvt *per_cvt;
2569         struct hdmi_spec_per_pin *per_pin;
2570
2571         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2572         if (!spec)
2573                 return -ENOMEM;
2574
2575         codec->spec = spec;
2576         hdmi_array_init(spec, 1);
2577
2578         spec->multiout.num_dacs = 0;  /* no analog */
2579         spec->multiout.max_channels = 2;
2580         spec->multiout.dig_out_nid = cvt_nid;
2581         spec->num_cvts = 1;
2582         spec->num_pins = 1;
2583         per_pin = snd_array_new(&spec->pins);
2584         per_cvt = snd_array_new(&spec->cvts);
2585         if (!per_pin || !per_cvt) {
2586                 simple_playback_free(codec);
2587                 return -ENOMEM;
2588         }
2589         per_cvt->cvt_nid = cvt_nid;
2590         per_pin->pin_nid = pin_nid;
2591         spec->pcm_playback = simple_pcm_playback;
2592
2593         codec->patch_ops = simple_hdmi_patch_ops;
2594
2595         return 0;
2596 }
2597
2598 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2599                                                     int channels)
2600 {
2601         unsigned int chanmask;
2602         int chan = channels ? (channels - 1) : 1;
2603
2604         switch (channels) {
2605         default:
2606         case 0:
2607         case 2:
2608                 chanmask = 0x00;
2609                 break;
2610         case 4:
2611                 chanmask = 0x08;
2612                 break;
2613         case 6:
2614                 chanmask = 0x0b;
2615                 break;
2616         case 8:
2617                 chanmask = 0x13;
2618                 break;
2619         }
2620
2621         /* Set the audio infoframe channel allocation and checksum fields.  The
2622          * channel count is computed implicitly by the hardware. */
2623         snd_hda_codec_write(codec, 0x1, 0,
2624                         Nv_VERB_SET_Channel_Allocation, chanmask);
2625
2626         snd_hda_codec_write(codec, 0x1, 0,
2627                         Nv_VERB_SET_Info_Frame_Checksum,
2628                         (0x71 - chan - chanmask));
2629 }
2630
2631 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2632                                    struct hda_codec *codec,
2633                                    struct snd_pcm_substream *substream)
2634 {
2635         struct hdmi_spec *spec = codec->spec;
2636         int i;
2637
2638         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2639                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2640         for (i = 0; i < 4; i++) {
2641                 /* set the stream id */
2642                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2643                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2644                 /* set the stream format */
2645                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2646                                 AC_VERB_SET_STREAM_FORMAT, 0);
2647         }
2648
2649         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2650          * streams are disabled. */
2651         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2652
2653         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2654 }
2655
2656 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2657                                      struct hda_codec *codec,
2658                                      unsigned int stream_tag,
2659                                      unsigned int format,
2660                                      struct snd_pcm_substream *substream)
2661 {
2662         int chs;
2663         unsigned int dataDCC2, channel_id;
2664         int i;
2665         struct hdmi_spec *spec = codec->spec;
2666         struct hda_spdif_out *spdif;
2667         struct hdmi_spec_per_cvt *per_cvt;
2668
2669         mutex_lock(&codec->spdif_mutex);
2670         per_cvt = get_cvt(spec, 0);
2671         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2672
2673         chs = substream->runtime->channels;
2674
2675         dataDCC2 = 0x2;
2676
2677         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2678         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2679                 snd_hda_codec_write(codec,
2680                                 nvhdmi_master_con_nid_7x,
2681                                 0,
2682                                 AC_VERB_SET_DIGI_CONVERT_1,
2683                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2684
2685         /* set the stream id */
2686         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2687                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2688
2689         /* set the stream format */
2690         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2691                         AC_VERB_SET_STREAM_FORMAT, format);
2692
2693         /* turn on again (if needed) */
2694         /* enable and set the channel status audio/data flag */
2695         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2696                 snd_hda_codec_write(codec,
2697                                 nvhdmi_master_con_nid_7x,
2698                                 0,
2699                                 AC_VERB_SET_DIGI_CONVERT_1,
2700                                 spdif->ctls & 0xff);
2701                 snd_hda_codec_write(codec,
2702                                 nvhdmi_master_con_nid_7x,
2703                                 0,
2704                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2705         }
2706
2707         for (i = 0; i < 4; i++) {
2708                 if (chs == 2)
2709                         channel_id = 0;
2710                 else
2711                         channel_id = i * 2;
2712
2713                 /* turn off SPDIF once;
2714                  *otherwise the IEC958 bits won't be updated
2715                  */
2716                 if (codec->spdif_status_reset &&
2717                 (spdif->ctls & AC_DIG1_ENABLE))
2718                         snd_hda_codec_write(codec,
2719                                 nvhdmi_con_nids_7x[i],
2720                                 0,
2721                                 AC_VERB_SET_DIGI_CONVERT_1,
2722                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2723                 /* set the stream id */
2724                 snd_hda_codec_write(codec,
2725                                 nvhdmi_con_nids_7x[i],
2726                                 0,
2727                                 AC_VERB_SET_CHANNEL_STREAMID,
2728                                 (stream_tag << 4) | channel_id);
2729                 /* set the stream format */
2730                 snd_hda_codec_write(codec,
2731                                 nvhdmi_con_nids_7x[i],
2732                                 0,
2733                                 AC_VERB_SET_STREAM_FORMAT,
2734                                 format);
2735                 /* turn on again (if needed) */
2736                 /* enable and set the channel status audio/data flag */
2737                 if (codec->spdif_status_reset &&
2738                 (spdif->ctls & AC_DIG1_ENABLE)) {
2739                         snd_hda_codec_write(codec,
2740                                         nvhdmi_con_nids_7x[i],
2741                                         0,
2742                                         AC_VERB_SET_DIGI_CONVERT_1,
2743                                         spdif->ctls & 0xff);
2744                         snd_hda_codec_write(codec,
2745                                         nvhdmi_con_nids_7x[i],
2746                                         0,
2747                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2748                 }
2749         }
2750
2751         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2752
2753         mutex_unlock(&codec->spdif_mutex);
2754         return 0;
2755 }
2756
2757 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2758         .substreams = 1,
2759         .channels_min = 2,
2760         .channels_max = 8,
2761         .nid = nvhdmi_master_con_nid_7x,
2762         .rates = SUPPORTED_RATES,
2763         .maxbps = SUPPORTED_MAXBPS,
2764         .formats = SUPPORTED_FORMATS,
2765         .ops = {
2766                 .open = simple_playback_pcm_open,
2767                 .close = nvhdmi_8ch_7x_pcm_close,
2768                 .prepare = nvhdmi_8ch_7x_pcm_prepare
2769         },
2770 };
2771
2772 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2773 {
2774         struct hdmi_spec *spec;
2775         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2776                                     nvhdmi_master_pin_nid_7x);
2777         if (err < 0)
2778                 return err;
2779
2780         codec->patch_ops.init = nvhdmi_7x_init_2ch;
2781         /* override the PCM rates, etc, as the codec doesn't give full list */
2782         spec = codec->spec;
2783         spec->pcm_playback.rates = SUPPORTED_RATES;
2784         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2785         spec->pcm_playback.formats = SUPPORTED_FORMATS;
2786         return 0;
2787 }
2788
2789 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2790 {
2791         struct hdmi_spec *spec = codec->spec;
2792         int err = simple_playback_build_pcms(codec);
2793         if (!err) {
2794                 struct hda_pcm *info = get_pcm_rec(spec, 0);
2795                 info->own_chmap = true;
2796         }
2797         return err;
2798 }
2799
2800 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2801 {
2802         struct hdmi_spec *spec = codec->spec;
2803         struct hda_pcm *info;
2804         struct snd_pcm_chmap *chmap;
2805         int err;
2806
2807         err = simple_playback_build_controls(codec);
2808         if (err < 0)
2809                 return err;
2810
2811         /* add channel maps */
2812         info = get_pcm_rec(spec, 0);
2813         err = snd_pcm_add_chmap_ctls(info->pcm,
2814                                      SNDRV_PCM_STREAM_PLAYBACK,
2815                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
2816         if (err < 0)
2817                 return err;
2818         switch (codec->preset->vendor_id) {
2819         case 0x10de0002:
2820         case 0x10de0003:
2821         case 0x10de0005:
2822         case 0x10de0006:
2823                 chmap->channel_mask = (1U << 2) | (1U << 8);
2824                 break;
2825         case 0x10de0007:
2826                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2827         }
2828         return 0;
2829 }
2830
2831 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2832 {
2833         struct hdmi_spec *spec;
2834         int err = patch_nvhdmi_2ch(codec);
2835         if (err < 0)
2836                 return err;
2837         spec = codec->spec;
2838         spec->multiout.max_channels = 8;
2839         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2840         codec->patch_ops.init = nvhdmi_7x_init_8ch;
2841         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2842         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2843
2844         /* Initialize the audio infoframe channel mask and checksum to something
2845          * valid */
2846         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2847
2848         return 0;
2849 }
2850
2851 /*
2852  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
2853  * - 0x10de0015
2854  * - 0x10de0040
2855  */
2856 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
2857                 struct hdac_cea_channel_speaker_allocation *cap, int channels)
2858 {
2859         if (cap->ca_index == 0x00 && channels == 2)
2860                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
2861
2862         /* If the speaker allocation matches the channel count, it is OK. */
2863         if (cap->channels != channels)
2864                 return -1;
2865
2866         /* all channels are remappable freely */
2867         return SNDRV_CTL_TLVT_CHMAP_VAR;
2868 }
2869
2870 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
2871                 int ca, int chs, unsigned char *map)
2872 {
2873         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
2874                 return -EINVAL;
2875
2876         return 0;
2877 }
2878
2879 static int patch_nvhdmi(struct hda_codec *codec)
2880 {
2881         struct hdmi_spec *spec;
2882         int err;
2883
2884         err = patch_generic_hdmi(codec);
2885         if (err)
2886                 return err;
2887
2888         spec = codec->spec;
2889         spec->dyn_pin_out = true;
2890
2891         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
2892                 nvhdmi_chmap_cea_alloc_validate_get_type;
2893         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
2894
2895         return 0;
2896 }
2897
2898 /*
2899  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
2900  * accessed using vendor-defined verbs. These registers can be used for
2901  * interoperability between the HDA and HDMI drivers.
2902  */
2903
2904 /* Audio Function Group node */
2905 #define NVIDIA_AFG_NID 0x01
2906
2907 /*
2908  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
2909  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
2910  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
2911  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
2912  * additional bit (at position 30) to signal the validity of the format.
2913  *
2914  * | 31      | 30    | 29  16 | 15   0 |
2915  * +---------+-------+--------+--------+
2916  * | TRIGGER | VALID | UNUSED | FORMAT |
2917  * +-----------------------------------|
2918  *
2919  * Note that for the trigger bit to take effect it needs to change value
2920  * (i.e. it needs to be toggled).
2921  */
2922 #define NVIDIA_GET_SCRATCH0             0xfa6
2923 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
2924 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
2925 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
2926 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
2927 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
2928 #define NVIDIA_SCRATCH_VALID   (1 << 6)
2929
2930 #define NVIDIA_GET_SCRATCH1             0xfab
2931 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
2932 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
2933 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
2934 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
2935
2936 /*
2937  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
2938  * the format is invalidated so that the HDMI codec can be disabled.
2939  */
2940 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
2941 {
2942         unsigned int value;
2943
2944         /* bits [31:30] contain the trigger and valid bits */
2945         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
2946                                    NVIDIA_GET_SCRATCH0, 0);
2947         value = (value >> 24) & 0xff;
2948
2949         /* bits [15:0] are used to store the HDA format */
2950         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
2951                             NVIDIA_SET_SCRATCH0_BYTE0,
2952                             (format >> 0) & 0xff);
2953         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
2954                             NVIDIA_SET_SCRATCH0_BYTE1,
2955                             (format >> 8) & 0xff);
2956
2957         /* bits [16:24] are unused */
2958         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
2959                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
2960
2961         /*
2962          * Bit 30 signals that the data is valid and hence that HDMI audio can
2963          * be enabled.
2964          */
2965         if (format == 0)
2966                 value &= ~NVIDIA_SCRATCH_VALID;
2967         else
2968                 value |= NVIDIA_SCRATCH_VALID;
2969
2970         /*
2971          * Whenever the trigger bit is toggled, an interrupt is raised in the
2972          * HDMI codec. The HDMI driver will use that as trigger to update its
2973          * configuration.
2974          */
2975         value ^= NVIDIA_SCRATCH_TRIGGER;
2976
2977         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
2978                             NVIDIA_SET_SCRATCH0_BYTE3, value);
2979 }
2980
2981 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
2982                                   struct hda_codec *codec,
2983                                   unsigned int stream_tag,
2984                                   unsigned int format,
2985                                   struct snd_pcm_substream *substream)
2986 {
2987         int err;
2988
2989         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
2990                                                 format, substream);
2991         if (err < 0)
2992                 return err;
2993
2994         /* notify the HDMI codec of the format change */
2995         tegra_hdmi_set_format(codec, format);
2996
2997         return 0;
2998 }
2999
3000 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3001                                   struct hda_codec *codec,
3002                                   struct snd_pcm_substream *substream)
3003 {
3004         /* invalidate the format in the HDMI codec */
3005         tegra_hdmi_set_format(codec, 0);
3006
3007         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3008 }
3009
3010 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3011 {
3012         struct hdmi_spec *spec = codec->spec;
3013         unsigned int i;
3014
3015         for (i = 0; i < spec->num_pins; i++) {
3016                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3017
3018                 if (pcm->pcm_type == type)
3019                         return pcm;
3020         }
3021
3022         return NULL;
3023 }
3024
3025 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3026 {
3027         struct hda_pcm_stream *stream;
3028         struct hda_pcm *pcm;
3029         int err;
3030
3031         err = generic_hdmi_build_pcms(codec);
3032         if (err < 0)
3033                 return err;
3034
3035         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3036         if (!pcm)
3037                 return -ENODEV;
3038
3039         /*
3040          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3041          * codec about format changes.
3042          */
3043         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3044         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3045         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3046
3047         return 0;
3048 }
3049
3050 static int patch_tegra_hdmi(struct hda_codec *codec)
3051 {
3052         int err;
3053
3054         err = patch_generic_hdmi(codec);
3055         if (err)
3056                 return err;
3057
3058         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3059
3060         return 0;
3061 }
3062
3063 /*
3064  * ATI/AMD-specific implementations
3065  */
3066
3067 #define is_amdhdmi_rev3_or_later(codec) \
3068         ((codec)->core.vendor_id == 0x1002aa01 && \
3069          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3070 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3071
3072 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3073 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3074 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3075 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3076 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3077 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3078 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3079 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3080 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3081 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3082 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3083 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3084 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3085 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3086 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3087 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3088 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3089 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3090 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3091 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3092 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3093 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3094 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3095 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3096 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3097
3098 /* AMD specific HDA cvt verbs */
3099 #define ATI_VERB_SET_RAMP_RATE          0x770
3100 #define ATI_VERB_GET_RAMP_RATE          0xf70
3101
3102 #define ATI_OUT_ENABLE 0x1
3103
3104 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3105 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3106
3107 #define ATI_HBR_CAPABLE 0x01
3108 #define ATI_HBR_ENABLE 0x10
3109
3110 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3111                            unsigned char *buf, int *eld_size)
3112 {
3113         /* call hda_eld.c ATI/AMD-specific function */
3114         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3115                                     is_amdhdmi_rev3_or_later(codec));
3116 }
3117
3118 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3119                                         int active_channels, int conn_type)
3120 {
3121         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3122 }
3123
3124 static int atihdmi_paired_swap_fc_lfe(int pos)
3125 {
3126         /*
3127          * ATI/AMD have automatic FC/LFE swap built-in
3128          * when in pairwise mapping mode.
3129          */
3130
3131         switch (pos) {
3132                 /* see channel_allocations[].speakers[] */
3133                 case 2: return 3;
3134                 case 3: return 2;
3135                 default: break;
3136         }
3137
3138         return pos;
3139 }
3140
3141 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3142                         int ca, int chs, unsigned char *map)
3143 {
3144         struct hdac_cea_channel_speaker_allocation *cap;
3145         int i, j;
3146
3147         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3148
3149         cap = snd_hdac_get_ch_alloc_from_ca(ca);
3150         for (i = 0; i < chs; ++i) {
3151                 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3152                 bool ok = false;
3153                 bool companion_ok = false;
3154
3155                 if (!mask)
3156                         continue;
3157
3158                 for (j = 0 + i % 2; j < 8; j += 2) {
3159                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3160                         if (cap->speakers[chan_idx] == mask) {
3161                                 /* channel is in a supported position */
3162                                 ok = true;
3163
3164                                 if (i % 2 == 0 && i + 1 < chs) {
3165                                         /* even channel, check the odd companion */
3166                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3167                                         int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3168                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3169
3170                                         if (comp_mask_req == comp_mask_act)
3171                                                 companion_ok = true;
3172                                         else
3173                                                 return -EINVAL;
3174                                 }
3175                                 break;
3176                         }
3177                 }
3178
3179                 if (!ok)
3180                         return -EINVAL;
3181
3182                 if (companion_ok)
3183                         i++; /* companion channel already checked */
3184         }
3185
3186         return 0;
3187 }
3188
3189 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3190                 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3191 {
3192         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3193         int verb;
3194         int ati_channel_setup = 0;
3195
3196         if (hdmi_slot > 7)
3197                 return -EINVAL;
3198
3199         if (!has_amd_full_remap_support(codec)) {
3200                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3201
3202                 /* In case this is an odd slot but without stream channel, do not
3203                  * disable the slot since the corresponding even slot could have a
3204                  * channel. In case neither have a channel, the slot pair will be
3205                  * disabled when this function is called for the even slot. */
3206                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3207                         return 0;
3208
3209                 hdmi_slot -= hdmi_slot % 2;
3210
3211                 if (stream_channel != 0xf)
3212                         stream_channel -= stream_channel % 2;
3213         }
3214
3215         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3216
3217         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3218
3219         if (stream_channel != 0xf)
3220                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3221
3222         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3223 }
3224
3225 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3226                                 hda_nid_t pin_nid, int asp_slot)
3227 {
3228         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3229         bool was_odd = false;
3230         int ati_asp_slot = asp_slot;
3231         int verb;
3232         int ati_channel_setup;
3233
3234         if (asp_slot > 7)
3235                 return -EINVAL;
3236
3237         if (!has_amd_full_remap_support(codec)) {
3238                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3239                 if (ati_asp_slot % 2 != 0) {
3240                         ati_asp_slot -= 1;
3241                         was_odd = true;
3242                 }
3243         }
3244
3245         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3246
3247         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3248
3249         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3250                 return 0xf;
3251
3252         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3253 }
3254
3255 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3256                 struct hdac_chmap *chmap,
3257                 struct hdac_cea_channel_speaker_allocation *cap,
3258                 int channels)
3259 {
3260         int c;
3261
3262         /*
3263          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3264          * we need to take that into account (a single channel may take 2
3265          * channel slots if we need to carry a silent channel next to it).
3266          * On Rev3+ AMD codecs this function is not used.
3267          */
3268         int chanpairs = 0;
3269
3270         /* We only produce even-numbered channel count TLVs */
3271         if ((channels % 2) != 0)
3272                 return -1;
3273
3274         for (c = 0; c < 7; c += 2) {
3275                 if (cap->speakers[c] || cap->speakers[c+1])
3276                         chanpairs++;
3277         }
3278
3279         if (chanpairs * 2 != channels)
3280                 return -1;
3281
3282         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3283 }
3284
3285 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
3286                 struct hdac_cea_channel_speaker_allocation *cap,
3287                 unsigned int *chmap, int channels)
3288 {
3289         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3290         int count = 0;
3291         int c;
3292
3293         for (c = 7; c >= 0; c--) {
3294                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3295                 int spk = cap->speakers[chan];
3296                 if (!spk) {
3297                         /* add N/A channel if the companion channel is occupied */
3298                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3299                                 chmap[count++] = SNDRV_CHMAP_NA;
3300
3301                         continue;
3302                 }
3303
3304                 chmap[count++] = snd_hdac_spk_to_chmap(spk);
3305         }
3306
3307         WARN_ON(count != channels);
3308 }
3309
3310 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3311                                  bool hbr)
3312 {
3313         int hbr_ctl, hbr_ctl_new;
3314
3315         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3316         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3317                 if (hbr)
3318                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3319                 else
3320                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3321
3322                 codec_dbg(codec,
3323                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3324                                 pin_nid,
3325                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3326                                 hbr_ctl_new);
3327
3328                 if (hbr_ctl != hbr_ctl_new)
3329                         snd_hda_codec_write(codec, pin_nid, 0,
3330                                                 ATI_VERB_SET_HBR_CONTROL,
3331                                                 hbr_ctl_new);
3332
3333         } else if (hbr)
3334                 return -EINVAL;
3335
3336         return 0;
3337 }
3338
3339 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3340                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3341 {
3342
3343         if (is_amdhdmi_rev3_or_later(codec)) {
3344                 int ramp_rate = 180; /* default as per AMD spec */
3345                 /* disable ramp-up/down for non-pcm as per AMD spec */
3346                 if (format & AC_FMT_TYPE_NON_PCM)
3347                         ramp_rate = 0;
3348
3349                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3350         }
3351
3352         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3353 }
3354
3355
3356 static int atihdmi_init(struct hda_codec *codec)
3357 {
3358         struct hdmi_spec *spec = codec->spec;
3359         int pin_idx, err;
3360
3361         err = generic_hdmi_init(codec);
3362
3363         if (err)
3364                 return err;
3365
3366         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3367                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3368
3369                 /* make sure downmix information in infoframe is zero */
3370                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3371
3372                 /* enable channel-wise remap mode if supported */
3373                 if (has_amd_full_remap_support(codec))
3374                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3375                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3376                                             ATI_MULTICHANNEL_MODE_SINGLE);
3377         }
3378
3379         return 0;
3380 }
3381
3382 static int patch_atihdmi(struct hda_codec *codec)
3383 {
3384         struct hdmi_spec *spec;
3385         struct hdmi_spec_per_cvt *per_cvt;
3386         int err, cvt_idx;
3387
3388         err = patch_generic_hdmi(codec);
3389
3390         if (err)
3391                 return err;
3392
3393         codec->patch_ops.init = atihdmi_init;
3394
3395         spec = codec->spec;
3396
3397         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3398         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3399         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3400         spec->ops.setup_stream = atihdmi_setup_stream;
3401
3402         if (!has_amd_full_remap_support(codec)) {
3403                 /* override to ATI/AMD-specific versions with pairwise mapping */
3404                 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3405                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3406                 spec->chmap.ops.cea_alloc_to_tlv_chmap =
3407                                 atihdmi_paired_cea_alloc_to_tlv_chmap;
3408                 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
3409                 spec->chmap.ops.pin_get_slot_channel =
3410                                 atihdmi_pin_get_slot_channel;
3411                 spec->chmap.ops.pin_set_slot_channel =
3412                                 atihdmi_pin_set_slot_channel;
3413         }
3414
3415         /* ATI/AMD converters do not advertise all of their capabilities */
3416         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3417                 per_cvt = get_cvt(spec, cvt_idx);
3418                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3419                 per_cvt->rates |= SUPPORTED_RATES;
3420                 per_cvt->formats |= SUPPORTED_FORMATS;
3421                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3422         }
3423
3424         spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
3425
3426         return 0;
3427 }
3428
3429 /* VIA HDMI Implementation */
3430 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3431 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3432
3433 static int patch_via_hdmi(struct hda_codec *codec)
3434 {
3435         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3436 }
3437
3438 /*
3439  * patch entries
3440  */
3441 static const struct hda_device_id snd_hda_id_hdmi[] = {
3442 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
3443 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
3444 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
3445 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
3446 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
3447 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
3448 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
3449 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3450 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3451 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3452 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3453 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
3454 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi),
3455 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi),
3456 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi),
3457 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi),
3458 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi),
3459 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi),
3460 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi),
3461 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi),
3462 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi),
3463 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi),
3464 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi),
3465 /* 17 is known to be absent */
3466 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi),
3467 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi),
3468 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi),
3469 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi),
3470 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi),
3471 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
3472 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
3473 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
3474 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
3475 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
3476 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
3477 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
3478 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
3479 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
3480 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
3481 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
3482 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
3483 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
3484 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
3485 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
3486 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
3487 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
3488 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
3489 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
3490 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
3491 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
3492 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
3493 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
3494 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_generic_hdmi),
3495 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
3496 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
3497 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
3498 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_generic_hdmi),
3499 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_generic_hdmi),
3500 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_generic_hdmi),
3501 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_generic_hdmi),
3502 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_generic_hdmi),
3503 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_generic_hdmi),
3504 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_generic_hdmi),
3505 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_generic_hdmi),
3506 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
3507 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_generic_hdmi),
3508 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_generic_hdmi),
3509 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
3510 /* special ID for generic HDMI */
3511 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
3512 {} /* terminator */
3513 };
3514 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
3515
3516 MODULE_LICENSE("GPL");
3517 MODULE_DESCRIPTION("HDMI HD-audio codec");
3518 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3519 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3520 MODULE_ALIAS("snd-hda-codec-atihdmi");
3521
3522 static struct hda_codec_driver hdmi_driver = {
3523         .id = snd_hda_id_hdmi,
3524 };
3525
3526 module_hda_codec_driver(hdmi_driver);