2 * wm_adsp.c -- Wolfson ADSP support
4 * Copyright 2012 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/firmware.h>
18 #include <linux/list.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/regmap.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/slab.h>
24 #include <linux/vmalloc.h>
25 #include <linux/workqueue.h>
26 #include <linux/debugfs.h>
27 #include <sound/core.h>
28 #include <sound/pcm.h>
29 #include <sound/pcm_params.h>
30 #include <sound/soc.h>
31 #include <sound/jack.h>
32 #include <sound/initval.h>
33 #include <sound/tlv.h>
37 #define adsp_crit(_dsp, fmt, ...) \
38 dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
39 #define adsp_err(_dsp, fmt, ...) \
40 dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
41 #define adsp_warn(_dsp, fmt, ...) \
42 dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
43 #define adsp_info(_dsp, fmt, ...) \
44 dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
45 #define adsp_dbg(_dsp, fmt, ...) \
46 dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
48 #define ADSP1_CONTROL_1 0x00
49 #define ADSP1_CONTROL_2 0x02
50 #define ADSP1_CONTROL_3 0x03
51 #define ADSP1_CONTROL_4 0x04
52 #define ADSP1_CONTROL_5 0x06
53 #define ADSP1_CONTROL_6 0x07
54 #define ADSP1_CONTROL_7 0x08
55 #define ADSP1_CONTROL_8 0x09
56 #define ADSP1_CONTROL_9 0x0A
57 #define ADSP1_CONTROL_10 0x0B
58 #define ADSP1_CONTROL_11 0x0C
59 #define ADSP1_CONTROL_12 0x0D
60 #define ADSP1_CONTROL_13 0x0F
61 #define ADSP1_CONTROL_14 0x10
62 #define ADSP1_CONTROL_15 0x11
63 #define ADSP1_CONTROL_16 0x12
64 #define ADSP1_CONTROL_17 0x13
65 #define ADSP1_CONTROL_18 0x14
66 #define ADSP1_CONTROL_19 0x16
67 #define ADSP1_CONTROL_20 0x17
68 #define ADSP1_CONTROL_21 0x18
69 #define ADSP1_CONTROL_22 0x1A
70 #define ADSP1_CONTROL_23 0x1B
71 #define ADSP1_CONTROL_24 0x1C
72 #define ADSP1_CONTROL_25 0x1E
73 #define ADSP1_CONTROL_26 0x20
74 #define ADSP1_CONTROL_27 0x21
75 #define ADSP1_CONTROL_28 0x22
76 #define ADSP1_CONTROL_29 0x23
77 #define ADSP1_CONTROL_30 0x24
78 #define ADSP1_CONTROL_31 0x26
83 #define ADSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
84 #define ADSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
85 #define ADSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
91 #define ADSP1_DBG_CLK_ENA 0x0008 /* DSP1_DBG_CLK_ENA */
92 #define ADSP1_DBG_CLK_ENA_MASK 0x0008 /* DSP1_DBG_CLK_ENA */
93 #define ADSP1_DBG_CLK_ENA_SHIFT 3 /* DSP1_DBG_CLK_ENA */
94 #define ADSP1_DBG_CLK_ENA_WIDTH 1 /* DSP1_DBG_CLK_ENA */
95 #define ADSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
96 #define ADSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
97 #define ADSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
98 #define ADSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
99 #define ADSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
100 #define ADSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
101 #define ADSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
102 #define ADSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
103 #define ADSP1_START 0x0001 /* DSP1_START */
104 #define ADSP1_START_MASK 0x0001 /* DSP1_START */
105 #define ADSP1_START_SHIFT 0 /* DSP1_START */
106 #define ADSP1_START_WIDTH 1 /* DSP1_START */
111 #define ADSP1_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
112 #define ADSP1_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
113 #define ADSP1_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
115 #define ADSP2_CONTROL 0x0
116 #define ADSP2_CLOCKING 0x1
117 #define ADSP2_STATUS1 0x4
118 #define ADSP2_WDMA_CONFIG_1 0x30
119 #define ADSP2_WDMA_CONFIG_2 0x31
120 #define ADSP2_RDMA_CONFIG_1 0x34
122 #define ADSP2_SCRATCH0 0x40
123 #define ADSP2_SCRATCH1 0x41
124 #define ADSP2_SCRATCH2 0x42
125 #define ADSP2_SCRATCH3 0x43
131 #define ADSP2_MEM_ENA 0x0010 /* DSP1_MEM_ENA */
132 #define ADSP2_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */
133 #define ADSP2_MEM_ENA_SHIFT 4 /* DSP1_MEM_ENA */
134 #define ADSP2_MEM_ENA_WIDTH 1 /* DSP1_MEM_ENA */
135 #define ADSP2_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
136 #define ADSP2_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
137 #define ADSP2_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
138 #define ADSP2_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
139 #define ADSP2_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
140 #define ADSP2_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
141 #define ADSP2_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
142 #define ADSP2_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
143 #define ADSP2_START 0x0001 /* DSP1_START */
144 #define ADSP2_START_MASK 0x0001 /* DSP1_START */
145 #define ADSP2_START_SHIFT 0 /* DSP1_START */
146 #define ADSP2_START_WIDTH 1 /* DSP1_START */
151 #define ADSP2_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
152 #define ADSP2_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
153 #define ADSP2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
158 #define ADSP2_RAM_RDY 0x0001
159 #define ADSP2_RAM_RDY_MASK 0x0001
160 #define ADSP2_RAM_RDY_SHIFT 0
161 #define ADSP2_RAM_RDY_WIDTH 1
164 struct list_head list;
168 static struct wm_adsp_buf *wm_adsp_buf_alloc(const void *src, size_t len,
169 struct list_head *list)
171 struct wm_adsp_buf *buf = kzalloc(sizeof(*buf), GFP_KERNEL);
176 buf->buf = vmalloc(len);
181 memcpy(buf->buf, src, len);
184 list_add_tail(&buf->list, list);
189 static void wm_adsp_buf_free(struct list_head *list)
191 while (!list_empty(list)) {
192 struct wm_adsp_buf *buf = list_first_entry(list,
195 list_del(&buf->list);
201 #define WM_ADSP_FW_MBC_VSS 0
202 #define WM_ADSP_FW_HIFI 1
203 #define WM_ADSP_FW_TX 2
204 #define WM_ADSP_FW_TX_SPK 3
205 #define WM_ADSP_FW_RX 4
206 #define WM_ADSP_FW_RX_ANC 5
207 #define WM_ADSP_FW_CTRL 6
208 #define WM_ADSP_FW_ASR 7
209 #define WM_ADSP_FW_TRACE 8
210 #define WM_ADSP_FW_SPK_PROT 9
211 #define WM_ADSP_FW_MISC 10
213 #define WM_ADSP_NUM_FW 11
215 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = {
216 [WM_ADSP_FW_MBC_VSS] = "MBC/VSS",
217 [WM_ADSP_FW_HIFI] = "MasterHiFi",
218 [WM_ADSP_FW_TX] = "Tx",
219 [WM_ADSP_FW_TX_SPK] = "Tx Speaker",
220 [WM_ADSP_FW_RX] = "Rx",
221 [WM_ADSP_FW_RX_ANC] = "Rx ANC",
222 [WM_ADSP_FW_CTRL] = "Voice Ctrl",
223 [WM_ADSP_FW_ASR] = "ASR Assist",
224 [WM_ADSP_FW_TRACE] = "Dbg Trace",
225 [WM_ADSP_FW_SPK_PROT] = "Protection",
226 [WM_ADSP_FW_MISC] = "Misc",
229 struct wm_adsp_system_config_xm_hdr {
235 __be32 dma_buffer_size;
238 __be32 build_job_name[3];
239 __be32 build_job_number;
242 struct wm_adsp_alg_xm_struct {
248 __be32 high_water_mark;
249 __be32 low_water_mark;
250 __be64 smoothed_power;
253 struct wm_adsp_buffer {
254 __be32 X_buf_base; /* XM base addr of first X area */
255 __be32 X_buf_size; /* Size of 1st X area in words */
256 __be32 X_buf_base2; /* XM base addr of 2nd X area */
257 __be32 X_buf_brk; /* Total X size in words */
258 __be32 Y_buf_base; /* YM base addr of Y area */
259 __be32 wrap; /* Total size X and Y in words */
260 __be32 high_water_mark; /* Point at which IRQ is asserted */
261 __be32 irq_count; /* bits 1-31 count IRQ assertions */
262 __be32 irq_ack; /* acked IRQ count, bit 0 enables IRQ */
263 __be32 next_write_index; /* word index of next write */
264 __be32 next_read_index; /* word index of next read */
265 __be32 error; /* error if any */
266 __be32 oldest_block_index; /* word index of oldest surviving */
267 __be32 requested_rewind; /* how many blocks rewind was done */
268 __be32 reserved_space; /* internal */
269 __be32 min_free; /* min free space since stream start */
270 __be32 blocks_written[2]; /* total blocks written (64 bit) */
271 __be32 words_written[2]; /* total words written (64 bit) */
274 struct wm_adsp_compr_buf {
277 struct wm_adsp_buffer_region *regions;
286 struct wm_adsp_compr {
288 struct wm_adsp_compr_buf *buf;
290 struct snd_compr_stream *stream;
291 struct snd_compressed_buffer size;
294 unsigned int copied_total;
297 #define WM_ADSP_DATA_WORD_SIZE 3
299 #define WM_ADSP_MIN_FRAGMENTS 1
300 #define WM_ADSP_MAX_FRAGMENTS 256
301 #define WM_ADSP_MIN_FRAGMENT_SIZE (64 * WM_ADSP_DATA_WORD_SIZE)
302 #define WM_ADSP_MAX_FRAGMENT_SIZE (4096 * WM_ADSP_DATA_WORD_SIZE)
304 #define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x49aec7
306 #define HOST_BUFFER_FIELD(field) \
307 (offsetof(struct wm_adsp_buffer, field) / sizeof(__be32))
309 #define ALG_XM_FIELD(field) \
310 (offsetof(struct wm_adsp_alg_xm_struct, field) / sizeof(__be32))
312 static int wm_adsp_buffer_init(struct wm_adsp *dsp);
313 static int wm_adsp_buffer_free(struct wm_adsp *dsp);
315 struct wm_adsp_buffer_region {
317 unsigned int cumulative_size;
318 unsigned int mem_type;
319 unsigned int base_addr;
322 struct wm_adsp_buffer_region_def {
323 unsigned int mem_type;
324 unsigned int base_offset;
325 unsigned int size_offset;
328 static const struct wm_adsp_buffer_region_def default_regions[] = {
330 .mem_type = WMFW_ADSP2_XM,
331 .base_offset = HOST_BUFFER_FIELD(X_buf_base),
332 .size_offset = HOST_BUFFER_FIELD(X_buf_size),
335 .mem_type = WMFW_ADSP2_XM,
336 .base_offset = HOST_BUFFER_FIELD(X_buf_base2),
337 .size_offset = HOST_BUFFER_FIELD(X_buf_brk),
340 .mem_type = WMFW_ADSP2_YM,
341 .base_offset = HOST_BUFFER_FIELD(Y_buf_base),
342 .size_offset = HOST_BUFFER_FIELD(wrap),
346 struct wm_adsp_fw_caps {
348 struct snd_codec_desc desc;
350 const struct wm_adsp_buffer_region_def *region_defs;
353 static const struct wm_adsp_fw_caps ctrl_caps[] = {
355 .id = SND_AUDIOCODEC_BESPOKE,
358 .sample_rates = { 16000 },
359 .num_sample_rates = 1,
360 .formats = SNDRV_PCM_FMTBIT_S16_LE,
362 .num_regions = ARRAY_SIZE(default_regions),
363 .region_defs = default_regions,
367 static const struct wm_adsp_fw_caps trace_caps[] = {
369 .id = SND_AUDIOCODEC_BESPOKE,
373 4000, 8000, 11025, 12000, 16000, 22050,
374 24000, 32000, 44100, 48000, 64000, 88200,
375 96000, 176400, 192000
377 .num_sample_rates = 15,
378 .formats = SNDRV_PCM_FMTBIT_S16_LE,
380 .num_regions = ARRAY_SIZE(default_regions),
381 .region_defs = default_regions,
385 static const struct {
389 const struct wm_adsp_fw_caps *caps;
390 } wm_adsp_fw[WM_ADSP_NUM_FW] = {
391 [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" },
392 [WM_ADSP_FW_HIFI] = { .file = "hifi" },
393 [WM_ADSP_FW_TX] = { .file = "tx" },
394 [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" },
395 [WM_ADSP_FW_RX] = { .file = "rx" },
396 [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" },
397 [WM_ADSP_FW_CTRL] = {
399 .compr_direction = SND_COMPRESS_CAPTURE,
400 .num_caps = ARRAY_SIZE(ctrl_caps),
403 [WM_ADSP_FW_ASR] = { .file = "asr" },
404 [WM_ADSP_FW_TRACE] = {
406 .compr_direction = SND_COMPRESS_CAPTURE,
407 .num_caps = ARRAY_SIZE(trace_caps),
410 [WM_ADSP_FW_SPK_PROT] = { .file = "spk-prot" },
411 [WM_ADSP_FW_MISC] = { .file = "misc" },
414 struct wm_coeff_ctl_ops {
415 int (*xget)(struct snd_kcontrol *kcontrol,
416 struct snd_ctl_elem_value *ucontrol);
417 int (*xput)(struct snd_kcontrol *kcontrol,
418 struct snd_ctl_elem_value *ucontrol);
419 int (*xinfo)(struct snd_kcontrol *kcontrol,
420 struct snd_ctl_elem_info *uinfo);
423 struct wm_coeff_ctl {
426 struct wm_adsp_alg_region alg_region;
427 struct wm_coeff_ctl_ops ops;
429 unsigned int enabled:1;
430 struct list_head list;
435 struct snd_kcontrol *kcontrol;
439 #ifdef CONFIG_DEBUG_FS
440 static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s)
442 char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
444 kfree(dsp->wmfw_file_name);
445 dsp->wmfw_file_name = tmp;
448 static void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, const char *s)
450 char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
452 kfree(dsp->bin_file_name);
453 dsp->bin_file_name = tmp;
456 static void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
458 kfree(dsp->wmfw_file_name);
459 kfree(dsp->bin_file_name);
460 dsp->wmfw_file_name = NULL;
461 dsp->bin_file_name = NULL;
464 static ssize_t wm_adsp_debugfs_wmfw_read(struct file *file,
465 char __user *user_buf,
466 size_t count, loff_t *ppos)
468 struct wm_adsp *dsp = file->private_data;
471 mutex_lock(&dsp->pwr_lock);
473 if (!dsp->wmfw_file_name || !dsp->running)
476 ret = simple_read_from_buffer(user_buf, count, ppos,
478 strlen(dsp->wmfw_file_name));
480 mutex_unlock(&dsp->pwr_lock);
484 static ssize_t wm_adsp_debugfs_bin_read(struct file *file,
485 char __user *user_buf,
486 size_t count, loff_t *ppos)
488 struct wm_adsp *dsp = file->private_data;
491 mutex_lock(&dsp->pwr_lock);
493 if (!dsp->bin_file_name || !dsp->running)
496 ret = simple_read_from_buffer(user_buf, count, ppos,
498 strlen(dsp->bin_file_name));
500 mutex_unlock(&dsp->pwr_lock);
504 static const struct {
506 const struct file_operations fops;
507 } wm_adsp_debugfs_fops[] = {
509 .name = "wmfw_file_name",
512 .read = wm_adsp_debugfs_wmfw_read,
516 .name = "bin_file_name",
519 .read = wm_adsp_debugfs_bin_read,
524 static void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
525 struct snd_soc_codec *codec)
527 struct dentry *root = NULL;
531 if (!codec->component.debugfs_root) {
532 adsp_err(dsp, "No codec debugfs root\n");
536 root_name = kmalloc(PAGE_SIZE, GFP_KERNEL);
540 snprintf(root_name, PAGE_SIZE, "dsp%d", dsp->num);
541 root = debugfs_create_dir(root_name, codec->component.debugfs_root);
547 if (!debugfs_create_bool("running", S_IRUGO, root, &dsp->running))
550 if (!debugfs_create_x32("fw_id", S_IRUGO, root, &dsp->fw_id))
553 if (!debugfs_create_x32("fw_version", S_IRUGO, root,
554 &dsp->fw_id_version))
557 for (i = 0; i < ARRAY_SIZE(wm_adsp_debugfs_fops); ++i) {
558 if (!debugfs_create_file(wm_adsp_debugfs_fops[i].name,
560 &wm_adsp_debugfs_fops[i].fops))
564 dsp->debugfs_root = root;
568 debugfs_remove_recursive(root);
569 adsp_err(dsp, "Failed to create debugfs\n");
572 static void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
574 wm_adsp_debugfs_clear(dsp);
575 debugfs_remove_recursive(dsp->debugfs_root);
578 static inline void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
579 struct snd_soc_codec *codec)
583 static inline void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
587 static inline void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp,
592 static inline void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp,
597 static inline void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
602 static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol,
603 struct snd_ctl_elem_value *ucontrol)
605 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
606 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
607 struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec);
609 ucontrol->value.integer.value[0] = dsp[e->shift_l].fw;
614 static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol,
615 struct snd_ctl_elem_value *ucontrol)
617 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
618 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
619 struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec);
622 if (ucontrol->value.integer.value[0] == dsp[e->shift_l].fw)
625 if (ucontrol->value.integer.value[0] >= WM_ADSP_NUM_FW)
628 mutex_lock(&dsp[e->shift_l].pwr_lock);
630 if (dsp[e->shift_l].running || dsp[e->shift_l].compr)
633 dsp[e->shift_l].fw = ucontrol->value.integer.value[0];
635 mutex_unlock(&dsp[e->shift_l].pwr_lock);
640 static const struct soc_enum wm_adsp_fw_enum[] = {
641 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
642 SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
643 SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
644 SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
647 const struct snd_kcontrol_new wm_adsp_fw_controls[] = {
648 SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0],
649 wm_adsp_fw_get, wm_adsp_fw_put),
650 SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1],
651 wm_adsp_fw_get, wm_adsp_fw_put),
652 SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2],
653 wm_adsp_fw_get, wm_adsp_fw_put),
654 SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3],
655 wm_adsp_fw_get, wm_adsp_fw_put),
657 EXPORT_SYMBOL_GPL(wm_adsp_fw_controls);
659 static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp,
664 for (i = 0; i < dsp->num_mems; i++)
665 if (dsp->mem[i].type == type)
671 static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *mem,
678 return mem->base + (offset * 3);
680 return mem->base + (offset * 2);
682 return mem->base + (offset * 2);
684 return mem->base + (offset * 2);
686 return mem->base + (offset * 2);
688 WARN(1, "Unknown memory region type");
693 static void wm_adsp2_show_fw_status(struct wm_adsp *dsp)
698 ret = regmap_raw_read(dsp->regmap, dsp->base + ADSP2_SCRATCH0,
699 scratch, sizeof(scratch));
701 adsp_err(dsp, "Failed to read SCRATCH regs: %d\n", ret);
705 adsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n",
706 be16_to_cpu(scratch[0]),
707 be16_to_cpu(scratch[1]),
708 be16_to_cpu(scratch[2]),
709 be16_to_cpu(scratch[3]));
712 static int wm_coeff_info(struct snd_kcontrol *kctl,
713 struct snd_ctl_elem_info *uinfo)
715 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kctl->private_value;
717 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
718 uinfo->count = ctl->len;
722 static int wm_coeff_write_control(struct wm_coeff_ctl *ctl,
723 const void *buf, size_t len)
725 struct wm_adsp_alg_region *alg_region = &ctl->alg_region;
726 const struct wm_adsp_region *mem;
727 struct wm_adsp *dsp = ctl->dsp;
732 mem = wm_adsp_find_region(dsp, alg_region->type);
734 adsp_err(dsp, "No base for region %x\n",
739 reg = ctl->alg_region.base + ctl->offset;
740 reg = wm_adsp_region_to_reg(mem, reg);
742 scratch = kmemdup(buf, ctl->len, GFP_KERNEL | GFP_DMA);
746 ret = regmap_raw_write(dsp->regmap, reg, scratch,
749 adsp_err(dsp, "Failed to write %zu bytes to %x: %d\n",
754 adsp_dbg(dsp, "Wrote %zu bytes to %x\n", ctl->len, reg);
761 static int wm_coeff_put(struct snd_kcontrol *kctl,
762 struct snd_ctl_elem_value *ucontrol)
764 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kctl->private_value;
765 char *p = ucontrol->value.bytes.data;
768 mutex_lock(&ctl->dsp->pwr_lock);
770 memcpy(ctl->cache, p, ctl->len);
774 ret = wm_coeff_write_control(ctl, p, ctl->len);
776 mutex_unlock(&ctl->dsp->pwr_lock);
781 static int wm_coeff_read_control(struct wm_coeff_ctl *ctl,
782 void *buf, size_t len)
784 struct wm_adsp_alg_region *alg_region = &ctl->alg_region;
785 const struct wm_adsp_region *mem;
786 struct wm_adsp *dsp = ctl->dsp;
791 mem = wm_adsp_find_region(dsp, alg_region->type);
793 adsp_err(dsp, "No base for region %x\n",
798 reg = ctl->alg_region.base + ctl->offset;
799 reg = wm_adsp_region_to_reg(mem, reg);
801 scratch = kmalloc(ctl->len, GFP_KERNEL | GFP_DMA);
805 ret = regmap_raw_read(dsp->regmap, reg, scratch, ctl->len);
807 adsp_err(dsp, "Failed to read %zu bytes from %x: %d\n",
812 adsp_dbg(dsp, "Read %zu bytes from %x\n", ctl->len, reg);
814 memcpy(buf, scratch, ctl->len);
820 static int wm_coeff_get(struct snd_kcontrol *kctl,
821 struct snd_ctl_elem_value *ucontrol)
823 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kctl->private_value;
824 char *p = ucontrol->value.bytes.data;
827 mutex_lock(&ctl->dsp->pwr_lock);
829 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) {
831 ret = wm_coeff_read_control(ctl, p, ctl->len);
835 if (!ctl->flags && ctl->enabled)
836 ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len);
838 memcpy(p, ctl->cache, ctl->len);
841 mutex_unlock(&ctl->dsp->pwr_lock);
846 struct wmfw_ctl_work {
848 struct wm_coeff_ctl *ctl;
849 struct work_struct work;
852 static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl)
854 struct snd_kcontrol_new *kcontrol;
857 if (!ctl || !ctl->name)
860 kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL);
863 kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
865 kcontrol->name = ctl->name;
866 kcontrol->info = wm_coeff_info;
867 kcontrol->get = wm_coeff_get;
868 kcontrol->put = wm_coeff_put;
869 kcontrol->private_value = (unsigned long)ctl;
872 if (ctl->flags & WMFW_CTL_FLAG_WRITEABLE)
873 kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
874 if (ctl->flags & WMFW_CTL_FLAG_READABLE)
875 kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_READ;
876 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
877 kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_VOLATILE;
880 ret = snd_soc_add_card_controls(dsp->card,
887 ctl->kcontrol = snd_soc_card_get_kcontrol(dsp->card,
897 static int wm_coeff_init_control_caches(struct wm_adsp *dsp)
899 struct wm_coeff_ctl *ctl;
902 list_for_each_entry(ctl, &dsp->ctl_list, list) {
903 if (!ctl->enabled || ctl->set)
905 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
908 ret = wm_coeff_read_control(ctl,
918 static int wm_coeff_sync_controls(struct wm_adsp *dsp)
920 struct wm_coeff_ctl *ctl;
923 list_for_each_entry(ctl, &dsp->ctl_list, list) {
926 if (ctl->set && !(ctl->flags & WMFW_CTL_FLAG_VOLATILE)) {
927 ret = wm_coeff_write_control(ctl,
938 static void wm_adsp_ctl_work(struct work_struct *work)
940 struct wmfw_ctl_work *ctl_work = container_of(work,
941 struct wmfw_ctl_work,
944 wmfw_add_ctl(ctl_work->dsp, ctl_work->ctl);
948 static int wm_adsp_create_control(struct wm_adsp *dsp,
949 const struct wm_adsp_alg_region *alg_region,
950 unsigned int offset, unsigned int len,
951 const char *subname, unsigned int subname_len,
954 struct wm_coeff_ctl *ctl;
955 struct wmfw_ctl_work *ctl_work;
956 char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
960 if (flags & WMFW_CTL_FLAG_SYS)
963 switch (alg_region->type) {
980 adsp_err(dsp, "Unknown region type: %d\n", alg_region->type);
984 switch (dsp->fw_ver) {
987 snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "DSP%d %s %x",
988 dsp->num, region_name, alg_region->alg);
991 ret = snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
992 "DSP%d%c %.12s %x", dsp->num, *region_name,
993 wm_adsp_fw_text[dsp->fw], alg_region->alg);
995 /* Truncate the subname from the start if it is too long */
997 int avail = SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret - 2;
1000 if (subname_len > avail)
1001 skip = subname_len - avail;
1003 snprintf(name + ret,
1004 SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret, " %.*s",
1005 subname_len - skip, subname + skip);
1010 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1011 if (!strcmp(ctl->name, name)) {
1018 ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
1021 ctl->fw_name = wm_adsp_fw_text[dsp->fw];
1022 ctl->alg_region = *alg_region;
1023 ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL);
1030 ctl->ops.xget = wm_coeff_get;
1031 ctl->ops.xput = wm_coeff_put;
1035 ctl->offset = offset;
1037 adsp_warn(dsp, "Truncating control %s from %d\n",
1042 ctl->cache = kzalloc(ctl->len, GFP_KERNEL);
1048 list_add(&ctl->list, &dsp->ctl_list);
1050 ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL);
1056 ctl_work->dsp = dsp;
1057 ctl_work->ctl = ctl;
1058 INIT_WORK(&ctl_work->work, wm_adsp_ctl_work);
1059 schedule_work(&ctl_work->work);
1073 struct wm_coeff_parsed_alg {
1080 struct wm_coeff_parsed_coeff {
1090 static int wm_coeff_parse_string(int bytes, const u8 **pos, const u8 **str)
1099 length = le16_to_cpu(*((__le16 *)*pos));
1106 *str = *pos + bytes;
1108 *pos += ((length + bytes) + 3) & ~0x03;
1113 static int wm_coeff_parse_int(int bytes, const u8 **pos)
1119 val = le16_to_cpu(*((__le16 *)*pos));
1122 val = le32_to_cpu(*((__le32 *)*pos));
1133 static inline void wm_coeff_parse_alg(struct wm_adsp *dsp, const u8 **data,
1134 struct wm_coeff_parsed_alg *blk)
1136 const struct wmfw_adsp_alg_data *raw;
1138 switch (dsp->fw_ver) {
1141 raw = (const struct wmfw_adsp_alg_data *)*data;
1144 blk->id = le32_to_cpu(raw->id);
1145 blk->name = raw->name;
1146 blk->name_len = strlen(raw->name);
1147 blk->ncoeff = le32_to_cpu(raw->ncoeff);
1150 blk->id = wm_coeff_parse_int(sizeof(raw->id), data);
1151 blk->name_len = wm_coeff_parse_string(sizeof(u8), data,
1153 wm_coeff_parse_string(sizeof(u16), data, NULL);
1154 blk->ncoeff = wm_coeff_parse_int(sizeof(raw->ncoeff), data);
1158 adsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id);
1159 adsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name);
1160 adsp_dbg(dsp, "# of coefficient descriptors: %#x\n", blk->ncoeff);
1163 static inline void wm_coeff_parse_coeff(struct wm_adsp *dsp, const u8 **data,
1164 struct wm_coeff_parsed_coeff *blk)
1166 const struct wmfw_adsp_coeff_data *raw;
1170 switch (dsp->fw_ver) {
1173 raw = (const struct wmfw_adsp_coeff_data *)*data;
1174 *data = *data + sizeof(raw->hdr) + le32_to_cpu(raw->hdr.size);
1176 blk->offset = le16_to_cpu(raw->hdr.offset);
1177 blk->mem_type = le16_to_cpu(raw->hdr.type);
1178 blk->name = raw->name;
1179 blk->name_len = strlen(raw->name);
1180 blk->ctl_type = le16_to_cpu(raw->ctl_type);
1181 blk->flags = le16_to_cpu(raw->flags);
1182 blk->len = le32_to_cpu(raw->len);
1186 blk->offset = wm_coeff_parse_int(sizeof(raw->hdr.offset), &tmp);
1187 blk->mem_type = wm_coeff_parse_int(sizeof(raw->hdr.type), &tmp);
1188 length = wm_coeff_parse_int(sizeof(raw->hdr.size), &tmp);
1189 blk->name_len = wm_coeff_parse_string(sizeof(u8), &tmp,
1191 wm_coeff_parse_string(sizeof(u8), &tmp, NULL);
1192 wm_coeff_parse_string(sizeof(u16), &tmp, NULL);
1193 blk->ctl_type = wm_coeff_parse_int(sizeof(raw->ctl_type), &tmp);
1194 blk->flags = wm_coeff_parse_int(sizeof(raw->flags), &tmp);
1195 blk->len = wm_coeff_parse_int(sizeof(raw->len), &tmp);
1197 *data = *data + sizeof(raw->hdr) + length;
1201 adsp_dbg(dsp, "\tCoefficient type: %#x\n", blk->mem_type);
1202 adsp_dbg(dsp, "\tCoefficient offset: %#x\n", blk->offset);
1203 adsp_dbg(dsp, "\tCoefficient name: %.*s\n", blk->name_len, blk->name);
1204 adsp_dbg(dsp, "\tCoefficient flags: %#x\n", blk->flags);
1205 adsp_dbg(dsp, "\tALSA control type: %#x\n", blk->ctl_type);
1206 adsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len);
1209 static int wm_adsp_parse_coeff(struct wm_adsp *dsp,
1210 const struct wmfw_region *region)
1212 struct wm_adsp_alg_region alg_region = {};
1213 struct wm_coeff_parsed_alg alg_blk;
1214 struct wm_coeff_parsed_coeff coeff_blk;
1215 const u8 *data = region->data;
1218 wm_coeff_parse_alg(dsp, &data, &alg_blk);
1219 for (i = 0; i < alg_blk.ncoeff; i++) {
1220 wm_coeff_parse_coeff(dsp, &data, &coeff_blk);
1222 switch (coeff_blk.ctl_type) {
1223 case SNDRV_CTL_ELEM_TYPE_BYTES:
1226 adsp_err(dsp, "Unknown control type: %d\n",
1227 coeff_blk.ctl_type);
1231 alg_region.type = coeff_blk.mem_type;
1232 alg_region.alg = alg_blk.id;
1234 ret = wm_adsp_create_control(dsp, &alg_region,
1241 adsp_err(dsp, "Failed to create control: %.*s, %d\n",
1242 coeff_blk.name_len, coeff_blk.name, ret);
1248 static int wm_adsp_load(struct wm_adsp *dsp)
1250 LIST_HEAD(buf_list);
1251 const struct firmware *firmware;
1252 struct regmap *regmap = dsp->regmap;
1253 unsigned int pos = 0;
1254 const struct wmfw_header *header;
1255 const struct wmfw_adsp1_sizes *adsp1_sizes;
1256 const struct wmfw_adsp2_sizes *adsp2_sizes;
1257 const struct wmfw_footer *footer;
1258 const struct wmfw_region *region;
1259 const struct wm_adsp_region *mem;
1260 const char *region_name;
1262 struct wm_adsp_buf *buf;
1265 int ret, offset, type, sizes;
1267 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1271 snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.wmfw", dsp->part, dsp->num,
1272 wm_adsp_fw[dsp->fw].file);
1273 file[PAGE_SIZE - 1] = '\0';
1275 ret = request_firmware(&firmware, file, dsp->dev);
1277 adsp_err(dsp, "Failed to request '%s'\n", file);
1282 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1283 if (pos >= firmware->size) {
1284 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1285 file, firmware->size);
1289 header = (void *)&firmware->data[0];
1291 if (memcmp(&header->magic[0], "WMFW", 4) != 0) {
1292 adsp_err(dsp, "%s: invalid magic\n", file);
1296 switch (header->ver) {
1298 adsp_warn(dsp, "%s: Depreciated file format %d\n",
1305 adsp_err(dsp, "%s: unknown file format %d\n",
1310 adsp_info(dsp, "Firmware version: %d\n", header->ver);
1311 dsp->fw_ver = header->ver;
1313 if (header->core != dsp->type) {
1314 adsp_err(dsp, "%s: invalid core %d != %d\n",
1315 file, header->core, dsp->type);
1319 switch (dsp->type) {
1321 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1322 adsp1_sizes = (void *)&(header[1]);
1323 footer = (void *)&(adsp1_sizes[1]);
1324 sizes = sizeof(*adsp1_sizes);
1326 adsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n",
1327 file, le32_to_cpu(adsp1_sizes->dm),
1328 le32_to_cpu(adsp1_sizes->pm),
1329 le32_to_cpu(adsp1_sizes->zm));
1333 pos = sizeof(*header) + sizeof(*adsp2_sizes) + sizeof(*footer);
1334 adsp2_sizes = (void *)&(header[1]);
1335 footer = (void *)&(adsp2_sizes[1]);
1336 sizes = sizeof(*adsp2_sizes);
1338 adsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n",
1339 file, le32_to_cpu(adsp2_sizes->xm),
1340 le32_to_cpu(adsp2_sizes->ym),
1341 le32_to_cpu(adsp2_sizes->pm),
1342 le32_to_cpu(adsp2_sizes->zm));
1346 WARN(1, "Unknown DSP type");
1350 if (le32_to_cpu(header->len) != sizeof(*header) +
1351 sizes + sizeof(*footer)) {
1352 adsp_err(dsp, "%s: unexpected header length %d\n",
1353 file, le32_to_cpu(header->len));
1357 adsp_dbg(dsp, "%s: timestamp %llu\n", file,
1358 le64_to_cpu(footer->timestamp));
1360 while (pos < firmware->size &&
1361 pos - firmware->size > sizeof(*region)) {
1362 region = (void *)&(firmware->data[pos]);
1363 region_name = "Unknown";
1366 offset = le32_to_cpu(region->offset) & 0xffffff;
1367 type = be32_to_cpu(region->type) & 0xff;
1368 mem = wm_adsp_find_region(dsp, type);
1371 case WMFW_NAME_TEXT:
1372 region_name = "Firmware name";
1373 text = kzalloc(le32_to_cpu(region->len) + 1,
1376 case WMFW_ALGORITHM_DATA:
1377 region_name = "Algorithm";
1378 ret = wm_adsp_parse_coeff(dsp, region);
1382 case WMFW_INFO_TEXT:
1383 region_name = "Information";
1384 text = kzalloc(le32_to_cpu(region->len) + 1,
1388 region_name = "Absolute";
1393 reg = wm_adsp_region_to_reg(mem, offset);
1397 reg = wm_adsp_region_to_reg(mem, offset);
1401 reg = wm_adsp_region_to_reg(mem, offset);
1405 reg = wm_adsp_region_to_reg(mem, offset);
1409 reg = wm_adsp_region_to_reg(mem, offset);
1413 "%s.%d: Unknown region type %x at %d(%x)\n",
1414 file, regions, type, pos, pos);
1418 adsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file,
1419 regions, le32_to_cpu(region->len), offset,
1423 memcpy(text, region->data, le32_to_cpu(region->len));
1424 adsp_info(dsp, "%s: %s\n", file, text);
1429 buf = wm_adsp_buf_alloc(region->data,
1430 le32_to_cpu(region->len),
1433 adsp_err(dsp, "Out of memory\n");
1438 ret = regmap_raw_write_async(regmap, reg, buf->buf,
1439 le32_to_cpu(region->len));
1442 "%s.%d: Failed to write %d bytes at %d in %s: %d\n",
1444 le32_to_cpu(region->len), offset,
1450 pos += le32_to_cpu(region->len) + sizeof(*region);
1454 ret = regmap_async_complete(regmap);
1456 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
1460 if (pos > firmware->size)
1461 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
1462 file, regions, pos - firmware->size);
1464 wm_adsp_debugfs_save_wmfwname(dsp, file);
1467 regmap_async_complete(regmap);
1468 wm_adsp_buf_free(&buf_list);
1469 release_firmware(firmware);
1476 static void wm_adsp_ctl_fixup_base(struct wm_adsp *dsp,
1477 const struct wm_adsp_alg_region *alg_region)
1479 struct wm_coeff_ctl *ctl;
1481 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1482 if (ctl->fw_name == wm_adsp_fw_text[dsp->fw] &&
1483 alg_region->alg == ctl->alg_region.alg &&
1484 alg_region->type == ctl->alg_region.type) {
1485 ctl->alg_region.base = alg_region->base;
1490 static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs,
1491 unsigned int pos, unsigned int len)
1498 adsp_err(dsp, "No algorithms\n");
1499 return ERR_PTR(-EINVAL);
1502 if (n_algs > 1024) {
1503 adsp_err(dsp, "Algorithm count %zx excessive\n", n_algs);
1504 return ERR_PTR(-EINVAL);
1507 /* Read the terminator first to validate the length */
1508 ret = regmap_raw_read(dsp->regmap, pos + len, &val, sizeof(val));
1510 adsp_err(dsp, "Failed to read algorithm list end: %d\n",
1512 return ERR_PTR(ret);
1515 if (be32_to_cpu(val) != 0xbedead)
1516 adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbeadead\n",
1517 pos + len, be32_to_cpu(val));
1519 alg = kzalloc(len * 2, GFP_KERNEL | GFP_DMA);
1521 return ERR_PTR(-ENOMEM);
1523 ret = regmap_raw_read(dsp->regmap, pos, alg, len * 2);
1525 adsp_err(dsp, "Failed to read algorithm list: %d\n",
1528 return ERR_PTR(ret);
1534 static struct wm_adsp_alg_region *
1535 wm_adsp_find_alg_region(struct wm_adsp *dsp, int type, unsigned int id)
1537 struct wm_adsp_alg_region *alg_region;
1539 list_for_each_entry(alg_region, &dsp->alg_regions, list) {
1540 if (id == alg_region->alg && type == alg_region->type)
1547 static struct wm_adsp_alg_region *wm_adsp_create_region(struct wm_adsp *dsp,
1548 int type, __be32 id,
1551 struct wm_adsp_alg_region *alg_region;
1553 alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL);
1555 return ERR_PTR(-ENOMEM);
1557 alg_region->type = type;
1558 alg_region->alg = be32_to_cpu(id);
1559 alg_region->base = be32_to_cpu(base);
1561 list_add_tail(&alg_region->list, &dsp->alg_regions);
1563 if (dsp->fw_ver > 0)
1564 wm_adsp_ctl_fixup_base(dsp, alg_region);
1569 static int wm_adsp1_setup_algs(struct wm_adsp *dsp)
1571 struct wmfw_adsp1_id_hdr adsp1_id;
1572 struct wmfw_adsp1_alg_hdr *adsp1_alg;
1573 struct wm_adsp_alg_region *alg_region;
1574 const struct wm_adsp_region *mem;
1575 unsigned int pos, len;
1579 mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM);
1583 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp1_id,
1586 adsp_err(dsp, "Failed to read algorithm info: %d\n",
1591 n_algs = be32_to_cpu(adsp1_id.n_algs);
1592 dsp->fw_id = be32_to_cpu(adsp1_id.fw.id);
1593 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1595 (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16,
1596 (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8,
1597 be32_to_cpu(adsp1_id.fw.ver) & 0xff,
1600 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
1601 adsp1_id.fw.id, adsp1_id.zm);
1602 if (IS_ERR(alg_region))
1603 return PTR_ERR(alg_region);
1605 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
1606 adsp1_id.fw.id, adsp1_id.dm);
1607 if (IS_ERR(alg_region))
1608 return PTR_ERR(alg_region);
1610 pos = sizeof(adsp1_id) / 2;
1611 len = (sizeof(*adsp1_alg) * n_algs) / 2;
1613 adsp1_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len);
1614 if (IS_ERR(adsp1_alg))
1615 return PTR_ERR(adsp1_alg);
1617 for (i = 0; i < n_algs; i++) {
1618 adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n",
1619 i, be32_to_cpu(adsp1_alg[i].alg.id),
1620 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16,
1621 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8,
1622 be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff,
1623 be32_to_cpu(adsp1_alg[i].dm),
1624 be32_to_cpu(adsp1_alg[i].zm));
1626 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
1627 adsp1_alg[i].alg.id,
1629 if (IS_ERR(alg_region)) {
1630 ret = PTR_ERR(alg_region);
1633 if (dsp->fw_ver == 0) {
1634 if (i + 1 < n_algs) {
1635 len = be32_to_cpu(adsp1_alg[i + 1].dm);
1636 len -= be32_to_cpu(adsp1_alg[i].dm);
1638 wm_adsp_create_control(dsp, alg_region, 0,
1641 adsp_warn(dsp, "Missing length info for region DM with ID %x\n",
1642 be32_to_cpu(adsp1_alg[i].alg.id));
1646 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
1647 adsp1_alg[i].alg.id,
1649 if (IS_ERR(alg_region)) {
1650 ret = PTR_ERR(alg_region);
1653 if (dsp->fw_ver == 0) {
1654 if (i + 1 < n_algs) {
1655 len = be32_to_cpu(adsp1_alg[i + 1].zm);
1656 len -= be32_to_cpu(adsp1_alg[i].zm);
1658 wm_adsp_create_control(dsp, alg_region, 0,
1661 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1662 be32_to_cpu(adsp1_alg[i].alg.id));
1672 static int wm_adsp2_setup_algs(struct wm_adsp *dsp)
1674 struct wmfw_adsp2_id_hdr adsp2_id;
1675 struct wmfw_adsp2_alg_hdr *adsp2_alg;
1676 struct wm_adsp_alg_region *alg_region;
1677 const struct wm_adsp_region *mem;
1678 unsigned int pos, len;
1682 mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM);
1686 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp2_id,
1689 adsp_err(dsp, "Failed to read algorithm info: %d\n",
1694 n_algs = be32_to_cpu(adsp2_id.n_algs);
1695 dsp->fw_id = be32_to_cpu(adsp2_id.fw.id);
1696 dsp->fw_id_version = be32_to_cpu(adsp2_id.fw.ver);
1697 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1699 (dsp->fw_id_version & 0xff0000) >> 16,
1700 (dsp->fw_id_version & 0xff00) >> 8,
1701 dsp->fw_id_version & 0xff,
1704 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
1705 adsp2_id.fw.id, adsp2_id.xm);
1706 if (IS_ERR(alg_region))
1707 return PTR_ERR(alg_region);
1709 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
1710 adsp2_id.fw.id, adsp2_id.ym);
1711 if (IS_ERR(alg_region))
1712 return PTR_ERR(alg_region);
1714 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
1715 adsp2_id.fw.id, adsp2_id.zm);
1716 if (IS_ERR(alg_region))
1717 return PTR_ERR(alg_region);
1719 pos = sizeof(adsp2_id) / 2;
1720 len = (sizeof(*adsp2_alg) * n_algs) / 2;
1722 adsp2_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len);
1723 if (IS_ERR(adsp2_alg))
1724 return PTR_ERR(adsp2_alg);
1726 for (i = 0; i < n_algs; i++) {
1728 "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",
1729 i, be32_to_cpu(adsp2_alg[i].alg.id),
1730 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16,
1731 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8,
1732 be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff,
1733 be32_to_cpu(adsp2_alg[i].xm),
1734 be32_to_cpu(adsp2_alg[i].ym),
1735 be32_to_cpu(adsp2_alg[i].zm));
1737 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
1738 adsp2_alg[i].alg.id,
1740 if (IS_ERR(alg_region)) {
1741 ret = PTR_ERR(alg_region);
1744 if (dsp->fw_ver == 0) {
1745 if (i + 1 < n_algs) {
1746 len = be32_to_cpu(adsp2_alg[i + 1].xm);
1747 len -= be32_to_cpu(adsp2_alg[i].xm);
1749 wm_adsp_create_control(dsp, alg_region, 0,
1752 adsp_warn(dsp, "Missing length info for region XM with ID %x\n",
1753 be32_to_cpu(adsp2_alg[i].alg.id));
1757 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
1758 adsp2_alg[i].alg.id,
1760 if (IS_ERR(alg_region)) {
1761 ret = PTR_ERR(alg_region);
1764 if (dsp->fw_ver == 0) {
1765 if (i + 1 < n_algs) {
1766 len = be32_to_cpu(adsp2_alg[i + 1].ym);
1767 len -= be32_to_cpu(adsp2_alg[i].ym);
1769 wm_adsp_create_control(dsp, alg_region, 0,
1772 adsp_warn(dsp, "Missing length info for region YM with ID %x\n",
1773 be32_to_cpu(adsp2_alg[i].alg.id));
1777 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
1778 adsp2_alg[i].alg.id,
1780 if (IS_ERR(alg_region)) {
1781 ret = PTR_ERR(alg_region);
1784 if (dsp->fw_ver == 0) {
1785 if (i + 1 < n_algs) {
1786 len = be32_to_cpu(adsp2_alg[i + 1].zm);
1787 len -= be32_to_cpu(adsp2_alg[i].zm);
1789 wm_adsp_create_control(dsp, alg_region, 0,
1792 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1793 be32_to_cpu(adsp2_alg[i].alg.id));
1803 static int wm_adsp_load_coeff(struct wm_adsp *dsp)
1805 LIST_HEAD(buf_list);
1806 struct regmap *regmap = dsp->regmap;
1807 struct wmfw_coeff_hdr *hdr;
1808 struct wmfw_coeff_item *blk;
1809 const struct firmware *firmware;
1810 const struct wm_adsp_region *mem;
1811 struct wm_adsp_alg_region *alg_region;
1812 const char *region_name;
1813 int ret, pos, blocks, type, offset, reg;
1815 struct wm_adsp_buf *buf;
1817 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1821 snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, dsp->num,
1822 wm_adsp_fw[dsp->fw].file);
1823 file[PAGE_SIZE - 1] = '\0';
1825 ret = request_firmware(&firmware, file, dsp->dev);
1827 adsp_warn(dsp, "Failed to request '%s'\n", file);
1833 if (sizeof(*hdr) >= firmware->size) {
1834 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1835 file, firmware->size);
1839 hdr = (void *)&firmware->data[0];
1840 if (memcmp(hdr->magic, "WMDR", 4) != 0) {
1841 adsp_err(dsp, "%s: invalid magic\n", file);
1845 switch (be32_to_cpu(hdr->rev) & 0xff) {
1849 adsp_err(dsp, "%s: Unsupported coefficient file format %d\n",
1850 file, be32_to_cpu(hdr->rev) & 0xff);
1855 adsp_dbg(dsp, "%s: v%d.%d.%d\n", file,
1856 (le32_to_cpu(hdr->ver) >> 16) & 0xff,
1857 (le32_to_cpu(hdr->ver) >> 8) & 0xff,
1858 le32_to_cpu(hdr->ver) & 0xff);
1860 pos = le32_to_cpu(hdr->len);
1863 while (pos < firmware->size &&
1864 pos - firmware->size > sizeof(*blk)) {
1865 blk = (void *)(&firmware->data[pos]);
1867 type = le16_to_cpu(blk->type);
1868 offset = le16_to_cpu(blk->offset);
1870 adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n",
1871 file, blocks, le32_to_cpu(blk->id),
1872 (le32_to_cpu(blk->ver) >> 16) & 0xff,
1873 (le32_to_cpu(blk->ver) >> 8) & 0xff,
1874 le32_to_cpu(blk->ver) & 0xff);
1875 adsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n",
1876 file, blocks, le32_to_cpu(blk->len), offset, type);
1879 region_name = "Unknown";
1881 case (WMFW_NAME_TEXT << 8):
1882 case (WMFW_INFO_TEXT << 8):
1884 case (WMFW_ABSOLUTE << 8):
1886 * Old files may use this for global
1889 if (le32_to_cpu(blk->id) == dsp->fw_id &&
1891 region_name = "global coefficients";
1892 mem = wm_adsp_find_region(dsp, type);
1894 adsp_err(dsp, "No ZM\n");
1897 reg = wm_adsp_region_to_reg(mem, 0);
1900 region_name = "register";
1909 adsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n",
1910 file, blocks, le32_to_cpu(blk->len),
1911 type, le32_to_cpu(blk->id));
1913 mem = wm_adsp_find_region(dsp, type);
1915 adsp_err(dsp, "No base for region %x\n", type);
1919 alg_region = wm_adsp_find_alg_region(dsp, type,
1920 le32_to_cpu(blk->id));
1922 reg = alg_region->base;
1923 reg = wm_adsp_region_to_reg(mem, reg);
1926 adsp_err(dsp, "No %x for algorithm %x\n",
1927 type, le32_to_cpu(blk->id));
1932 adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n",
1933 file, blocks, type, pos);
1938 buf = wm_adsp_buf_alloc(blk->data,
1939 le32_to_cpu(blk->len),
1942 adsp_err(dsp, "Out of memory\n");
1947 adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n",
1948 file, blocks, le32_to_cpu(blk->len),
1950 ret = regmap_raw_write_async(regmap, reg, buf->buf,
1951 le32_to_cpu(blk->len));
1954 "%s.%d: Failed to write to %x in %s: %d\n",
1955 file, blocks, reg, region_name, ret);
1959 pos += (le32_to_cpu(blk->len) + sizeof(*blk) + 3) & ~0x03;
1963 ret = regmap_async_complete(regmap);
1965 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
1967 if (pos > firmware->size)
1968 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
1969 file, blocks, pos - firmware->size);
1971 wm_adsp_debugfs_save_binname(dsp, file);
1974 regmap_async_complete(regmap);
1975 release_firmware(firmware);
1976 wm_adsp_buf_free(&buf_list);
1982 int wm_adsp1_init(struct wm_adsp *dsp)
1984 INIT_LIST_HEAD(&dsp->alg_regions);
1986 mutex_init(&dsp->pwr_lock);
1990 EXPORT_SYMBOL_GPL(wm_adsp1_init);
1992 int wm_adsp1_event(struct snd_soc_dapm_widget *w,
1993 struct snd_kcontrol *kcontrol,
1996 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1997 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
1998 struct wm_adsp *dsp = &dsps[w->shift];
1999 struct wm_adsp_alg_region *alg_region;
2000 struct wm_coeff_ctl *ctl;
2004 dsp->card = codec->component.card;
2006 mutex_lock(&dsp->pwr_lock);
2009 case SND_SOC_DAPM_POST_PMU:
2010 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2011 ADSP1_SYS_ENA, ADSP1_SYS_ENA);
2014 * For simplicity set the DSP clock rate to be the
2015 * SYSCLK rate rather than making it configurable.
2017 if (dsp->sysclk_reg) {
2018 ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val);
2020 adsp_err(dsp, "Failed to read SYSCLK state: %d\n",
2025 val = (val & dsp->sysclk_mask)
2026 >> dsp->sysclk_shift;
2028 ret = regmap_update_bits(dsp->regmap,
2029 dsp->base + ADSP1_CONTROL_31,
2030 ADSP1_CLK_SEL_MASK, val);
2032 adsp_err(dsp, "Failed to set clock rate: %d\n",
2038 ret = wm_adsp_load(dsp);
2042 ret = wm_adsp1_setup_algs(dsp);
2046 ret = wm_adsp_load_coeff(dsp);
2050 /* Initialize caches for enabled and unset controls */
2051 ret = wm_coeff_init_control_caches(dsp);
2055 /* Sync set controls */
2056 ret = wm_coeff_sync_controls(dsp);
2060 /* Start the core running */
2061 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2062 ADSP1_CORE_ENA | ADSP1_START,
2063 ADSP1_CORE_ENA | ADSP1_START);
2066 case SND_SOC_DAPM_PRE_PMD:
2068 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2069 ADSP1_CORE_ENA | ADSP1_START, 0);
2071 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19,
2072 ADSP1_WDMA_BUFFER_LENGTH_MASK, 0);
2074 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2077 list_for_each_entry(ctl, &dsp->ctl_list, list)
2080 while (!list_empty(&dsp->alg_regions)) {
2081 alg_region = list_first_entry(&dsp->alg_regions,
2082 struct wm_adsp_alg_region,
2084 list_del(&alg_region->list);
2093 mutex_unlock(&dsp->pwr_lock);
2098 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2101 mutex_unlock(&dsp->pwr_lock);
2105 EXPORT_SYMBOL_GPL(wm_adsp1_event);
2107 static int wm_adsp2_ena(struct wm_adsp *dsp)
2112 ret = regmap_update_bits_async(dsp->regmap, dsp->base + ADSP2_CONTROL,
2113 ADSP2_SYS_ENA, ADSP2_SYS_ENA);
2117 /* Wait for the RAM to start, should be near instantaneous */
2118 for (count = 0; count < 10; ++count) {
2119 ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1,
2124 if (val & ADSP2_RAM_RDY)
2130 if (!(val & ADSP2_RAM_RDY)) {
2131 adsp_err(dsp, "Failed to start DSP RAM\n");
2135 adsp_dbg(dsp, "RAM ready after %d polls\n", count);
2140 static void wm_adsp2_boot_work(struct work_struct *work)
2142 struct wm_adsp *dsp = container_of(work,
2147 mutex_lock(&dsp->pwr_lock);
2149 ret = wm_adsp2_ena(dsp);
2153 ret = wm_adsp_load(dsp);
2157 ret = wm_adsp2_setup_algs(dsp);
2161 ret = wm_adsp_load_coeff(dsp);
2165 /* Initialize caches for enabled and unset controls */
2166 ret = wm_coeff_init_control_caches(dsp);
2170 /* Sync set controls */
2171 ret = wm_coeff_sync_controls(dsp);
2175 dsp->running = true;
2177 mutex_unlock(&dsp->pwr_lock);
2182 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2183 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
2185 mutex_unlock(&dsp->pwr_lock);
2188 static void wm_adsp2_set_dspclk(struct wm_adsp *dsp, unsigned int freq)
2192 ret = regmap_update_bits_async(dsp->regmap,
2193 dsp->base + ADSP2_CLOCKING,
2195 freq << ADSP2_CLK_SEL_SHIFT);
2197 adsp_err(dsp, "Failed to set clock rate: %d\n", ret);
2200 int wm_adsp2_early_event(struct snd_soc_dapm_widget *w,
2201 struct snd_kcontrol *kcontrol, int event,
2204 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2205 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2206 struct wm_adsp *dsp = &dsps[w->shift];
2208 dsp->card = codec->component.card;
2211 case SND_SOC_DAPM_PRE_PMU:
2212 wm_adsp2_set_dspclk(dsp, freq);
2213 queue_work(system_unbound_wq, &dsp->boot_work);
2221 EXPORT_SYMBOL_GPL(wm_adsp2_early_event);
2223 int wm_adsp2_event(struct snd_soc_dapm_widget *w,
2224 struct snd_kcontrol *kcontrol, int event)
2226 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2227 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2228 struct wm_adsp *dsp = &dsps[w->shift];
2229 struct wm_adsp_alg_region *alg_region;
2230 struct wm_coeff_ctl *ctl;
2234 case SND_SOC_DAPM_POST_PMU:
2235 flush_work(&dsp->boot_work);
2240 ret = regmap_update_bits(dsp->regmap,
2241 dsp->base + ADSP2_CONTROL,
2242 ADSP2_CORE_ENA | ADSP2_START,
2243 ADSP2_CORE_ENA | ADSP2_START);
2247 if (wm_adsp_fw[dsp->fw].num_caps != 0)
2248 ret = wm_adsp_buffer_init(dsp);
2252 case SND_SOC_DAPM_PRE_PMD:
2253 /* Log firmware state, it can be useful for analysis */
2254 wm_adsp2_show_fw_status(dsp);
2256 mutex_lock(&dsp->pwr_lock);
2258 wm_adsp_debugfs_clear(dsp);
2261 dsp->fw_id_version = 0;
2262 dsp->running = false;
2264 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2265 ADSP2_SYS_ENA | ADSP2_CORE_ENA |
2268 /* Make sure DMAs are quiesced */
2269 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0);
2270 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0);
2271 regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0);
2273 list_for_each_entry(ctl, &dsp->ctl_list, list)
2276 while (!list_empty(&dsp->alg_regions)) {
2277 alg_region = list_first_entry(&dsp->alg_regions,
2278 struct wm_adsp_alg_region,
2280 list_del(&alg_region->list);
2284 if (wm_adsp_fw[dsp->fw].num_caps != 0)
2285 wm_adsp_buffer_free(dsp);
2287 mutex_unlock(&dsp->pwr_lock);
2289 adsp_dbg(dsp, "Shutdown complete\n");
2298 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2299 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
2302 EXPORT_SYMBOL_GPL(wm_adsp2_event);
2304 int wm_adsp2_codec_probe(struct wm_adsp *dsp, struct snd_soc_codec *codec)
2306 wm_adsp2_init_debugfs(dsp, codec);
2308 return snd_soc_add_codec_controls(codec,
2309 &wm_adsp_fw_controls[dsp->num - 1],
2312 EXPORT_SYMBOL_GPL(wm_adsp2_codec_probe);
2314 int wm_adsp2_codec_remove(struct wm_adsp *dsp, struct snd_soc_codec *codec)
2316 wm_adsp2_cleanup_debugfs(dsp);
2320 EXPORT_SYMBOL_GPL(wm_adsp2_codec_remove);
2322 int wm_adsp2_init(struct wm_adsp *dsp)
2327 * Disable the DSP memory by default when in reset for a small
2330 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2333 adsp_err(dsp, "Failed to clear memory retention: %d\n", ret);
2337 INIT_LIST_HEAD(&dsp->alg_regions);
2338 INIT_LIST_HEAD(&dsp->ctl_list);
2339 INIT_WORK(&dsp->boot_work, wm_adsp2_boot_work);
2341 mutex_init(&dsp->pwr_lock);
2345 EXPORT_SYMBOL_GPL(wm_adsp2_init);
2347 int wm_adsp_compr_open(struct wm_adsp *dsp, struct snd_compr_stream *stream)
2349 struct wm_adsp_compr *compr;
2352 mutex_lock(&dsp->pwr_lock);
2354 if (wm_adsp_fw[dsp->fw].num_caps == 0) {
2355 adsp_err(dsp, "Firmware does not support compressed API\n");
2360 if (wm_adsp_fw[dsp->fw].compr_direction != stream->direction) {
2361 adsp_err(dsp, "Firmware does not support stream direction\n");
2367 /* It is expect this limitation will be removed in future */
2368 adsp_err(dsp, "Only a single stream supported per DSP\n");
2373 compr = kzalloc(sizeof(*compr), GFP_KERNEL);
2380 compr->stream = stream;
2384 stream->runtime->private_data = compr;
2387 mutex_unlock(&dsp->pwr_lock);
2391 EXPORT_SYMBOL_GPL(wm_adsp_compr_open);
2393 int wm_adsp_compr_free(struct snd_compr_stream *stream)
2395 struct wm_adsp_compr *compr = stream->runtime->private_data;
2396 struct wm_adsp *dsp = compr->dsp;
2398 mutex_lock(&dsp->pwr_lock);
2402 kfree(compr->raw_buf);
2405 mutex_unlock(&dsp->pwr_lock);
2409 EXPORT_SYMBOL_GPL(wm_adsp_compr_free);
2411 static int wm_adsp_compr_check_params(struct snd_compr_stream *stream,
2412 struct snd_compr_params *params)
2414 struct wm_adsp_compr *compr = stream->runtime->private_data;
2415 struct wm_adsp *dsp = compr->dsp;
2416 const struct wm_adsp_fw_caps *caps;
2417 const struct snd_codec_desc *desc;
2420 if (params->buffer.fragment_size < WM_ADSP_MIN_FRAGMENT_SIZE ||
2421 params->buffer.fragment_size > WM_ADSP_MAX_FRAGMENT_SIZE ||
2422 params->buffer.fragments < WM_ADSP_MIN_FRAGMENTS ||
2423 params->buffer.fragments > WM_ADSP_MAX_FRAGMENTS ||
2424 params->buffer.fragment_size % WM_ADSP_DATA_WORD_SIZE) {
2425 adsp_err(dsp, "Invalid buffer fragsize=%d fragments=%d\n",
2426 params->buffer.fragment_size,
2427 params->buffer.fragments);
2432 for (i = 0; i < wm_adsp_fw[dsp->fw].num_caps; i++) {
2433 caps = &wm_adsp_fw[dsp->fw].caps[i];
2436 if (caps->id != params->codec.id)
2439 if (stream->direction == SND_COMPRESS_PLAYBACK) {
2440 if (desc->max_ch < params->codec.ch_out)
2443 if (desc->max_ch < params->codec.ch_in)
2447 if (!(desc->formats & (1 << params->codec.format)))
2450 for (j = 0; j < desc->num_sample_rates; ++j)
2451 if (desc->sample_rates[j] == params->codec.sample_rate)
2455 adsp_err(dsp, "Invalid params id=%u ch=%u,%u rate=%u fmt=%u\n",
2456 params->codec.id, params->codec.ch_in, params->codec.ch_out,
2457 params->codec.sample_rate, params->codec.format);
2461 static inline unsigned int wm_adsp_compr_frag_words(struct wm_adsp_compr *compr)
2463 return compr->size.fragment_size / WM_ADSP_DATA_WORD_SIZE;
2466 int wm_adsp_compr_set_params(struct snd_compr_stream *stream,
2467 struct snd_compr_params *params)
2469 struct wm_adsp_compr *compr = stream->runtime->private_data;
2473 ret = wm_adsp_compr_check_params(stream, params);
2477 compr->size = params->buffer;
2479 adsp_dbg(compr->dsp, "fragment_size=%d fragments=%d\n",
2480 compr->size.fragment_size, compr->size.fragments);
2482 size = wm_adsp_compr_frag_words(compr) * sizeof(*compr->raw_buf);
2483 compr->raw_buf = kmalloc(size, GFP_DMA | GFP_KERNEL);
2484 if (!compr->raw_buf)
2489 EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params);
2491 int wm_adsp_compr_get_caps(struct snd_compr_stream *stream,
2492 struct snd_compr_caps *caps)
2494 struct wm_adsp_compr *compr = stream->runtime->private_data;
2495 int fw = compr->dsp->fw;
2498 if (wm_adsp_fw[fw].caps) {
2499 for (i = 0; i < wm_adsp_fw[fw].num_caps; i++)
2500 caps->codecs[i] = wm_adsp_fw[fw].caps[i].id;
2502 caps->num_codecs = i;
2503 caps->direction = wm_adsp_fw[fw].compr_direction;
2505 caps->min_fragment_size = WM_ADSP_MIN_FRAGMENT_SIZE;
2506 caps->max_fragment_size = WM_ADSP_MAX_FRAGMENT_SIZE;
2507 caps->min_fragments = WM_ADSP_MIN_FRAGMENTS;
2508 caps->max_fragments = WM_ADSP_MAX_FRAGMENTS;
2513 EXPORT_SYMBOL_GPL(wm_adsp_compr_get_caps);
2515 static int wm_adsp_read_data_block(struct wm_adsp *dsp, int mem_type,
2516 unsigned int mem_addr,
2517 unsigned int num_words, u32 *data)
2519 struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, mem_type);
2520 unsigned int i, reg;
2526 reg = wm_adsp_region_to_reg(mem, mem_addr);
2528 ret = regmap_raw_read(dsp->regmap, reg, data,
2529 sizeof(*data) * num_words);
2533 for (i = 0; i < num_words; ++i)
2534 data[i] = be32_to_cpu(data[i]) & 0x00ffffffu;
2539 static inline int wm_adsp_read_data_word(struct wm_adsp *dsp, int mem_type,
2540 unsigned int mem_addr, u32 *data)
2542 return wm_adsp_read_data_block(dsp, mem_type, mem_addr, 1, data);
2545 static int wm_adsp_write_data_word(struct wm_adsp *dsp, int mem_type,
2546 unsigned int mem_addr, u32 data)
2548 struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, mem_type);
2554 reg = wm_adsp_region_to_reg(mem, mem_addr);
2556 data = cpu_to_be32(data & 0x00ffffffu);
2558 return regmap_raw_write(dsp->regmap, reg, &data, sizeof(data));
2561 static inline int wm_adsp_buffer_read(struct wm_adsp_compr_buf *buf,
2562 unsigned int field_offset, u32 *data)
2564 return wm_adsp_read_data_word(buf->dsp, WMFW_ADSP2_XM,
2565 buf->host_buf_ptr + field_offset, data);
2568 static inline int wm_adsp_buffer_write(struct wm_adsp_compr_buf *buf,
2569 unsigned int field_offset, u32 data)
2571 return wm_adsp_write_data_word(buf->dsp, WMFW_ADSP2_XM,
2572 buf->host_buf_ptr + field_offset, data);
2575 static int wm_adsp_buffer_locate(struct wm_adsp_compr_buf *buf)
2577 struct wm_adsp_alg_region *alg_region;
2578 struct wm_adsp *dsp = buf->dsp;
2579 u32 xmalg, addr, magic;
2582 alg_region = wm_adsp_find_alg_region(dsp, WMFW_ADSP2_XM, dsp->fw_id);
2583 xmalg = sizeof(struct wm_adsp_system_config_xm_hdr) / sizeof(__be32);
2585 addr = alg_region->base + xmalg + ALG_XM_FIELD(magic);
2586 ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr, &magic);
2590 if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC)
2593 addr = alg_region->base + xmalg + ALG_XM_FIELD(host_buf_ptr);
2594 for (i = 0; i < 5; ++i) {
2595 ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr,
2596 &buf->host_buf_ptr);
2600 if (buf->host_buf_ptr)
2603 usleep_range(1000, 2000);
2606 if (!buf->host_buf_ptr)
2609 adsp_dbg(dsp, "host_buf_ptr=%x\n", buf->host_buf_ptr);
2614 static int wm_adsp_buffer_populate(struct wm_adsp_compr_buf *buf)
2616 const struct wm_adsp_fw_caps *caps = wm_adsp_fw[buf->dsp->fw].caps;
2617 struct wm_adsp_buffer_region *region;
2621 for (i = 0; i < caps->num_regions; ++i) {
2622 region = &buf->regions[i];
2624 region->offset = offset;
2625 region->mem_type = caps->region_defs[i].mem_type;
2627 ret = wm_adsp_buffer_read(buf, caps->region_defs[i].base_offset,
2628 ®ion->base_addr);
2632 ret = wm_adsp_buffer_read(buf, caps->region_defs[i].size_offset,
2637 region->cumulative_size = offset;
2640 "region=%d type=%d base=%04x off=%04x size=%04x\n",
2641 i, region->mem_type, region->base_addr,
2642 region->offset, region->cumulative_size);
2648 static int wm_adsp_buffer_init(struct wm_adsp *dsp)
2650 struct wm_adsp_compr_buf *buf;
2653 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
2658 buf->read_index = -1;
2659 buf->irq_count = 0xFFFFFFFF;
2661 ret = wm_adsp_buffer_locate(buf);
2663 adsp_err(dsp, "Failed to acquire host buffer: %d\n", ret);
2667 buf->regions = kcalloc(wm_adsp_fw[dsp->fw].caps->num_regions,
2668 sizeof(*buf->regions), GFP_KERNEL);
2669 if (!buf->regions) {
2674 ret = wm_adsp_buffer_populate(buf);
2676 adsp_err(dsp, "Failed to populate host buffer: %d\n", ret);
2685 kfree(buf->regions);
2691 static int wm_adsp_buffer_free(struct wm_adsp *dsp)
2694 kfree(dsp->buffer->regions);
2703 static inline int wm_adsp_compr_attached(struct wm_adsp_compr *compr)
2705 return compr->buf != NULL;
2708 static int wm_adsp_compr_attach(struct wm_adsp_compr *compr)
2711 * Note this will be more complex once each DSP can support multiple
2714 if (!compr->dsp->buffer)
2717 compr->buf = compr->dsp->buffer;
2722 int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd)
2724 struct wm_adsp_compr *compr = stream->runtime->private_data;
2725 struct wm_adsp *dsp = compr->dsp;
2728 adsp_dbg(dsp, "Trigger: %d\n", cmd);
2730 mutex_lock(&dsp->pwr_lock);
2733 case SNDRV_PCM_TRIGGER_START:
2734 if (wm_adsp_compr_attached(compr))
2737 ret = wm_adsp_compr_attach(compr);
2739 adsp_err(dsp, "Failed to link buffer and stream: %d\n",
2744 /* Trigger the IRQ at one fragment of data */
2745 ret = wm_adsp_buffer_write(compr->buf,
2746 HOST_BUFFER_FIELD(high_water_mark),
2747 wm_adsp_compr_frag_words(compr));
2749 adsp_err(dsp, "Failed to set high water mark: %d\n",
2754 case SNDRV_PCM_TRIGGER_STOP:
2761 mutex_unlock(&dsp->pwr_lock);
2765 EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger);
2767 static inline int wm_adsp_buffer_size(struct wm_adsp_compr_buf *buf)
2769 int last_region = wm_adsp_fw[buf->dsp->fw].caps->num_regions - 1;
2771 return buf->regions[last_region].cumulative_size;
2774 static int wm_adsp_buffer_update_avail(struct wm_adsp_compr_buf *buf)
2776 u32 next_read_index, next_write_index;
2777 int write_index, read_index, avail;
2780 /* Only sync read index if we haven't already read a valid index */
2781 if (buf->read_index < 0) {
2782 ret = wm_adsp_buffer_read(buf,
2783 HOST_BUFFER_FIELD(next_read_index),
2788 read_index = sign_extend32(next_read_index, 23);
2790 if (read_index < 0) {
2791 adsp_dbg(buf->dsp, "Avail check on unstarted stream\n");
2795 buf->read_index = read_index;
2798 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(next_write_index),
2803 write_index = sign_extend32(next_write_index, 23);
2805 avail = write_index - buf->read_index;
2807 avail += wm_adsp_buffer_size(buf);
2809 adsp_dbg(buf->dsp, "readindex=0x%x, writeindex=0x%x, avail=%d\n",
2810 buf->read_index, write_index, avail);
2817 int wm_adsp_compr_handle_irq(struct wm_adsp *dsp)
2819 struct wm_adsp_compr_buf *buf = dsp->buffer;
2820 struct wm_adsp_compr *compr = dsp->compr;
2823 mutex_lock(&dsp->pwr_lock);
2830 adsp_dbg(dsp, "Handling buffer IRQ\n");
2832 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(error), &buf->error);
2834 adsp_err(dsp, "Failed to check buffer error: %d\n", ret);
2837 if (buf->error != 0) {
2838 adsp_err(dsp, "Buffer error occurred: %d\n", buf->error);
2843 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(irq_count),
2846 adsp_err(dsp, "Failed to get irq_count: %d\n", ret);
2850 ret = wm_adsp_buffer_update_avail(buf);
2852 adsp_err(dsp, "Error reading avail: %d\n", ret);
2857 snd_compr_fragment_elapsed(compr->stream);
2860 mutex_unlock(&dsp->pwr_lock);
2864 EXPORT_SYMBOL_GPL(wm_adsp_compr_handle_irq);
2866 static int wm_adsp_buffer_reenable_irq(struct wm_adsp_compr_buf *buf)
2868 if (buf->irq_count & 0x01)
2871 adsp_dbg(buf->dsp, "Enable IRQ(0x%x) for next fragment\n",
2874 buf->irq_count |= 0x01;
2876 return wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(irq_ack),
2880 int wm_adsp_compr_pointer(struct snd_compr_stream *stream,
2881 struct snd_compr_tstamp *tstamp)
2883 struct wm_adsp_compr *compr = stream->runtime->private_data;
2884 struct wm_adsp_compr_buf *buf = compr->buf;
2885 struct wm_adsp *dsp = compr->dsp;
2888 adsp_dbg(dsp, "Pointer request\n");
2890 mutex_lock(&dsp->pwr_lock);
2897 if (compr->buf->error) {
2902 if (buf->avail < wm_adsp_compr_frag_words(compr)) {
2903 ret = wm_adsp_buffer_update_avail(buf);
2905 adsp_err(dsp, "Error reading avail: %d\n", ret);
2910 * If we really have less than 1 fragment available tell the
2911 * DSP to inform us once a whole fragment is available.
2913 if (buf->avail < wm_adsp_compr_frag_words(compr)) {
2914 ret = wm_adsp_buffer_reenable_irq(buf);
2917 "Failed to re-enable buffer IRQ: %d\n",
2924 tstamp->copied_total = compr->copied_total;
2925 tstamp->copied_total += buf->avail * WM_ADSP_DATA_WORD_SIZE;
2928 mutex_unlock(&dsp->pwr_lock);
2932 EXPORT_SYMBOL_GPL(wm_adsp_compr_pointer);
2934 static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target)
2936 struct wm_adsp_compr_buf *buf = compr->buf;
2937 u8 *pack_in = (u8 *)compr->raw_buf;
2938 u8 *pack_out = (u8 *)compr->raw_buf;
2939 unsigned int adsp_addr;
2940 int mem_type, nwords, max_read;
2943 /* Calculate read parameters */
2944 for (i = 0; i < wm_adsp_fw[buf->dsp->fw].caps->num_regions; ++i)
2945 if (buf->read_index < buf->regions[i].cumulative_size)
2948 if (i == wm_adsp_fw[buf->dsp->fw].caps->num_regions)
2951 mem_type = buf->regions[i].mem_type;
2952 adsp_addr = buf->regions[i].base_addr +
2953 (buf->read_index - buf->regions[i].offset);
2955 max_read = wm_adsp_compr_frag_words(compr);
2956 nwords = buf->regions[i].cumulative_size - buf->read_index;
2958 if (nwords > target)
2960 if (nwords > buf->avail)
2961 nwords = buf->avail;
2962 if (nwords > max_read)
2967 /* Read data from DSP */
2968 ret = wm_adsp_read_data_block(buf->dsp, mem_type, adsp_addr,
2969 nwords, compr->raw_buf);
2973 /* Remove the padding bytes from the data read from the DSP */
2974 for (i = 0; i < nwords; i++) {
2975 for (j = 0; j < WM_ADSP_DATA_WORD_SIZE; j++)
2976 *pack_out++ = *pack_in++;
2978 pack_in += sizeof(*(compr->raw_buf)) - WM_ADSP_DATA_WORD_SIZE;
2981 /* update read index to account for words read */
2982 buf->read_index += nwords;
2983 if (buf->read_index == wm_adsp_buffer_size(buf))
2984 buf->read_index = 0;
2986 ret = wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(next_read_index),
2991 /* update avail to account for words read */
2992 buf->avail -= nwords;
2997 static int wm_adsp_compr_read(struct wm_adsp_compr *compr,
2998 char __user *buf, size_t count)
3000 struct wm_adsp *dsp = compr->dsp;
3004 adsp_dbg(dsp, "Requested read of %zu bytes\n", count);
3009 if (compr->buf->error)
3012 count /= WM_ADSP_DATA_WORD_SIZE;
3015 nwords = wm_adsp_buffer_capture_block(compr, count);
3017 adsp_err(dsp, "Failed to capture block: %d\n", nwords);
3021 nbytes = nwords * WM_ADSP_DATA_WORD_SIZE;
3023 adsp_dbg(dsp, "Read %d bytes\n", nbytes);
3025 if (copy_to_user(buf + ntotal, compr->raw_buf, nbytes)) {
3026 adsp_err(dsp, "Failed to copy data to user: %d, %d\n",
3033 } while (nwords > 0 && count > 0);
3035 compr->copied_total += ntotal;
3040 int wm_adsp_compr_copy(struct snd_compr_stream *stream, char __user *buf,
3043 struct wm_adsp_compr *compr = stream->runtime->private_data;
3044 struct wm_adsp *dsp = compr->dsp;
3047 mutex_lock(&dsp->pwr_lock);
3049 if (stream->direction == SND_COMPRESS_CAPTURE)
3050 ret = wm_adsp_compr_read(compr, buf, count);
3054 mutex_unlock(&dsp->pwr_lock);
3058 EXPORT_SYMBOL_GPL(wm_adsp_compr_copy);
3060 MODULE_LICENSE("GPL v2");