sound/soc/samsung/i2s.c

   1 /* sound/soc/samsung/i2s.c
   2  *
   3  * ALSA SoC Audio Layer - Samsung I2S Controller driver
   4  *
   5  * Copyright (c) 2010 Samsung Electronics Co. Ltd.
   6  *      Jaswinder Singh <jassisinghbrar@gmail.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/delay.h>
  14 #include <linux/slab.h>
  15 #include <linux/clk.h>
  16 #include <linux/io.h>
  17 #include <linux/module.h>
  18 #include <linux/of.h>
  19 #include <linux/of_gpio.h>
  20 #include <linux/pm_runtime.h>
  21
  22 #include <sound/soc.h>
  23 #include <sound/pcm_params.h>
  24
  25 #include <linux/platform_data/asoc-s3c.h>
  26
  27 #include "dma.h"
  28 #include "idma.h"
  29 #include "i2s.h"
  30 #include "i2s-regs.h"
  31
  32 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  33
  34 enum samsung_dai_type {
  35         TYPE_PRI,
  36         TYPE_SEC,
  37 };
  38
  39 struct samsung_i2s_variant_regs {
  40         unsigned int    bfs_off;
  41         unsigned int    rfs_off;
  42         unsigned int    sdf_off;
  43         unsigned int    txr_off;
  44         unsigned int    rclksrc_off;
  45         unsigned int    mss_off;
  46         unsigned int    cdclkcon_off;
  47         unsigned int    lrp_off;
  48         unsigned int    bfs_mask;
  49         unsigned int    rfs_mask;
  50         unsigned int    ftx0cnt_off;
  51 };
  52
  53 struct samsung_i2s_dai_data {
  54         int dai_type;
  55         u32 quirks;
  56         const struct samsung_i2s_variant_regs *i2s_variant_regs;
  57 };
  58
  59 struct i2s_dai {
  60         /* Platform device for this DAI */
  61         struct platform_device *pdev;
  62         /* IOREMAP'd SFRs */
  63         void __iomem    *addr;
  64         /* Physical base address of SFRs */
  65         u32     base;
  66         /* Rate of RCLK source clock */
  67         unsigned long rclk_srcrate;
  68         /* Frame Clock */
  69         unsigned frmclk;
  70         /*
  71          * Specifically requested RCLK,BCLK by MACHINE Driver.
  72          * 0 indicates CPU driver is free to choose any value.
  73          */
  74         unsigned rfs, bfs;
  75         /* I2S Controller's core clock */
  76         struct clk *clk;
  77         /* Clock for generating I2S signals */
  78         struct clk *op_clk;
  79         /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
  80         struct i2s_dai *pri_dai;
  81         /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
  82         struct i2s_dai *sec_dai;
  83 #define DAI_OPENED      (1 << 0) /* Dai is opened */
  84 #define DAI_MANAGER     (1 << 1) /* Dai is the manager */
  85         unsigned mode;
  86         /* CDCLK pin direction: 0  - input, 1 - output */
  87         unsigned int cdclk_out:1;
  88         /* Driver for this DAI */
  89         struct snd_soc_dai_driver i2s_dai_drv;
  90         /* DMA parameters */
  91         struct s3c_dma_params dma_playback;
  92         struct s3c_dma_params dma_capture;
  93         struct s3c_dma_params idma_playback;
  94         u32     quirks;
  95         u32     suspend_i2smod;
  96         u32     suspend_i2scon;
  97         u32     suspend_i2spsr;
  98         unsigned long gpios[7]; /* i2s gpio line numbers */
  99         const struct samsung_i2s_variant_regs *variant_regs;
 100 };
 101
 102 /* Lock for cross i/f checks */
 103 static DEFINE_SPINLOCK(lock);
 104
 105 /* If this is the 'overlay' stereo DAI */
 106 static inline bool is_secondary(struct i2s_dai *i2s)
 107 {
 108         return i2s->pri_dai ? true : false;
 109 }
 110
 111 /* If operating in SoC-Slave mode */
 112 static inline bool is_slave(struct i2s_dai *i2s)
 113 {
 114         u32 mod = readl(i2s->addr + I2SMOD);
 115         return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
 116 }
 117
 118 /* If this interface of the controller is transmitting data */
 119 static inline bool tx_active(struct i2s_dai *i2s)
 120 {
 121         u32 active;
 122
 123         if (!i2s)
 124                 return false;
 125
 126         active = readl(i2s->addr + I2SCON);
 127
 128         if (is_secondary(i2s))
 129                 active &= CON_TXSDMA_ACTIVE;
 130         else
 131                 active &= CON_TXDMA_ACTIVE;
 132
 133         return active ? true : false;
 134 }
 135
 136 /* If the other interface of the controller is transmitting data */
 137 static inline bool other_tx_active(struct i2s_dai *i2s)
 138 {
 139         struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
 140
 141         return tx_active(other);
 142 }
 143
 144 /* If any interface of the controller is transmitting data */
 145 static inline bool any_tx_active(struct i2s_dai *i2s)
 146 {
 147         return tx_active(i2s) || other_tx_active(i2s);
 148 }
 149
 150 /* If this interface of the controller is receiving data */
 151 static inline bool rx_active(struct i2s_dai *i2s)
 152 {
 153         u32 active;
 154
 155         if (!i2s)
 156                 return false;
 157
 158         active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
 159
 160         return active ? true : false;
 161 }
 162
 163 /* If the other interface of the controller is receiving data */
 164 static inline bool other_rx_active(struct i2s_dai *i2s)
 165 {
 166         struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
 167
 168         return rx_active(other);
 169 }
 170
 171 /* If any interface of the controller is receiving data */
 172 static inline bool any_rx_active(struct i2s_dai *i2s)
 173 {
 174         return rx_active(i2s) || other_rx_active(i2s);
 175 }
 176
 177 /* If the other DAI is transmitting or receiving data */
 178 static inline bool other_active(struct i2s_dai *i2s)
 179 {
 180         return other_rx_active(i2s) || other_tx_active(i2s);
 181 }
 182
 183 /* If this DAI is transmitting or receiving data */
 184 static inline bool this_active(struct i2s_dai *i2s)
 185 {
 186         return tx_active(i2s) || rx_active(i2s);
 187 }
 188
 189 /* If the controller is active anyway */
 190 static inline bool any_active(struct i2s_dai *i2s)
 191 {
 192         return this_active(i2s) || other_active(i2s);
 193 }
 194
 195 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
 196 {
 197         return snd_soc_dai_get_drvdata(dai);
 198 }
 199
 200 static inline bool is_opened(struct i2s_dai *i2s)
 201 {
 202         if (i2s && (i2s->mode & DAI_OPENED))
 203                 return true;
 204         else
 205                 return false;
 206 }
 207
 208 static inline bool is_manager(struct i2s_dai *i2s)
 209 {
 210         if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
 211                 return true;
 212         else
 213                 return false;
 214 }
 215
 216 /* Read RCLK of I2S (in multiples of LRCLK) */
 217 static inline unsigned get_rfs(struct i2s_dai *i2s)
 218 {
 219         u32 rfs;
 220         rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
 221         rfs &= i2s->variant_regs->rfs_mask;
 222
 223         switch (rfs) {
 224         case 7: return 192;
 225         case 6: return 96;
 226         case 5: return 128;
 227         case 4: return 64;
 228         case 3: return 768;
 229         case 2: return 384;
 230         case 1: return 512;
 231         default: return 256;
 232         }
 233 }
 234
 235 /* Write RCLK of I2S (in multiples of LRCLK) */
 236 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
 237 {
 238         u32 mod = readl(i2s->addr + I2SMOD);
 239         int rfs_shift = i2s->variant_regs->rfs_off;
 240
 241         mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
 242
 243         switch (rfs) {
 244         case 192:
 245                 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
 246                 break;
 247         case 96:
 248                 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
 249                 break;
 250         case 128:
 251                 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
 252                 break;
 253         case 64:
 254                 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
 255                 break;
 256         case 768:
 257                 mod |= (MOD_RCLK_768FS << rfs_shift);
 258                 break;
 259         case 512:
 260                 mod |= (MOD_RCLK_512FS << rfs_shift);
 261                 break;
 262         case 384:
 263                 mod |= (MOD_RCLK_384FS << rfs_shift);
 264                 break;
 265         default:
 266                 mod |= (MOD_RCLK_256FS << rfs_shift);
 267                 break;
 268         }
 269
 270         writel(mod, i2s->addr + I2SMOD);
 271 }
 272
 273 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
 274 static inline unsigned get_bfs(struct i2s_dai *i2s)
 275 {
 276         u32 bfs;
 277         bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
 278         bfs &= i2s->variant_regs->bfs_mask;
 279
 280         switch (bfs) {
 281         case 8: return 256;
 282         case 7: return 192;
 283         case 6: return 128;
 284         case 5: return 96;
 285         case 4: return 64;
 286         case 3: return 24;
 287         case 2: return 16;
 288         case 1: return 48;
 289         default: return 32;
 290         }
 291 }
 292
 293 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
 294 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
 295 {
 296         u32 mod = readl(i2s->addr + I2SMOD);
 297         int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
 298         int bfs_shift = i2s->variant_regs->bfs_off;
 299
 300         /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
 301         if (!tdm && bfs > 48) {
 302                 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
 303                 return;
 304         }
 305
 306         mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
 307
 308         switch (bfs) {
 309         case 48:
 310                 mod |= (MOD_BCLK_48FS << bfs_shift);
 311                 break;
 312         case 32:
 313                 mod |= (MOD_BCLK_32FS << bfs_shift);
 314                 break;
 315         case 24:
 316                 mod |= (MOD_BCLK_24FS << bfs_shift);
 317                 break;
 318         case 16:
 319                 mod |= (MOD_BCLK_16FS << bfs_shift);
 320                 break;
 321         case 64:
 322                 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
 323                 break;
 324         case 96:
 325                 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
 326                 break;
 327         case 128:
 328                 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
 329                 break;
 330         case 192:
 331                 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
 332                 break;
 333         case 256:
 334                 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
 335                 break;
 336         default:
 337                 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
 338                 return;
 339         }
 340
 341         writel(mod, i2s->addr + I2SMOD);
 342 }
 343
 344 /* Sample-Size */
 345 static inline int get_blc(struct i2s_dai *i2s)
 346 {
 347         int blc = readl(i2s->addr + I2SMOD);
 348
 349         blc = (blc >> 13) & 0x3;
 350
 351         switch (blc) {
 352         case 2: return 24;
 353         case 1: return 8;
 354         default: return 16;
 355         }
 356 }
 357
 358 /* TX Channel Control */
 359 static void i2s_txctrl(struct i2s_dai *i2s, int on)
 360 {
 361         void __iomem *addr = i2s->addr;
 362         int txr_off = i2s->variant_regs->txr_off;
 363         u32 con = readl(addr + I2SCON);
 364         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
 365
 366         if (on) {
 367                 con |= CON_ACTIVE;
 368                 con &= ~CON_TXCH_PAUSE;
 369
 370                 if (is_secondary(i2s)) {
 371                         con |= CON_TXSDMA_ACTIVE;
 372                         con &= ~CON_TXSDMA_PAUSE;
 373                 } else {
 374                         con |= CON_TXDMA_ACTIVE;
 375                         con &= ~CON_TXDMA_PAUSE;
 376                 }
 377
 378                 if (any_rx_active(i2s))
 379                         mod |= 2 << txr_off;
 380                 else
 381                         mod |= 0 << txr_off;
 382         } else {
 383                 if (is_secondary(i2s)) {
 384                         con |=  CON_TXSDMA_PAUSE;
 385                         con &= ~CON_TXSDMA_ACTIVE;
 386                 } else {
 387                         con |=  CON_TXDMA_PAUSE;
 388                         con &= ~CON_TXDMA_ACTIVE;
 389                 }
 390
 391                 if (other_tx_active(i2s)) {
 392                         writel(con, addr + I2SCON);
 393                         return;
 394                 }
 395
 396                 con |=  CON_TXCH_PAUSE;
 397
 398                 if (any_rx_active(i2s))
 399                         mod |= 1 << txr_off;
 400                 else
 401                         con &= ~CON_ACTIVE;
 402         }
 403
 404         writel(mod, addr + I2SMOD);
 405         writel(con, addr + I2SCON);
 406 }
 407
 408 /* RX Channel Control */
 409 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
 410 {
 411         void __iomem *addr = i2s->addr;
 412         int txr_off = i2s->variant_regs->txr_off;
 413         u32 con = readl(addr + I2SCON);
 414         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
 415
 416         if (on) {
 417                 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
 418                 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
 419
 420                 if (any_tx_active(i2s))
 421                         mod |= 2 << txr_off;
 422                 else
 423                         mod |= 1 << txr_off;
 424         } else {
 425                 con |=  CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
 426                 con &= ~CON_RXDMA_ACTIVE;
 427
 428                 if (any_tx_active(i2s))
 429                         mod |= 0 << txr_off;
 430                 else
 431                         con &= ~CON_ACTIVE;
 432         }
 433
 434         writel(mod, addr + I2SMOD);
 435         writel(con, addr + I2SCON);
 436 }
 437
 438 /* Flush FIFO of an interface */
 439 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
 440 {
 441         void __iomem *fic;
 442         u32 val;
 443
 444         if (!i2s)
 445                 return;
 446
 447         if (is_secondary(i2s))
 448                 fic = i2s->addr + I2SFICS;
 449         else
 450                 fic = i2s->addr + I2SFIC;
 451
 452         /* Flush the FIFO */
 453         writel(readl(fic) | flush, fic);
 454
 455         /* Be patient */
 456         val = msecs_to_loops(1) / 1000; /* 1 usec */
 457         while (--val)
 458                 cpu_relax();
 459
 460         writel(readl(fic) & ~flush, fic);
 461 }
 462
 463 static int i2s_set_sysclk(struct snd_soc_dai *dai,
 464           int clk_id, unsigned int rfs, int dir)
 465 {
 466         struct i2s_dai *i2s = to_info(dai);
 467         struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
 468         u32 mod = readl(i2s->addr + I2SMOD);
 469         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
 470         unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
 471         unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
 472
 473         switch (clk_id) {
 474         case SAMSUNG_I2S_OPCLK:
 475                 mod &= ~MOD_OPCLK_MASK;
 476                 mod |= dir;
 477                 break;
 478         case SAMSUNG_I2S_CDCLK:
 479                 /* Shouldn't matter in GATING(CLOCK_IN) mode */
 480                 if (dir == SND_SOC_CLOCK_IN)
 481                         rfs = 0;
 482
 483                 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
 484                                 (any_active(i2s) &&
 485                                 (((dir == SND_SOC_CLOCK_IN)
 486                                         && !(mod & cdcon_mask)) ||
 487                                 ((dir == SND_SOC_CLOCK_OUT)
 488                                         && (mod & cdcon_mask))))) {
 489                         dev_err(&i2s->pdev->dev,
 490                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 491                         return -EAGAIN;
 492                 }
 493
 494                 if (dir == SND_SOC_CLOCK_IN)
 495                         mod |= 1 << i2s_regs->cdclkcon_off;
 496                 else
 497                         mod &= ~(1 << i2s_regs->cdclkcon_off);
 498
 499                 i2s->rfs = rfs;
 500                 break;
 501
 502         case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
 503         case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
 504                 if ((i2s->quirks & QUIRK_NO_MUXPSR)
 505                                 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
 506                         clk_id = 0;
 507                 else
 508                         clk_id = 1;
 509
 510                 if (!any_active(i2s)) {
 511                         if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
 512                                 if ((clk_id && !(mod & rsrc_mask)) ||
 513                                         (!clk_id && (mod & rsrc_mask))) {
 514                                         clk_disable_unprepare(i2s->op_clk);
 515                                         clk_put(i2s->op_clk);
 516                                 } else {
 517                                         i2s->rclk_srcrate =
 518                                                 clk_get_rate(i2s->op_clk);
 519                                         return 0;
 520                                 }
 521                         }
 522
 523                         if (clk_id)
 524                                 i2s->op_clk = clk_get(&i2s->pdev->dev,
 525                                                 "i2s_opclk1");
 526                         else
 527                                 i2s->op_clk = clk_get(&i2s->pdev->dev,
 528                                                 "i2s_opclk0");
 529
 530                         if (WARN_ON(IS_ERR(i2s->op_clk)))
 531                                 return PTR_ERR(i2s->op_clk);
 532
 533                         clk_prepare_enable(i2s->op_clk);
 534                         i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
 535
 536                         /* Over-ride the other's */
 537                         if (other) {
 538                                 other->op_clk = i2s->op_clk;
 539                                 other->rclk_srcrate = i2s->rclk_srcrate;
 540                         }
 541                 } else if ((!clk_id && (mod & rsrc_mask))
 542                                 || (clk_id && !(mod & rsrc_mask))) {
 543                         dev_err(&i2s->pdev->dev,
 544                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 545                         return -EAGAIN;
 546                 } else {
 547                         /* Call can't be on the active DAI */
 548                         i2s->op_clk = other->op_clk;
 549                         i2s->rclk_srcrate = other->rclk_srcrate;
 550                         return 0;
 551                 }
 552
 553                 if (clk_id == 0)
 554                         mod &= ~(1 << i2s_regs->rclksrc_off);
 555                 else
 556                         mod |= 1 << i2s_regs->rclksrc_off;
 557
 558                 break;
 559         default:
 560                 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
 561                 return -EINVAL;
 562         }
 563
 564         writel(mod, i2s->addr + I2SMOD);
 565
 566         return 0;
 567 }
 568
 569 static int i2s_set_fmt(struct snd_soc_dai *dai,
 570         unsigned int fmt)
 571 {
 572         struct i2s_dai *i2s = to_info(dai);
 573         u32 mod = readl(i2s->addr + I2SMOD);
 574         int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
 575         u32 tmp = 0;
 576
 577         lrp_shift = i2s->variant_regs->lrp_off;
 578         sdf_shift = i2s->variant_regs->sdf_off;
 579         mod_slave = 1 << i2s->variant_regs->mss_off;
 580
 581         sdf_mask = MOD_SDF_MASK << sdf_shift;
 582         lrp_rlow = MOD_LR_RLOW << lrp_shift;
 583
 584         /* Format is priority */
 585         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 586         case SND_SOC_DAIFMT_RIGHT_J:
 587                 tmp |= lrp_rlow;
 588                 tmp |= (MOD_SDF_MSB << sdf_shift);
 589                 break;
 590         case SND_SOC_DAIFMT_LEFT_J:
 591                 tmp |= lrp_rlow;
 592                 tmp |= (MOD_SDF_LSB << sdf_shift);
 593                 break;
 594         case SND_SOC_DAIFMT_I2S:
 595                 tmp |= (MOD_SDF_IIS << sdf_shift);
 596                 break;
 597         default:
 598                 dev_err(&i2s->pdev->dev, "Format not supported\n");
 599                 return -EINVAL;
 600         }
 601
 602         /*
 603          * INV flag is relative to the FORMAT flag - if set it simply
 604          * flips the polarity specified by the Standard
 605          */
 606         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 607         case SND_SOC_DAIFMT_NB_NF:
 608                 break;
 609         case SND_SOC_DAIFMT_NB_IF:
 610                 if (tmp & lrp_rlow)
 611                         tmp &= ~lrp_rlow;
 612                 else
 613                         tmp |= lrp_rlow;
 614                 break;
 615         default:
 616                 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
 617                 return -EINVAL;
 618         }
 619
 620         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 621         case SND_SOC_DAIFMT_CBM_CFM:
 622                 tmp |= mod_slave;
 623                 break;
 624         case SND_SOC_DAIFMT_CBS_CFS:
 625                 /* Set default source clock in Master mode */
 626                 if (i2s->rclk_srcrate == 0)
 627                         i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
 628                                                         0, SND_SOC_CLOCK_IN);
 629                 break;
 630         default:
 631                 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
 632                 return -EINVAL;
 633         }
 634
 635         /*
 636          * Don't change the I2S mode if any controller is active on this
 637          * channel.
 638          */
 639         if (any_active(i2s) &&
 640                 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
 641                 dev_err(&i2s->pdev->dev,
 642                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 643                 return -EAGAIN;
 644         }
 645
 646         mod &= ~(sdf_mask | lrp_rlow | mod_slave);
 647         mod |= tmp;
 648         writel(mod, i2s->addr + I2SMOD);
 649
 650         return 0;
 651 }
 652
 653 static int i2s_hw_params(struct snd_pcm_substream *substream,
 654         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 655 {
 656         struct i2s_dai *i2s = to_info(dai);
 657         u32 mod = readl(i2s->addr + I2SMOD);
 658
 659         if (!is_secondary(i2s))
 660                 mod &= ~(MOD_DC2_EN | MOD_DC1_EN);
 661
 662         switch (params_channels(params)) {
 663         case 6:
 664                 mod |= MOD_DC2_EN;
 665         case 4:
 666                 mod |= MOD_DC1_EN;
 667                 break;
 668         case 2:
 669                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 670                         i2s->dma_playback.dma_size = 4;
 671                 else
 672                         i2s->dma_capture.dma_size = 4;
 673                 break;
 674         case 1:
 675                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 676                         i2s->dma_playback.dma_size = 2;
 677                 else
 678                         i2s->dma_capture.dma_size = 2;
 679
 680                 break;
 681         default:
 682                 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
 683                                 params_channels(params));
 684                 return -EINVAL;
 685         }
 686
 687         if (is_secondary(i2s))
 688                 mod &= ~MOD_BLCS_MASK;
 689         else
 690                 mod &= ~MOD_BLCP_MASK;
 691
 692         if (is_manager(i2s))
 693                 mod &= ~MOD_BLC_MASK;
 694
 695         switch (params_width(params)) {
 696         case 8:
 697                 if (is_secondary(i2s))
 698                         mod |= MOD_BLCS_8BIT;
 699                 else
 700                         mod |= MOD_BLCP_8BIT;
 701                 if (is_manager(i2s))
 702                         mod |= MOD_BLC_8BIT;
 703                 break;
 704         case 16:
 705                 if (is_secondary(i2s))
 706                         mod |= MOD_BLCS_16BIT;
 707                 else
 708                         mod |= MOD_BLCP_16BIT;
 709                 if (is_manager(i2s))
 710                         mod |= MOD_BLC_16BIT;
 711                 break;
 712         case 24:
 713                 if (is_secondary(i2s))
 714                         mod |= MOD_BLCS_24BIT;
 715                 else
 716                         mod |= MOD_BLCP_24BIT;
 717                 if (is_manager(i2s))
 718                         mod |= MOD_BLC_24BIT;
 719                 break;
 720         default:
 721                 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
 722                                 params_format(params));
 723                 return -EINVAL;
 724         }
 725         writel(mod, i2s->addr + I2SMOD);
 726
 727         samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
 728
 729         i2s->frmclk = params_rate(params);
 730
 731         return 0;
 732 }
 733
 734 /* We set constraints on the substream acc to the version of I2S */
 735 static int i2s_startup(struct snd_pcm_substream *substream,
 736           struct snd_soc_dai *dai)
 737 {
 738         struct i2s_dai *i2s = to_info(dai);
 739         struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
 740         unsigned long flags;
 741
 742         spin_lock_irqsave(&lock, flags);
 743
 744         i2s->mode |= DAI_OPENED;
 745
 746         if (is_manager(other))
 747                 i2s->mode &= ~DAI_MANAGER;
 748         else
 749                 i2s->mode |= DAI_MANAGER;
 750
 751         if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
 752                 writel(CON_RSTCLR, i2s->addr + I2SCON);
 753
 754         spin_unlock_irqrestore(&lock, flags);
 755
 756         if (!is_opened(other) && i2s->cdclk_out)
 757                 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
 758                                 0, SND_SOC_CLOCK_OUT);
 759         return 0;
 760 }
 761
 762 static void i2s_shutdown(struct snd_pcm_substream *substream,
 763         struct snd_soc_dai *dai)
 764 {
 765         struct i2s_dai *i2s = to_info(dai);
 766         struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
 767         unsigned long flags;
 768         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
 769
 770         spin_lock_irqsave(&lock, flags);
 771
 772         i2s->mode &= ~DAI_OPENED;
 773         i2s->mode &= ~DAI_MANAGER;
 774
 775         if (is_opened(other)) {
 776                 other->mode |= DAI_MANAGER;
 777         } else {
 778                 u32 mod = readl(i2s->addr + I2SMOD);
 779                 i2s->cdclk_out = !(mod & (1 << i2s_regs->cdclkcon_off));
 780                 if (other)
 781                         other->cdclk_out = i2s->cdclk_out;
 782         }
 783         /* Reset any constraint on RFS and BFS */
 784         i2s->rfs = 0;
 785         i2s->bfs = 0;
 786
 787         spin_unlock_irqrestore(&lock, flags);
 788
 789         /* Gate CDCLK by default */
 790         if (!is_opened(other))
 791                 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
 792                                 0, SND_SOC_CLOCK_IN);
 793 }
 794
 795 static int config_setup(struct i2s_dai *i2s)
 796 {
 797         struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
 798         unsigned rfs, bfs, blc;
 799         u32 psr;
 800
 801         blc = get_blc(i2s);
 802
 803         bfs = i2s->bfs;
 804
 805         if (!bfs && other)
 806                 bfs = other->bfs;
 807
 808         /* Select least possible multiple(2) if no constraint set */
 809         if (!bfs)
 810                 bfs = blc * 2;
 811
 812         rfs = i2s->rfs;
 813
 814         if (!rfs && other)
 815                 rfs = other->rfs;
 816
 817         if ((rfs == 256 || rfs == 512) && (blc == 24)) {
 818                 dev_err(&i2s->pdev->dev,
 819                         "%d-RFS not supported for 24-blc\n", rfs);
 820                 return -EINVAL;
 821         }
 822
 823         if (!rfs) {
 824                 if (bfs == 16 || bfs == 32)
 825                         rfs = 256;
 826                 else
 827                         rfs = 384;
 828         }
 829
 830         /* If already setup and running */
 831         if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
 832                 dev_err(&i2s->pdev->dev,
 833                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 834                 return -EAGAIN;
 835         }
 836
 837         set_bfs(i2s, bfs);
 838         set_rfs(i2s, rfs);
 839
 840         /* Don't bother with PSR in Slave mode */
 841         if (is_slave(i2s))
 842                 return 0;
 843
 844         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
 845                 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
 846                 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
 847                 dev_dbg(&i2s->pdev->dev,
 848                         "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
 849                                 i2s->rclk_srcrate, psr, rfs, bfs);
 850         }
 851
 852         return 0;
 853 }
 854
 855 static int i2s_trigger(struct snd_pcm_substream *substream,
 856         int cmd, struct snd_soc_dai *dai)
 857 {
 858         int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
 859         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 860         struct i2s_dai *i2s = to_info(rtd->cpu_dai);
 861         unsigned long flags;
 862
 863         switch (cmd) {
 864         case SNDRV_PCM_TRIGGER_START:
 865         case SNDRV_PCM_TRIGGER_RESUME:
 866         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 867                 local_irq_save(flags);
 868
 869                 if (config_setup(i2s)) {
 870                         local_irq_restore(flags);
 871                         return -EINVAL;
 872                 }
 873
 874                 if (capture)
 875                         i2s_rxctrl(i2s, 1);
 876                 else
 877                         i2s_txctrl(i2s, 1);
 878
 879                 local_irq_restore(flags);
 880                 break;
 881         case SNDRV_PCM_TRIGGER_STOP:
 882         case SNDRV_PCM_TRIGGER_SUSPEND:
 883         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 884                 local_irq_save(flags);
 885
 886                 if (capture) {
 887                         i2s_rxctrl(i2s, 0);
 888                         i2s_fifo(i2s, FIC_RXFLUSH);
 889                 } else {
 890                         i2s_txctrl(i2s, 0);
 891                         i2s_fifo(i2s, FIC_TXFLUSH);
 892                 }
 893
 894                 local_irq_restore(flags);
 895                 break;
 896         }
 897
 898         return 0;
 899 }
 900
 901 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
 902         int div_id, int div)
 903 {
 904         struct i2s_dai *i2s = to_info(dai);
 905         struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
 906
 907         switch (div_id) {
 908         case SAMSUNG_I2S_DIV_BCLK:
 909                 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
 910                         || (other && other->bfs && (other->bfs != div))) {
 911                         dev_err(&i2s->pdev->dev,
 912                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
 913                         return -EAGAIN;
 914                 }
 915                 i2s->bfs = div;
 916                 break;
 917         default:
 918                 dev_err(&i2s->pdev->dev,
 919                         "Invalid clock divider(%d)\n", div_id);
 920                 return -EINVAL;
 921         }
 922
 923         return 0;
 924 }
 925
 926 static snd_pcm_sframes_t
 927 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
 928 {
 929         struct i2s_dai *i2s = to_info(dai);
 930         u32 reg = readl(i2s->addr + I2SFIC);
 931         snd_pcm_sframes_t delay;
 932         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
 933
 934         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
 935                 delay = FIC_RXCOUNT(reg);
 936         else if (is_secondary(i2s))
 937                 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
 938         else
 939                 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
 940
 941         return delay;
 942 }
 943
 944 #ifdef CONFIG_PM
 945 static int i2s_suspend(struct snd_soc_dai *dai)
 946 {
 947         struct i2s_dai *i2s = to_info(dai);
 948
 949         i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
 950         i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
 951         i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
 952
 953         return 0;
 954 }
 955
 956 static int i2s_resume(struct snd_soc_dai *dai)
 957 {
 958         struct i2s_dai *i2s = to_info(dai);
 959
 960         writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
 961         writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
 962         writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
 963
 964         return 0;
 965 }
 966 #else
 967 #define i2s_suspend NULL
 968 #define i2s_resume  NULL
 969 #endif
 970
 971 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
 972 {
 973         struct i2s_dai *i2s = to_info(dai);
 974         struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
 975         int ret;
 976
 977         if (other && other->clk) { /* If this is probe on secondary */
 978                 samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback,
 979                                            NULL);
 980                 goto probe_exit;
 981         }
 982
 983         i2s->addr = ioremap(i2s->base, 0x100);
 984         if (i2s->addr == NULL) {
 985                 dev_err(&i2s->pdev->dev, "cannot ioremap registers\n");
 986                 return -ENXIO;
 987         }
 988
 989         i2s->clk = clk_get(&i2s->pdev->dev, "iis");
 990         if (IS_ERR(i2s->clk)) {
 991                 dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n");
 992                 iounmap(i2s->addr);
 993                 return PTR_ERR(i2s->clk);
 994         }
 995
 996         ret = clk_prepare_enable(i2s->clk);
 997         if (ret != 0) {
 998                 dev_err(&i2s->pdev->dev, "failed to enable clock: %d\n", ret);
 999                 return ret;
1000         }
1001
1002         samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
1003
1004         if (other) {
1005                 other->addr = i2s->addr;
1006                 other->clk = i2s->clk;
1007         }
1008
1009         if (i2s->quirks & QUIRK_NEED_RSTCLR)
1010                 writel(CON_RSTCLR, i2s->addr + I2SCON);
1011
1012         if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
1013                 idma_reg_addr_init(i2s->addr,
1014                                         i2s->sec_dai->idma_playback.dma_addr);
1015
1016 probe_exit:
1017         /* Reset any constraint on RFS and BFS */
1018         i2s->rfs = 0;
1019         i2s->bfs = 0;
1020         i2s->rclk_srcrate = 0;
1021         i2s_txctrl(i2s, 0);
1022         i2s_rxctrl(i2s, 0);
1023         i2s_fifo(i2s, FIC_TXFLUSH);
1024         i2s_fifo(other, FIC_TXFLUSH);
1025         i2s_fifo(i2s, FIC_RXFLUSH);
1026
1027         /* Gate CDCLK by default */
1028         if (!is_opened(other))
1029                 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1030                                 0, SND_SOC_CLOCK_IN);
1031
1032         return 0;
1033 }
1034
1035 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1036 {
1037         struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1038         struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
1039
1040         if (!other || !other->clk) {
1041
1042                 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1043                         writel(0, i2s->addr + I2SCON);
1044
1045                 clk_disable_unprepare(i2s->clk);
1046                 clk_put(i2s->clk);
1047
1048                 iounmap(i2s->addr);
1049         }
1050
1051         i2s->clk = NULL;
1052
1053         return 0;
1054 }
1055
1056 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1057         .trigger = i2s_trigger,
1058         .hw_params = i2s_hw_params,
1059         .set_fmt = i2s_set_fmt,
1060         .set_clkdiv = i2s_set_clkdiv,
1061         .set_sysclk = i2s_set_sysclk,
1062         .startup = i2s_startup,
1063         .shutdown = i2s_shutdown,
1064         .delay = i2s_delay,
1065 };
1066
1067 static const struct snd_soc_component_driver samsung_i2s_component = {
1068         .name           = "samsung-i2s",
1069 };
1070
1071 #define SAMSUNG_I2S_RATES       SNDRV_PCM_RATE_8000_96000
1072
1073 #define SAMSUNG_I2S_FMTS        (SNDRV_PCM_FMTBIT_S8 | \
1074                                         SNDRV_PCM_FMTBIT_S16_LE | \
1075                                         SNDRV_PCM_FMTBIT_S24_LE)
1076
1077 static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
1078 {
1079         struct i2s_dai *i2s;
1080         int ret;
1081
1082         i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1083         if (i2s == NULL)
1084                 return NULL;
1085
1086         i2s->pdev = pdev;
1087         i2s->pri_dai = NULL;
1088         i2s->sec_dai = NULL;
1089         i2s->i2s_dai_drv.symmetric_rates = 1;
1090         i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1091         i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1092         i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1093         i2s->i2s_dai_drv.suspend = i2s_suspend;
1094         i2s->i2s_dai_drv.resume = i2s_resume;
1095         i2s->i2s_dai_drv.playback.channels_min = 1;
1096         i2s->i2s_dai_drv.playback.channels_max = 2;
1097         i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
1098         i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1099
1100         if (!sec) {
1101                 i2s->i2s_dai_drv.capture.channels_min = 1;
1102                 i2s->i2s_dai_drv.capture.channels_max = 2;
1103                 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
1104                 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
1105                 dev_set_drvdata(&i2s->pdev->dev, i2s);
1106         } else {        /* Create a new platform_device for Secondary */
1107                 i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1);
1108                 if (!i2s->pdev)
1109                         return NULL;
1110
1111                 i2s->pdev->dev.parent = &pdev->dev;
1112
1113                 platform_set_drvdata(i2s->pdev, i2s);
1114                 ret = platform_device_add(i2s->pdev);
1115                 if (ret < 0)
1116                         return NULL;
1117         }
1118
1119         return i2s;
1120 }
1121
1122 static const struct of_device_id exynos_i2s_match[];
1123
1124 static inline const struct samsung_i2s_dai_data *samsung_i2s_get_driver_data(
1125                                                 struct platform_device *pdev)
1126 {
1127 #ifdef CONFIG_OF
1128         if (pdev->dev.of_node) {
1129                 const struct of_device_id *match;
1130                 match = of_match_node(exynos_i2s_match, pdev->dev.of_node);
1131                 return match->data;
1132         } else
1133 #endif
1134                 return (struct samsung_i2s_dai_data *)
1135                                 platform_get_device_id(pdev)->driver_data;
1136 }
1137
1138 #ifdef CONFIG_PM_RUNTIME
1139 static int i2s_runtime_suspend(struct device *dev)
1140 {
1141         struct i2s_dai *i2s = dev_get_drvdata(dev);
1142
1143         clk_disable_unprepare(i2s->clk);
1144
1145         return 0;
1146 }
1147
1148 static int i2s_runtime_resume(struct device *dev)
1149 {
1150         struct i2s_dai *i2s = dev_get_drvdata(dev);
1151
1152         clk_prepare_enable(i2s->clk);
1153
1154         return 0;
1155 }
1156 #endif /* CONFIG_PM_RUNTIME */
1157
1158 static int samsung_i2s_probe(struct platform_device *pdev)
1159 {
1160         struct i2s_dai *pri_dai, *sec_dai = NULL;
1161         struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1162         struct samsung_i2s *i2s_cfg = NULL;
1163         struct resource *res;
1164         u32 regs_base, quirks = 0, idma_addr = 0;
1165         struct device_node *np = pdev->dev.of_node;
1166         const struct samsung_i2s_dai_data *i2s_dai_data;
1167         int ret = 0;
1168
1169         /* Call during Seconday interface registration */
1170         i2s_dai_data = samsung_i2s_get_driver_data(pdev);
1171
1172         if (i2s_dai_data->dai_type == TYPE_SEC) {
1173                 sec_dai = dev_get_drvdata(&pdev->dev);
1174                 if (!sec_dai) {
1175                         dev_err(&pdev->dev, "Unable to get drvdata\n");
1176                         return -EFAULT;
1177                 }
1178                 devm_snd_soc_register_component(&sec_dai->pdev->dev,
1179                                                 &samsung_i2s_component,
1180                                                 &sec_dai->i2s_dai_drv, 1);
1181                 samsung_asoc_dma_platform_register(&pdev->dev);
1182                 return 0;
1183         }
1184
1185         pri_dai = i2s_alloc_dai(pdev, false);
1186         if (!pri_dai) {
1187                 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1188                 return -ENOMEM;
1189         }
1190
1191         if (!np) {
1192                 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1193                 if (!res) {
1194                         dev_err(&pdev->dev,
1195                                 "Unable to get I2S-TX dma resource\n");
1196                         return -ENXIO;
1197                 }
1198                 pri_dai->dma_playback.channel = res->start;
1199
1200                 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1201                 if (!res) {
1202                         dev_err(&pdev->dev,
1203                                 "Unable to get I2S-RX dma resource\n");
1204                         return -ENXIO;
1205                 }
1206                 pri_dai->dma_capture.channel = res->start;
1207
1208                 if (i2s_pdata == NULL) {
1209                         dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1210                         return -EINVAL;
1211                 }
1212
1213                 if (&i2s_pdata->type)
1214                         i2s_cfg = &i2s_pdata->type.i2s;
1215
1216                 if (i2s_cfg) {
1217                         quirks = i2s_cfg->quirks;
1218                         idma_addr = i2s_cfg->idma_addr;
1219                 }
1220         } else {
1221                 quirks = i2s_dai_data->quirks;
1222                 if (of_property_read_u32(np, "samsung,idma-addr",
1223                                          &idma_addr)) {
1224                         if (quirks & QUIRK_SUPPORTS_IDMA) {
1225                                 dev_info(&pdev->dev, "idma address is not"\
1226                                                 "specified");
1227                         }
1228                 }
1229         }
1230
1231         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1232         if (!res) {
1233                 dev_err(&pdev->dev, "Unable to get I2S SFR address\n");
1234                 return -ENXIO;
1235         }
1236
1237         if (!request_mem_region(res->start, resource_size(res),
1238                                                         "samsung-i2s")) {
1239                 dev_err(&pdev->dev, "Unable to request SFR region\n");
1240                 return -EBUSY;
1241         }
1242         regs_base = res->start;
1243
1244         pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
1245         pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
1246         pri_dai->dma_playback.ch_name = "tx";
1247         pri_dai->dma_capture.ch_name = "rx";
1248         pri_dai->dma_playback.dma_size = 4;
1249         pri_dai->dma_capture.dma_size = 4;
1250         pri_dai->base = regs_base;
1251         pri_dai->quirks = quirks;
1252         pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1253
1254         if (quirks & QUIRK_PRI_6CHAN)
1255                 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1256
1257         if (quirks & QUIRK_SEC_DAI) {
1258                 sec_dai = i2s_alloc_dai(pdev, true);
1259                 if (!sec_dai) {
1260                         dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1261                         ret = -ENOMEM;
1262                         goto err;
1263                 }
1264
1265                 sec_dai->variant_regs = pri_dai->variant_regs;
1266                 sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
1267                 sec_dai->dma_playback.ch_name = "tx-sec";
1268
1269                 if (!np) {
1270                         res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
1271                         if (res)
1272                                 sec_dai->dma_playback.channel = res->start;
1273                 }
1274
1275                 sec_dai->dma_playback.dma_size = 4;
1276                 sec_dai->base = regs_base;
1277                 sec_dai->quirks = quirks;
1278                 sec_dai->idma_playback.dma_addr = idma_addr;
1279                 sec_dai->pri_dai = pri_dai;
1280                 pri_dai->sec_dai = sec_dai;
1281         }
1282
1283         if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1284                 dev_err(&pdev->dev, "Unable to configure gpio\n");
1285                 ret = -EINVAL;
1286                 goto err;
1287         }
1288
1289         devm_snd_soc_register_component(&pri_dai->pdev->dev,
1290                                         &samsung_i2s_component,
1291                                         &pri_dai->i2s_dai_drv, 1);
1292
1293         pm_runtime_enable(&pdev->dev);
1294
1295         samsung_asoc_dma_platform_register(&pdev->dev);
1296
1297         return 0;
1298 err:
1299         if (res)
1300                 release_mem_region(regs_base, resource_size(res));
1301
1302         return ret;
1303 }
1304
1305 static int samsung_i2s_remove(struct platform_device *pdev)
1306 {
1307         struct i2s_dai *i2s, *other;
1308         struct resource *res;
1309
1310         i2s = dev_get_drvdata(&pdev->dev);
1311         other = i2s->pri_dai ? : i2s->sec_dai;
1312
1313         if (other) {
1314                 other->pri_dai = NULL;
1315                 other->sec_dai = NULL;
1316         } else {
1317                 pm_runtime_disable(&pdev->dev);
1318                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1319                 if (res)
1320                         release_mem_region(res->start, resource_size(res));
1321         }
1322
1323         i2s->pri_dai = NULL;
1324         i2s->sec_dai = NULL;
1325
1326         return 0;
1327 }
1328
1329 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1330         .bfs_off = 1,
1331         .rfs_off = 3,
1332         .sdf_off = 5,
1333         .txr_off = 8,
1334         .rclksrc_off = 10,
1335         .mss_off = 11,
1336         .cdclkcon_off = 12,
1337         .lrp_off = 7,
1338         .bfs_mask = 0x3,
1339         .rfs_mask = 0x3,
1340         .ftx0cnt_off = 8,
1341 };
1342
1343 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1344         .bfs_off = 0,
1345         .rfs_off = 4,
1346         .sdf_off = 6,
1347         .txr_off = 8,
1348         .rclksrc_off = 10,
1349         .mss_off = 11,
1350         .cdclkcon_off = 12,
1351         .lrp_off = 15,
1352         .bfs_mask = 0xf,
1353         .rfs_mask = 0x3,
1354         .ftx0cnt_off = 8,
1355 };
1356
1357 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1358         .bfs_off = 0,
1359         .rfs_off = 4,
1360         .sdf_off = 7,
1361         .txr_off = 9,
1362         .rclksrc_off = 11,
1363         .mss_off = 12,
1364         .cdclkcon_off = 22,
1365         .lrp_off = 15,
1366         .bfs_mask = 0xf,
1367         .rfs_mask = 0x7,
1368         .ftx0cnt_off = 0,
1369 };
1370
1371 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1372         .bfs_off = 0,
1373         .rfs_off = 3,
1374         .sdf_off = 6,
1375         .txr_off = 8,
1376         .rclksrc_off = 10,
1377         .mss_off = 11,
1378         .cdclkcon_off = 12,
1379         .lrp_off = 15,
1380         .bfs_mask = 0x7,
1381         .rfs_mask = 0x7,
1382         .ftx0cnt_off = 8,
1383 };
1384
1385 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1386         .dai_type = TYPE_PRI,
1387         .quirks = QUIRK_NO_MUXPSR,
1388         .i2s_variant_regs = &i2sv3_regs,
1389 };
1390
1391 static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1392         .dai_type = TYPE_PRI,
1393         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1394                         QUIRK_SUPPORTS_IDMA,
1395         .i2s_variant_regs = &i2sv3_regs,
1396 };
1397
1398 static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1399         .dai_type = TYPE_PRI,
1400         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1401                         QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1402         .i2s_variant_regs = &i2sv6_regs,
1403 };
1404
1405 static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1406         .dai_type = TYPE_PRI,
1407         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1408                         QUIRK_SUPPORTS_TDM,
1409         .i2s_variant_regs = &i2sv7_regs,
1410 };
1411
1412 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1413         .dai_type = TYPE_PRI,
1414         .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1415         .i2s_variant_regs = &i2sv5_i2s1_regs,
1416 };
1417
1418 static const struct samsung_i2s_dai_data samsung_dai_type_pri = {
1419         .dai_type = TYPE_PRI,
1420 };
1421
1422 static const struct samsung_i2s_dai_data samsung_dai_type_sec = {
1423         .dai_type = TYPE_SEC,
1424 };
1425
1426 static struct platform_device_id samsung_i2s_driver_ids[] = {
1427         {
1428                 .name           = "samsung-i2s",
1429                 .driver_data    = (kernel_ulong_t)&i2sv3_dai_type,
1430         }, {
1431                 .name           = "samsung-i2s-sec",
1432                 .driver_data    = (kernel_ulong_t)&samsung_dai_type_sec,
1433         }, {
1434                 .name           = "samsung-i2sv4",
1435                 .driver_data    = (kernel_ulong_t)&i2sv5_dai_type,
1436         },
1437         {},
1438 };
1439 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1440
1441 #ifdef CONFIG_OF
1442 static const struct of_device_id exynos_i2s_match[] = {
1443         {
1444                 .compatible = "samsung,s3c6410-i2s",
1445                 .data = &i2sv3_dai_type,
1446         }, {
1447                 .compatible = "samsung,s5pv210-i2s",
1448                 .data = &i2sv5_dai_type,
1449         }, {
1450                 .compatible = "samsung,exynos5420-i2s",
1451                 .data = &i2sv6_dai_type,
1452         }, {
1453                 .compatible = "samsung,exynos7-i2s",
1454                 .data = &i2sv7_dai_type,
1455         }, {
1456                 .compatible = "samsung,exynos7-i2s1",
1457                 .data = &i2sv5_dai_type_i2s1,
1458         },
1459         {},
1460 };
1461 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1462 #endif
1463
1464 static const struct dev_pm_ops samsung_i2s_pm = {
1465         SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1466                                 i2s_runtime_resume, NULL)
1467 };
1468
1469 static struct platform_driver samsung_i2s_driver = {
1470         .probe  = samsung_i2s_probe,
1471         .remove = samsung_i2s_remove,
1472         .id_table = samsung_i2s_driver_ids,
1473         .driver = {
1474                 .name = "samsung-i2s",
1475                 .owner = THIS_MODULE,
1476                 .of_match_table = of_match_ptr(exynos_i2s_match),
1477                 .pm = &samsung_i2s_pm,
1478         },
1479 };
1480
1481 module_platform_driver(samsung_i2s_driver);
1482
1483 /* Module information */
1484 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1485 MODULE_DESCRIPTION("Samsung I2S Interface");
1486 MODULE_ALIAS("platform:samsung-i2s");
1487 MODULE_LICENSE("GPL");