cxgb4: advertise support for FR_NSMR_TPTE_WR
authorSteve Wise <swise@opengridcomputing.com>
Fri, 16 Sep 2016 14:54:49 +0000 (07:54 -0700)
committerDoug Ledford <dledford@redhat.com>
Fri, 7 Oct 2016 20:54:40 +0000 (16:54 -0400)
Query firmware for the FW_PARAMS_PARAM_DEV_RI_FR_NSMR_TPTE_WR parameter.
If it exists and is 1, then advertise support for FR_NSMR_TPTE_WR to
the ULDs.

Signed-off-by: Steve Wise <swise@opengridcomputing.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h
drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h

index 6b05289..f6099d0 100644 (file)
@@ -349,6 +349,7 @@ struct adapter_params {
 
        unsigned int max_ordird_qp;       /* Max read depth per RDMA QP */
        unsigned int max_ird_adapter;     /* Max read depth per adapter */
+       bool fr_nsmr_tpte_wr_support;     /* FW support for FR_NSMR_TPTE_WR */
 };
 
 /* State needed to monitor the forward progress of SGE Ingress DMA activities
index 0099a0c..7e858b2 100644 (file)
@@ -2517,6 +2517,7 @@ static void uld_attach(struct adapter *adap, unsigned int uld)
        lli.max_ird_adapter = adap->params.max_ird_adapter;
        lli.ulptx_memwrite_dsgl = adap->params.ulptx_memwrite_dsgl;
        lli.nodeid = dev_to_node(adap->pdev_dev);
+       lli.fr_nsmr_tpte_wr_support = adap->params.fr_nsmr_tpte_wr_support;
 
        handle = ulds[uld].add(&lli);
        if (IS_ERR(handle)) {
@@ -4061,6 +4062,12 @@ static int adap_init0(struct adapter *adap)
                adap->params.ulptx_memwrite_dsgl = (ret == 0 && val[0] != 0);
        }
 
+       /* See if FW supports FW_RI_FR_NSMR_TPTE_WR work request */
+       params[0] = FW_PARAM_DEV(RI_FR_NSMR_TPTE_WR);
+       ret = t4_query_params(adap, adap->mbox, adap->pf, 0,
+                             1, params, val);
+       adap->params.fr_nsmr_tpte_wr_support = (ret == 0 && val[0] != 0);
+
        /*
         * Get device capabilities so we can determine what resources we need
         * to manage.
index ab40372..93b1550 100644 (file)
@@ -280,6 +280,7 @@ struct cxgb4_lld_info {
        unsigned int iscsi_llimit;           /* chip's iscsi region llimit */
        void **iscsi_ppm;                    /* iscsi page pod manager */
        int nodeid;                          /* device numa node id */
+       bool fr_nsmr_tpte_wr_support;        /* FW supports FR_NSMR_TPTE_WR */
 };
 
 struct cxgb4_uld_info {
index d8f4adb..2f014ec 100644 (file)
@@ -1120,6 +1120,7 @@ enum fw_params_param_dev {
        FW_PARAMS_PARAM_DEV_MAXIRD_ADAPTER = 0x14, /* max supported adap IRD */
        FW_PARAMS_PARAM_DEV_ULPTX_MEMWRITE_DSGL = 0x17,
        FW_PARAMS_PARAM_DEV_FWCACHE = 0x18,
+       FW_PARAMS_PARAM_DEV_RI_FR_NSMR_TPTE_WR  = 0x1C,
 };
 
 /*