Merge tag 'ib-mfd-omap-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/lee...
authorTony Lindgren <tony@atomide.com>
Tue, 6 May 2014 20:48:02 +0000 (13:48 -0700)
committerTony Lindgren <tony@atomide.com>
Tue, 6 May 2014 20:48:02 +0000 (13:48 -0700)
Immutable branch between MFD and ARM OMAP due for v3.16 merge-window.

1  2 
drivers/mfd/twl-core.c

diff --combined drivers/mfd/twl-core.c
  #define TWL4030_BASEADD_BACKUP                0x0014
  #define TWL4030_BASEADD_INT           0x002E
  #define TWL4030_BASEADD_PM_MASTER     0x0036
  #define TWL4030_BASEADD_PM_RECEIVER   0x005B
+ #define TWL4030_DCDC_GLOBAL_CFG               0x06
+ #define SMARTREFLEX_ENABLE            BIT(3)
  #define TWL4030_BASEADD_RTC           0x001C
  #define TWL4030_BASEADD_SECURED_REG   0x0000
  
@@@ -282,11 -286,11 +286,11 @@@ static struct reg_default twl4030_49_de
  static bool twl4030_49_nop_reg(struct device *dev, unsigned int reg)
  {
        switch (reg) {
 -      case 0:
 -      case 3:
 -      case 40:
 -      case 41:
 -      case 42:
 +      case 0x00:
 +      case 0x03:
 +      case 0x40:
 +      case 0x41:
 +      case 0x42:
                return false;
        default:
                return true;
@@@ -1204,6 -1208,11 +1208,11 @@@ twl_probe(struct i2c_client *client, co
         * Disable TWL4030/TWL5030 I2C Pull-up on I2C1 and I2C4(SR) interface.
         * Program I2C_SCL_CTRL_PU(bit 0)=0, I2C_SDA_CTRL_PU (bit 2)=0,
         * SR_I2C_SCL_CTRL_PU(bit 4)=0 and SR_I2C_SDA_CTRL_PU(bit 6)=0.
+        *
+        * Also, always enable SmartReflex bit as that's needed for omaps to
+        * to do anything over I2C4 for voltage scaling even if SmartReflex
+        * is disabled. Without the SmartReflex bit omap sys_clkreq idle
+        * signal will never trigger for retention idle.
         */
        if (twl_class_is_4030()) {
                u8 temp;
                temp &= ~(SR_I2C_SDA_CTRL_PU | SR_I2C_SCL_CTRL_PU | \
                        I2C_SDA_CTRL_PU | I2C_SCL_CTRL_PU);
                twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1);
+               twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &temp,
+                               TWL4030_DCDC_GLOBAL_CFG);
+               temp |= SMARTREFLEX_ENABLE;
+               twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, temp,
+                                TWL4030_DCDC_GLOBAL_CFG);
        }
  
        if (node) {