arm64: dts: qcom: Fix broken interrupt trigger settings
authorMarc Zyngier <Marc.Zyngier@arm.com>
Thu, 11 Aug 2016 17:50:50 +0000 (18:50 +0100)
committerAndy Gross <andy.gross@linaro.org>
Wed, 24 Aug 2016 03:57:35 +0000 (22:57 -0500)
When a device uses the GIC as its interrupt controller and generates
SPIs, only the values 1 (edge rising) and 4 (level high) are legal.

Anything else is just plain wrong (can't be programmed into the HW),
and leads to aborted driver probes (USB doesn't work with 4.8-rc1
on a Dragonboard 410C).

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
arch/arm64/boot/dts/qcom/msm8916.dtsi
arch/arm64/boot/dts/qcom/msm8996.dtsi

index 64f85f8..d07b2dd 100644 (file)
                        compatible = "qcom,ci-hdrc";
                        reg = <0x78d9000 0x400>;
                        dr_mode = "peripheral";
-                       interrupts = <GIC_SPI 134 IRQ_TYPE_NONE>;
+                       interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
                        usb-phy = <&usb_otg>;
                        status = "disabled";
                };
                usb_host: ehci@78d9000 {
                        compatible = "qcom,ehci-host";
                        reg = <0x78d9000 0x400>;
-                       interrupts = <GIC_SPI 134 IRQ_TYPE_NONE>;
+                       interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
                        usb-phy = <&usb_otg>;
                        status = "disabled";
                };
                usb_otg: phy@78d9000 {
                        compatible = "qcom,usb-otg-snps";
                        reg = <0x78d9000 0x400>;
-                       interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_BOTH>,
-                                    <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>;
+                       interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
 
                        qcom,vdd-levels = <500000 1000000 1320000>;
                        qcom,phy-init-sequence = <0x44 0x6B 0x24 0x13>;
                              <0x200a000 0x002100>;
                        reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
                        interrupt-names = "periph_irq";
-                       interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
+                       interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
                        qcom,ee = <0>;
                        qcom,channel = <0>;
                        #address-cells = <2>;
index 55ec3e8..69ed6e1 100644 (file)
                              <0x400a000 0x002100>;
                        reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
                        interrupt-names = "periph_irq";
-                       interrupts = <GIC_SPI 326 IRQ_TYPE_NONE>;
+                       interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>;
                        qcom,ee = <0>;
                        qcom,channel = <0>;
                        #address-cells = <2>;