Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier...

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (32 commits)
  Blackfin: gpio: add a debounce stub
  Blackfin: update defconfigs
  Blackfin: remove CONFIG_MEM_GENERIC_BOARD
  Blackfin: dpmc: punt unnecessary RTC_ISTAT clearing
  Blackfin: unify rotary encoder bitmasks
  Blackfin: unify SDH/RSI bitmasks
  Blackfin: BF54x: tweak DMAC MMR naming to match other ports
  Blackfin: TWI: clean up the MMR names
  Blackfin: add EVT_OVERRIDE/IPRIO core MMR helpers
  Blackfin: add support for dynamic ftrace
  Blackfin: add support for LZO compressed kernels
  Blackfin: portmux: fix peripheral map overflow when requesting pins
  Blackfin: document SPI CS limitations with CPHA=0
  Blackfin: remove useless and outdated documentation
  Blackfin: BF51x/BF52x: support GPIO Hysteresis/Schmitt Trigger options
  Blackfin: gpio/portmux: clean up whitespace corruption
  Blackfin: make sure mmiowb inserts a write barrier with SSYNC
  Blackfin: fix DMA/cache bug when resuming from suspend to RAM
  Blackfin: BF51x: fix handling of PH8 (the "internal" SPI0SEL4 pin)
  Blackfin: add a GPIO_DEFAULT_BOOT_SPI_CS
  ...

diff --combined arch/blackfin/Kconfig
index c88fd35,57ee402..5a3152b
--- 1/arch/blackfin/Kconfig
--- 2/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@@ -25,6 -25,8 +25,8 @@@ config BLACKFI
        def_bool y
        select HAVE_ARCH_KGDB
        select HAVE_ARCH_TRACEHOOK
+       select HAVE_DYNAMIC_FTRACE
+       select HAVE_FTRACE_MCOUNT_RECORD
        select HAVE_FUNCTION_GRAPH_TRACER
        select HAVE_FUNCTION_TRACER
        select HAVE_FUNCTION_TRACE_MCOUNT_TEST
@@@ -32,6 -34,7 +34,7 @@@
        select HAVE_KERNEL_GZIP if RAMKERNEL
        select HAVE_KERNEL_BZIP2 if RAMKERNEL
        select HAVE_KERNEL_LZMA if RAMKERNEL
+       select HAVE_KERNEL_LZO if RAMKERNEL
        select HAVE_OPROFILE
        select ARCH_WANT_OPTIONAL_GPIOLIB
  
@@@ -328,11 -331,6 +331,6 @@@ config BF53
        depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
        default y
  
- config MEM_GENERIC_BOARD
-       bool
-       depends on GENERIC_BOARD
-       default y
- 
  config MEM_MT48LC64M4A2FB_7E
        bool
        depends on (BFIN533_STAMP)
@@@ -614,6 -612,9 +612,6 @@@ comment "Kernel Timer/Scheduler
  
  source kernel/Kconfig.hz
  
 -config GENERIC_TIME
 -      def_bool y
 -
  config GENERIC_CLOCKEVENTS
        bool "Generic clock events"
        default y
@@@ -850,6 -851,18 +848,18 @@@ config CPLB_SWITCH_TAB_L
          If enabled, the CPLB Switch Tables are linked
          into L1 data memory. (less latency)
  
+ config CACHE_FLUSH_L1
+       bool "Locate cache flush funcs in L1 Inst Memory"
+       default y
+       help
+         If enabled, the Blackfin cache flushing functions are linked
+         into L1 instruction memory.
+ 
+         Note that this might be required to address anomalies, but
+         these functions are pretty small, so it shouldn't be too bad.
+         If you are using a processor affected by an anomaly, the build
+         system will double check for you and prevent it.
+ 
  config APP_STACK_L1
        bool "Support locating application stack in L1 Scratch Memory"
        default y