ARM: dts: imx6sx-sdb: Add SAI support
authorFabio Estevam <fabio.estevam@nxp.com>
Tue, 12 Apr 2016 05:43:43 +0000 (13:43 +0800)
committerShawn Guo <shawnguo@kernel.org>
Wed, 13 Apr 2016 09:47:58 +0000 (17:47 +0800)
Introduce imx6sx-sdb-sai.dts so that it is possible to use the
SAI interface.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/imx6sx-sdb-sai.dts [new file with mode: 0644]
arch/arm/boot/dts/imx6sx-sdb.dtsi

index eaf82b9..1c92e9d 100644 (file)
@@ -380,6 +380,7 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
        imx6sx-nitrogen6sx.dtb \
        imx6sx-sabreauto.dtb \
        imx6sx-sdb-reva.dtb \
+       imx6sx-sdb-sai.dtb \
        imx6sx-sdb.dtb
 dtb-$(CONFIG_SOC_IMX6UL) += \
        imx6ul-14x14-evk.dtb \
diff --git a/arch/arm/boot/dts/imx6sx-sdb-sai.dts b/arch/arm/boot/dts/imx6sx-sdb-sai.dts
new file mode 100644 (file)
index 0000000..0155450
--- /dev/null
@@ -0,0 +1,67 @@
+/*
+ * Copyright (C) 2016 NXP Semiconductors
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License
+ *     version 2 as published by the Free Software Foundation.
+ *
+ *     This file is distributed in the hope that it will be useful
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "imx6sx-sdb.dts"
+
+/ {
+       sound {
+               audio-cpu = <&sai1>;
+       };
+};
+
+&audmux {
+       /* pin conflict with sai */
+       status = "disabled";
+};
+
+&sai1 {
+       status = "okay";
+};
+
+&sdma {
+       gpr = <&gpr>;
+       /* SDMA event remap for SAI1 */
+       fsl,sdma-event-remap = <0 15 1>, <0 16 1>;
+};
+
+&ssi2 {
+       status = "disabled";
+};
index f1d3730..e5eafe4 100644 (file)
        status = "okay";
 };
 
+&sai1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_sai1>;
+       status = "disabled";
+};
+
 &ssi2 {
        status = "okay";
 };
                        >;
                };
 
+               pinctrl_sai1: sai1grp {
+                       fsl,pins = <
+                               MX6SX_PAD_CSI_DATA00__SAI1_TX_BCLK      0x130b0
+                               MX6SX_PAD_CSI_DATA01__SAI1_TX_SYNC      0x130b0
+                               MX6SX_PAD_CSI_HSYNC__SAI1_TX_DATA_0     0x120b0
+                               MX6SX_PAD_CSI_VSYNC__SAI1_RX_DATA_0     0x130b0
+                               MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK       0x130b0
+                       >;
+               };
+
                pinctrl_uart1: uart1grp {
                        fsl,pins = <
                                MX6SX_PAD_GPIO1_IO04__UART1_TX          0x1b0b1