mfd: rk808: Add register caching
authorDoug Anderson <dianders@chromium.org>
Tue, 9 Sep 2014 23:06:04 +0000 (16:06 -0700)
committerLee Jones <lee.jones@linaro.org>
Fri, 26 Sep 2014 07:23:56 +0000 (08:23 +0100)
Let's define the voltatile registers (those that can't be cached) and
enable caching.  The rk808 is accessed almost constantly with cpufreq
so this is really nice.

As measured by ftrace:
  before this change: cpu0_set_target() => ~2200us
  after this change:  cpu0_set_target() =>  ~500us

Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
drivers/mfd/rk808.c

index 0324422..bd02150 100644 (file)
@@ -29,10 +29,40 @@ struct rk808_reg_data {
        int value;
 };
 
+static bool rk808_is_volatile_reg(struct device *dev, unsigned int reg)
+{
+       /*
+        * Notes:
+        * - Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but
+        *   we don't use that feature.  It's better to cache.
+        * - It's unlikely we care that RK808_DEVCTRL_REG is volatile since
+        *   bits are cleared in case when we shutoff anyway, but better safe.
+        */
+
+       switch (reg) {
+       case RK808_SECONDS_REG ... RK808_WEEKS_REG:
+       case RK808_RTC_STATUS_REG:
+       case RK808_VB_MON_REG:
+       case RK808_THERMAL_REG:
+       case RK808_DCDC_UV_STS_REG:
+       case RK808_LDO_UV_STS_REG:
+       case RK808_DCDC_PG_REG:
+       case RK808_LDO_PG_REG:
+       case RK808_DEVCTRL_REG:
+       case RK808_INT_STS_REG1:
+       case RK808_INT_STS_REG2:
+               return true;
+       }
+
+       return false;
+}
+
 static const struct regmap_config rk808_regmap_config = {
        .reg_bits = 8,
        .val_bits = 8,
        .max_register = RK808_IO_POL_REG,
+       .cache_type = REGCACHE_RBTREE,
+       .volatile_reg = rk808_is_volatile_reg,
 };
 
 static struct resource rtc_resources[] = {