ARM: dts: vexpress: fix node name unit-address presence warnings
authorSudeep Holla <sudeep.holla@arm.com>
Mon, 7 Mar 2016 11:54:45 +0000 (11:54 +0000)
committerSudeep Holla <sudeep.holla@arm.com>
Mon, 25 Apr 2016 10:01:13 +0000 (11:01 +0100)
Commit b993734718c0 ("scripts/dtc: Update to upstream version 53bf130b1cdd")
added warnings on node name unit-address presence/absence mismatch in
the device trees.

This patch fixes those warning on all the vexpress platforms where
unit-address is present in node name while the reg/ranges property is
not present.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
arch/arm/boot/dts/vexpress-v2m.dtsi
arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
arch/arm/boot/dts/vexpress-v2p-ca5s.dts
arch/arm/boot/dts/vexpress-v2p-ca9.dts

index 7a556b9..3086efa 100644 (file)
                                compatible = "arm,vexpress-sysreg";
                                reg = <0x010000 0x1000>;
 
-                               v2m_led_gpios: sys_led@08 {
+                               v2m_led_gpios: sys_led {
                                        compatible = "arm,vexpress-sysreg,sys_led";
                                        gpio-controller;
                                        #gpio-cells = <2>;
                                };
 
-                               v2m_mmc_gpios: sys_mci@48 {
+                               v2m_mmc_gpios: sys_mci {
                                        compatible = "arm,vexpress-sysreg,sys_mci";
                                        gpio-controller;
                                        #gpio-cells = <2>;
                                };
 
-                               v2m_flash_gpios: sys_flash@4c {
+                               v2m_flash_gpios: sys_flash {
                                        compatible = "arm,vexpress-sysreg,sys_flash";
                                        gpio-controller;
                                        #gpio-cells = <2>;
                        };
                };
 
-               v2m_fixed_3v3: fixedregulator@0 {
+               v2m_fixed_3v3: fixed-regulator-0 {
                        compatible = "regulator-fixed";
                        regulator-name = "3V3";
                        regulator-min-microvolt = <3300000>;
                leds {
                        compatible = "gpio-leds";
 
-                       user@1 {
+                       user1 {
                                label = "v2m:green:user1";
                                gpios = <&v2m_led_gpios 0 0>;
                                linux,default-trigger = "heartbeat";
                        };
 
-                       user@2 {
+                       user2 {
                                label = "v2m:green:user2";
                                gpios = <&v2m_led_gpios 1 0>;
                                linux,default-trigger = "mmc0";
                        };
 
-                       user@3 {
+                       user3 {
                                label = "v2m:green:user3";
                                gpios = <&v2m_led_gpios 2 0>;
                                linux,default-trigger = "cpu0";
                        };
 
-                       user@4 {
+                       user4 {
                                label = "v2m:green:user4";
                                gpios = <&v2m_led_gpios 3 0>;
                                linux,default-trigger = "cpu1";
                        };
 
-                       user@5 {
+                       user5 {
                                label = "v2m:green:user5";
                                gpios = <&v2m_led_gpios 4 0>;
                                linux,default-trigger = "cpu2";
                        };
 
-                       user@6 {
+                       user6 {
                                label = "v2m:green:user6";
                                gpios = <&v2m_led_gpios 5 0>;
                                linux,default-trigger = "cpu3";
                        };
 
-                       user@7 {
+                       user7 {
                                label = "v2m:green:user7";
                                gpios = <&v2m_led_gpios 6 0>;
                                linux,default-trigger = "cpu4";
                        };
 
-                       user@8 {
+                       user8 {
                                label = "v2m:green:user8";
                                gpios = <&v2m_led_gpios 7 0>;
                                linux,default-trigger = "cpu5";
                        compatible = "arm,vexpress,config-bus";
                        arm,vexpress,config-bridge = <&v2m_sysreg>;
 
-                       osc@0 {
+                       oscclk0 {
                                /* MCC static memory clock */
                                compatible = "arm,vexpress-osc";
                                arm,vexpress-sysreg,func = <1 0>;
                                clock-output-names = "v2m:oscclk0";
                        };
 
-                       v2m_oscclk1: osc@1 {
+                       v2m_oscclk1: oscclk1 {
                                /* CLCD clock */
                                compatible = "arm,vexpress-osc";
                                arm,vexpress-sysreg,func = <1 1>;
                                clock-output-names = "v2m:oscclk1";
                        };
 
-                       v2m_oscclk2: osc@2 {
+                       v2m_oscclk2: oscclk2 {
                                /* IO FPGA peripheral clock */
                                compatible = "arm,vexpress-osc";
                                arm,vexpress-sysreg,func = <1 2>;
                                clock-output-names = "v2m:oscclk2";
                        };
 
-                       volt@0 {
+                       volt-vio {
                                /* Logic level voltage */
                                compatible = "arm,vexpress-volt";
                                arm,vexpress-sysreg,func = <2 0>;
                                label = "VIO";
                        };
 
-                       temp@0 {
+                       temp-mcc {
                                /* MCC internal operating temperature */
                                compatible = "arm,vexpress-temp";
                                arm,vexpress-sysreg,func = <4 0>;
                                label = "MCC";
                        };
 
-                       reset@0 {
+                       reset {
                                compatible = "arm,vexpress-reset";
                                arm,vexpress-sysreg,func = <5 0>;
                        };
 
-                       muxfpga@0 {
+                       muxfpga {
                                compatible = "arm,vexpress-muxfpga";
                                arm,vexpress-sysreg,func = <7 0>;
                        };
 
-                       shutdown@0 {
+                       shutdown {
                                compatible = "arm,vexpress-shutdown";
                                arm,vexpress-sysreg,func = <8 0>;
                        };
 
-                       reboot@0 {
+                       reboot {
                                compatible = "arm,vexpress-reboot";
                                arm,vexpress-sysreg,func = <9 0>;
                        };
 
-                       dvimode@0 {
+                       dvimode {
                                compatible = "arm,vexpress-dvimode";
                                arm,vexpress-sysreg,func = <11 0>;
                        };
index 47e4a11..c6393d3 100644 (file)
                                compatible = "arm,vexpress-sysreg";
                                reg = <0x00000 0x1000>;
 
-                               v2m_led_gpios: sys_led@08 {
+                               v2m_led_gpios: sys_led {
                                        compatible = "arm,vexpress-sysreg,sys_led";
                                        gpio-controller;
                                        #gpio-cells = <2>;
                                };
 
-                               v2m_mmc_gpios: sys_mci@48 {
+                               v2m_mmc_gpios: sys_mci {
                                        compatible = "arm,vexpress-sysreg,sys_mci";
                                        gpio-controller;
                                        #gpio-cells = <2>;
                                };
 
-                               v2m_flash_gpios: sys_flash@4c {
+                               v2m_flash_gpios: sys_flash {
                                        compatible = "arm,vexpress-sysreg,sys_flash";
                                        gpio-controller;
                                        #gpio-cells = <2>;
                        };
                };
 
-               v2m_fixed_3v3: fixedregulator@0 {
+               v2m_fixed_3v3: fixed-regulator-0 {
                        compatible = "regulator-fixed";
                        regulator-name = "3V3";
                        regulator-min-microvolt = <3300000>;
                leds {
                        compatible = "gpio-leds";
 
-                       user@1 {
+                       user1 {
                                label = "v2m:green:user1";
                                gpios = <&v2m_led_gpios 0 0>;
                                linux,default-trigger = "heartbeat";
                        };
 
-                       user@2 {
+                       user2 {
                                label = "v2m:green:user2";
                                gpios = <&v2m_led_gpios 1 0>;
                                linux,default-trigger = "mmc0";
                        };
 
-                       user@3 {
+                       user3 {
                                label = "v2m:green:user3";
                                gpios = <&v2m_led_gpios 2 0>;
                                linux,default-trigger = "cpu0";
                        };
 
-                       user@4 {
+                       user4 {
                                label = "v2m:green:user4";
                                gpios = <&v2m_led_gpios 3 0>;
                                linux,default-trigger = "cpu1";
                        };
 
-                       user@5 {
+                       user5 {
                                label = "v2m:green:user5";
                                gpios = <&v2m_led_gpios 4 0>;
                                linux,default-trigger = "cpu2";
                        };
 
-                       user@6 {
+                       user6 {
                                label = "v2m:green:user6";
                                gpios = <&v2m_led_gpios 5 0>;
                                linux,default-trigger = "cpu3";
                        };
 
-                       user@7 {
+                       user7 {
                                label = "v2m:green:user7";
                                gpios = <&v2m_led_gpios 6 0>;
                                linux,default-trigger = "cpu4";
                        };
 
-                       user@8 {
+                       user8 {
                                label = "v2m:green:user8";
                                gpios = <&v2m_led_gpios 7 0>;
                                linux,default-trigger = "cpu5";
                        compatible = "arm,vexpress,config-bus";
                        arm,vexpress,config-bridge = <&v2m_sysreg>;
 
-                       osc@0 {
+                       oscclk0 {
                                /* MCC static memory clock */
                                compatible = "arm,vexpress-osc";
                                arm,vexpress-sysreg,func = <1 0>;
                                clock-output-names = "v2m:oscclk0";
                        };
 
-                       v2m_oscclk1: osc@1 {
+                       v2m_oscclk1: oscclk1 {
                                /* CLCD clock */
                                compatible = "arm,vexpress-osc";
                                arm,vexpress-sysreg,func = <1 1>;
                                clock-output-names = "v2m:oscclk1";
                        };
 
-                       v2m_oscclk2: osc@2 {
+                       v2m_oscclk2: oscclk2 {
                                /* IO FPGA peripheral clock */
                                compatible = "arm,vexpress-osc";
                                arm,vexpress-sysreg,func = <1 2>;
                                clock-output-names = "v2m:oscclk2";
                        };
 
-                       volt@0 {
+                       volt-vio {
                                /* Logic level voltage */
                                compatible = "arm,vexpress-volt";
                                arm,vexpress-sysreg,func = <2 0>;
                                label = "VIO";
                        };
 
-                       temp@0 {
+                       temp-mcc {
                                /* MCC internal operating temperature */
                                compatible = "arm,vexpress-temp";
                                arm,vexpress-sysreg,func = <4 0>;
                                label = "MCC";
                        };
 
-                       reset@0 {
+                       reset {
                                compatible = "arm,vexpress-reset";
                                arm,vexpress-sysreg,func = <5 0>;
                        };
 
-                       muxfpga@0 {
+                       muxfpga {
                                compatible = "arm,vexpress-muxfpga";
                                arm,vexpress-sysreg,func = <7 0>;
                        };
 
-                       shutdown@0 {
+                       shutdown {
                                compatible = "arm,vexpress-shutdown";
                                arm,vexpress-sysreg,func = <8 0>;
                        };
 
-                       reboot@0 {
+                       reboot {
                                compatible = "arm,vexpress-reboot";
                                arm,vexpress-sysreg,func = <9 0>;
                        };
 
-                       dvimode@0 {
+                       dvimode {
                                compatible = "arm,vexpress-dvimode";
                                arm,vexpress-sysreg,func = <11 0>;
                        };
index 9420053..50af177 100644 (file)
                compatible = "arm,hdlcd";
                reg = <0 0x2b000000 0 0x1000>;
                interrupts = <0 85 4>;
-               clocks = <&oscclk5>;
+               clocks = <&hdlcd_clk>;
                clock-names = "pxlclk";
        };
 
        memory-controller@2b0a0000 {
                compatible = "arm,pl341", "arm,primecell";
                reg = <0 0x2b0a0000 0 0x1000>;
-               clocks = <&oscclk7>;
+               clocks = <&sys_pll>;
                clock-names = "apb_pclk";
        };
 
@@ -71,7 +71,7 @@
                status = "disabled";
                reg = <0 0x2b060000 0 0x1000>;
                interrupts = <0 98 4>;
-               clocks = <&oscclk7>;
+               clocks = <&sys_pll>;
                clock-names = "apb_pclk";
        };
 
@@ -92,7 +92,7 @@
                reg = <0 0x7ffd0000 0 0x1000>;
                interrupts = <0 86 4>,
                             <0 87 4>;
-               clocks = <&oscclk7>;
+               clocks = <&sys_pll>;
                clock-names = "apb_pclk";
        };
 
                             <0 89 4>,
                             <0 90 4>,
                             <0 91 4>;
-               clocks = <&oscclk7>;
+               clocks = <&sys_pll>;
                clock-names = "apb_pclk";
        };
 
                compatible = "arm,vexpress,config-bus";
                arm,vexpress,config-bridge = <&v2m_sysreg>;
 
-               osc@0 {
+               oscclk0 {
                        /* CPU PLL reference clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 0>;
                        clock-output-names = "oscclk0";
                };
 
-               osc@4 {
+               oscclk4 {
                        /* Multiplexed AXI master clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 4>;
                        clock-output-names = "oscclk4";
                };
 
-               oscclk5: osc@5 {
+               hdlcd_clk: oscclk5 {
                        /* HDLCD PLL reference clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 5>;
                        clock-output-names = "oscclk5";
                };
 
-               smbclk: osc@6 {
+               smbclk: oscclk6 {
                        /* SMB clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 6>;
                        clock-output-names = "oscclk6";
                };
 
-               oscclk7: osc@7 {
+               sys_pll: oscclk7 {
                        /* SYS PLL reference clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 7>;
                        clock-output-names = "oscclk7";
                };
 
-               osc@8 {
+               oscclk8 {
                        /* DDR2 PLL reference clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 8>;
                        clock-output-names = "oscclk8";
                };
 
-               volt@0 {
+               volt-cores {
                        /* CPU core voltage */
                        compatible = "arm,vexpress-volt";
                        arm,vexpress-sysreg,func = <2 0>;
                        label = "Cores";
                };
 
-               amp@0 {
+               amp-cores {
                        /* Total current for the two cores */
                        compatible = "arm,vexpress-amp";
                        arm,vexpress-sysreg,func = <3 0>;
                        label = "Cores";
                };
 
-               temp@0 {
+               temp-dcc {
                        /* DCC internal temperature */
                        compatible = "arm,vexpress-temp";
                        arm,vexpress-sysreg,func = <4 0>;
                        label = "DCC";
                };
 
-               power@0 {
+               power-cores {
                        /* Total power */
                        compatible = "arm,vexpress-power";
                        arm,vexpress-sysreg,func = <12 0>;
                        label = "Cores";
                };
 
-               energy@0 {
+               energy {
                        /* Total energy */
                        compatible = "arm,vexpress-energy";
                        arm,vexpress-sysreg,func = <13 0>;
                };
        };
 
-       smb {
+       smb@08000000 {
                compatible = "simple-bus";
 
                #address-cells = <2>;
index 17f63f7..41690b9 100644 (file)
                compatible = "arm,hdlcd";
                reg = <0 0x2b000000 0 0x1000>;
                interrupts = <0 85 4>;
-               clocks = <&oscclk5>;
+               clocks = <&hdlcd_clk>;
                clock-names = "pxlclk";
        };
 
                compatible = "arm,vexpress,config-bus";
                arm,vexpress,config-bridge = <&v2m_sysreg>;
 
-               osc@0 {
+               oscclk0 {
                        /* A15 PLL 0 reference clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 0>;
                        clock-output-names = "oscclk0";
                };
 
-               osc@1 {
+               oscclk1 {
                        /* A15 PLL 1 reference clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 1>;
                        clock-output-names = "oscclk1";
                };
 
-               osc@2 {
+               oscclk2 {
                        /* A7 PLL 0 reference clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 2>;
                        clock-output-names = "oscclk2";
                };
 
-               osc@3 {
+               oscclk3 {
                        /* A7 PLL 1 reference clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 3>;
                        clock-output-names = "oscclk3";
                };
 
-               osc@4 {
+               oscclk4 {
                        /* External AXI master clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 4>;
                        clock-output-names = "oscclk4";
                };
 
-               oscclk5: osc@5 {
+               hdlcd_clk: oscclk5 {
                        /* HDLCD PLL reference clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 5>;
                        clock-output-names = "oscclk5";
                };
 
-               smbclk: osc@6 {
+               smbclk: oscclk6 {
                        /* Static memory controller clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 6>;
                        clock-output-names = "oscclk6";
                };
 
-               osc@7 {
+               oscclk7 {
                        /* SYS PLL reference clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 7>;
                        clock-output-names = "oscclk7";
                };
 
-               osc@8 {
+               oscclk8 {
                        /* DDR2 PLL reference clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 8>;
                        clock-output-names = "oscclk8";
                };
 
-               volt@0 {
+               volt-a15 {
                        /* A15 CPU core voltage */
                        compatible = "arm,vexpress-volt";
                        arm,vexpress-sysreg,func = <2 0>;
                        label = "A15 Vcore";
                };
 
-               volt@1 {
+               volt-a7 {
                        /* A7 CPU core voltage */
                        compatible = "arm,vexpress-volt";
                        arm,vexpress-sysreg,func = <2 1>;
                        label = "A7 Vcore";
                };
 
-               amp@0 {
+               amp-a15 {
                        /* Total current for the two A15 cores */
                        compatible = "arm,vexpress-amp";
                        arm,vexpress-sysreg,func = <3 0>;
                        label = "A15 Icore";
                };
 
-               amp@1 {
+               amp-a7 {
                        /* Total current for the three A7 cores */
                        compatible = "arm,vexpress-amp";
                        arm,vexpress-sysreg,func = <3 1>;
                        label = "A7 Icore";
                };
 
-               temp@0 {
+               temp-dcc {
                        /* DCC internal temperature */
                        compatible = "arm,vexpress-temp";
                        arm,vexpress-sysreg,func = <4 0>;
                        label = "DCC";
                };
 
-               power@0 {
+               power-a15 {
                        /* Total power for the two A15 cores */
                        compatible = "arm,vexpress-power";
                        arm,vexpress-sysreg,func = <12 0>;
                        label = "A15 Pcore";
                };
 
-               power@1 {
+               power-a7 {
                        /* Total power for the three A7 cores */
                        compatible = "arm,vexpress-power";
                        arm,vexpress-sysreg,func = <12 1>;
                        label = "A7 Pcore";
                };
 
-               energy@0 {
+               energy-a15 {
                        /* Total energy for the two A15 cores */
                        compatible = "arm,vexpress-energy";
                        arm,vexpress-sysreg,func = <13 0>, <13 1>;
                        label = "A15 Jcore";
                };
 
-               energy@2 {
+               energy-a7 {
                        /* Total energy for the three A7 cores */
                        compatible = "arm,vexpress-energy";
                        arm,vexpress-sysreg,func = <13 2>, <13 3>;
                clocks = <&oscclk6a>;
                clock-names = "apb_pclk";
                port {
-                       etb_in_port: endpoint@0 {
+                       etb_in_port: endpoint {
                                slave-mode;
                                remote-endpoint = <&replicator_out_port0>;
                        };
                clocks = <&oscclk6a>;
                clock-names = "apb_pclk";
                port {
-                       tpiu_in_port: endpoint@0 {
+                       tpiu_in_port: endpoint {
                                slave-mode;
                                remote-endpoint = <&replicator_out_port1>;
                        };
                };
        };
 
-       smb {
+       smb@08000000 {
                compatible = "simple-bus";
 
                #address-cells = <2>;
index d2709b7..7c7a1b4 100644 (file)
                compatible = "arm,hdlcd";
                reg = <0x2a110000 0x1000>;
                interrupts = <0 85 4>;
-               clocks = <&oscclk3>;
+               clocks = <&hdlcd_clk>;
                clock-names = "pxlclk";
        };
 
        memory-controller@2a150000 {
                compatible = "arm,pl341", "arm,primecell";
                reg = <0x2a150000 0x1000>;
-               clocks = <&oscclk1>;
+               clocks = <&axi_clk>;
                clock-names = "apb_pclk";
        };
 
@@ -73,7 +73,7 @@
                reg = <0x2a190000 0x1000>;
                interrupts = <0 86 4>,
                             <0 87 4>;
-               clocks = <&oscclk1>;
+               clocks = <&axi_clk>;
                clock-names = "apb_pclk";
        };
 
@@ -93,7 +93,7 @@
                             "arm,cortex-a9-global-timer";
                reg = <0x2c000200 0x20>;
                interrupts = <1 11 0x304>;
-               clocks = <&oscclk0>;
+               clocks = <&cpu_clk>;
        };
 
        watchdog@2c000620 {
                compatible = "arm,vexpress,config-bus";
                arm,vexpress,config-bridge = <&v2m_sysreg>;
 
-               oscclk0: osc@0 {
+               cpu_clk: oscclk0 {
                        /* CPU and internal AXI reference clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 0>;
                        clock-output-names = "oscclk0";
                };
 
-               oscclk1: osc@1 {
+               axi_clk: oscclk1 {
                        /* Multiplexed AXI master clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 1>;
                        clock-output-names = "oscclk1";
                };
 
-               osc@2 {
+               oscclk2 {
                        /* DDR2 */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 2>;
                        clock-output-names = "oscclk2";
                };
 
-               oscclk3: osc@3 {
+               hdlcd_clk: oscclk3 {
                        /* HDLCD */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 3>;
                        clock-output-names = "oscclk3";
                };
 
-               osc@4 {
+               oscclk4 {
                        /* Test chip gate configuration */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 4>;
                        clock-output-names = "oscclk4";
                };
 
-               smbclk: osc@5 {
+               smbclk: oscclk5 {
                        /* SMB clock */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 5>;
                        clock-output-names = "oscclk5";
                };
 
-               temp@0 {
+               temp-dcc {
                        /* DCC internal operating temperature */
                        compatible = "arm,vexpress-temp";
                        arm,vexpress-sysreg,func = <4 0>;
                };
        };
 
-       smb {
+       smb@08000000 {
                compatible = "simple-bus";
 
                #address-cells = <2>;
index d949fac..cbf658b 100644 (file)
                compatible = "arm,vexpress,config-bus";
                arm,vexpress,config-bridge = <&v2m_sysreg>;
 
-               osc@0 {
+               oscclk0: extsaxiclk {
                        /* ACLK clock to the AXI master port on the test chip */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 0>;
                        clock-output-names = "extsaxiclk";
                };
 
-               oscclk1: osc@1 {
+               oscclk1: clcdclk {
                        /* Reference clock for the CLCD */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 1>;
                        clock-output-names = "clcdclk";
                };
 
-               smbclk: oscclk2: osc@2 {
+               smbclk: oscclk2: tcrefclk {
                        /* Reference clock for the test chip internal PLLs */
                        compatible = "arm,vexpress-osc";
                        arm,vexpress-sysreg,func = <1 2>;
                        clock-output-names = "tcrefclk";
                };
 
-               volt@0 {
+               volt-vd10 {
                        /* Test Chip internal logic voltage */
                        compatible = "arm,vexpress-volt";
                        arm,vexpress-sysreg,func = <2 0>;
                        label = "VD10";
                };
 
-               volt@1 {
+               volt-vd10-s2 {
                        /* PL310, L2 cache, RAM cell supply (not PL310 logic) */
                        compatible = "arm,vexpress-volt";
                        arm,vexpress-sysreg,func = <2 1>;
                        label = "VD10_S2";
                };
 
-               volt@2 {
+               volt-vd10-s3 {
                        /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
                        compatible = "arm,vexpress-volt";
                        arm,vexpress-sysreg,func = <2 2>;
                        label = "VD10_S3";
                };
 
-               volt@3 {
+               volt-vcc1v8 {
                        /* DDR2 SDRAM and Test Chip DDR2 I/O supply */
                        compatible = "arm,vexpress-volt";
                        arm,vexpress-sysreg,func = <2 3>;
                        label = "VCC1V8";
                };
 
-               volt@4 {
+               volt-ddr2vtt {
                        /* DDR2 SDRAM VTT termination voltage */
                        compatible = "arm,vexpress-volt";
                        arm,vexpress-sysreg,func = <2 4>;
                        label = "DDR2VTT";
                };
 
-               volt@5 {
+               volt-vcc3v3 {
                        /* Local board supply for miscellaneous logic external to the Test Chip */
                        arm,vexpress-sysreg,func = <2 5>;
                        compatible = "arm,vexpress-volt";
                        label = "VCC3V3";
                };
 
-               amp@0 {
+               amp-vd10-s2 {
                        /* PL310, L2 cache, RAM cell supply (not PL310 logic) */
                        compatible = "arm,vexpress-amp";
                        arm,vexpress-sysreg,func = <3 0>;
                        label = "VD10_S2";
                };
 
-               amp@1 {
+               amp-vd10-s3 {
                        /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
                        compatible = "arm,vexpress-amp";
                        arm,vexpress-sysreg,func = <3 1>;
                        label = "VD10_S3";
                };
 
-               power@0 {
+               power-vd10-s2 {
                        /* PL310, L2 cache, RAM cell supply (not PL310 logic) */
                        compatible = "arm,vexpress-power";
                        arm,vexpress-sysreg,func = <12 0>;
                        label = "PVD10_S2";
                };
 
-               power@1 {
+               power-vd10-s3 {
                        /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
                        compatible = "arm,vexpress-power";
                        arm,vexpress-sysreg,func = <12 1>;
                };
        };
 
-       smb {
+       smb@04000000 {
                compatible = "simple-bus";
 
                #address-cells = <2>;