iwlwifi: pcie: disable APMG configurations for family 8000
authorEran Harary <eran.harary@intel.com>
Sun, 29 Dec 2013 12:09:59 +0000 (14:09 +0200)
committerEmmanuel Grumbach <emmanuel.grumbach@intel.com>
Mon, 3 Feb 2014 20:23:31 +0000 (22:23 +0200)
APMG HW block was removed in this NIC, hence, no need to
configure it.

Signed-off-by: Eran Harary <eran.harary@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
drivers/net/wireless/iwlwifi/mvm/ops.c
drivers/net/wireless/iwlwifi/pcie/trans.c
drivers/net/wireless/iwlwifi/pcie/tx.c

index 7a2e488..f38ed9f 100644 (file)
@@ -185,9 +185,10 @@ static void iwl_mvm_nic_config(struct iwl_op_mode *op_mode)
         * (PCIe power is lost before PERST# is asserted), causing ME FW
         * to lose ownership and not being able to obtain it back.
         */
-       iwl_set_bits_mask_prph(mvm->trans, APMG_PS_CTRL_REG,
-                              APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,
-                              ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);
+       if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)
+               iwl_set_bits_mask_prph(mvm->trans, APMG_PS_CTRL_REG,
+                                      APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,
+                                      ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);
 }
 
 struct iwl_rx_handlers {
index f950780..f7e85d3 100644 (file)
@@ -203,19 +203,23 @@ static int iwl_pcie_apm_init(struct iwl_trans *trans)
        /*
         * Enable DMA clock and wait for it to stabilize.
         *
-        * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
-        * do not disable clocks.  This preserves any hardware bits already
-        * set by default in "CLK_CTRL_REG" after reset.
+        * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0"
+        * bits do not disable clocks.  This preserves any hardware
+        * bits already set by default in "CLK_CTRL_REG" after reset.
         */
-       iwl_write_prph(trans, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);
-       udelay(20);
+       if (trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
+               iwl_write_prph(trans, APMG_CLK_EN_REG,
+                              APMG_CLK_VAL_DMA_CLK_RQT);
+               udelay(20);
 
-       /* Disable L1-Active */
-       iwl_set_bits_prph(trans, APMG_PCIDEV_STT_REG,
-                         APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
+               /* Disable L1-Active */
+               iwl_set_bits_prph(trans, APMG_PCIDEV_STT_REG,
+                                 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 
-       /* Clear the interrupt in APMG if the NIC is in RFKILL */
-       iwl_write_prph(trans, APMG_RTC_INT_STT_REG, APMG_RTC_INT_STT_RFKILL);
+               /* Clear the interrupt in APMG if the NIC is in RFKILL */
+               iwl_write_prph(trans, APMG_RTC_INT_STT_REG,
+                              APMG_RTC_INT_STT_RFKILL);
+       }
 
        set_bit(STATUS_DEVICE_ENABLED, &trans->status);
 
@@ -273,7 +277,8 @@ static int iwl_pcie_nic_init(struct iwl_trans *trans)
 
        spin_unlock(&trans_pcie->irq_lock);
 
-       iwl_pcie_set_pwr(trans, false);
+       if (trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)
+               iwl_pcie_set_pwr(trans, false);
 
        iwl_op_mode_nic_config(trans->op_mode);
 
index 3d54900..2541264 100644 (file)
@@ -705,8 +705,9 @@ void iwl_pcie_tx_start(struct iwl_trans *trans, u32 scd_base_addr)
                           reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
 
        /* Enable L1-Active */
-       iwl_clear_bits_prph(trans, APMG_PCIDEV_STT_REG,
-                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
+       if (trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)
+               iwl_clear_bits_prph(trans, APMG_PCIDEV_STT_REG,
+                                   APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 }
 
 void iwl_trans_pcie_tx_reset(struct iwl_trans *trans)