return snd_pcm_format_physical_width(params_format(p));
}
+static inline void
+params_set_format(struct snd_pcm_hw_params *p, snd_pcm_format_t fmt)
+{
+ snd_mask_set(hw_param_mask(p, SNDRV_PCM_HW_PARAM_FORMAT),
+ (__force int)fmt);
+}
+
#endif /* __SOUND_PCM_PARAMS_H */
unsigned int symmetric_channels:1;
unsigned int symmetric_samplebits:1;
+ /* Mark this pcm with non atomic ops */
+ bool nonatomic;
+
/* Do not create a PCM for this DAI link (Backend link) */
unsigned int no_pcm:1;
return IRQ_HANDLED;
}
+/*
+ * When the bit clock is input, limit the maximum rate according to the
+ * Serial Clock Ratio Considerations section from the SSC documentation:
+ *
+ * The Transmitter and the Receiver can be programmed to operate
+ * with the clock signals provided on either the TK or RK pins.
+ * This allows the SSC to support many slave-mode data transfers.
+ * In this case, the maximum clock speed allowed on the RK pin is:
+ * - Peripheral clock divided by 2 if Receiver Frame Synchro is input
+ * - Peripheral clock divided by 3 if Receiver Frame Synchro is output
+ * In addition, the maximum clock speed allowed on the TK pin is:
+ * - Peripheral clock divided by 6 if Transmit Frame Synchro is input
+ * - Peripheral clock divided by 2 if Transmit Frame Synchro is output
+ *
+ * When the bit clock is output, limit the rate according to the
+ * SSC divider restrictions.
+ */
+static int atmel_ssc_hw_rule_rate(struct snd_pcm_hw_params *params,
+ struct snd_pcm_hw_rule *rule)
+{
+ struct atmel_ssc_info *ssc_p = rule->private;
+ struct ssc_device *ssc = ssc_p->ssc;
+ struct snd_interval *i = hw_param_interval(params, rule->var);
+ struct snd_interval t;
+ struct snd_ratnum r = {
+ .den_min = 1,
+ .den_max = 4095,
+ .den_step = 1,
+ };
+ unsigned int num = 0, den = 0;
+ int frame_size;
+ int mck_div = 2;
+ int ret;
+
+ frame_size = snd_soc_params_to_frame_size(params);
+ if (frame_size < 0)
+ return frame_size;
+
+ switch (ssc_p->daifmt & SND_SOC_DAIFMT_MASTER_MASK) {
+ case SND_SOC_DAIFMT_CBM_CFS:
+ if ((ssc_p->dir_mask & SSC_DIR_MASK_CAPTURE)
+ && ssc->clk_from_rk_pin)
+ /* Receiver Frame Synchro (i.e. capture)
+ * is output (format is _CFS) and the RK pin
+ * is used for input (format is _CBM_).
+ */
+ mck_div = 3;
+ break;
+
+ case SND_SOC_DAIFMT_CBM_CFM:
+ if ((ssc_p->dir_mask & SSC_DIR_MASK_PLAYBACK)
+ && !ssc->clk_from_rk_pin)
+ /* Transmit Frame Synchro (i.e. playback)
+ * is input (format is _CFM) and the TK pin
+ * is used for input (format _CBM_ but not
+ * using the RK pin).
+ */
+ mck_div = 6;
+ break;
+ }
+
+ switch (ssc_p->daifmt & SND_SOC_DAIFMT_MASTER_MASK) {
+ case SND_SOC_DAIFMT_CBS_CFS:
+ r.num = ssc_p->mck_rate / mck_div / frame_size;
+
+ ret = snd_interval_ratnum(i, 1, &r, &num, &den);
+ if (ret >= 0 && den && rule->var == SNDRV_PCM_HW_PARAM_RATE) {
+ params->rate_num = num;
+ params->rate_den = den;
+ }
+ break;
+
+ case SND_SOC_DAIFMT_CBM_CFS:
+ case SND_SOC_DAIFMT_CBM_CFM:
+ t.min = 8000;
+ t.max = ssc_p->mck_rate / mck_div / frame_size;
+ t.openmin = t.openmax = 0;
+ t.integer = 0;
+ ret = snd_interval_refine(i, &t);
+ break;
+
+ default:
+ ret = -EINVAL;
+ break;
+ }
+
+ return ret;
+}
/*-------------------------------------------------------------------------*\
* DAI functions
struct atmel_ssc_info *ssc_p = &ssc_info[dai->id];
struct atmel_pcm_dma_params *dma_params;
int dir, dir_mask;
+ int ret;
pr_debug("atmel_ssc_startup: SSC_SR=0x%u\n",
ssc_readl(ssc_p->ssc->regs, SR));
/* Enable PMC peripheral clock for this SSC */
pr_debug("atmel_ssc_dai: Starting clock\n");
clk_enable(ssc_p->ssc->clk);
+ ssc_p->mck_rate = clk_get_rate(ssc_p->ssc->clk);
/* Reset the SSC to keep it at a clean status */
ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST));
dir_mask = SSC_DIR_MASK_CAPTURE;
}
+ ret = snd_pcm_hw_rule_add(substream->runtime, 0,
+ SNDRV_PCM_HW_PARAM_RATE,
+ atmel_ssc_hw_rule_rate,
+ ssc_p,
+ SNDRV_PCM_HW_PARAM_FRAME_BITS,
+ SNDRV_PCM_HW_PARAM_CHANNELS, -1);
+ if (ret < 0) {
+ dev_err(dai->dev, "Failed to specify rate rule: %d\n", ret);
+ return ret;
+ }
+
dma_params = &ssc_dma_params[dai->id][dir];
dma_params->ssc = ssc_p->ssc;
dma_params->substream = substream;
# define atmel_ssc_resume NULL
#endif /* CONFIG_PM */
-#define ATMEL_SSC_RATES (SNDRV_PCM_RATE_8000_96000)
-
#define ATMEL_SSC_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE |\
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
.playback = {
.channels_min = 1,
.channels_max = 2,
- .rates = ATMEL_SSC_RATES,
+ .rates = SNDRV_PCM_RATE_CONTINUOUS,
+ .rate_min = 8000,
+ .rate_max = 384000,
.formats = ATMEL_SSC_FORMATS,},
.capture = {
.channels_min = 1,
.channels_max = 2,
- .rates = ATMEL_SSC_RATES,
+ .rates = SNDRV_PCM_RATE_CONTINUOUS,
+ .rate_min = 8000,
+ .rate_max = 384000,
.formats = ATMEL_SSC_FORMATS,},
.ops = &atmel_ssc_dai_ops,
};
unsigned short rcmr_period;
struct atmel_pcm_dma_params *dma_params[2];
struct atmel_ssc_state ssc_state;
+ unsigned long mck_rate;
};
int atmel_ssc_set_audio(int ssc_id);
adau1977->dvdd_reg = NULL;
}
- adau1977->reset_gpio = devm_gpiod_get(dev, "reset");
- if (IS_ERR(adau1977->reset_gpio)) {
- ret = PTR_ERR(adau1977->reset_gpio);
- if (ret != -ENOENT && ret != -ENOSYS)
- return PTR_ERR(adau1977->reset_gpio);
- adau1977->reset_gpio = NULL;
- }
+ adau1977->reset_gpio = devm_gpiod_get_optional(dev, "reset",
+ GPIOD_OUT_LOW);
+ if (IS_ERR(adau1977->reset_gpio))
+ return PTR_ERR(adau1977->reset_gpio);
dev_set_drvdata(dev, adau1977);
- if (adau1977->reset_gpio) {
- ret = gpiod_direction_output(adau1977->reset_gpio, 0);
- if (ret)
- return ret;
+ if (adau1977->reset_gpio)
ndelay(100);
- }
ret = adau1977_power_enable(adau1977);
if (ret)
}
/* Reset the Device */
- cs35l32->reset_gpio = devm_gpiod_get(&i2c_client->dev,
- "reset-gpios");
- if (IS_ERR(cs35l32->reset_gpio)) {
- ret = PTR_ERR(cs35l32->reset_gpio);
- if (ret != -ENOENT && ret != -ENOSYS)
- return ret;
-
- cs35l32->reset_gpio = NULL;
- } else {
- ret = gpiod_direction_output(cs35l32->reset_gpio, 0);
- if (ret)
- return ret;
+ cs35l32->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev,
+ "reset", GPIOD_OUT_LOW);
+ if (IS_ERR(cs35l32->reset_gpio))
+ return PTR_ERR(cs35l32->reset_gpio);
+
+ if (cs35l32->reset_gpio)
gpiod_set_value_cansleep(cs35l32->reset_gpio, 1);
- }
/* initialize codec */
ret = regmap_read(cs35l32->regmap, CS35L32_DEVID_AB, ®);
return ret;
}
- cs4265->reset_gpio = devm_gpiod_get(&i2c_client->dev,
- "reset-gpios");
- if (IS_ERR(cs4265->reset_gpio)) {
- ret = PTR_ERR(cs4265->reset_gpio);
- if (ret != -ENOENT && ret != -ENOSYS)
- return ret;
-
- cs4265->reset_gpio = NULL;
- } else {
- ret = gpiod_direction_output(cs4265->reset_gpio, 0);
- if (ret)
- return ret;
+ cs4265->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev,
+ "reset", GPIOD_OUT_LOW);
+ if (IS_ERR(cs4265->reset_gpio))
+ return PTR_ERR(cs4265->reset_gpio);
+
+ if (cs4265->reset_gpio) {
mdelay(1);
gpiod_set_value_cansleep(cs4265->reset_gpio, 1);
-
}
i2c_set_clientdata(i2c_client, cs4265);
#endif
/* GPIOs */
- sta350->gpiod_nreset = devm_gpiod_get(dev, "reset");
- if (IS_ERR(sta350->gpiod_nreset)) {
- ret = PTR_ERR(sta350->gpiod_nreset);
- if (ret != -ENOENT && ret != -ENOSYS)
- return ret;
-
- sta350->gpiod_nreset = NULL;
- } else {
- gpiod_direction_output(sta350->gpiod_nreset, 0);
- }
-
- sta350->gpiod_power_down = devm_gpiod_get(dev, "power-down");
- if (IS_ERR(sta350->gpiod_power_down)) {
- ret = PTR_ERR(sta350->gpiod_power_down);
- if (ret != -ENOENT && ret != -ENOSYS)
- return ret;
-
- sta350->gpiod_power_down = NULL;
- } else {
- gpiod_direction_output(sta350->gpiod_power_down, 0);
- }
+ sta350->gpiod_nreset = devm_gpiod_get_optional(dev, "reset",
+ GPIOD_OUT_LOW);
+ if (IS_ERR(sta350->gpiod_nreset))
+ return PTR_ERR(sta350->gpiod_nreset);
+
+ sta350->gpiod_power_down = devm_gpiod_get(dev, "power-down",
+ GPIOD_OUT_LOW);
+ if (IS_ERR(sta350->gpiod_power_down))
+ return PTR_ERR(sta350->gpiod_power_down);
/* regulators */
for (i = 0; i < ARRAY_SIZE(sta350->supplies); i++)
if (data == NULL)
return -ENOMEM;
- data->enable_gpio = devm_gpiod_get(dev, "enable");
- if (IS_ERR(data->enable_gpio)) {
- ret = PTR_ERR(data->enable_gpio);
- if (ret != -ENOENT && ret != -ENOSYS)
- return ret;
-
- data->enable_gpio = NULL;
- } else {
- gpiod_direction_output(data->enable_gpio, 0);
- }
+ data->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW);
+ if (IS_ERR(data->enable_gpio))
+ return PTR_ERR(data->enable_gpio);
data->tas2552_client = client;
data->regmap = devm_regmap_init_i2c(client, &tas2552_regmap_config);
config SND_DAVINCI_SOC
- tristate "SoC Audio for TI DAVINCI"
+ tristate
depends on ARCH_DAVINCI
+ select SND_EDMA_SOC
config SND_EDMA_SOC
- tristate "SoC Audio for Texas Instruments chips using eDMA (AM33XX/43XX)"
- depends on SOC_AM33XX || SOC_AM43XX
+ tristate "SoC Audio for Texas Instruments chips using eDMA"
+ depends on SOC_AM33XX || SOC_AM43XX || ARCH_DAVINCI
select SND_SOC_GENERIC_DMAENGINE_PCM
help
Say Y or M here if you want audio support for TI SoC which uses eDMA.
The following line of SoCs are supported by this platform driver:
+ - daVinci devices
- AM335x
- AM437x/AM438x
config SND_DAVINCI_SOC_MCASP
tristate "Multichannel Audio Serial Port (McASP) support"
- depends on SND_DAVINCI_SOC || SND_OMAP_SOC || SND_EDMA_SOC
+ depends on SND_OMAP_SOC || SND_EDMA_SOC
help
Say Y or M here if you want to have support for McASP IP found in
various Texas Instruments SoCs like:
config SND_DAVINCI_SOC_EVM
tristate "SoC Audio support for DaVinci DM6446, DM355 or DM365 EVM"
- depends on SND_DAVINCI_SOC && I2C
+ depends on SND_EDMA_SOC && I2C
depends on MACH_DAVINCI_EVM || MACH_DAVINCI_DM355_EVM || MACH_DAVINCI_DM365_EVM
select SND_DAVINCI_SOC_GENERIC_EVM
help
config SND_DM6467_SOC_EVM
tristate "SoC Audio support for DaVinci DM6467 EVM"
- depends on SND_DAVINCI_SOC && MACH_DAVINCI_DM6467_EVM && I2C
+ depends on SND_EDMA_SOC && MACH_DAVINCI_DM6467_EVM && I2C
select SND_DAVINCI_SOC_GENERIC_EVM
select SND_SOC_SPDIF
config SND_DA830_SOC_EVM
tristate "SoC Audio support for DA830/OMAP-L137 EVM"
- depends on SND_DAVINCI_SOC && MACH_DAVINCI_DA830_EVM && I2C
+ depends on SND_EDMA_SOC && MACH_DAVINCI_DA830_EVM && I2C
select SND_DAVINCI_SOC_GENERIC_EVM
help
config SND_DA850_SOC_EVM
tristate "SoC Audio support for DA850/OMAP-L138 EVM"
- depends on SND_DAVINCI_SOC && MACH_DAVINCI_DA850_EVM && I2C
+ depends on SND_EDMA_SOC && MACH_DAVINCI_DA850_EVM && I2C
select SND_DAVINCI_SOC_GENERIC_EVM
help
Say Y if you want to add support for SoC audio on TI
# DAVINCI Platform Support
-snd-soc-davinci-objs := davinci-pcm.o
snd-soc-edma-objs := edma-pcm.o
snd-soc-davinci-i2s-objs := davinci-i2s.o
snd-soc-davinci-mcasp-objs:= davinci-mcasp.o
snd-soc-davinci-vcif-objs:= davinci-vcif.o
-obj-$(CONFIG_SND_DAVINCI_SOC) += snd-soc-davinci.o
obj-$(CONFIG_SND_EDMA_SOC) += snd-soc-edma.o
obj-$(CONFIG_SND_DAVINCI_SOC_I2S) += snd-soc-davinci-i2s.o
obj-$(CONFIG_SND_DAVINCI_SOC_MCASP) += snd-soc-davinci-mcasp.o
#include <sound/pcm_params.h>
#include <sound/initval.h>
#include <sound/soc.h>
+#include <sound/dmaengine_pcm.h>
-#include "davinci-pcm.h"
+#include "edma-pcm.h"
#include "davinci-i2s.h"
struct davinci_mcbsp_dev {
struct device *dev;
- struct davinci_pcm_dma_params dma_params[2];
+ struct snd_dmaengine_dai_dma_data dma_data[2];
+ int dma_request[2];
void __iomem *base;
#define MOD_DSP_A 0
#define MOD_DSP_B 1
struct snd_soc_dai *dai)
{
struct davinci_mcbsp_dev *dev = snd_soc_dai_get_drvdata(dai);
- struct davinci_pcm_dma_params *dma_params =
- &dev->dma_params[substream->stream];
struct snd_interval *i = NULL;
int mcbsp_word_length, master;
unsigned int rcr, xcr, srgr, clk_div, freq, framesize;
return -EINVAL;
}
}
- dma_params->acnt = dma_params->data_type = data_type[fmt];
- dma_params->fifo_level = 0;
mcbsp_word_length = asp_word_length[fmt];
switch (master) {
return ret;
}
-static int davinci_i2s_startup(struct snd_pcm_substream *substream,
- struct snd_soc_dai *dai)
-{
- struct davinci_mcbsp_dev *dev = snd_soc_dai_get_drvdata(dai);
-
- snd_soc_dai_set_dma_data(dai, substream, dev->dma_params);
- return 0;
-}
-
static void davinci_i2s_shutdown(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
#define DAVINCI_I2S_RATES SNDRV_PCM_RATE_8000_96000
static const struct snd_soc_dai_ops davinci_i2s_dai_ops = {
- .startup = davinci_i2s_startup,
.shutdown = davinci_i2s_shutdown,
.prepare = davinci_i2s_prepare,
.trigger = davinci_i2s_trigger,
};
+static int davinci_i2s_dai_probe(struct snd_soc_dai *dai)
+{
+ struct davinci_mcbsp_dev *dev = snd_soc_dai_get_drvdata(dai);
+
+ dai->playback_dma_data = &dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK];
+ dai->capture_dma_data = &dev->dma_data[SNDRV_PCM_STREAM_CAPTURE];
+
+ return 0;
+}
+
static struct snd_soc_dai_driver davinci_i2s_dai = {
+ .probe = davinci_i2s_dai_probe,
.playback = {
.channels_min = 2,
.channels_max = 2,
static int davinci_i2s_probe(struct platform_device *pdev)
{
- struct snd_platform_data *pdata = pdev->dev.platform_data;
struct davinci_mcbsp_dev *dev;
struct resource *mem, *ioarea, *res;
- enum dma_event_q asp_chan_q = EVENTQ_0;
- enum dma_event_q ram_chan_q = EVENTQ_1;
+ int *dma;
int ret;
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
GFP_KERNEL);
if (!dev)
return -ENOMEM;
- if (pdata) {
- dev->enable_channel_combine = pdata->enable_channel_combine;
- dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK].sram_size =
- pdata->sram_size_playback;
- dev->dma_params[SNDRV_PCM_STREAM_CAPTURE].sram_size =
- pdata->sram_size_capture;
- dev->clk_input_pin = pdata->clk_input_pin;
- dev->i2s_accurate_sck = pdata->i2s_accurate_sck;
- asp_chan_q = pdata->asp_chan_q;
- ram_chan_q = pdata->ram_chan_q;
- }
-
- dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK].asp_chan_q = asp_chan_q;
- dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK].ram_chan_q = ram_chan_q;
- dev->dma_params[SNDRV_PCM_STREAM_CAPTURE].asp_chan_q = asp_chan_q;
- dev->dma_params[SNDRV_PCM_STREAM_CAPTURE].ram_chan_q = ram_chan_q;
dev->clk = clk_get(&pdev->dev, NULL);
if (IS_ERR(dev->clk))
goto err_release_clk;
}
- dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK].dma_addr =
+ dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr =
(dma_addr_t)(mem->start + DAVINCI_MCBSP_DXR_REG);
- dev->dma_params[SNDRV_PCM_STREAM_CAPTURE].dma_addr =
+ dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr =
(dma_addr_t)(mem->start + DAVINCI_MCBSP_DRR_REG);
/* first TX, then RX */
ret = -ENXIO;
goto err_release_clk;
}
- dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK].channel = res->start;
+ dma = &dev->dma_request[SNDRV_PCM_STREAM_PLAYBACK];
+ *dma = res->start;
+ dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].filter_data = dma;
res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
if (!res) {
ret = -ENXIO;
goto err_release_clk;
}
- dev->dma_params[SNDRV_PCM_STREAM_CAPTURE].channel = res->start;
- dev->dev = &pdev->dev;
+ dma = &dev->dma_request[SNDRV_PCM_STREAM_CAPTURE];
+ *dma = res->start;
+ dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].filter_data = dma;
+ dev->dev = &pdev->dev;
dev_set_drvdata(&pdev->dev, dev);
ret = snd_soc_register_component(&pdev->dev, &davinci_i2s_component,
if (ret != 0)
goto err_release_clk;
- ret = davinci_soc_platform_register(&pdev->dev);
+ ret = edma_pcm_platform_register(&pdev->dev);
if (ret) {
dev_err(&pdev->dev, "register PCM failed: %d\n", ret);
goto err_unregister_component;
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/of_device.h>
+#include <linux/platform_data/davinci_asp.h>
#include <sound/asoundef.h>
#include <sound/core.h>
#include <sound/dmaengine_pcm.h>
#include <sound/omap-pcm.h>
-#include "davinci-pcm.h"
#include "edma-pcm.h"
#include "davinci-mcasp.h"
};
struct davinci_mcasp {
- struct davinci_pcm_dma_params dma_params[2];
struct snd_dmaengine_dai_dma_data dma_data[2];
void __iomem *base;
u32 fifo_base;
u16 bclk_lrclk_ratio;
int streams;
u32 irq_request[2];
+ int dma_request[2];
int sysclk_freq;
bool bclk_master;
mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AFSX | AFSR);
mcasp->bclk_master = 1;
break;
+ case SND_SOC_DAIFMT_CBS_CFM:
+ /* codec is clock slave and frame master */
+ mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);
+ mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE);
+
+ mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);
+ mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE);
+
+ mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, ACLKX | ACLKR);
+ mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AFSX | AFSR);
+ mcasp->bclk_master = 1;
+ break;
case SND_SOC_DAIFMT_CBM_CFS:
/* codec is clock master and frame slave */
mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);
static int mcasp_common_hw_param(struct davinci_mcasp *mcasp, int stream,
int period_words, int channels)
{
- struct davinci_pcm_dma_params *dma_params = &mcasp->dma_params[stream];
struct snd_dmaengine_dai_dma_data *dma_data = &mcasp->dma_data[stream];
int i;
u8 tx_ser = 0;
* For example if three serializers are enabled the DMA
* need to transfer three words per DMA request.
*/
- dma_params->fifo_level = active_serializers;
dma_data->maxburst = active_serializers;
} else {
- dma_params->fifo_level = 0;
dma_data->maxburst = 0;
}
return 0;
/* Configure the burst size for platform drivers */
if (numevt == 1)
numevt = 0;
- dma_params->fifo_level = numevt;
dma_data->maxburst = numevt;
return 0;
struct snd_soc_dai *cpu_dai)
{
struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai);
- struct davinci_pcm_dma_params *dma_params =
- &mcasp->dma_params[substream->stream];
int word_length;
int channels = params_channels(params);
int period_size = params_period_size(params);
switch (params_format(params)) {
case SNDRV_PCM_FORMAT_U8:
case SNDRV_PCM_FORMAT_S8:
- dma_params->data_type = 1;
word_length = 8;
break;
case SNDRV_PCM_FORMAT_U16_LE:
case SNDRV_PCM_FORMAT_S16_LE:
- dma_params->data_type = 2;
word_length = 16;
break;
case SNDRV_PCM_FORMAT_U24_3LE:
case SNDRV_PCM_FORMAT_S24_3LE:
- dma_params->data_type = 3;
word_length = 24;
break;
case SNDRV_PCM_FORMAT_U24_LE:
case SNDRV_PCM_FORMAT_S24_LE:
- dma_params->data_type = 4;
word_length = 24;
break;
case SNDRV_PCM_FORMAT_U32_LE:
case SNDRV_PCM_FORMAT_S32_LE:
- dma_params->data_type = 4;
word_length = 32;
break;
return -EINVAL;
}
- if (mcasp->version == MCASP_VERSION_2 && !dma_params->fifo_level)
- dma_params->acnt = 4;
- else
- dma_params->acnt = dma_params->data_type;
-
davinci_config_channel_size(mcasp, word_length);
if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE)
{
struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai);
- if (mcasp->version >= MCASP_VERSION_3) {
- /* Using dmaengine PCM */
- dai->playback_dma_data =
- &mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK];
- dai->capture_dma_data =
- &mcasp->dma_data[SNDRV_PCM_STREAM_CAPTURE];
- } else {
- /* Using davinci-pcm */
- dai->playback_dma_data = mcasp->dma_params;
- dai->capture_dma_data = mcasp->dma_params;
- }
+ dai->playback_dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK];
+ dai->capture_dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_CAPTURE];
return 0;
}
static struct davinci_mcasp_pdata dm646x_mcasp_pdata = {
.tx_dma_offset = 0x400,
.rx_dma_offset = 0x400,
- .asp_chan_q = EVENTQ_0,
.version = MCASP_VERSION_1,
};
static struct davinci_mcasp_pdata da830_mcasp_pdata = {
.tx_dma_offset = 0x2000,
.rx_dma_offset = 0x2000,
- .asp_chan_q = EVENTQ_0,
.version = MCASP_VERSION_2,
};
static struct davinci_mcasp_pdata am33xx_mcasp_pdata = {
.tx_dma_offset = 0,
.rx_dma_offset = 0,
- .asp_chan_q = EVENTQ_0,
.version = MCASP_VERSION_3,
};
static struct davinci_mcasp_pdata dra7_mcasp_pdata = {
.tx_dma_offset = 0x200,
.rx_dma_offset = 0x284,
- .asp_chan_q = EVENTQ_0,
.version = MCASP_VERSION_4,
};
static int davinci_mcasp_probe(struct platform_device *pdev)
{
- struct davinci_pcm_dma_params *dma_params;
struct snd_dmaengine_dai_dma_data *dma_data;
struct resource *mem, *ioarea, *res, *dat;
struct davinci_mcasp_pdata *pdata;
struct davinci_mcasp *mcasp;
char *irq_name;
+ int *dma;
int irq;
int ret;
if (dat)
mcasp->dat_port = true;
- dma_params = &mcasp->dma_params[SNDRV_PCM_STREAM_PLAYBACK];
dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK];
- dma_params->asp_chan_q = pdata->asp_chan_q;
- dma_params->ram_chan_q = pdata->ram_chan_q;
- dma_params->sram_pool = pdata->sram_pool;
- dma_params->sram_size = pdata->sram_size_playback;
if (dat)
- dma_params->dma_addr = dat->start;
+ dma_data->addr = dat->start;
else
- dma_params->dma_addr = mem->start + pdata->tx_dma_offset;
-
- /* Unconditional dmaengine stuff */
- dma_data->addr = dma_params->dma_addr;
+ dma_data->addr = mem->start + pdata->tx_dma_offset;
+ dma = &mcasp->dma_request[SNDRV_PCM_STREAM_PLAYBACK];
res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
if (res)
- dma_params->channel = res->start;
+ *dma = res->start;
else
- dma_params->channel = pdata->tx_dma_channel;
+ *dma = pdata->tx_dma_channel;
/* dmaengine filter data for DT and non-DT boot */
if (pdev->dev.of_node)
dma_data->filter_data = "tx";
else
- dma_data->filter_data = &dma_params->channel;
+ dma_data->filter_data = dma;
/* RX is not valid in DIT mode */
if (mcasp->op_mode != DAVINCI_MCASP_DIT_MODE) {
- dma_params = &mcasp->dma_params[SNDRV_PCM_STREAM_CAPTURE];
dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_CAPTURE];
- dma_params->asp_chan_q = pdata->asp_chan_q;
- dma_params->ram_chan_q = pdata->ram_chan_q;
- dma_params->sram_pool = pdata->sram_pool;
- dma_params->sram_size = pdata->sram_size_capture;
if (dat)
- dma_params->dma_addr = dat->start;
+ dma_data->addr = dat->start;
else
- dma_params->dma_addr = mem->start + pdata->rx_dma_offset;
-
- /* Unconditional dmaengine stuff */
- dma_data->addr = dma_params->dma_addr;
+ dma_data->addr = mem->start + pdata->rx_dma_offset;
+ dma = &mcasp->dma_request[SNDRV_PCM_STREAM_CAPTURE];
res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
if (res)
- dma_params->channel = res->start;
+ *dma = res->start;
else
- dma_params->channel = pdata->rx_dma_channel;
+ *dma = pdata->rx_dma_channel;
/* dmaengine filter data for DT and non-DT boot */
if (pdev->dev.of_node)
dma_data->filter_data = "rx";
else
- dma_data->filter_data = &dma_params->channel;
+ dma_data->filter_data = dma;
}
if (mcasp->version < MCASP_VERSION_3) {
goto err;
switch (mcasp->version) {
-#if IS_BUILTIN(CONFIG_SND_DAVINCI_SOC) || \
- (IS_MODULE(CONFIG_SND_DAVINCI_SOC_MCASP) && \
- IS_MODULE(CONFIG_SND_DAVINCI_SOC))
- case MCASP_VERSION_1:
- case MCASP_VERSION_2:
- ret = davinci_soc_platform_register(&pdev->dev);
- break;
-#endif
#if IS_BUILTIN(CONFIG_SND_EDMA_SOC) || \
(IS_MODULE(CONFIG_SND_DAVINCI_SOC_MCASP) && \
IS_MODULE(CONFIG_SND_EDMA_SOC))
+ case MCASP_VERSION_1:
+ case MCASP_VERSION_2:
case MCASP_VERSION_3:
ret = edma_pcm_platform_register(&pdev->dev);
break;
+++ /dev/null
-/*
- * ALSA PCM interface for the TI DAVINCI processor
- *
- * Author: Vladimir Barinov, <vbarinov@embeddedalley.com>
- * Copyright: (C) 2007 MontaVista Software, Inc., <source@mvista.com>
- * added SRAM ping/pong (C) 2008 Troy Kisky <troy.kisky@boundarydevices.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/slab.h>
-#include <linux/dma-mapping.h>
-#include <linux/kernel.h>
-#include <linux/genalloc.h>
-#include <linux/platform_data/edma.h>
-
-#include <sound/core.h>
-#include <sound/pcm.h>
-#include <sound/pcm_params.h>
-#include <sound/soc.h>
-
-#include <asm/dma.h>
-
-#include "davinci-pcm.h"
-
-#ifdef DEBUG
-static void print_buf_info(int slot, char *name)
-{
- struct edmacc_param p;
- if (slot < 0)
- return;
- edma_read_slot(slot, &p);
- printk(KERN_DEBUG "%s: 0x%x, opt=%x, src=%x, a_b_cnt=%x dst=%x\n",
- name, slot, p.opt, p.src, p.a_b_cnt, p.dst);
- printk(KERN_DEBUG " src_dst_bidx=%x link_bcntrld=%x src_dst_cidx=%x ccnt=%x\n",
- p.src_dst_bidx, p.link_bcntrld, p.src_dst_cidx, p.ccnt);
-}
-#else
-static void print_buf_info(int slot, char *name)
-{
-}
-#endif
-
-static struct snd_pcm_hardware pcm_hardware_playback = {
- .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
- SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
- SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME|
- SNDRV_PCM_INFO_BATCH),
- .buffer_bytes_max = 128 * 1024,
- .period_bytes_min = 32,
- .period_bytes_max = 8 * 1024,
- .periods_min = 16,
- .periods_max = 255,
- .fifo_size = 0,
-};
-
-static struct snd_pcm_hardware pcm_hardware_capture = {
- .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
- SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
- SNDRV_PCM_INFO_PAUSE |
- SNDRV_PCM_INFO_BATCH),
- .buffer_bytes_max = 128 * 1024,
- .period_bytes_min = 32,
- .period_bytes_max = 8 * 1024,
- .periods_min = 16,
- .periods_max = 255,
- .fifo_size = 0,
-};
-
-/*
- * How ping/pong works....
- *
- * Playback:
- * ram_params - copys 2*ping_size from start of SDRAM to iram,
- * links to ram_link2
- * ram_link2 - copys rest of SDRAM to iram in ping_size units,
- * links to ram_link
- * ram_link - copys entire SDRAM to iram in ping_size uints,
- * links to self
- *
- * asp_params - same as asp_link[0]
- * asp_link[0] - copys from lower half of iram to asp port
- * links to asp_link[1], triggers iram copy event on completion
- * asp_link[1] - copys from upper half of iram to asp port
- * links to asp_link[0], triggers iram copy event on completion
- * triggers interrupt only needed to let upper SOC levels update position
- * in stream on completion
- *
- * When playback is started:
- * ram_params started
- * asp_params started
- *
- * Capture:
- * ram_params - same as ram_link,
- * links to ram_link
- * ram_link - same as playback
- * links to self
- *
- * asp_params - same as playback
- * asp_link[0] - same as playback
- * asp_link[1] - same as playback
- *
- * When capture is started:
- * asp_params started
- */
-struct davinci_runtime_data {
- spinlock_t lock;
- int period; /* current DMA period */
- int asp_channel; /* Master DMA channel */
- int asp_link[2]; /* asp parameter link channel, ping/pong */
- struct davinci_pcm_dma_params *params; /* DMA params */
- int ram_channel;
- int ram_link;
- int ram_link2;
- struct edmacc_param asp_params;
- struct edmacc_param ram_params;
-};
-
-static void davinci_pcm_period_elapsed(struct snd_pcm_substream *substream)
-{
- struct davinci_runtime_data *prtd = substream->runtime->private_data;
- struct snd_pcm_runtime *runtime = substream->runtime;
-
- prtd->period++;
- if (unlikely(prtd->period >= runtime->periods))
- prtd->period = 0;
-}
-
-static void davinci_pcm_period_reset(struct snd_pcm_substream *substream)
-{
- struct davinci_runtime_data *prtd = substream->runtime->private_data;
-
- prtd->period = 0;
-}
-/*
- * Not used with ping/pong
- */
-static void davinci_pcm_enqueue_dma(struct snd_pcm_substream *substream)
-{
- struct davinci_runtime_data *prtd = substream->runtime->private_data;
- struct snd_pcm_runtime *runtime = substream->runtime;
- unsigned int period_size;
- unsigned int dma_offset;
- dma_addr_t dma_pos;
- dma_addr_t src, dst;
- unsigned short src_bidx, dst_bidx;
- unsigned short src_cidx, dst_cidx;
- unsigned int data_type;
- unsigned short acnt;
- unsigned int count;
- unsigned int fifo_level;
-
- period_size = snd_pcm_lib_period_bytes(substream);
- dma_offset = prtd->period * period_size;
- dma_pos = runtime->dma_addr + dma_offset;
- fifo_level = prtd->params->fifo_level;
-
- pr_debug("davinci_pcm: audio_set_dma_params_play channel = %d "
- "dma_ptr = %x period_size=%x\n", prtd->asp_link[0], dma_pos,
- period_size);
-
- data_type = prtd->params->data_type;
- count = period_size / data_type;
- if (fifo_level)
- count /= fifo_level;
-
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
- src = dma_pos;
- dst = prtd->params->dma_addr;
- src_bidx = data_type;
- dst_bidx = 4;
- src_cidx = data_type * fifo_level;
- dst_cidx = 0;
- } else {
- src = prtd->params->dma_addr;
- dst = dma_pos;
- src_bidx = 0;
- dst_bidx = data_type;
- src_cidx = 0;
- dst_cidx = data_type * fifo_level;
- }
-
- acnt = prtd->params->acnt;
- edma_set_src(prtd->asp_link[0], src, INCR, W8BIT);
- edma_set_dest(prtd->asp_link[0], dst, INCR, W8BIT);
-
- edma_set_src_index(prtd->asp_link[0], src_bidx, src_cidx);
- edma_set_dest_index(prtd->asp_link[0], dst_bidx, dst_cidx);
-
- if (!fifo_level)
- edma_set_transfer_params(prtd->asp_link[0], acnt, count, 1, 0,
- ASYNC);
- else
- edma_set_transfer_params(prtd->asp_link[0], acnt,
- fifo_level,
- count, fifo_level,
- ABSYNC);
-}
-
-static void davinci_pcm_dma_irq(unsigned link, u16 ch_status, void *data)
-{
- struct snd_pcm_substream *substream = data;
- struct davinci_runtime_data *prtd = substream->runtime->private_data;
-
- print_buf_info(prtd->ram_channel, "i ram_channel");
- pr_debug("davinci_pcm: link=%d, status=0x%x\n", link, ch_status);
-
- if (unlikely(ch_status != EDMA_DMA_COMPLETE))
- return;
-
- if (snd_pcm_running(substream)) {
- spin_lock(&prtd->lock);
- if (prtd->ram_channel < 0) {
- /* No ping/pong must fix up link dma data*/
- davinci_pcm_enqueue_dma(substream);
- }
- davinci_pcm_period_elapsed(substream);
- spin_unlock(&prtd->lock);
- snd_pcm_period_elapsed(substream);
- }
-}
-
-#ifdef CONFIG_GENERIC_ALLOCATOR
-static int allocate_sram(struct snd_pcm_substream *substream,
- struct gen_pool *sram_pool, unsigned size,
- struct snd_pcm_hardware *ppcm)
-{
- struct snd_dma_buffer *buf = &substream->dma_buffer;
- struct snd_dma_buffer *iram_dma = NULL;
- dma_addr_t iram_phys = 0;
- void *iram_virt = NULL;
-
- if (buf->private_data || !size)
- return 0;
-
- ppcm->period_bytes_max = size;
- iram_virt = gen_pool_dma_alloc(sram_pool, size, &iram_phys);
- if (!iram_virt)
- goto exit1;
- iram_dma = kzalloc(sizeof(*iram_dma), GFP_KERNEL);
- if (!iram_dma)
- goto exit2;
- iram_dma->area = iram_virt;
- iram_dma->addr = iram_phys;
- memset(iram_dma->area, 0, size);
- iram_dma->bytes = size;
- buf->private_data = iram_dma;
- return 0;
-exit2:
- if (iram_virt)
- gen_pool_free(sram_pool, (unsigned)iram_virt, size);
-exit1:
- return -ENOMEM;
-}
-
-static void davinci_free_sram(struct snd_pcm_substream *substream,
- struct snd_dma_buffer *iram_dma)
-{
- struct davinci_runtime_data *prtd = substream->runtime->private_data;
- struct gen_pool *sram_pool = prtd->params->sram_pool;
-
- gen_pool_free(sram_pool, (unsigned) iram_dma->area, iram_dma->bytes);
-}
-#else
-static int allocate_sram(struct snd_pcm_substream *substream,
- struct gen_pool *sram_pool, unsigned size,
- struct snd_pcm_hardware *ppcm)
-{
- return 0;
-}
-
-static void davinci_free_sram(struct snd_pcm_substream *substream,
- struct snd_dma_buffer *iram_dma)
-{
-}
-#endif
-
-/*
- * Only used with ping/pong.
- * This is called after runtime->dma_addr, period_bytes and data_type are valid
- */
-static int ping_pong_dma_setup(struct snd_pcm_substream *substream)
-{
- unsigned short ram_src_cidx, ram_dst_cidx;
- struct snd_pcm_runtime *runtime = substream->runtime;
- struct davinci_runtime_data *prtd = runtime->private_data;
- struct snd_dma_buffer *iram_dma =
- (struct snd_dma_buffer *)substream->dma_buffer.private_data;
- struct davinci_pcm_dma_params *params = prtd->params;
- unsigned int data_type = params->data_type;
- unsigned int acnt = params->acnt;
- /* divide by 2 for ping/pong */
- unsigned int ping_size = snd_pcm_lib_period_bytes(substream) >> 1;
- unsigned int fifo_level = prtd->params->fifo_level;
- unsigned int count;
- if ((data_type == 0) || (data_type > 4)) {
- printk(KERN_ERR "%s: data_type=%i\n", __func__, data_type);
- return -EINVAL;
- }
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
- dma_addr_t asp_src_pong = iram_dma->addr + ping_size;
- ram_src_cidx = ping_size;
- ram_dst_cidx = -ping_size;
- edma_set_src(prtd->asp_link[1], asp_src_pong, INCR, W8BIT);
-
- edma_set_src_index(prtd->asp_link[0], data_type,
- data_type * fifo_level);
- edma_set_src_index(prtd->asp_link[1], data_type,
- data_type * fifo_level);
-
- edma_set_src(prtd->ram_link, runtime->dma_addr, INCR, W32BIT);
- } else {
- dma_addr_t asp_dst_pong = iram_dma->addr + ping_size;
- ram_src_cidx = -ping_size;
- ram_dst_cidx = ping_size;
- edma_set_dest(prtd->asp_link[1], asp_dst_pong, INCR, W8BIT);
-
- edma_set_dest_index(prtd->asp_link[0], data_type,
- data_type * fifo_level);
- edma_set_dest_index(prtd->asp_link[1], data_type,
- data_type * fifo_level);
-
- edma_set_dest(prtd->ram_link, runtime->dma_addr, INCR, W32BIT);
- }
-
- if (!fifo_level) {
- count = ping_size / data_type;
- edma_set_transfer_params(prtd->asp_link[0], acnt, count,
- 1, 0, ASYNC);
- edma_set_transfer_params(prtd->asp_link[1], acnt, count,
- 1, 0, ASYNC);
- } else {
- count = ping_size / (data_type * fifo_level);
- edma_set_transfer_params(prtd->asp_link[0], acnt, fifo_level,
- count, fifo_level, ABSYNC);
- edma_set_transfer_params(prtd->asp_link[1], acnt, fifo_level,
- count, fifo_level, ABSYNC);
- }
-
- edma_set_src_index(prtd->ram_link, ping_size, ram_src_cidx);
- edma_set_dest_index(prtd->ram_link, ping_size, ram_dst_cidx);
- edma_set_transfer_params(prtd->ram_link, ping_size, 2,
- runtime->periods, 2, ASYNC);
-
- /* init master params */
- edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
- edma_read_slot(prtd->ram_link, &prtd->ram_params);
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
- struct edmacc_param p_ram;
- /* Copy entire iram buffer before playback started */
- prtd->ram_params.a_b_cnt = (1 << 16) | (ping_size << 1);
- /* 0 dst_bidx */
- prtd->ram_params.src_dst_bidx = (ping_size << 1);
- /* 0 dst_cidx */
- prtd->ram_params.src_dst_cidx = (ping_size << 1);
- prtd->ram_params.ccnt = 1;
-
- /* Skip 1st period */
- edma_read_slot(prtd->ram_link, &p_ram);
- p_ram.src += (ping_size << 1);
- p_ram.ccnt -= 1;
- edma_write_slot(prtd->ram_link2, &p_ram);
- /*
- * When 1st started, ram -> iram dma channel will fill the
- * entire iram. Then, whenever a ping/pong asp buffer finishes,
- * 1/2 iram will be filled.
- */
- prtd->ram_params.link_bcntrld =
- EDMA_CHAN_SLOT(prtd->ram_link2) << 5;
- }
- return 0;
-}
-
-/* 1 asp tx or rx channel using 2 parameter channels
- * 1 ram to/from iram channel using 1 parameter channel
- *
- * Playback
- * ram copy channel kicks off first,
- * 1st ram copy of entire iram buffer completion kicks off asp channel
- * asp tcc always kicks off ram copy of 1/2 iram buffer
- *
- * Record
- * asp channel starts, tcc kicks off ram copy
- */
-static int request_ping_pong(struct snd_pcm_substream *substream,
- struct davinci_runtime_data *prtd,
- struct snd_dma_buffer *iram_dma)
-{
- dma_addr_t asp_src_ping;
- dma_addr_t asp_dst_ping;
- int ret;
- struct davinci_pcm_dma_params *params = prtd->params;
-
- /* Request ram master channel */
- ret = prtd->ram_channel = edma_alloc_channel(EDMA_CHANNEL_ANY,
- davinci_pcm_dma_irq, substream,
- prtd->params->ram_chan_q);
- if (ret < 0)
- goto exit1;
-
- /* Request ram link channel */
- ret = prtd->ram_link = edma_alloc_slot(
- EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
- if (ret < 0)
- goto exit2;
-
- ret = prtd->asp_link[1] = edma_alloc_slot(
- EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
- if (ret < 0)
- goto exit3;
-
- prtd->ram_link2 = -1;
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
- ret = prtd->ram_link2 = edma_alloc_slot(
- EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
- if (ret < 0)
- goto exit4;
- }
- /* circle ping-pong buffers */
- edma_link(prtd->asp_link[0], prtd->asp_link[1]);
- edma_link(prtd->asp_link[1], prtd->asp_link[0]);
- /* circle ram buffers */
- edma_link(prtd->ram_link, prtd->ram_link);
-
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
- asp_src_ping = iram_dma->addr;
- asp_dst_ping = params->dma_addr; /* fifo */
- } else {
- asp_src_ping = params->dma_addr; /* fifo */
- asp_dst_ping = iram_dma->addr;
- }
- /* ping */
- edma_set_src(prtd->asp_link[0], asp_src_ping, INCR, W16BIT);
- edma_set_dest(prtd->asp_link[0], asp_dst_ping, INCR, W16BIT);
- edma_set_src_index(prtd->asp_link[0], 0, 0);
- edma_set_dest_index(prtd->asp_link[0], 0, 0);
-
- edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
- prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f) | TCINTEN);
- prtd->asp_params.opt |= TCCHEN |
- EDMA_TCC(prtd->ram_channel & 0x3f);
- edma_write_slot(prtd->asp_link[0], &prtd->asp_params);
-
- /* pong */
- edma_set_src(prtd->asp_link[1], asp_src_ping, INCR, W16BIT);
- edma_set_dest(prtd->asp_link[1], asp_dst_ping, INCR, W16BIT);
- edma_set_src_index(prtd->asp_link[1], 0, 0);
- edma_set_dest_index(prtd->asp_link[1], 0, 0);
-
- edma_read_slot(prtd->asp_link[1], &prtd->asp_params);
- prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f));
- /* interrupt after every pong completion */
- prtd->asp_params.opt |= TCINTEN | TCCHEN |
- EDMA_TCC(prtd->ram_channel & 0x3f);
- edma_write_slot(prtd->asp_link[1], &prtd->asp_params);
-
- /* ram */
- edma_set_src(prtd->ram_link, iram_dma->addr, INCR, W32BIT);
- edma_set_dest(prtd->ram_link, iram_dma->addr, INCR, W32BIT);
- pr_debug("%s: audio dma channels/slots in use for ram:%u %u %u,"
- "for asp:%u %u %u\n", __func__,
- prtd->ram_channel, prtd->ram_link, prtd->ram_link2,
- prtd->asp_channel, prtd->asp_link[0],
- prtd->asp_link[1]);
- return 0;
-exit4:
- edma_free_channel(prtd->asp_link[1]);
- prtd->asp_link[1] = -1;
-exit3:
- edma_free_channel(prtd->ram_link);
- prtd->ram_link = -1;
-exit2:
- edma_free_channel(prtd->ram_channel);
- prtd->ram_channel = -1;
-exit1:
- return ret;
-}
-
-static int davinci_pcm_dma_request(struct snd_pcm_substream *substream)
-{
- struct snd_dma_buffer *iram_dma;
- struct davinci_runtime_data *prtd = substream->runtime->private_data;
- struct davinci_pcm_dma_params *params = prtd->params;
- int ret;
-
- if (!params)
- return -ENODEV;
-
- /* Request asp master DMA channel */
- ret = prtd->asp_channel = edma_alloc_channel(params->channel,
- davinci_pcm_dma_irq, substream,
- prtd->params->asp_chan_q);
- if (ret < 0)
- goto exit1;
-
- /* Request asp link channels */
- ret = prtd->asp_link[0] = edma_alloc_slot(
- EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
- if (ret < 0)
- goto exit2;
-
- iram_dma = (struct snd_dma_buffer *)substream->dma_buffer.private_data;
- if (iram_dma) {
- if (request_ping_pong(substream, prtd, iram_dma) == 0)
- return 0;
- printk(KERN_WARNING "%s: dma channel allocation failed,"
- "not using sram\n", __func__);
- }
-
- /* Issue transfer completion IRQ when the channel completes a
- * transfer, then always reload from the same slot (by a kind
- * of loopback link). The completion IRQ handler will update
- * the reload slot with a new buffer.
- *
- * REVISIT save p_ram here after setting up everything except
- * the buffer and its length (ccnt) ... use it as a template
- * so davinci_pcm_enqueue_dma() takes less time in IRQ.
- */
- edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
- prtd->asp_params.opt |= TCINTEN |
- EDMA_TCC(EDMA_CHAN_SLOT(prtd->asp_channel));
- prtd->asp_params.link_bcntrld = EDMA_CHAN_SLOT(prtd->asp_link[0]) << 5;
- edma_write_slot(prtd->asp_link[0], &prtd->asp_params);
- return 0;
-exit2:
- edma_free_channel(prtd->asp_channel);
- prtd->asp_channel = -1;
-exit1:
- return ret;
-}
-
-static int davinci_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
-{
- struct davinci_runtime_data *prtd = substream->runtime->private_data;
- int ret = 0;
-
- spin_lock(&prtd->lock);
-
- switch (cmd) {
- case SNDRV_PCM_TRIGGER_START:
- edma_start(prtd->asp_channel);
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
- prtd->ram_channel >= 0) {
- /* copy 1st iram buffer */
- edma_start(prtd->ram_channel);
- }
- break;
- case SNDRV_PCM_TRIGGER_RESUME:
- case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
- edma_resume(prtd->asp_channel);
- break;
- case SNDRV_PCM_TRIGGER_STOP:
- case SNDRV_PCM_TRIGGER_SUSPEND:
- case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
- edma_pause(prtd->asp_channel);
- break;
- default:
- ret = -EINVAL;
- break;
- }
-
- spin_unlock(&prtd->lock);
-
- return ret;
-}
-
-static int davinci_pcm_prepare(struct snd_pcm_substream *substream)
-{
- struct davinci_runtime_data *prtd = substream->runtime->private_data;
-
- davinci_pcm_period_reset(substream);
- if (prtd->ram_channel >= 0) {
- int ret = ping_pong_dma_setup(substream);
- if (ret < 0)
- return ret;
-
- edma_write_slot(prtd->ram_channel, &prtd->ram_params);
- edma_write_slot(prtd->asp_channel, &prtd->asp_params);
-
- print_buf_info(prtd->ram_channel, "ram_channel");
- print_buf_info(prtd->ram_link, "ram_link");
- print_buf_info(prtd->ram_link2, "ram_link2");
- print_buf_info(prtd->asp_channel, "asp_channel");
- print_buf_info(prtd->asp_link[0], "asp_link[0]");
- print_buf_info(prtd->asp_link[1], "asp_link[1]");
-
- /*
- * There is a phase offset of 2 periods between the position
- * used by dma setup and the position reported in the pointer
- * function.
- *
- * The phase offset, when not using ping-pong buffers, is due to
- * the two consecutive calls to davinci_pcm_enqueue_dma() below.
- *
- * Whereas here, with ping-pong buffers, the phase is due to
- * there being an entire buffer transfer complete before the
- * first dma completion event triggers davinci_pcm_dma_irq().
- */
- davinci_pcm_period_elapsed(substream);
- davinci_pcm_period_elapsed(substream);
-
- return 0;
- }
- davinci_pcm_enqueue_dma(substream);
- davinci_pcm_period_elapsed(substream);
-
- /* Copy self-linked parameter RAM entry into master channel */
- edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
- edma_write_slot(prtd->asp_channel, &prtd->asp_params);
- davinci_pcm_enqueue_dma(substream);
- davinci_pcm_period_elapsed(substream);
-
- return 0;
-}
-
-static snd_pcm_uframes_t
-davinci_pcm_pointer(struct snd_pcm_substream *substream)
-{
- struct snd_pcm_runtime *runtime = substream->runtime;
- struct davinci_runtime_data *prtd = runtime->private_data;
- unsigned int offset;
- int asp_count;
- unsigned int period_size = snd_pcm_lib_period_bytes(substream);
-
- /*
- * There is a phase offset of 2 periods between the position used by dma
- * setup and the position reported in the pointer function. Either +2 in
- * the dma setup or -2 here in the pointer function (with wrapping,
- * both) accounts for this offset -- choose the latter since it makes
- * the first-time setup clearer.
- */
- spin_lock(&prtd->lock);
- asp_count = prtd->period - 2;
- spin_unlock(&prtd->lock);
-
- if (asp_count < 0)
- asp_count += runtime->periods;
- asp_count *= period_size;
-
- offset = bytes_to_frames(runtime, asp_count);
- if (offset >= runtime->buffer_size)
- offset = 0;
-
- return offset;
-}
-
-static int davinci_pcm_open(struct snd_pcm_substream *substream)
-{
- struct snd_pcm_runtime *runtime = substream->runtime;
- struct davinci_runtime_data *prtd;
- struct snd_pcm_hardware *ppcm;
- int ret = 0;
- struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct davinci_pcm_dma_params *pa;
- struct davinci_pcm_dma_params *params;
-
- pa = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
- if (!pa)
- return -ENODEV;
- params = &pa[substream->stream];
-
- ppcm = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
- &pcm_hardware_playback : &pcm_hardware_capture;
- allocate_sram(substream, params->sram_pool, params->sram_size, ppcm);
- snd_soc_set_runtime_hwparams(substream, ppcm);
- /* ensure that buffer size is a multiple of period size */
- ret = snd_pcm_hw_constraint_integer(runtime,
- SNDRV_PCM_HW_PARAM_PERIODS);
- if (ret < 0)
- return ret;
-
- prtd = kzalloc(sizeof(struct davinci_runtime_data), GFP_KERNEL);
- if (prtd == NULL)
- return -ENOMEM;
-
- spin_lock_init(&prtd->lock);
- prtd->params = params;
- prtd->asp_channel = -1;
- prtd->asp_link[0] = prtd->asp_link[1] = -1;
- prtd->ram_channel = -1;
- prtd->ram_link = -1;
- prtd->ram_link2 = -1;
-
- runtime->private_data = prtd;
-
- ret = davinci_pcm_dma_request(substream);
- if (ret) {
- printk(KERN_ERR "davinci_pcm: Failed to get dma channels\n");
- kfree(prtd);
- }
-
- return ret;
-}
-
-static int davinci_pcm_close(struct snd_pcm_substream *substream)
-{
- struct snd_pcm_runtime *runtime = substream->runtime;
- struct davinci_runtime_data *prtd = runtime->private_data;
-
- if (prtd->ram_channel >= 0)
- edma_stop(prtd->ram_channel);
- if (prtd->asp_channel >= 0)
- edma_stop(prtd->asp_channel);
- if (prtd->asp_link[0] >= 0)
- edma_unlink(prtd->asp_link[0]);
- if (prtd->asp_link[1] >= 0)
- edma_unlink(prtd->asp_link[1]);
- if (prtd->ram_link >= 0)
- edma_unlink(prtd->ram_link);
-
- if (prtd->asp_link[0] >= 0)
- edma_free_slot(prtd->asp_link[0]);
- if (prtd->asp_link[1] >= 0)
- edma_free_slot(prtd->asp_link[1]);
- if (prtd->asp_channel >= 0)
- edma_free_channel(prtd->asp_channel);
- if (prtd->ram_link >= 0)
- edma_free_slot(prtd->ram_link);
- if (prtd->ram_link2 >= 0)
- edma_free_slot(prtd->ram_link2);
- if (prtd->ram_channel >= 0)
- edma_free_channel(prtd->ram_channel);
-
- kfree(prtd);
-
- return 0;
-}
-
-static int davinci_pcm_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *hw_params)
-{
- return snd_pcm_lib_malloc_pages(substream,
- params_buffer_bytes(hw_params));
-}
-
-static int davinci_pcm_hw_free(struct snd_pcm_substream *substream)
-{
- return snd_pcm_lib_free_pages(substream);
-}
-
-static int davinci_pcm_mmap(struct snd_pcm_substream *substream,
- struct vm_area_struct *vma)
-{
- struct snd_pcm_runtime *runtime = substream->runtime;
-
- return dma_mmap_writecombine(substream->pcm->card->dev, vma,
- runtime->dma_area,
- runtime->dma_addr,
- runtime->dma_bytes);
-}
-
-static struct snd_pcm_ops davinci_pcm_ops = {
- .open = davinci_pcm_open,
- .close = davinci_pcm_close,
- .ioctl = snd_pcm_lib_ioctl,
- .hw_params = davinci_pcm_hw_params,
- .hw_free = davinci_pcm_hw_free,
- .prepare = davinci_pcm_prepare,
- .trigger = davinci_pcm_trigger,
- .pointer = davinci_pcm_pointer,
- .mmap = davinci_pcm_mmap,
-};
-
-static int davinci_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream,
- size_t size)
-{
- struct snd_pcm_substream *substream = pcm->streams[stream].substream;
- struct snd_dma_buffer *buf = &substream->dma_buffer;
-
- buf->dev.type = SNDRV_DMA_TYPE_DEV;
- buf->dev.dev = pcm->card->dev;
- buf->private_data = NULL;
- buf->area = dma_alloc_writecombine(pcm->card->dev, size,
- &buf->addr, GFP_KERNEL);
-
- pr_debug("davinci_pcm: preallocate_dma_buffer: area=%p, addr=%p, "
- "size=%d\n", (void *) buf->area, (void *) buf->addr, size);
-
- if (!buf->area)
- return -ENOMEM;
-
- buf->bytes = size;
- return 0;
-}
-
-static void davinci_pcm_free(struct snd_pcm *pcm)
-{
- struct snd_pcm_substream *substream;
- struct snd_dma_buffer *buf;
- int stream;
-
- for (stream = 0; stream < 2; stream++) {
- struct snd_dma_buffer *iram_dma;
- substream = pcm->streams[stream].substream;
- if (!substream)
- continue;
-
- buf = &substream->dma_buffer;
- if (!buf->area)
- continue;
-
- dma_free_writecombine(pcm->card->dev, buf->bytes,
- buf->area, buf->addr);
- buf->area = NULL;
- iram_dma = buf->private_data;
- if (iram_dma) {
- davinci_free_sram(substream, iram_dma);
- kfree(iram_dma);
- }
- }
-}
-
-static int davinci_pcm_new(struct snd_soc_pcm_runtime *rtd)
-{
- struct snd_card *card = rtd->card->snd_card;
- struct snd_pcm *pcm = rtd->pcm;
- int ret;
-
- ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
- if (ret)
- return ret;
-
- if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
- ret = davinci_pcm_preallocate_dma_buffer(pcm,
- SNDRV_PCM_STREAM_PLAYBACK,
- pcm_hardware_playback.buffer_bytes_max);
- if (ret)
- return ret;
- }
-
- if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
- ret = davinci_pcm_preallocate_dma_buffer(pcm,
- SNDRV_PCM_STREAM_CAPTURE,
- pcm_hardware_capture.buffer_bytes_max);
- if (ret)
- return ret;
- }
-
- return 0;
-}
-
-static struct snd_soc_platform_driver davinci_soc_platform = {
- .ops = &davinci_pcm_ops,
- .pcm_new = davinci_pcm_new,
- .pcm_free = davinci_pcm_free,
-};
-
-int davinci_soc_platform_register(struct device *dev)
-{
- return devm_snd_soc_register_platform(dev, &davinci_soc_platform);
-}
-EXPORT_SYMBOL_GPL(davinci_soc_platform_register);
-
-MODULE_AUTHOR("Vladimir Barinov");
-MODULE_DESCRIPTION("TI DAVINCI PCM DMA module");
-MODULE_LICENSE("GPL");
+++ /dev/null
-/*
- * ALSA PCM interface for the TI DAVINCI processor
- *
- * Author: Vladimir Barinov, <vbarinov@embeddedalley.com>
- * Copyright: (C) 2007 MontaVista Software, Inc., <source@mvista.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef _DAVINCI_PCM_H
-#define _DAVINCI_PCM_H
-
-#include <linux/genalloc.h>
-#include <linux/platform_data/davinci_asp.h>
-#include <linux/platform_data/edma.h>
-
-struct davinci_pcm_dma_params {
- int channel; /* sync dma channel ID */
- unsigned short acnt;
- dma_addr_t dma_addr; /* device physical address for DMA */
- unsigned sram_size;
- struct gen_pool *sram_pool; /* SRAM gen_pool for ping pong */
- enum dma_event_q asp_chan_q; /* event queue number for ASP channel */
- enum dma_event_q ram_chan_q; /* event queue number for RAM channel */
- unsigned char data_type; /* xfer data type */
- unsigned char convert_mono_stereo;
- unsigned int fifo_level;
-};
-
-#if IS_ENABLED(CONFIG_SND_DAVINCI_SOC)
-int davinci_soc_platform_register(struct device *dev);
-#else
-static inline int davinci_soc_platform_register(struct device *dev)
-{
- return 0;
-}
-#endif /* CONFIG_SND_DAVINCI_SOC */
-
-#endif
#include <sound/pcm_params.h>
#include <sound/initval.h>
#include <sound/soc.h>
+#include <sound/dmaengine_pcm.h>
-#include "davinci-pcm.h"
+#include "edma-pcm.h"
#include "davinci-i2s.h"
#define MOD_REG_BIT(val, mask, set) do { \
struct davinci_vcif_dev {
struct davinci_vc *davinci_vc;
- struct davinci_pcm_dma_params dma_params[2];
+ struct snd_dmaengine_dai_dma_data dma_data[2];
+ int dma_request[2];
};
static void davinci_vcif_start(struct snd_pcm_substream *substream)
{
struct davinci_vcif_dev *davinci_vcif_dev = snd_soc_dai_get_drvdata(dai);
struct davinci_vc *davinci_vc = davinci_vcif_dev->davinci_vc;
- struct davinci_pcm_dma_params *dma_params =
- &davinci_vcif_dev->dma_params[substream->stream];
u32 w;
/* Restart the codec before setup */
/* Determine xfer data type */
switch (params_format(params)) {
case SNDRV_PCM_FORMAT_U8:
- dma_params->data_type = 0;
-
MOD_REG_BIT(w, DAVINCI_VC_CTRL_RD_BITS_8 |
DAVINCI_VC_CTRL_RD_UNSIGNED |
DAVINCI_VC_CTRL_WD_BITS_8 |
DAVINCI_VC_CTRL_WD_UNSIGNED, 1);
break;
case SNDRV_PCM_FORMAT_S8:
- dma_params->data_type = 1;
-
MOD_REG_BIT(w, DAVINCI_VC_CTRL_RD_BITS_8 |
DAVINCI_VC_CTRL_WD_BITS_8, 1);
DAVINCI_VC_CTRL_WD_UNSIGNED, 0);
break;
case SNDRV_PCM_FORMAT_S16_LE:
- dma_params->data_type = 2;
-
MOD_REG_BIT(w, DAVINCI_VC_CTRL_RD_BITS_8 |
DAVINCI_VC_CTRL_RD_UNSIGNED |
DAVINCI_VC_CTRL_WD_BITS_8 |
return -EINVAL;
}
- dma_params->acnt = dma_params->data_type;
-
writel(w, davinci_vc->base + DAVINCI_VC_CTRL);
return 0;
return ret;
}
-static int davinci_vcif_startup(struct snd_pcm_substream *substream,
- struct snd_soc_dai *dai)
-{
- struct davinci_vcif_dev *dev = snd_soc_dai_get_drvdata(dai);
-
- snd_soc_dai_set_dma_data(dai, substream, dev->dma_params);
- return 0;
-}
-
#define DAVINCI_VCIF_RATES SNDRV_PCM_RATE_8000_48000
static const struct snd_soc_dai_ops davinci_vcif_dai_ops = {
- .startup = davinci_vcif_startup,
.trigger = davinci_vcif_trigger,
.hw_params = davinci_vcif_hw_params,
};
+static int davinci_vcif_dai_probe(struct snd_soc_dai *dai)
+{
+ struct davinci_vcif_dev *dev = snd_soc_dai_get_drvdata(dai);
+
+ dai->playback_dma_data = &dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK];
+ dai->capture_dma_data = &dev->dma_data[SNDRV_PCM_STREAM_CAPTURE];
+
+ return 0;
+}
+
static struct snd_soc_dai_driver davinci_vcif_dai = {
+ .probe = davinci_vcif_dai_probe,
.playback = {
.channels_min = 1,
.channels_max = 2,
/* DMA tx params */
davinci_vcif_dev->davinci_vc = davinci_vc;
- davinci_vcif_dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK].channel =
- davinci_vc->davinci_vcif.dma_tx_channel;
- davinci_vcif_dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK].dma_addr =
- davinci_vc->davinci_vcif.dma_tx_addr;
+ davinci_vcif_dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].filter_data =
+ &davinci_vc->davinci_vcif.dma_tx_channel;
+ davinci_vcif_dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr =
+ davinci_vc->davinci_vcif.dma_tx_addr;
/* DMA rx params */
- davinci_vcif_dev->dma_params[SNDRV_PCM_STREAM_CAPTURE].channel =
- davinci_vc->davinci_vcif.dma_rx_channel;
- davinci_vcif_dev->dma_params[SNDRV_PCM_STREAM_CAPTURE].dma_addr =
- davinci_vc->davinci_vcif.dma_rx_addr;
+ davinci_vcif_dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].filter_data =
+ &davinci_vc->davinci_vcif.dma_rx_channel;
+ davinci_vcif_dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr =
+ davinci_vc->davinci_vcif.dma_rx_addr;
dev_set_drvdata(&pdev->dev, davinci_vcif_dev);
return ret;
}
- ret = davinci_soc_platform_register(&pdev->dev);
+ ret = edma_pcm_platform_register(&pdev->dev);
if (ret) {
dev_err(&pdev->dev, "register PCM failed: %d\n", ret);
snd_soc_unregister_component(&pdev->dev);
channels->min = channels->max = 2;
/* set SSP0 to 16 bit */
- snd_mask_set(¶ms->masks[SNDRV_PCM_HW_PARAM_FORMAT -
- SNDRV_PCM_HW_PARAM_FIRST_MASK],
- SNDRV_PCM_FORMAT_S16_LE);
+ params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
return 0;
}
channels->min = channels->max = 2;
/* set SSP2 to 24-bit */
- snd_mask_set(¶ms->masks[SNDRV_PCM_HW_PARAM_FORMAT -
- SNDRV_PCM_HW_PARAM_FIRST_MASK],
- SNDRV_PCM_FORMAT_S24_LE);
+ params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
return 0;
}
channels->min = channels->max = 2;
/* set SSP2 to 24-bit */
- snd_mask_set(¶ms->masks[SNDRV_PCM_HW_PARAM_FORMAT -
- SNDRV_PCM_HW_PARAM_FIRST_MASK],
- SNDRV_PCM_FORMAT_S24_LE);
+ params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
return 0;
}
channels->min = channels->max = 2;
/* set SSP2 to 24-bit */
- snd_mask_set(¶ms->masks[SNDRV_PCM_HW_PARAM_FORMAT -
- SNDRV_PCM_HW_PARAM_FIRST_MASK],
- SNDRV_PCM_FORMAT_S24_LE);
+ params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
return 0;
}
.codec_dai_name = "snd-soc-dummy-dai",
.codec_name = "snd-soc-dummy",
.platform_name = "sst-mfld-platform",
- .ignore_suspend = 1,
+ .nonatomic = true,
.dynamic = 1,
.dpcm_playback = 1,
.dpcm_capture = 1,
.cpu_dai_name = "ssp2-port",
.platform_name = "sst-mfld-platform",
.no_pcm = 1,
+ .nonatomic = true,
.codec_dai_name = "rt5670-aif1",
.codec_name = "i2c-10EC5670:00",
.dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF
| SND_SOC_DAIFMT_CBS_CFS,
.init = cht_codec_init,
.be_hw_params_fixup = cht_codec_fixup,
- .ignore_suspend = 1,
.dpcm_playback = 1,
.dpcm_capture = 1,
.ops = &cht_be_ssp2_ops,
static struct platform_driver snd_cht_mc_driver = {
.driver = {
.name = "cht-bsw-rt5672",
- .pm = &snd_soc_pm_ops,
},
.probe = snd_cht_mc_probe,
};
channels->min = channels->max = 2;
/* set SSP0 to 16 bit */
- snd_mask_set(¶ms->masks[SNDRV_PCM_HW_PARAM_FORMAT -
- SNDRV_PCM_HW_PARAM_FIRST_MASK],
- SNDRV_PCM_FORMAT_S16_LE);
+ params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
return 0;
}
ret_val = stream->ops->stream_drop(sst->dev, str_id);
break;
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+ case SNDRV_PCM_TRIGGER_SUSPEND:
dev_dbg(rtd->dev, "sst: in pause\n");
status = SST_PLATFORM_PAUSED;
ret_val = stream->ops->stream_pause(sst->dev, str_id);
break;
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+ case SNDRV_PCM_TRIGGER_RESUME:
dev_dbg(rtd->dev, "sst: in pause release\n");
status = SST_PLATFORM_RUNNING;
ret_val = stream->ops->stream_pause_release(sst->dev, str_id);
static int sst_soc_probe(struct snd_soc_platform *platform)
{
+ struct sst_data *drv = dev_get_drvdata(platform->dev);
+
+ drv->soc_card = platform->component.card;
return sst_dsp_init_v2_dpcm(platform);
}
return 0;
}
+#ifdef CONFIG_PM_SLEEP
+
+static int sst_soc_prepare(struct device *dev)
+{
+ struct sst_data *drv = dev_get_drvdata(dev);
+ int i;
+
+ /* suspend all pcms first */
+ snd_soc_suspend(drv->soc_card->dev);
+ snd_soc_poweroff(drv->soc_card->dev);
+
+ /* set the SSPs to idle */
+ for (i = 0; i < drv->soc_card->num_rtd; i++) {
+ struct snd_soc_dai *dai = drv->soc_card->rtd[i].cpu_dai;
+
+ if (dai->active) {
+ send_ssp_cmd(dai, dai->name, 0);
+ sst_handle_vb_timer(dai, false);
+ }
+ }
+
+ return 0;
+}
+
+static void sst_soc_complete(struct device *dev)
+{
+ struct sst_data *drv = dev_get_drvdata(dev);
+ int i;
+
+ /* restart SSPs */
+ for (i = 0; i < drv->soc_card->num_rtd; i++) {
+ struct snd_soc_dai *dai = drv->soc_card->rtd[i].cpu_dai;
+
+ if (dai->active) {
+ sst_handle_vb_timer(dai, true);
+ send_ssp_cmd(dai, dai->name, 1);
+ }
+ }
+ snd_soc_resume(drv->soc_card->dev);
+}
+
+#else
+
+#define sst_soc_prepare NULL
+#define sst_soc_complete NULL
+
+#endif
+
+
+static const struct dev_pm_ops sst_platform_pm = {
+ .prepare = sst_soc_prepare,
+ .complete = sst_soc_complete,
+};
+
static struct platform_driver sst_platform_driver = {
.driver = {
.name = "sst-mfld-platform",
+ .pm = &sst_platform_pm,
},
.probe = sst_platform_probe,
.remove = sst_platform_remove,
struct sst_platform_data *pdata;
struct snd_sst_bytes_v2 *byte_stream;
struct mutex lock;
+ struct snd_soc_card *soc_card;
};
int sst_register_dsp(struct sst_device *sst);
int sst_unregister_dsp(struct sst_device *sst);
return ret;
}
-static int intel_sst_runtime_resume(struct device *dev)
+static int intel_sst_suspend(struct device *dev)
{
- int ret = 0;
struct intel_sst_drv *ctx = dev_get_drvdata(dev);
+ struct sst_fw_save *fw_save;
+ int i, ret = 0;
- if (ctx->sst_state == SST_RESET) {
- ret = sst_load_fw(ctx);
- if (ret) {
- dev_err(dev, "FW download fail %d\n", ret);
- sst_set_fw_state_locked(ctx, SST_RESET);
+ /* check first if we are already in SW reset */
+ if (ctx->sst_state == SST_RESET)
+ return 0;
+
+ /*
+ * check if any stream is active and running
+ * they should already by suspend by soc_suspend
+ */
+ for (i = 1; i <= ctx->info.max_streams; i++) {
+ struct stream_info *stream = &ctx->streams[i];
+
+ if (stream->status == STREAM_RUNNING) {
+ dev_err(dev, "stream %d is running, cant susupend, abort\n", i);
+ return -EBUSY;
}
}
+ synchronize_irq(ctx->irq_num);
+ flush_workqueue(ctx->post_msg_wq);
+
+ /* Move the SST state to Reset */
+ sst_set_fw_state_locked(ctx, SST_RESET);
+
+ /* tell DSP we are suspending */
+ if (ctx->ops->save_dsp_context(ctx))
+ return -EBUSY;
+
+ /* save the memories */
+ fw_save = kzalloc(sizeof(*fw_save), GFP_KERNEL);
+ if (!fw_save)
+ return -ENOMEM;
+ fw_save->iram = kzalloc(ctx->iram_end - ctx->iram_base, GFP_KERNEL);
+ if (!fw_save->iram) {
+ ret = -ENOMEM;
+ goto iram;
+ }
+ fw_save->dram = kzalloc(ctx->dram_end - ctx->dram_base, GFP_KERNEL);
+ if (!fw_save->dram) {
+ ret = -ENOMEM;
+ goto dram;
+ }
+ fw_save->sram = kzalloc(SST_MAILBOX_SIZE, GFP_KERNEL);
+ if (!fw_save->sram) {
+ ret = -ENOMEM;
+ goto sram;
+ }
+
+ fw_save->ddr = kzalloc(ctx->ddr_end - ctx->ddr_base, GFP_KERNEL);
+ if (!fw_save->ddr) {
+ ret = -ENOMEM;
+ goto ddr;
+ }
+
+ memcpy32_fromio(fw_save->iram, ctx->iram, ctx->iram_end - ctx->iram_base);
+ memcpy32_fromio(fw_save->dram, ctx->dram, ctx->dram_end - ctx->dram_base);
+ memcpy32_fromio(fw_save->sram, ctx->mailbox, SST_MAILBOX_SIZE);
+ memcpy32_fromio(fw_save->ddr, ctx->ddr, ctx->ddr_end - ctx->ddr_base);
+
+ ctx->fw_save = fw_save;
+ ctx->ops->reset(ctx);
+ return 0;
+ddr:
+ kfree(fw_save->sram);
+sram:
+ kfree(fw_save->dram);
+dram:
+ kfree(fw_save->iram);
+iram:
+ kfree(fw_save);
+ return ret;
+}
+
+static int intel_sst_resume(struct device *dev)
+{
+ struct intel_sst_drv *ctx = dev_get_drvdata(dev);
+ struct sst_fw_save *fw_save = ctx->fw_save;
+ int ret = 0;
+ struct sst_block *block;
+
+ if (!fw_save)
+ return 0;
+
+ sst_set_fw_state_locked(ctx, SST_FW_LOADING);
+
+ /* we have to restore the memory saved */
+ ctx->ops->reset(ctx);
+
+ ctx->fw_save = NULL;
+
+ memcpy32_toio(ctx->iram, fw_save->iram, ctx->iram_end - ctx->iram_base);
+ memcpy32_toio(ctx->dram, fw_save->dram, ctx->dram_end - ctx->dram_base);
+ memcpy32_toio(ctx->mailbox, fw_save->sram, SST_MAILBOX_SIZE);
+ memcpy32_toio(ctx->ddr, fw_save->ddr, ctx->ddr_end - ctx->ddr_base);
+
+ kfree(fw_save->sram);
+ kfree(fw_save->dram);
+ kfree(fw_save->iram);
+ kfree(fw_save->ddr);
+ kfree(fw_save);
+
+ block = sst_create_block(ctx, 0, FW_DWNL_ID);
+ if (block == NULL)
+ return -ENOMEM;
+
+
+ /* start and wait for ack */
+ ctx->ops->start(ctx);
+ ret = sst_wait_timeout(ctx, block);
+ if (ret) {
+ dev_err(ctx->dev, "fw download failed %d\n", ret);
+ /* FW download failed due to timeout */
+ ret = -EBUSY;
+
+ } else {
+ sst_set_fw_state_locked(ctx, SST_FW_RUNNING);
+ }
+
+ sst_free_block(ctx, block);
return ret;
}
const struct dev_pm_ops intel_sst_pm = {
+ .suspend = intel_sst_suspend,
+ .resume = intel_sst_resume,
.runtime_suspend = intel_sst_runtime_suspend,
- .runtime_resume = intel_sst_runtime_resume,
};
EXPORT_SYMBOL_GPL(intel_sst_pm);
u64 csr2;
};
+struct sst_fw_save {
+ void *iram;
+ void *dram;
+ void *sram;
+ void *ddr;
+};
+
/**
* struct intel_sst_drv - driver ops
*
* persistent till worker thread gets called
*/
char firmware_name[FW_NAME_SIZE];
+
+ struct sst_fw_save *fw_save;
};
/* misc definitions */
int sst_context_init(struct intel_sst_drv *ctx);
void sst_context_cleanup(struct intel_sst_drv *ctx);
void sst_configure_runtime_pm(struct intel_sst_drv *ctx);
+void memcpy32_toio(void __iomem *dst, const void *src, int count);
+void memcpy32_fromio(void *dst, const void __iomem *src, int count);
+
#endif
static int sst_power_control(struct device *dev, bool state)
{
struct intel_sst_drv *ctx = dev_get_drvdata(dev);
-
- dev_dbg(ctx->dev, "state:%d", state);
- if (state == true)
- return pm_runtime_get_sync(dev);
- else
+ int ret = 0;
+ int usage_count = 0;
+
+#ifdef CONFIG_PM
+ usage_count = atomic_read(&dev->power.usage_count);
+#else
+ usage_count = 1;
+#endif
+
+ if (state == true) {
+ ret = pm_runtime_get_sync(dev);
+
+ dev_dbg(ctx->dev, "Enable: pm usage count: %d\n", usage_count);
+ if (ret < 0) {
+ dev_err(ctx->dev, "Runtime get failed with err: %d\n", ret);
+ return ret;
+ }
+ if ((ctx->sst_state == SST_RESET) && (usage_count == 1)) {
+ ret = sst_load_fw(ctx);
+ if (ret) {
+ dev_err(dev, "FW download fail %d\n", ret);
+ sst_set_fw_state_locked(ctx, SST_RESET);
+ ret = sst_pm_runtime_put(ctx);
+ }
+ }
+ } else {
+ dev_dbg(ctx->dev, "Disable: pm usage count: %d\n", usage_count);
return sst_pm_runtime_put(ctx);
+ }
+ return ret;
}
/*
return sst_drop_stream(ctx, str_id);
}
+static int sst_stream_pause(struct device *dev, int str_id)
+{
+ struct stream_info *str_info;
+ struct intel_sst_drv *ctx = dev_get_drvdata(dev);
+
+ if (ctx->sst_state != SST_FW_RUNNING)
+ return 0;
+
+ str_info = get_stream_info(ctx, str_id);
+ if (!str_info)
+ return -EINVAL;
+
+ return sst_pause_stream(ctx, str_id);
+}
+
+static int sst_stream_resume(struct device *dev, int str_id)
+{
+ struct stream_info *str_info;
+ struct intel_sst_drv *ctx = dev_get_drvdata(dev);
+
+ if (ctx->sst_state != SST_FW_RUNNING)
+ return 0;
+
+ str_info = get_stream_info(ctx, str_id);
+ if (!str_info)
+ return -EINVAL;
+ return sst_resume_stream(ctx, str_id);
+}
+
static int sst_stream_init(struct device *dev, struct pcm_stream_info *str_info)
{
int str_id = 0;
.stream_init = sst_stream_init,
.stream_start = sst_stream_start,
.stream_drop = sst_stream_drop,
+ .stream_pause = sst_stream_pause,
+ .stream_pause_release = sst_stream_resume,
.stream_read_tstamp = sst_read_timestamp,
.send_byte_stream = sst_send_byte_stream,
.close = sst_close_pcm_stream,
#include "sst.h"
#include "../sst-dsp.h"
-static inline void memcpy32_toio(void __iomem *dst, const void *src, int count)
+void memcpy32_toio(void __iomem *dst, const void *src, int count)
+{
+ /* __iowrite32_copy uses 32-bit count values so divide by 4 for
+ * right count in words
+ */
+ __iowrite32_copy(dst, src, count/4);
+}
+
+void memcpy32_fromio(void *dst, const void __iomem *src, int count)
{
/* __iowrite32_copy uses 32-bit count values so divide by 4 for
* right count in words
/* DAPM dai link stream work */
INIT_DELAYED_WORK(&rtd->delayed_work, close_delayed_work);
+ pcm->nonatomic = rtd->dai_link->nonatomic;
rtd->pcm = pcm;
pcm->private_data = rtd;
projects / cascardo / linux.git / commitdiff