Merge branch 'fix/fsl-dspi' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie...

diff --combined drivers/spi/spi-fsl-dspi.c
index 1ccbd4e,8af20aa..c184f21
--- 1/drivers/spi/spi-fsl-dspi.c
--- 2/drivers/spi/spi-fsl-dspi.c
+++ b/drivers/spi/spi-fsl-dspi.c
@@@ -20,6 -20,7 +20,7 @@@
  #include <linux/interrupt.h>
  #include <linux/io.h>
  #include <linux/kernel.h>
+ #include <linux/math64.h>
  #include <linux/module.h>
  #include <linux/of.h>
  #include <linux/of_device.h>
@@@ -29,6 -30,7 +30,7 @@@
  #include <linux/sched.h>
  #include <linux/spi/spi.h>
  #include <linux/spi/spi_bitbang.h>
+ #include <linux/time.h>
  
  #define DRIVER_NAME "fsl-dspi"
  
@@@ -51,7 -53,7 +53,7 @@@
  #define SPI_CTAR_CPOL(x)      ((x) << 26)
  #define SPI_CTAR_CPHA(x)      ((x) << 25)
  #define SPI_CTAR_LSBFE(x)     ((x) << 24)
- #define SPI_CTAR_PCSSCR(x)    (((x) & 0x00000003) << 22)
+ #define SPI_CTAR_PCSSCK(x)    (((x) & 0x00000003) << 22)
  #define SPI_CTAR_PASC(x)      (((x) & 0x00000003) << 20)
  #define SPI_CTAR_PDT(x)       (((x) & 0x00000003) << 18)
  #define SPI_CTAR_PBR(x)       (((x) & 0x00000003) << 16)
@@@ -59,6 -61,7 +61,7 @@@
  #define SPI_CTAR_ASC(x)       (((x) & 0x0000000f) << 8)
  #define SPI_CTAR_DT(x)                (((x) & 0x0000000f) << 4)
  #define SPI_CTAR_BR(x)                ((x) & 0x0000000f)
+ #define SPI_CTAR_SCALE_BITS   0xf
  
  #define SPI_CTAR0_SLAVE       0x0c
  
@@@ -148,23 -151,66 +151,66 @@@ static void hz_to_spi_baud(char *pbr, c
                16,     32,     64,     128,
                256,    512,    1024,   2048,
                4096,   8192,   16384,  32768 };
-       int temp, i = 0, j = 0;
+       int scale_needed, scale, minscale = INT_MAX;
+       int i, j;
+ 
+       scale_needed = clkrate / speed_hz;
+       if (clkrate % speed_hz)
+               scale_needed++;
+ 
+       for (i = 0; i < ARRAY_SIZE(brs); i++)
+               for (j = 0; j < ARRAY_SIZE(pbr_tbl); j++) {
+                       scale = brs[i] * pbr_tbl[j];
+                       if (scale >= scale_needed) {
+                               if (scale < minscale) {
+                                       minscale = scale;
+                                       *br = i;
+                                       *pbr = j;
+                               }
+                               break;
+                       }
+               }
  
-       temp = clkrate / 2 / speed_hz;
+       if (minscale == INT_MAX) {
+               pr_warn("Can not find valid baud rate,speed_hz is %d,clkrate is %ld, we use the max prescaler value.\n",
+                       speed_hz, clkrate);
+               *pbr = ARRAY_SIZE(pbr_tbl) - 1;
+               *br =  ARRAY_SIZE(brs) - 1;
+       }
+ }
  
-       for (i = 0; i < ARRAY_SIZE(pbr_tbl); i++)
-               for (j = 0; j < ARRAY_SIZE(brs); j++) {
-                       if (pbr_tbl[i] * brs[j] >= temp) {
-                               *pbr = i;
-                               *br = j;
-                               return;
+ static void ns_delay_scale(char *psc, char *sc, int delay_ns,
+               unsigned long clkrate)
+ {
+       int pscale_tbl[4] = {1, 3, 5, 7};
+       int scale_needed, scale, minscale = INT_MAX;
+       int i, j;
+       u32 remainder;
+ 
+       scale_needed = div_u64_rem((u64)delay_ns * clkrate, NSEC_PER_SEC,
+                       &remainder);
+       if (remainder)
+               scale_needed++;
+ 
+       for (i = 0; i < ARRAY_SIZE(pscale_tbl); i++)
+               for (j = 0; j <= SPI_CTAR_SCALE_BITS; j++) {
+                       scale = pscale_tbl[i] * (2 << j);
+                       if (scale >= scale_needed) {
+                               if (scale < minscale) {
+                                       minscale = scale;
+                                       *psc = i;
+                                       *sc = j;
+                               }
+                               break;
                        }
                }
  
-       pr_warn("Can not find valid baud rate,speed_hz is %d,clkrate is %ld\
-               ,we use the max prescaler value.\n", speed_hz, clkrate);
-       *pbr = ARRAY_SIZE(pbr_tbl) - 1;
-       *br =  ARRAY_SIZE(brs) - 1;
+       if (minscale == INT_MAX) {
+               pr_warn("Cannot find correct scale values for %dns delay at clkrate %ld, using max prescaler value",
+                       delay_ns, clkrate);
+               *psc = ARRAY_SIZE(pscale_tbl) - 1;
+               *sc = SPI_CTAR_SCALE_BITS;
+       }
  }
  
  static int dspi_transfer_write(struct fsl_dspi *dspi)
@@@ -295,10 -341,10 +341,10 @@@ static int dspi_transfer_one_message(st
                dspi->cur_msg = message;
                dspi->cur_chip = spi_get_ctldata(spi);
                dspi->cs = spi->chip_select;
+               dspi->cs_change = 0;
                if (dspi->cur_transfer->transfer_list.next
                                == &dspi->cur_msg->transfers)
-                       transfer->cs_change = 1;
-               dspi->cs_change = transfer->cs_change;
+                       dspi->cs_change = 1;
                dspi->void_write_data = dspi->cur_chip->void_write_data;
  
                dspi->dataflags = 0;
@@@ -345,7 -391,10 +391,10 @@@ static int dspi_setup(struct spi_devic
  {
        struct chip_data *chip;
        struct fsl_dspi *dspi = spi_master_get_devdata(spi->master);
-       unsigned char br = 0, pbr = 0, fmsz = 0;
+       u32 cs_sck_delay = 0, sck_cs_delay = 0;
+       unsigned char br = 0, pbr = 0, pcssck = 0, cssck = 0;
+       unsigned char pasc = 0, asc = 0, fmsz = 0;
+       unsigned long clkrate;
  
        if ((spi->bits_per_word >= 4) && (spi->bits_per_word <= 16)) {
                fmsz = spi->bits_per_word - 1;
@@@ -362,18 -411,34 +411,34 @@@
                        return -ENOMEM;
        }
  
+       of_property_read_u32(spi->dev.of_node, "fsl,spi-cs-sck-delay",
+                       &cs_sck_delay);
+ 
+       of_property_read_u32(spi->dev.of_node, "fsl,spi-sck-cs-delay",
+                       &sck_cs_delay);
+ 
        chip->mcr_val = SPI_MCR_MASTER | SPI_MCR_PCSIS |
                SPI_MCR_CLR_TXF | SPI_MCR_CLR_RXF;
  
        chip->void_write_data = 0;
  
-       hz_to_spi_baud(&pbr, &br,
-                       spi->max_speed_hz, clk_get_rate(dspi->clk));
+       clkrate = clk_get_rate(dspi->clk);
+       hz_to_spi_baud(&pbr, &br, spi->max_speed_hz, clkrate);
+ 
+       /* Set PCS to SCK delay scale values */
+       ns_delay_scale(&pcssck, &cssck, cs_sck_delay, clkrate);
+ 
+       /* Set After SCK delay scale values */
+       ns_delay_scale(&pasc, &asc, sck_cs_delay, clkrate);
  
        chip->ctar_val =  SPI_CTAR_FMSZ(fmsz)
                | SPI_CTAR_CPOL(spi->mode & SPI_CPOL ? 1 : 0)
                | SPI_CTAR_CPHA(spi->mode & SPI_CPHA ? 1 : 0)
                | SPI_CTAR_LSBFE(spi->mode & SPI_LSB_FIRST ? 1 : 0)
+               | SPI_CTAR_PCSSCK(pcssck)
+               | SPI_CTAR_CSSCK(cssck)
+               | SPI_CTAR_PASC(pasc)
+               | SPI_CTAR_ASC(asc)
                | SPI_CTAR_PBR(pbr)
                | SPI_CTAR_BR(br);
  
@@@ -501,7 -566,7 +566,7 @@@ static int dspi_probe(struct platform_d
                goto out_master_put;
        }
  
 -      dspi->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "dspi", base,
 +      dspi->regmap = devm_regmap_init_mmio_clk(&pdev->dev, NULL, base,
                                                &dspi_regmap_config);
        if (IS_ERR(dspi->regmap)) {
                dev_err(&pdev->dev, "failed to init regmap: %ld\n",