powerpc/fsl_booke: protect the access to MAS7
authorKevin Hao <haokexin@gmail.com>
Tue, 24 Dec 2013 07:12:03 +0000 (15:12 +0800)
committerScott Wood <scottwood@freescale.com>
Thu, 9 Jan 2014 23:52:14 +0000 (17:52 -0600)
The e500v1 doesn't implement the MAS7, so we should avoid to access
this register on that implementations. In the current kernel, the
access to MAS7 are protected by either CONFIG_PHYS_64BIT or
MMU_FTR_BIG_PHYS. Since some code are executed before the code
patching, we have to use CONFIG_PHYS_64BIT in these cases.

Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
arch/powerpc/kernel/head_fsl_booke.S
arch/powerpc/mm/hugetlbpage-book3e.c

index f45726a..09921a5 100644 (file)
@@ -82,7 +82,9 @@ _ENTRY(_start);
        and     r19,r3,r18              /* r19 = page offset */
        andc    r31,r20,r18             /* r31 = page base */
        or      r31,r31,r19             /* r31 = devtree phys addr */
+#ifdef CONFIG_PHYS_64BIT
        mfspr   r30,SPRN_MAS7
+#endif
 
        li      r25,0                   /* phys kernel start (low) */
        li      r24,0                   /* CPU number */
index 74551b5..646c4bf 100644 (file)
@@ -103,7 +103,8 @@ void book3e_hugetlb_preload(struct vm_area_struct *vma, unsigned long ea,
        if (mmu_has_feature(MMU_FTR_USE_PAIRED_MAS)) {
                mtspr(SPRN_MAS7_MAS3, mas7_3);
        } else {
-               mtspr(SPRN_MAS7, upper_32_bits(mas7_3));
+               if (mmu_has_feature(MMU_FTR_BIG_PHYS))
+                       mtspr(SPRN_MAS7, upper_32_bits(mas7_3));
                mtspr(SPRN_MAS3, lower_32_bits(mas7_3));
        }