mmc: dw_mmc: fix the wrong setting for UHS-DDR50 mode
authorJaehoon Chung <jh80.chung@samsung.com>
Wed, 21 Oct 2015 10:49:42 +0000 (19:49 +0900)
committerUlf Hansson <ulf.hansson@linaro.org>
Thu, 29 Oct 2015 10:00:43 +0000 (11:00 +0100)
When card is running with DDR mode, dwmmc needs to set DDR_REG bit at
UHS_REG register.
Before this patch, dwmmc controller doesn't consider this.
If this patch is not applied, CRC or other error shoulds be occurred.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/dw_mmc.c

index 57a9577..7a6cedb 100644 (file)
@@ -1293,6 +1293,7 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 
        /* DDR mode set */
        if (ios->timing == MMC_TIMING_MMC_DDR52 ||
+           ios->timing == MMC_TIMING_UHS_DDR50 ||
            ios->timing == MMC_TIMING_MMC_HS400)
                regs |= ((0x1 << slot->id) << 16);
        else