ARM: dts: OMAP3+: add clock nodes for CPU
authorNishanth Menon <nm@ti.com>
Wed, 29 Jan 2014 18:19:17 +0000 (12:19 -0600)
committerTony Lindgren <tony@atomide.com>
Fri, 28 Feb 2014 23:04:28 +0000 (15:04 -0800)
OMAP34xx, AM3517 and OMAP36xx platforms use dpll1 clock.

OMAP443x, OMAP446x, OMAP447x, OMAP5, DRA7, AM43xx platforms use
dpll_mpu clock.

Latency used is the generic latency defined in omap-cpufreq
driver.

Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/am33xx.dtsi
arch/arm/boot/dts/am4372.dtsi
arch/arm/boot/dts/dra7.dtsi
arch/arm/boot/dts/omap3.dtsi
arch/arm/boot/dts/omap4.dtsi
arch/arm/boot/dts/omap5.dtsi

index 3b60541..d0ecefd 100644 (file)
                                275000  1125000
                        >;
                        voltage-tolerance = <2>; /* 2 percentage */
+
+                       clocks = <&dpll_mpu_ck>;
+                       clock-names = "cpu";
+
                        clock-latency = <300000>; /* From omap-cpufreq driver */
                };
        };
index bcf77a8..eb74ab8 100644 (file)
                        compatible = "arm,cortex-a9";
                        device_type = "cpu";
                        reg = <0>;
+
+                       clocks = <&dpll_mpu_ck>;
+                       clock-names = "cpu";
+
+                       clock-latency = <300000>; /* From omap-cpufreq driver */
                };
        };
 
index bff4348..17f3b5a 100644 (file)
                                1000000 1060000
                                1176000 1160000
                                >;
+
+                       clocks = <&dpll_mpu_ck>;
+                       clock-names = "cpu";
+
+                       clock-latency = <300000>; /* From omap-cpufreq driver */
                };
                cpu@1 {
                        device_type = "cpu";
index 1019b62..d392419 100644 (file)
                        compatible = "arm,cortex-a8";
                        device_type = "cpu";
                        reg = <0x0>;
+
+                       clocks = <&dpll1_ck>;
+                       clock-names = "cpu";
+
+                       clock-latency = <300000>; /* From omap-cpufreq driver */
                };
        };
 
index fd27392..8902237 100644 (file)
                        device_type = "cpu";
                        next-level-cache = <&L2>;
                        reg = <0x0>;
+
+                       clocks = <&dpll_mpu_ck>;
+                       clock-names = "cpu";
+
+                       clock-latency = <300000>; /* From omap-cpufreq driver */
                };
                cpu@1 {
                        compatible = "arm,cortex-a9";
index 9ba5c18..f15c31c 100644 (file)
                                1000000 1060000
                                1500000 1250000
                        >;
+
+                       clocks = <&dpll_mpu_ck>;
+                       clock-names = "cpu";
+
+                       clock-latency = <300000>; /* From omap-cpufreq driver */
+
                        /* cooling options */
                        cooling-min-level = <0>;
                        cooling-max-level = <2>;