ath9k: [DFS] add pulse width tolerance for ETSI
authorZefir Kurtisi <zefir.kurtisi@neratec.com>
Wed, 31 Oct 2012 11:23:01 +0000 (12:23 +0100)
committerJohn W. Linville <linville@tuxdriver.com>
Fri, 16 Nov 2012 19:11:13 +0000 (14:11 -0500)
Add 5% width tolerance for radar patterns defined by ETSI.

Signed-off-by: Zefir Kurtisi <zefir.kurtisi@neratec.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c

index 3b12914..24877b0 100644 (file)
@@ -42,10 +42,15 @@ struct radar_types {
 #define MIN_PPB_THRESH 50
 #define PPB_THRESH(PPB) ((PPB * MIN_PPB_THRESH + 50) / 100)
 #define PRF2PRI(PRF) ((1000000 + PRF / 2) / PRF)
+/* percentage of pulse width tolerance */
+#define WIDTH_TOLERANCE 5
+#define WIDTH_LOWER(X) ((X*(100-WIDTH_TOLERANCE)+50)/100)
+#define WIDTH_UPPER(X) ((X*(100+WIDTH_TOLERANCE)+50)/100)
 
 #define ETSI_PATTERN(ID, WMIN, WMAX, PMIN, PMAX, PRF, PPB)     \
 {                                                              \
-       ID, WMIN, WMAX, (PRF2PRI(PMAX) - PRI_TOLERANCE),        \
+       ID, WIDTH_LOWER(WMIN), WIDTH_UPPER(WMAX),               \
+       (PRF2PRI(PMAX) - PRI_TOLERANCE),                        \
        (PRF2PRI(PMIN) * PRF + PRI_TOLERANCE), PRF, PPB * PRF,  \
        PPB_THRESH(PPB), PRI_TOLERANCE,                         \
 }