ARM: dts: exynos: Add watchdog and Security SubSystem to Exynos5410

Move watchdog and Security SubSystem nodes from exynos5420.dtsi to file
shared with Exynos5410 and configure the clocks on the latter.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>

diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
index edd9544..137f484 100644 (file)
--- a/arch/arm/boot/dts/exynos5410.dtsi
+++ b/arch/arm/boot/dts/exynos5410.dtsi
@@ -298,6 +298,11 @@
        clock-names = "uart", "clk_uart_baud0";
 };
 
+&sss {
+       clocks = <&clock CLK_SSS>;
+       clock-names = "secss";
+};
+
 &sromc {
        #address-cells = <2>;
        #size-cells = <1>;
@@ -350,4 +355,10 @@
        samsung,pmureg-phandle = <&pmu_system_controller>;
 };
 
+&watchdog {
+       clocks = <&clock CLK_WDT>;
+       clock-names = "watchdog";
+       samsung,syscon-phandle = <&pmu_system_controller>;
+};
+
 #include "exynos5410-pinctrl.dtsi"

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index b036b46..fa306a1 100644 (file)
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -731,23 +731,6 @@
                        #include "exynos4412-tmu-sensor-conf.dtsi"
                };
 
-               watchdog: watchdog@101D0000 {
-                       compatible = "samsung,exynos5420-wdt";
-                       reg = <0x101D0000 0x100>;
-                       interrupts = <0 42 0>;
-                       clocks = <&clock CLK_WDT>;
-                       clock-names = "watchdog";
-                       samsung,syscon-phandle = <&pmu_system_controller>;
-               };
-
-               sss: sss@10830000 {
-                       compatible = "samsung,exynos4210-secss";
-                       reg = <0x10830000 0x300>;
-                       interrupts = <0 112 0>;
-                       clocks = <&clock CLK_SSS>;
-                       clock-names = "secss";
-               };
-
                sysmmu_g2dr: sysmmu@0x10A60000 {
                        compatible = "samsung,exynos-sysmmu";
                        reg = <0x10A60000 0x1000>;
@@ -1438,6 +1421,11 @@
        clock-names = "uart", "clk_uart_baud0";
 };
 
+&sss {
+       clocks = <&clock CLK_SSS>;
+       clock-names = "secss";
+};
+
 &usbdrd3_0 {
        clocks = <&clock CLK_USBD300>;
        clock-names = "usbdrd30";
@@ -1481,4 +1469,10 @@
        samsung,pmureg-phandle = <&pmu_system_controller>;
 };
 
+&watchdog {
+       clocks = <&clock CLK_WDT>;
+       clock-names = "watchdog";
+       samsung,syscon-phandle = <&pmu_system_controller>;
+};
+
 #include "exynos5420-pinctrl.dtsi"

diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index 0eb8aa3..06a6049 100644 (file)
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -74,6 +74,18 @@
                        };
                };
 
+               watchdog: watchdog@101d0000 {
+                       compatible = "samsung,exynos5420-wdt";
+                       reg = <0x101d0000 0x100>;
+                       interrupts = <0 42 0>;
+               };
+
+               sss: sss@10830000 {
+                       compatible = "samsung,exynos4210-secss";
+                       reg = <0x10830000 0x300>;
+                       interrupts = <0 112 0>;
+               };
+
                /* i2c_0-3 are defined in exynos5.dtsi */
                hsi2c_4: i2c@12ca0000 {
                        compatible = "samsung,exynos5250-hsi2c";