drm/amdgpu/si/dpm: fix phase shedding setup
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 27 Sep 2016 18:57:35 +0000 (14:57 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 28 Sep 2016 20:13:17 +0000 (16:13 -0400)
Used the wrong index to setup the phase shedding mask.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/si_dpm.c
drivers/gpu/drm/amd/amdgpu/sislands_smc.h

index 73ccf33..8bd0892 100644 (file)
@@ -4593,7 +4593,7 @@ static int si_populate_smc_voltage_tables(struct amdgpu_device *adev,
                                                              &adev->pm.dpm.dyn_state.phase_shedding_limits_table)) {
                                si_populate_smc_voltage_table(adev, &si_pi->vddc_phase_shed_table, table);
 
-                               table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC] =
+                               table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING] =
                                        cpu_to_be32(si_pi->vddc_phase_shed_table.mask_low);
 
                                si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_phase_shedding_delay,
index ee4b846..d2930ec 100644 (file)
@@ -194,6 +194,7 @@ typedef struct SISLANDS_SMC_SWSTATE SISLANDS_SMC_SWSTATE;
 #define SISLANDS_SMC_VOLTAGEMASK_VDDC  0
 #define SISLANDS_SMC_VOLTAGEMASK_MVDD  1
 #define SISLANDS_SMC_VOLTAGEMASK_VDDCI 2
+#define SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING 3
 #define SISLANDS_SMC_VOLTAGEMASK_MAX   4
 
 struct SISLANDS_SMC_VOLTAGEMASKTABLE