ARM: dts: imx6qdl: don't configure reserved pad settings

Several dts files set a bit in the SPEED field for pads
RGMII_{R,T}{XC,D0,D1,D2,D3,X_CTL}, but that doesn't exist. Writing there
doesn't have an effect and the bit reads as zero.

Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6dl-riotboard.dts b/arch/arm/boot/dts/imx6dl-riotboard.dts
index 2becd7c..75d7343 100644 (file)
--- a/arch/arm/boot/dts/imx6dl-riotboard.dts
+++ b/arch/arm/boot/dts/imx6dl-riotboard.dts
@@ -376,18 +376,18 @@
                        fsl,pins = <
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x0a0b1         /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0         /* AR8035 pin strapping: IO voltage: pull up */
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x130b0         /* AR8035 pin strapping: PHYADDR#0: pull down */
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x130b0         /* AR8035 pin strapping: PHYADDR#1: pull down */
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0         /* AR8035 pin strapping: MODE#1: pull up */
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0         /* AR8035 pin strapping: MODE#3: pull up */
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030         /* AR8035 pin strapping: IO voltage: pull up */
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x13030         /* AR8035 pin strapping: PHYADDR#0: pull down */
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x13030         /* AR8035 pin strapping: PHYADDR#1: pull down */
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030         /* AR8035 pin strapping: MODE#1: pull up */
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030         /* AR8035 pin strapping: MODE#3: pull up */
                                MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x130b0         /* AR8035 pin strapping: MODE#0: pull down */
                                MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8      /* GPIO16 -> AR8035 25MHz */
                                MX6QDL_PAD_EIM_D31__GPIO3_IO31          0x130b0         /* RGMII_nRST */

diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts
index d8acf15..4989d0b 100644 (file)
--- a/arch/arm/boot/dts/imx6q-arm2.dts
+++ b/arch/arm/boot/dts/imx6q-arm2.dts
@@ -79,19 +79,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_KEY_COL1__ENET_MDIO          0x1b0b0
                                MX6QDL_PAD_KEY_COL2__ENET_MDC           0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
                        >;
                };

diff --git a/arch/arm/boot/dts/imx6q-ba16.dtsi b/arch/arm/boot/dts/imx6q-ba16.dtsi
index f2adc60..308e11c 100644 (file)
--- a/arch/arm/boot/dts/imx6q-ba16.dtsi
+++ b/arch/arm/boot/dts/imx6q-ba16.dtsi
@@ -448,19 +448,19 @@
                fsl,pins = <
                        MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x100b0
                        MX6QDL_PAD_ENET_MDC__ENET_MDC         0x100b0
-                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x100b0
-                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x100b0
-                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x100b0
-                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x100b0
-                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x100b0
-                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
+                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x10030
+                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x10030
+                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x10030
+                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x10030
+                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x10030
+                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x100b0
-                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b0b0
-                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b030
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b030
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b030
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b030
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b030
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
                        /* FEC Reset */
                        MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28     0x1b0b0
                        /* AR8033 Interrupt */

diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts
index b5de7e6..59bc5a4 100644 (file)
--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts
+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts
@@ -168,18 +168,18 @@
 
        pinctrl_enet: enetgrp {
                fsl,pins = <
-                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
                        MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                        MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
index 9059073..908dab6 100644 (file)
--- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
+++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
@@ -324,18 +324,18 @@
 
                pinctrl_enet: enetgrp {
                        fsl,pins = <
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

diff --git a/arch/arm/boot/dts/imx6q-evi.dts b/arch/arm/boot/dts/imx6q-evi.dts
index 4fa5601..9647c09 100644 (file)
--- a/arch/arm/boot/dts/imx6q-evi.dts
+++ b/arch/arm/boot/dts/imx6q-evi.dts
@@ -303,19 +303,19 @@
                fsl,pins = <
                        MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
                        MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
-                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
-                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
-                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
-                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
-                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
-                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
+                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
+                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
+                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
+                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
+                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
-                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
-                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
-                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
-                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
-                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
-                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
                        MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x4001b0a8
                        MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
                >;

diff --git a/arch/arm/boot/dts/imx6q-gw5400-a.dts b/arch/arm/boot/dts/imx6q-gw5400-a.dts
index 0511137..747bc10 100644 (file)
--- a/arch/arm/boot/dts/imx6q-gw5400-a.dts
+++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts
@@ -421,18 +421,18 @@
 
                pinctrl_enet: enetgrp {
                        fsl,pins = <
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

diff --git a/arch/arm/boot/dts/imx6q-marsboard.dts b/arch/arm/boot/dts/imx6q-marsboard.dts
index 3f8013c..f7995c5 100644 (file)
--- a/arch/arm/boot/dts/imx6q-marsboard.dts
+++ b/arch/arm/boot/dts/imx6q-marsboard.dts
@@ -252,26 +252,26 @@
                fsl,pins = <
                        MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                        MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
-                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                        /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x0a0b1
                        /* AR8035 pin strapping: IO voltage: pull up */
-                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
                        /* AR8035 pin strapping: PHYADDR#0: pull down */
-                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x130b0
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x13030
                        /* AR8035 pin strapping: PHYADDR#1: pull down */
-                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x130b0
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x13030
                        /* AR8035 pin strapping: MODE#1: pull up */
-                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
                        /* AR8035 pin strapping: MODE#3: pull up */
-                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
                        /* AR8035 pin strapping: MODE#0: pull down */
-                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x130b0
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x13030
                        /* GPIO16 -> AR8035 25MHz */
                        MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
                        /* RGMII_nRST */

diff --git a/arch/arm/boot/dts/imx6q-novena.dts b/arch/arm/boot/dts/imx6q-novena.dts
index 5acd0c6..1723e89 100644 (file)
--- a/arch/arm/boot/dts/imx6q-novena.dts
+++ b/arch/arm/boot/dts/imx6q-novena.dts
@@ -549,12 +549,12 @@
                        MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b028
                        MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b028
                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
-                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                        MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
                        /* Ethernet reset */
                        MX6QDL_PAD_EIM_D23__GPIO3_IO23          0x1b0b1

diff --git a/arch/arm/boot/dts/imx6q-sbc6x.dts b/arch/arm/boot/dts/imx6q-sbc6x.dts
index 86cf093..2557330 100644 (file)
--- a/arch/arm/boot/dts/imx6q-sbc6x.dts
+++ b/arch/arm/boot/dts/imx6q-sbc6x.dts
@@ -31,19 +31,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
                        >;
                };

diff --git a/arch/arm/boot/dts/imx6q-tbs2910.dts b/arch/arm/boot/dts/imx6q-tbs2910.dts
index d7c8ccb..06f492e 100644 (file)
--- a/arch/arm/boot/dts/imx6q-tbs2910.dts
+++ b/arch/arm/boot/dts/imx6q-tbs2910.dts
@@ -284,19 +284,19 @@
                fsl,pins = <
                        MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x1b0b0
                        MX6QDL_PAD_ENET_MDC__ENET_MDC         0x1b0b0
-                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b0b0
-                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b0b0
-                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b0b0
-                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b0b0
-                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b0b0
-                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b030
+                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b030
+                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b030
+                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b030
+                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b030
+                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x1b0b0
-                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b0b0
-                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b030
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b030
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b030
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b030
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b030
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
                        MX6QDL_PAD_GPIO_16__ENET_REF_CLK      0x4001b0a8
                        MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25    0x1b059
                >;

diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
index 315e033..99e323b 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
@@ -586,19 +586,19 @@
                fsl,pins = <
                        MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
                        MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
-                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
-                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
-                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
-                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
-                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
-                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
+                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x10030
+                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x10030
+                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x10030
+                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x10030
+                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x10030
+                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x10030
                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
-                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                        /* Ethernet PHY reset */
                        MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25      0x000b0
                        /* Ethernet PHY interrupt */

diff --git a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
index da1341d..b2c083d 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
@@ -67,18 +67,18 @@
 
                pinctrl_enet: enetgrp {
                        fsl,pins = <
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

diff --git a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
index 1340e27..afec2c7 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
@@ -238,18 +238,18 @@
        imx6qdl-gw51xx {
                pinctrl_enet: enetgrp {
                        fsl,pins = <
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

diff --git a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
index 8bf1020..208e3c2 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
@@ -382,18 +382,18 @@
 
                pinctrl_enet: enetgrp {
                        fsl,pins = <
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

diff --git a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
index a3dd0c4..35b9e80 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
@@ -371,18 +371,18 @@
 
                pinctrl_enet: enetgrp {
                        fsl,pins = <
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

diff --git a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
index 5a8dbab..5f8f1ea 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
@@ -478,18 +478,18 @@
 
                pinctrl_enet: enetgrp {
                        fsl,pins = <
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
index f8d945a..d5c3aa8 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -254,19 +254,19 @@
                fsl,pins = <
                        MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x1b0b0
                        MX6QDL_PAD_ENET_MDC__ENET_MDC         0x1b0b0
-                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b0b0
-                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b0b0
-                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b0b0
-                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b0b0
-                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b0b0
-                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b030
+                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b030
+                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b030
+                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b030
+                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b030
+                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x1b0b0
-                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b0b0
-                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b030
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b030
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b030
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b030
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b030
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
                        MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN     0x1b0b0
                >;
        };

diff --git a/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi b/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
index cfd50ea..880bd78 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
@@ -361,12 +361,12 @@
                                MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
                                MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                /* Phy reset */
                                MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x0f0b0
                                MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28       0x1b0b0

diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
index 9677bf3..b0b3220 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
@@ -484,19 +484,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x10030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x10030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x10030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x10030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x10030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x10030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                /* Phy reset */
                                MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x0f0b0
                                MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28       0x1b0b0

diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
index 97d9c33..db868bc 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
@@ -394,19 +394,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x10030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x10030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x10030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x10030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x10030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x10030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                /* Phy reset */
                                MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x000b0
                                MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1

diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index d6d98d4..e4b894c 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -231,19 +231,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN       0x1b0b0
                        >;
                };

diff --git a/arch/arm/boot/dts/imx6qdl-rex.dtsi b/arch/arm/boot/dts/imx6qdl-rex.dtsi
index cacf593..17704a5 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-rex.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-rex.dtsi
@@ -196,19 +196,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
                                /* Phy reset */
                                MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25      0x000b0

diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index 6aa193f..e000e6f 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -345,19 +345,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_KEY_COL1__ENET_MDIO          0x1b0b0
                                MX6QDL_PAD_KEY_COL2__ENET_MDC           0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
                        >;
                };

diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index f65fdfc..81dd6cd 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -359,19 +359,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x10030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x10030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x10030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x10030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x10030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x10030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                /* Phy reset */
                                MX6QDL_PAD_EIM_D23__GPIO3_IO23          0x000b0
                                MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1

diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index d77ea94..8e9e0d9 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -380,19 +380,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
                        >;
                };

diff --git a/arch/arm/boot/dts/imx6qdl-udoo.dtsi b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
index 3bee2f9..c96c91d 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-udoo.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
@@ -132,18 +132,18 @@
        imx6q-udoo {
                pinctrl_enet: enetgrp {
                        fsl,pins = <
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
index 3ffe00c..2b9c2be 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
@@ -109,19 +109,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
                                MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
                        >;