ARM: OMAP: DRA7: powerdomain data: fix powerdomain powerstate
authorNishanth Menon <nm@ti.com>
Fri, 6 Jun 2014 06:21:51 +0000 (01:21 -0500)
committerNishanth Menon <nm@ti.com>
Mon, 8 Sep 2014 16:22:31 +0000 (11:22 -0500)
DRA7 supports only CSWR for CPU, MPU power domains. Core power domain
supports upto INA.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
arch/arm/mach-omap2/powerdomain.h
arch/arm/mach-omap2/powerdomains7xx_data.c

index f472711..a754c82 100644 (file)
@@ -39,6 +39,7 @@
 #define PWRSTS_OFF_RET         (PWRSTS_OFF | PWRSTS_RET)
 #define PWRSTS_RET_ON          (PWRSTS_RET | PWRSTS_ON)
 #define PWRSTS_OFF_RET_ON      (PWRSTS_OFF_RET | PWRSTS_ON)
 #define PWRSTS_OFF_RET         (PWRSTS_OFF | PWRSTS_RET)
 #define PWRSTS_RET_ON          (PWRSTS_RET | PWRSTS_ON)
 #define PWRSTS_OFF_RET_ON      (PWRSTS_OFF_RET | PWRSTS_ON)
+#define PWRSTS_INA_ON          (PWRSTS_INACTIVE | PWRSTS_ON)
 
 
 /*
 
 
 /*
index 48151d1..287a203 100644 (file)
@@ -160,8 +160,8 @@ static struct powerdomain core_7xx_pwrdm = {
        .name             = "core_pwrdm",
        .prcm_offs        = DRA7XX_PRM_CORE_INST,
        .prcm_partition   = DRA7XX_PRM_PARTITION,
        .name             = "core_pwrdm",
        .prcm_offs        = DRA7XX_PRM_CORE_INST,
        .prcm_partition   = DRA7XX_PRM_PARTITION,
-       .pwrsts           = PWRSTS_RET_ON,
-       .pwrsts_logic_ret = PWRSTS_OFF_RET,
+       .pwrsts           = PWRSTS_INA_ON,
+       .pwrsts_logic_ret = PWRSTS_RET,
        .banks            = 5,
        .pwrsts_mem_ret = {
                [0] = PWRSTS_OFF_RET,   /* core_nret_bank */
        .banks            = 5,
        .pwrsts_mem_ret = {
                [0] = PWRSTS_OFF_RET,   /* core_nret_bank */
@@ -193,8 +193,8 @@ static struct powerdomain cpu0_7xx_pwrdm = {
        .name             = "cpu0_pwrdm",
        .prcm_offs        = DRA7XX_MPU_PRCM_PRM_C0_INST,
        .prcm_partition   = DRA7XX_MPU_PRCM_PARTITION,
        .name             = "cpu0_pwrdm",
        .prcm_offs        = DRA7XX_MPU_PRCM_PRM_C0_INST,
        .prcm_partition   = DRA7XX_MPU_PRCM_PARTITION,
-       .pwrsts           = PWRSTS_OFF_RET_ON,
-       .pwrsts_logic_ret = PWRSTS_OFF_RET,
+       .pwrsts           = PWRSTS_RET_ON,
+       .pwrsts_logic_ret = PWRSTS_RET,
        .banks            = 1,
        .pwrsts_mem_ret = {
                [0] = PWRSTS_OFF_RET,   /* cpu0_l1 */
        .banks            = 1,
        .pwrsts_mem_ret = {
                [0] = PWRSTS_OFF_RET,   /* cpu0_l1 */
@@ -209,8 +209,8 @@ static struct powerdomain cpu1_7xx_pwrdm = {
        .name             = "cpu1_pwrdm",
        .prcm_offs        = DRA7XX_MPU_PRCM_PRM_C1_INST,
        .prcm_partition   = DRA7XX_MPU_PRCM_PARTITION,
        .name             = "cpu1_pwrdm",
        .prcm_offs        = DRA7XX_MPU_PRCM_PRM_C1_INST,
        .prcm_partition   = DRA7XX_MPU_PRCM_PARTITION,
-       .pwrsts           = PWRSTS_OFF_RET_ON,
-       .pwrsts_logic_ret = PWRSTS_OFF_RET,
+       .pwrsts           = PWRSTS_RET_ON,
+       .pwrsts_logic_ret = PWRSTS_RET,
        .banks            = 1,
        .pwrsts_mem_ret = {
                [0] = PWRSTS_OFF_RET,   /* cpu1_l1 */
        .banks            = 1,
        .pwrsts_mem_ret = {
                [0] = PWRSTS_OFF_RET,   /* cpu1_l1 */
@@ -243,7 +243,7 @@ static struct powerdomain mpu_7xx_pwrdm = {
        .prcm_offs        = DRA7XX_PRM_MPU_INST,
        .prcm_partition   = DRA7XX_PRM_PARTITION,
        .pwrsts           = PWRSTS_RET_ON,
        .prcm_offs        = DRA7XX_PRM_MPU_INST,
        .prcm_partition   = DRA7XX_PRM_PARTITION,
        .pwrsts           = PWRSTS_RET_ON,
-       .pwrsts_logic_ret = PWRSTS_OFF_RET,
+       .pwrsts_logic_ret = PWRSTS_RET,
        .banks            = 2,
        .pwrsts_mem_ret = {
                [0] = PWRSTS_OFF_RET,   /* mpu_l2 */
        .banks            = 2,
        .pwrsts_mem_ret = {
                [0] = PWRSTS_OFF_RET,   /* mpu_l2 */