drm: Adding edp1.4 specific dpcd macros
authorSonika Jindal <sonika.jindal@intel.com>
Thu, 19 Feb 2015 07:46:44 +0000 (13:16 +0530)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 24 Feb 2015 00:58:16 +0000 (01:58 +0100)
Adding dpcd macros related to edp1.4 and link rates

v2: Added DP_SUPPORTED_LINK_RATES macros

Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
Reviewed-by: Todd Previte <tprevite@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
include/drm/drm_dp_helper.h

index 7e25030..d480322 100644 (file)
@@ -92,6 +92,9 @@
 # define DP_MSA_TIMING_PAR_IGNORED         (1 << 6) /* eDP */
 # define DP_OUI_SUPPORT                            (1 << 7)
 
+#define DP_SUPPORTED_LINK_RATES                        0x010 /*eDP 1.4*/
+#define DP_MAX_SUPPORTED_RATES                 0x8
+
 #define DP_I2C_SPEED_CAP                   0x00c    /* DPI */
 # define DP_I2C_SPEED_1K                   0x01
 # define DP_I2C_SPEED_5K                   0x02
 # define DP_I2C_SPEED_1M                   0x20
 
 #define DP_EDP_CONFIGURATION_CAP            0x00d   /* XXX 1.2? */
+# define DP_DPCD_DISPLAY_CONTROL_CAPABLE     (1 << 3) /* edp v1.2 or higher */
 #define DP_TRAINING_AUX_RD_INTERVAL         0x00e   /* XXX 1.2? */
 
 /* Multiple stream transport */
 # define DP_UP_REQ_EN                      (1 << 1)
 # define DP_UPSTREAM_IS_SRC                (1 << 2)
 
+#define DP_LINK_RATE_SET                       0x115
+
 #define DP_PSR_EN_CFG                      0x170   /* XXX 1.2? */
 # define DP_PSR_ENABLE                     (1 << 0)
 # define DP_PSR_MAIN_LINK_ACTIVE           (1 << 1)
 # define DP_SET_POWER_D3                    0x2
 # define DP_SET_POWER_MASK                  0x3
 
+#define DP_EDP_DPCD_REV                          0x700
+
 #define DP_SIDEBAND_MSG_DOWN_REQ_BASE      0x1000   /* 1.2 MST */
 #define DP_SIDEBAND_MSG_UP_REP_BASE        0x1200   /* 1.2 MST */
 #define DP_SIDEBAND_MSG_DOWN_REP_BASE      0x1400   /* 1.2 MST */