ARM: 7876/1: clear Thumb-2 IT state on exception handling
authorMarc Zyngier <Marc.Zyngier@arm.com>
Mon, 4 Nov 2013 10:42:29 +0000 (11:42 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 7 Nov 2013 00:15:49 +0000 (00:15 +0000)
The exception handling code fails to clear the IT state, potentially
leading to incorrect execution of the fixup if the size of the IT
block is more than one.

Let fixup_exception do the IT sanitizing if a fixup has been found,
and restore CPSR from the stack when returning from a data abort.

Cc: Will Deacon <will.deacon@arm.com>
Cc: stable@vger.kernel.org
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/kernel/entry-armv.S
arch/arm/mm/extable.c

index 9cbe70c..ec3e5cf 100644 (file)
@@ -192,6 +192,7 @@ __dabt_svc:
        svc_entry
        mov     r2, sp
        dabt_helper
+ THUMB(        ldr     r5, [sp, #S_PSR]        )       @ potentially updated CPSR
        svc_exit r5                             @ return from exception
  UNWIND(.fnend         )
 ENDPROC(__dabt_svc)
index 9d28562..312e15e 100644 (file)
@@ -9,8 +9,13 @@ int fixup_exception(struct pt_regs *regs)
        const struct exception_table_entry *fixup;
 
        fixup = search_exception_tables(instruction_pointer(regs));
-       if (fixup)
+       if (fixup) {
                regs->ARM_pc = fixup->fixup;
+#ifdef CONFIG_THUMB2_KERNEL
+               /* Clear the IT state to avoid nasty surprises in the fixup */
+               regs->ARM_cpsr &= ~PSR_IT_MASK;
+#endif
+       }
 
        return fixup != NULL;
 }