ARM: dts: add CPU nodes for Exynos4 SoCs
authorBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Thu, 25 Sep 2014 08:40:14 +0000 (17:40 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Mon, 20 Oct 2014 15:12:42 +0000 (00:12 +0900)
Recent patch by Tomasz Figa ("irqchip: gic: Fix core ID calculation
when topology is read from DT") fixed GIC driver to filter cluster ID
from values returned by cpu_logical_map() for SoCs having registers
mapped without per-CPU banking making it is possible to add CPU nodes
for Exynos4 SoCs.  In case of Exynos SoCs these CPU nodes are also
required by future changes adding initialization of cpuidle states in
Exynos cpuidle driver through DT.

Tested on Origen board (Exynos4210 SoC) and Trats2 (Exynos4412 SoC).

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/boot/dts/exynos4210.dtsi
arch/arm/boot/dts/exynos4212.dtsi
arch/arm/boot/dts/exynos4412.dtsi

index 807bb5b..bcc9e63 100644 (file)
                pinctrl2 = &pinctrl_2;
        };
 
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu@900 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <0x900>;
+               };
+
+               cpu@901 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <0x901>;
+               };
+       };
+
        pmu_system_controller: system-controller@10020000 {
                clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
                                "clkout4", "clkout8", "clkout9";
index 3c00e6e..dd0a43e 100644 (file)
 / {
        compatible = "samsung,exynos4212", "samsung,exynos4";
 
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu@A00 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <0xA00>;
+               };
+
+               cpu@A01 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <0xA01>;
+               };
+       };
+
        combiner: interrupt-controller@10440000 {
                samsung,combiner-nr = <18>;
        };
index d8bc059..0f6ec93 100644 (file)
 / {
        compatible = "samsung,exynos4412", "samsung,exynos4";
 
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu@A00 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <0xA00>;
+               };
+
+               cpu@A01 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <0xA01>;
+               };
+
+               cpu@A02 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <0xA02>;
+               };
+
+               cpu@A03 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <0xA03>;
+               };
+       };
+
        combiner: interrupt-controller@10440000 {
                samsung,combiner-nr = <20>;
        };