ARM: debug: move StrongARM debug include to arch/arm/include/debug

StrongARM debug-macro.S is quite standalone thing, depending only on
register mappings. Move it to proper place and add Kconfig entry.

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 6a4ee00..6c23769 100644 (file)
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -734,6 +734,14 @@ choice
                  their output to UART 2. The port must have been initialised
                  by the boot-loader before use.
 
+       config DEBUG_SA1100
+               depends on ARCH_SA1100
+               bool "Use SA1100 UARTs for low-level debug"
+               help
+                 Say Y here if you want kernel low-level debugging support
+                 on SA-11x0 UART ports. The kernel will check for the first
+                 enabled UART in a sequence 3-1-2.
+
        config DEBUG_SOCFPGA_UART
                depends on ARCH_SOCFPGA
                bool "Use SOCFPGA UART for low-level debug"
@@ -1052,6 +1060,7 @@ config DEBUG_STI_UART
 
 config DEBUG_LL_INCLUDE
        string
+       default "debug/sa1100.S" if DEBUG_SA1100
        default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250
        default "debug/clps711x.S" if DEBUG_CLPS711X_UART1 || DEBUG_CLPS711X_UART2
        default "debug/meson.S" if DEBUG_MESON_UARTAO

diff --git a/arch/arm/include/debug/sa1100.S b/arch/arm/include/debug/sa1100.S
new file mode 100644 (file)
index 0000000..a0ae4f4
--- /dev/null
+++ b/arch/arm/include/debug/sa1100.S
@@ -0,0 +1,68 @@
+/* arch/arm/include/debug/sa1100.S
+ *
+ * Debugging macro include header
+ *
+ *  Copyright (C) 1994-1999 Russell King
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+*/
+
+#define UTCR3          0x0c
+#define UTDR           0x14
+#define UTSR1          0x20
+#define UTCR3_TXE      0x00000002      /* Transmit Enable                 */
+#define UTSR1_TBY      0x00000001      /* Transmitter BusY (read)         */
+#define UTSR1_TNF      0x00000004      /* Transmit FIFO Not Full (read)   */
+
+               .macro  addruart, rp, rv, tmp
+               mrc     p15, 0, \rp, c1, c0
+               tst     \rp, #1                 @ MMU enabled?
+               moveq   \rp, #0x80000000        @ physical base address
+               movne   \rp, #0xf8000000        @ virtual address
+
+               @ We probe for the active serial port here, coherently with
+               @ the comment in arch/arm/mach-sa1100/include/mach/uncompress.h.
+               @ We assume r1 can be clobbered.
+
+               @ see if Ser3 is active
+               add     \rp, \rp, #0x00050000
+               ldr     \rv, [\rp, #UTCR3]
+               tst     \rv, #UTCR3_TXE
+
+               @ if Ser3 is inactive, then try Ser1
+               addeq   \rp, \rp, #(0x00010000 - 0x00050000)
+               ldreq   \rv, [\rp, #UTCR3]
+               tsteq   \rv, #UTCR3_TXE
+
+               @ if Ser1 is inactive, then try Ser2
+               addeq   \rp, \rp, #(0x00030000 - 0x00010000)
+               ldreq   \rv, [\rp, #UTCR3]
+               tsteq   \rv, #UTCR3_TXE
+
+               @ clear top bits, and generate both phys and virt addresses
+               lsl     \rp, \rp, #8
+               lsr     \rp, \rp, #8
+               orr     \rv, \rp, #0xf8000000   @ virtual
+               orr     \rp, \rp, #0x80000000   @ physical
+
+               .endm
+
+               .macro  senduart,rd,rx
+               str     \rd, [\rx, #UTDR]
+               .endm
+
+               .macro  waituart,rd,rx
+1001:          ldr     \rd, [\rx, #UTSR1]
+               tst     \rd, #UTSR1_TNF
+               beq     1001b
+               .endm
+
+               .macro  busyuart,rd,rx
+1001:          ldr     \rd, [\rx, #UTSR1]
+               tst     \rd, #UTSR1_TBY
+               bne     1001b
+               .endm

diff --git a/arch/arm/mach-sa1100/include/mach/debug-macro.S b/arch/arm/mach-sa1100/include/mach/debug-macro.S
deleted file mode 100644 (file)
index 530772d..0000000
--- a/arch/arm/mach-sa1100/include/mach/debug-macro.S
+++ /dev/null
@@ -1,62 +0,0 @@
-/* arch/arm/mach-sa1100/include/mach/debug-macro.S
- *
- * Debugging macro include header
- *
- *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
-#include <mach/hardware.h>
-
-               .macro  addruart, rp, rv, tmp
-               mrc     p15, 0, \rp, c1, c0
-               tst     \rp, #1                 @ MMU enabled?
-               moveq   \rp, #0x80000000        @ physical base address
-               movne   \rp, #0xf8000000        @ virtual address
-
-               @ We probe for the active serial port here, coherently with
-               @ the comment in arch/arm/mach-sa1100/include/mach/uncompress.h.
-               @ We assume r1 can be clobbered.
-
-               @ see if Ser3 is active
-               add     \rp, \rp, #0x00050000
-               ldr     \rv, [\rp, #UTCR3]
-               tst     \rv, #UTCR3_TXE
-
-               @ if Ser3 is inactive, then try Ser1
-               addeq   \rp, \rp, #(0x00010000 - 0x00050000)
-               ldreq   \rv, [\rp, #UTCR3]
-               tsteq   \rv, #UTCR3_TXE
-
-               @ if Ser1 is inactive, then try Ser2
-               addeq   \rp, \rp, #(0x00030000 - 0x00010000)
-               ldreq   \rv, [\rp, #UTCR3]
-               tsteq   \rv, #UTCR3_TXE
-
-               @ clear top bits, and generate both phys and virt addresses
-               lsl     \rp, \rp, #8
-               lsr     \rp, \rp, #8
-               orr     \rv, \rp, #0xf8000000   @ virtual
-               orr     \rp, \rp, #0x80000000   @ physical
-
-               .endm
-
-               .macro  senduart,rd,rx
-               str     \rd, [\rx, #UTDR]
-               .endm
-
-               .macro  waituart,rd,rx
-1001:          ldr     \rd, [\rx, #UTSR1]
-               tst     \rd, #UTSR1_TNF
-               beq     1001b
-               .endm
-
-               .macro  busyuart,rd,rx
-1001:          ldr     \rd, [\rx, #UTSR1]
-               tst     \rd, #UTSR1_TBY
-               bne     1001b
-               .endm