select CPU_ARM720T
select GENERIC_CLOCKEVENTS
select MFD_SYSCON
+ select SOC_BUS
help
Support for Cirrus Logic 711x/721x/731x based boards.
r8a7740-armadillo800eva.dtb \
r8a7778-bockw.dtb \
r8a7778-bockw-reference.dtb \
- r8a7740-armadillo800eva-reference.dtb \
r8a7779-marzen.dtb \
r8a7791-koelsch.dtb \
r8a7790-lager.dtb \
sh7372-mackerel.dtb
dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
r7s72100-genmai.dtb \
+ r8a7740-armadillo800eva.dtb \
r8a7791-henninger.dtb \
r8a7791-koelsch.dtb \
r8a7790-lager.dtb \
clock-frequency = <48000000>;
};
+&mtu2 {
+ status = "ok";
+};
+
&i2c2 {
status = "okay";
clock-frequency = <400000>;
status = "disabled";
};
+ mtu2: timer@fcff0000 {
+ compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
+ reg = <0xfcff0000 0x400>;
+ interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tgi0a";
+ clocks = <&mstp3_clks R7S72100_CLK_MTU2>;
+ clock-names = "fck";
+ status = "disabled";
+ };
+
scif0: serial@e8007000 {
compatible = "renesas,scif-r7s72100", "renesas,scif";
reg = <0xe8007000 64>;
+++ /dev/null
-/*
- * Reference Device Tree Source for the armadillo 800 eva board
- *
- * Copyright (C) 2012 Renesas Solutions Corp.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-/dts-v1/;
-#include "r8a7740.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pwm/pwm.h>
-
-/ {
- model = "armadillo 800 eva reference";
- compatible = "renesas,armadillo800eva-reference", "renesas,r8a7740";
-
- aliases {
- serial1 = &scifa1;
- };
-
- chosen {
- bootargs = "console=tty0 console=ttySC1,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw";
- };
-
- memory {
- device_type = "memory";
- reg = <0x40000000 0x20000000>;
- };
-
- reg_3p3v: regulator@0 {
- compatible = "regulator-fixed";
- regulator-name = "fixed-3.3V";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- vcc_sdhi0: regulator@1 {
- compatible = "regulator-fixed";
-
- regulator-name = "SDHI0 Vcc";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- gpio = <&pfc 75 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vccq_sdhi0: regulator@2 {
- compatible = "regulator-gpio";
-
- regulator-name = "SDHI0 VccQ";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_sdhi0>;
-
- enable-gpio = <&pfc 74 GPIO_ACTIVE_HIGH>;
- gpios = <&pfc 17 GPIO_ACTIVE_HIGH>;
- states = <3300000 0
- 1800000 1>;
-
- enable-active-high;
- };
-
- reg_5p0v: regulator@3 {
- compatible = "regulator-fixed";
- regulator-name = "fixed-5.0V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
-
- power-key {
- gpios = <&pfc 99 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_POWER>;
- label = "SW3";
- gpio-key,wakeup;
- };
-
- back-key {
- gpios = <&pfc 100 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_BACK>;
- label = "SW4";
- };
-
- menu-key {
- gpios = <&pfc 97 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_MENU>;
- label = "SW5";
- };
-
- home-key {
- gpios = <&pfc 98 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_HOME>;
- label = "SW6";
- };
- };
-
- leds {
- compatible = "gpio-leds";
- led3 {
- gpios = <&pfc 102 GPIO_ACTIVE_HIGH>;
- label = "LED3";
- };
- led4 {
- gpios = <&pfc 111 GPIO_ACTIVE_HIGH>;
- label = "LED4";
- };
- led5 {
- gpios = <&pfc 110 GPIO_ACTIVE_HIGH>;
- label = "LED5";
- };
- led6 {
- gpios = <&pfc 177 GPIO_ACTIVE_HIGH>;
- label = "LED6";
- };
- };
-
- i2c2: i2c@2 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "i2c-gpio";
- gpios = <&pfc 208 GPIO_ACTIVE_HIGH /* sda */
- &pfc 91 GPIO_ACTIVE_HIGH /* scl */
- >;
- i2c-gpio,delay-us = <5>;
- };
-
- backlight {
- compatible = "pwm-backlight";
- pwms = <&tpu 2 33333 PWM_POLARITY_INVERTED>;
- brightness-levels = <0 1 2 4 8 16 32 64 128 255>;
- default-brightness-level = <9>;
- pinctrl-0 = <&backlight_pins>;
- pinctrl-names = "default";
- power-supply = <®_5p0v>;
- enable-gpios = <&pfc 61 GPIO_ACTIVE_HIGH>;
- };
-
- sound {
- compatible = "simple-audio-card";
-
- simple-audio-card,format = "i2s";
-
- simple-audio-card,cpu {
- sound-dai = <&sh_fsi2 0>;
- bitclock-inversion;
- };
-
- simple-audio-card,codec {
- sound-dai = <&wm8978>;
- bitclock-master;
- frame-master;
- system-clock-frequency = <12288000>;
- };
- };
-};
-
-ðer {
- pinctrl-0 = <ðer_pins>;
- pinctrl-names = "default";
-
- phy-handle = <&phy0>;
- status = "ok";
-
- phy0: ethernet-phy@0 {
- reg = <0>;
- };
-};
-
-&i2c0 {
- status = "okay";
- touchscreen@55 {
- compatible = "sitronix,st1232";
- reg = <0x55>;
- interrupt-parent = <&irqpin1>;
- interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-0 = <&st1232_pins>;
- pinctrl-names = "default";
- gpios = <&pfc 166 GPIO_ACTIVE_LOW>;
- };
-
- wm8978: wm8978@1a {
- #sound-dai-cells = <0>;
- compatible = "wlf,wm8978";
- reg = <0x1a>;
- };
-};
-
-&i2c2 {
- status = "okay";
- rtc@30 {
- compatible = "sii,s35390a";
- reg = <0x30>;
- };
-};
-
-&pfc {
- ether_pins: ether {
- renesas,groups = "gether_mii", "gether_int";
- renesas,function = "gether";
- };
-
- scifa1_pins: serial1 {
- renesas,groups = "scifa1_data";
- renesas,function = "scifa1";
- };
-
- st1232_pins: touchscreen {
- renesas,groups = "intc_irq10";
- renesas,function = "intc";
- };
-
- backlight_pins: backlight {
- renesas,groups = "tpu0_to2_1";
- renesas,function = "tpu0";
- };
-
- mmc0_pins: mmc0 {
- renesas,groups = "mmc0_data8_1", "mmc0_ctrl_1";
- renesas,function = "mmc0";
- };
-
- sdhi0_pins: sd0 {
- renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_wp";
- renesas,function = "sdhi0";
- };
-
- fsia_pins: sounda {
- renesas,groups = "fsia_sclk_in", "fsia_mclk_out",
- "fsia_data_in_1", "fsia_data_out_0";
- renesas,function = "fsia";
- };
-};
-
-&tpu {
- status = "okay";
-};
-
-&mmcif0 {
- pinctrl-0 = <&mmc0_pins>;
- pinctrl-names = "default";
-
- vmmc-supply = <®_3p3v>;
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
-&scifa1 {
- pinctrl-0 = <&scifa1_pins>;
- pinctrl-names = "default";
-
- status = "okay";
-};
-
-&sdhi0 {
- pinctrl-0 = <&sdhi0_pins>;
- pinctrl-names = "default";
-
- vmmc-supply = <&vcc_sdhi0>;
- vqmmc-supply = <&vccq_sdhi0>;
- bus-width = <4>;
- cd-gpios = <&pfc 167 GPIO_ACTIVE_LOW>;
- status = "okay";
-};
-
-&sh_fsi2 {
- pinctrl-0 = <&fsia_pins>;
- pinctrl-names = "default";
-
- status = "okay";
-};
/dts-v1/;
#include "r8a7740.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pwm/pwm.h>
/ {
model = "armadillo 800 eva";
- compatible = "renesas,armadillo800eva";
+ compatible = "renesas,armadillo800eva", "renesas,r8a7740";
+
+ aliases {
+ serial1 = &scifa1;
+ };
chosen {
bootargs = "console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw";
device_type = "memory";
reg = <0x40000000 0x20000000>;
};
+
+ reg_3p3v: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vcc_sdhi0: regulator@1 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "SDHI0 Vcc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&pfc 75 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vccq_sdhi0: regulator@2 {
+ compatible = "regulator-gpio";
+
+ regulator-name = "SDHI0 VccQ";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_sdhi0>;
+
+ enable-gpio = <&pfc 74 GPIO_ACTIVE_HIGH>;
+ gpios = <&pfc 17 GPIO_ACTIVE_HIGH>;
+ states = <3300000 0
+ 1800000 1>;
+
+ enable-active-high;
+ };
+
+ reg_5p0v: regulator@3 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-5.0V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ power-key {
+ gpios = <&pfc 99 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_POWER>;
+ label = "SW3";
+ gpio-key,wakeup;
+ };
+
+ back-key {
+ gpios = <&pfc 100 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_BACK>;
+ label = "SW4";
+ };
+
+ menu-key {
+ gpios = <&pfc 97 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_MENU>;
+ label = "SW5";
+ };
+
+ home-key {
+ gpios = <&pfc 98 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_HOME>;
+ label = "SW6";
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led3 {
+ gpios = <&pfc 102 GPIO_ACTIVE_HIGH>;
+ label = "LED3";
+ };
+ led4 {
+ gpios = <&pfc 111 GPIO_ACTIVE_HIGH>;
+ label = "LED4";
+ };
+ led5 {
+ gpios = <&pfc 110 GPIO_ACTIVE_HIGH>;
+ label = "LED5";
+ };
+ led6 {
+ gpios = <&pfc 177 GPIO_ACTIVE_HIGH>;
+ label = "LED6";
+ };
+ };
+
+ i2c2: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "i2c-gpio";
+ gpios = <&pfc 208 GPIO_ACTIVE_HIGH /* sda */
+ &pfc 91 GPIO_ACTIVE_HIGH /* scl */
+ >;
+ i2c-gpio,delay-us = <5>;
+ };
+
+ backlight {
+ compatible = "pwm-backlight";
+ pwms = <&tpu 2 33333 PWM_POLARITY_INVERTED>;
+ brightness-levels = <0 1 2 4 8 16 32 64 128 255>;
+ default-brightness-level = <9>;
+ pinctrl-0 = <&backlight_pins>;
+ pinctrl-names = "default";
+ power-supply = <®_5p0v>;
+ enable-gpios = <&pfc 61 GPIO_ACTIVE_HIGH>;
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+
+ simple-audio-card,format = "i2s";
+
+ simple-audio-card,cpu {
+ sound-dai = <&sh_fsi2 0>;
+ bitclock-inversion;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&wm8978>;
+ bitclock-master;
+ frame-master;
+ system-clock-frequency = <12288000>;
+ };
+ };
+};
+
+ðer {
+ pinctrl-0 = <ðer_pins>;
+ pinctrl-names = "default";
+
+ phy-handle = <&phy0>;
+ status = "ok";
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
+&extal1_clk {
+ clock-frequency = <25000000>;
+};
+&extal2_clk {
+ clock-frequency = <48000000>;
+};
+&fsibck_clk {
+ clock-frequency = <12288000>;
+};
+&cpg_clocks {
+ renesas,mode = <0x05>; /* MD_CK0 | MD_CK2 */
+};
+
+&cmt1 {
+ status = "ok";
+};
+
+&i2c0 {
+ status = "okay";
+ touchscreen@55 {
+ compatible = "sitronix,st1232";
+ reg = <0x55>;
+ interrupt-parent = <&irqpin1>;
+ interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&st1232_pins>;
+ pinctrl-names = "default";
+ gpios = <&pfc 166 GPIO_ACTIVE_LOW>;
+ };
+
+ wm8978: wm8978@1a {
+ #sound-dai-cells = <0>;
+ compatible = "wlf,wm8978";
+ reg = <0x1a>;
+ };
+};
+
+&i2c2 {
+ status = "okay";
+ rtc@30 {
+ compatible = "sii,s35390a";
+ reg = <0x30>;
+ };
+};
+
+&pfc {
+ ether_pins: ether {
+ renesas,groups = "gether_mii", "gether_int";
+ renesas,function = "gether";
+ };
+
+ scifa1_pins: serial1 {
+ renesas,groups = "scifa1_data";
+ renesas,function = "scifa1";
+ };
+
+ st1232_pins: touchscreen {
+ renesas,groups = "intc_irq10";
+ renesas,function = "intc";
+ };
+
+ backlight_pins: backlight {
+ renesas,groups = "tpu0_to2_1";
+ renesas,function = "tpu0";
+ };
+
+ mmc0_pins: mmc0 {
+ renesas,groups = "mmc0_data8_1", "mmc0_ctrl_1";
+ renesas,function = "mmc0";
+ };
+
+ sdhi0_pins: sd0 {
+ renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_wp";
+ renesas,function = "sdhi0";
+ };
+
+ fsia_pins: sounda {
+ renesas,groups = "fsia_sclk_in", "fsia_mclk_out",
+ "fsia_data_in_1", "fsia_data_out_0";
+ renesas,function = "fsia";
+ };
+};
+
+&tpu {
+ status = "okay";
+};
+
+&mmcif0 {
+ pinctrl-0 = <&mmc0_pins>;
+ pinctrl-names = "default";
+
+ vmmc-supply = <®_3p3v>;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
+
+&scifa1 {
+ pinctrl-0 = <&scifa1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&sdhi0 {
+ pinctrl-0 = <&sdhi0_pins>;
+ pinctrl-names = "default";
+
+ vmmc-supply = <&vcc_sdhi0>;
+ vqmmc-supply = <&vccq_sdhi0>;
+ bus-width = <4>;
+ cd-gpios = <&pfc 167 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&sh_fsi2 {
+ pinctrl-0 = <&fsia_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
};
/include/ "skeleton.dtsi"
+#include <dt-bindings/clock/r8a7740-clock.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
};
+ cmt1: timer@e6138000 {
+ compatible = "renesas,cmt-48-r8a7740", "renesas,cmt-48";
+ reg = <0xe6138000 0x170>;
+ interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7740_CLK_CMT1>;
+ clock-names = "fck";
+
+ renesas,channels-mask = <0x3f>;
+
+ status = "disabled";
+ };
+
/* irqpin0: IRQ0 - IRQ7 */
irqpin0: irqpin@e6900000 {
compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
reg = <0xe9a00000 0x800>,
<0xe9a01800 0x800>;
interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
- /* clocks = <&mstp3_clks R8A7740_CLK_GETHER>; */
+ clocks = <&mstp3_clks R8A7740_CLK_GETHER>;
phy-mode = "mii";
#address-cells = <1>;
#size-cells = <0>;
0 202 IRQ_TYPE_LEVEL_HIGH
0 203 IRQ_TYPE_LEVEL_HIGH
0 204 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp1_clks R8A7740_CLK_IIC0>;
status = "disabled";
};
0 71 IRQ_TYPE_LEVEL_HIGH
0 72 IRQ_TYPE_LEVEL_HIGH
0 73 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7740_CLK_IIC1>;
status = "disabled";
};
compatible = "renesas,scifa-r8a7740", "renesas,scifa";
reg = <0xe6c40000 0x100>;
interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7740_CLK_SCIFA0>;
+ clock-names = "sci_ick";
status = "disabled";
};
compatible = "renesas,scifa-r8a7740", "renesas,scifa";
reg = <0xe6c50000 0x100>;
interrupts = <0 101 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7740_CLK_SCIFA1>;
+ clock-names = "sci_ick";
status = "disabled";
};
compatible = "renesas,scifa-r8a7740", "renesas,scifa";
reg = <0xe6c60000 0x100>;
interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7740_CLK_SCIFA0>;
+ clock-names = "sci_ick";
status = "disabled";
};
compatible = "renesas,scifa-r8a7740", "renesas,scifa";
reg = <0xe6c70000 0x100>;
interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7740_CLK_SCIFA3>;
+ clock-names = "sci_ick";
status = "disabled";
};
compatible = "renesas,scifa-r8a7740", "renesas,scifa";
reg = <0xe6c80000 0x100>;
interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7740_CLK_SCIFA4>;
+ clock-names = "sci_ick";
status = "disabled";
};
compatible = "renesas,scifa-r8a7740", "renesas,scifa";
reg = <0xe6cb0000 0x100>;
interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7740_CLK_SCIFA5>;
+ clock-names = "sci_ick";
status = "disabled";
};
compatible = "renesas,scifa-r8a7740", "renesas,scifa";
reg = <0xe6cc0000 0x100>;
interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7740_CLK_SCIFA6>;
+ clock-names = "sci_ick";
status = "disabled";
};
compatible = "renesas,scifa-r8a7740", "renesas,scifa";
reg = <0xe6cd0000 0x100>;
interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7740_CLK_SCIFA7>;
+ clock-names = "sci_ick";
status = "disabled";
};
compatible = "renesas,scifb-r8a7740", "renesas,scifb";
reg = <0xe6c30000 0x100>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7740_CLK_SCIFB>;
+ clock-names = "sci_ick";
status = "disabled";
};
tpu: pwm@e6600000 {
compatible = "renesas,tpu-r8a7740", "renesas,tpu";
reg = <0xe6600000 0x100>;
+ clocks = <&mstp3_clks R8A7740_CLK_TPU0>;
status = "disabled";
#pwm-cells = <3>;
};
reg = <0xe6bd0000 0x100>;
interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH
0 57 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7740_CLK_MMC>;
status = "disabled";
};
interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH
0 118 IRQ_TYPE_LEVEL_HIGH
0 119 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7740_CLK_SDHI0>;
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH
0 122 IRQ_TYPE_LEVEL_HIGH
0 123 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7740_CLK_SDHI1>;
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH
0 126 IRQ_TYPE_LEVEL_HIGH
0 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp4_clks R8A7740_CLK_SDHI2>;
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2";
reg = <0xfe1f0000 0x400>;
interrupts = <0 9 0x4>;
+ clocks = <&mstp3_clks R8A7740_CLK_FSI>;
status = "disabled";
};
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ /* External root clock */
+ extalr_clk: extalr_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "extalr";
+ };
+ extal1_clk: extal1_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ clock-output-names = "extal1";
+ };
+ extal2_clk: extal2_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ clock-output-names = "extal2";
+ };
+ dv_clk: dv_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <27000000>;
+ clock-output-names = "dv";
+ };
+ fsiack_clk: fsiack_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ clock-output-names = "fsiack";
+ };
+ fsibck_clk: fsibck_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ clock-output-names = "fsibck";
+ };
+
+ /* Special CPG clocks */
+ cpg_clocks: cpg_clocks@e6150000 {
+ compatible = "renesas,r8a7740-cpg-clocks";
+ reg = <0xe6150000 0x10000>;
+ clocks = <&extal1_clk>, <&extalr_clk>;
+ #clock-cells = <1>;
+ clock-output-names = "system", "pllc0", "pllc1",
+ "pllc2", "r",
+ "usb24s",
+ "i", "zg", "b", "m1", "hp",
+ "hpp", "usbp", "s", "zb", "m3",
+ "cp";
+ };
+
+ /* Variable factor clocks (DIV6) */
+ sub_clk: sub_clk@e6150080 {
+ compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";
+ reg = <0xe6150080 4>;
+ clocks = <&pllc1_div2_clk>;
+ #clock-cells = <0>;
+ clock-output-names = "sub";
+ };
+
+ /* Fixed factor clocks */
+ pllc1_div2_clk: pllc1_div2_clk {
+ compatible = "fixed-factor-clock";
+ clocks = <&cpg_clocks R8A7740_CLK_PLLC1>;
+ #clock-cells = <0>;
+ clock-div = <2>;
+ clock-mult = <1>;
+ clock-output-names = "pllc1_div2";
+ };
+ extal1_div2_clk: extal1_div2_clk {
+ compatible = "fixed-factor-clock";
+ clocks = <&extal1_clk>;
+ #clock-cells = <0>;
+ clock-div = <2>;
+ clock-mult = <1>;
+ clock-output-names = "extal1_div2";
+ };
+
+ /* Gate clocks */
+ subck_clks: subck_clks@e6150080 {
+ compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0xe6150080 4>;
+ clocks = <&sub_clk>, <&sub_clk>;
+ #clock-cells = <1>;
+ renesas,clock-indices = <
+ R8A7740_CLK_SUBCK R8A7740_CLK_SUBCK2
+ >;
+ clock-output-names =
+ "subck", "subck2";
+ };
+ mstp1_clks: mstp1_clks@e6150134 {
+ compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0xe6150134 4>, <0xe6150038 4>;
+ clocks = <&cpg_clocks R8A7740_CLK_S>,
+ <&cpg_clocks R8A7740_CLK_S>, <&sub_clk>,
+ <&cpg_clocks R8A7740_CLK_B>,
+ <&sub_clk>, <&sub_clk>,
+ <&cpg_clocks R8A7740_CLK_B>;
+ #clock-cells = <1>;
+ renesas,clock-indices = <
+ R8A7740_CLK_CEU21 R8A7740_CLK_CEU20 R8A7740_CLK_TMU0
+ R8A7740_CLK_LCDC1 R8A7740_CLK_IIC0 R8A7740_CLK_TMU1
+ R8A7740_CLK_LCDC0
+ >;
+ clock-output-names =
+ "ceu21", "ceu20", "tmu0", "lcdc1", "iic0",
+ "tmu1", "lcdc0";
+ };
+ mstp2_clks: mstp2_clks@e6150138 {
+ compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0xe6150138 4>, <0xe6150040 4>;
+ clocks = <&sub_clk>, <&sub_clk>,
+ <&cpg_clocks R8A7740_CLK_HP>,
+ <&cpg_clocks R8A7740_CLK_HP>,
+ <&cpg_clocks R8A7740_CLK_HP>,
+ <&cpg_clocks R8A7740_CLK_HP>,
+ <&sub_clk>, <&sub_clk>, <&sub_clk>,
+ <&sub_clk>, <&sub_clk>, <&sub_clk>,
+ <&sub_clk>;
+ #clock-cells = <1>;
+ renesas,clock-indices = <
+ R8A7740_CLK_SCIFA6 R8A7740_CLK_SCIFA7
+ R8A7740_CLK_DMAC1 R8A7740_CLK_DMAC2
+ R8A7740_CLK_DMAC3 R8A7740_CLK_USBDMAC
+ R8A7740_CLK_SCIFA5 R8A7740_CLK_SCIFB
+ R8A7740_CLK_SCIFA0 R8A7740_CLK_SCIFA1
+ R8A7740_CLK_SCIFA2 R8A7740_CLK_SCIFA3
+ R8A7740_CLK_SCIFA4
+ >;
+ clock-output-names =
+ "scifa6", "scifa7", "dmac1", "dmac2", "dmac3",
+ "usbdmac", "scifa5", "scifb", "scifa0", "scifa1",
+ "scifa2", "scifa3", "scifa4";
+ };
+ mstp3_clks: mstp3_clks@e615013c {
+ compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0xe615013c 4>, <0xe6150048 4>;
+ clocks = <&cpg_clocks R8A7740_CLK_R>,
+ <&cpg_clocks R8A7740_CLK_HP>,
+ <&sub_clk>,
+ <&cpg_clocks R8A7740_CLK_HP>,
+ <&cpg_clocks R8A7740_CLK_HP>,
+ <&cpg_clocks R8A7740_CLK_HP>,
+ <&cpg_clocks R8A7740_CLK_HP>,
+ <&cpg_clocks R8A7740_CLK_HP>,
+ <&cpg_clocks R8A7740_CLK_HP>;
+ #clock-cells = <1>;
+ renesas,clock-indices = <
+ R8A7740_CLK_CMT1 R8A7740_CLK_FSI R8A7740_CLK_IIC1
+ R8A7740_CLK_USBF R8A7740_CLK_SDHI0 R8A7740_CLK_SDHI1
+ R8A7740_CLK_MMC R8A7740_CLK_GETHER R8A7740_CLK_TPU0
+ >;
+ clock-output-names =
+ "cmt1", "fsi", "iic1", "usbf", "sdhi0", "sdhi1",
+ "mmc", "gether", "tpu0";
+ };
+ mstp4_clks: mstp4_clks@e6150140 {
+ compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0xe6150140 4>, <0xe615004c 4>;
+ clocks = <&cpg_clocks R8A7740_CLK_HP>,
+ <&cpg_clocks R8A7740_CLK_HP>,
+ <&cpg_clocks R8A7740_CLK_HP>,
+ <&cpg_clocks R8A7740_CLK_HP>;
+ #clock-cells = <1>;
+ renesas,clock-indices = <
+ R8A7740_CLK_USBH R8A7740_CLK_SDHI2
+ R8A7740_CLK_USBFUNC R8A7740_CLK_USBPHY
+ >;
+ clock-output-names =
+ "usbhost", "sdhi2", "usbfunc", "usphy";
+ };
+ };
};
interrupt-parent = <&gic>;
cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
cpu@0 {
+ device_type = "cpu";
compatible = "arm,cortex-a9";
+ reg = <0>;
+ clock-frequency = <800000000>;
};
};
clock-frequency = <31250000>;
};
+&tmu0 {
+ status = "okay";
+};
+
&pfc {
lan0_pins: lan0 {
intc {
reg = <0xffc48000 0x38>;
};
+ tmu0: timer@ffd80000 {
+ compatible = "renesas,tmu-r8a7779", "renesas,tmu";
+ reg = <0xffd80000 0x30>;
+ interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
+ <0 33 IRQ_TYPE_LEVEL_HIGH>,
+ <0 34 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp0_clks R8A7779_CLK_TMU0>;
+ clock-names = "fck";
+
+ #renesas,channels = <3>;
+
+ status = "disabled";
+ };
+
+ tmu1: timer@ffd81000 {
+ compatible = "renesas,tmu-r8a7779", "renesas,tmu";
+ reg = <0xffd81000 0x30>;
+ interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>,
+ <0 37 IRQ_TYPE_LEVEL_HIGH>,
+ <0 38 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp0_clks R8A7779_CLK_TMU1>;
+ clock-names = "fck";
+
+ #renesas,channels = <3>;
+
+ status = "disabled";
+ };
+
+ tmu2: timer@ffd82000 {
+ compatible = "renesas,tmu-r8a7779", "renesas,tmu";
+ reg = <0xffd82000 0x30>;
+ interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>,
+ <0 41 IRQ_TYPE_LEVEL_HIGH>,
+ <0 42 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp0_clks R8A7779_CLK_TMU2>;
+ clock-names = "fck";
+
+ #renesas,channels = <3>;
+
+ status = "disabled";
+ };
+
sata: sata@fc600000 {
compatible = "renesas,rcar-sata";
reg = <0xfc600000 0x2000>;
};
};
+&cmt0 {
+ status = "ok";
+};
+
&mmcif1 {
pinctrl-0 = <&mmc1_pins>;
pinctrl-names = "default";
<1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
+ cmt0: timer@ffca0000 {
+ compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,
+ <0 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
+ clock-names = "fck";
+
+ renesas,channels-mask = <0x60>;
+
+ status = "disabled";
+ };
+
+ cmt1: timer@e6130000 {
+ compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>,
+ <0 121 IRQ_TYPE_LEVEL_HIGH>,
+ <0 122 IRQ_TYPE_LEVEL_HIGH>,
+ <0 123 IRQ_TYPE_LEVEL_HIGH>,
+ <0 124 IRQ_TYPE_LEVEL_HIGH>,
+ <0 125 IRQ_TYPE_LEVEL_HIGH>,
+ <0 126 IRQ_TYPE_LEVEL_HIGH>,
+ <0 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7790_CLK_CMT1>;
+ clock-names = "fck";
+
+ renesas,channels-mask = <0xff>;
+
+ status = "disabled";
+ };
+
irqc0: interrupt-controller@e61c0000 {
compatible = "renesas,irqc-r8a7790", "renesas,irqc";
#interrupt-cells = <2>;
};
};
+&cmt0 {
+ status = "ok";
+};
+
&sata0 {
status = "okay";
};
<1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
+ cmt0: timer@ffca0000 {
+ compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
+ reg = <0 0xffca0000 0 0x1004>;
+ interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,
+ <0 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp1_clks R8A7791_CLK_CMT0>;
+ clock-names = "fck";
+
+ renesas,channels-mask = <0x60>;
+
+ status = "disabled";
+ };
+
+ cmt1: timer@e6130000 {
+ compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
+ reg = <0 0xe6130000 0 0x1004>;
+ interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>,
+ <0 121 IRQ_TYPE_LEVEL_HIGH>,
+ <0 122 IRQ_TYPE_LEVEL_HIGH>,
+ <0 123 IRQ_TYPE_LEVEL_HIGH>,
+ <0 124 IRQ_TYPE_LEVEL_HIGH>,
+ <0 125 IRQ_TYPE_LEVEL_HIGH>,
+ <0 126 IRQ_TYPE_LEVEL_HIGH>,
+ <0 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7791_CLK_CMT1>;
+ clock-names = "fck";
+
+ renesas,channels-mask = <0xff>;
+
+ status = "disabled";
+ };
+
irqc0: interrupt-controller@e61c0000 {
compatible = "renesas,irqc-r8a7791", "renesas,irqc";
#interrupt-cells = <2>;
compatible = "arm,cortex-a8";
device_type = "cpu";
reg = <0x0>;
+ clock-frequency = <800000000>;
};
};
};
};
+&cmt1 {
+ status = "ok";
+};
+
&i2c0 {
status = "okay";
as3711@40 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
+ clock-frequency = <1196000000>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <1>;
+ clock-frequency = <1196000000>;
};
};
<0 56 IRQ_TYPE_LEVEL_HIGH>;
};
+ cmt1: timer@e6138000 {
+ compatible = "renesas,cmt-48-sh73a0", "renesas,cmt-48";
+ reg = <0xe6138000 0x200>;
+ interrupts = <0 65 IRQ_TYPE_LEVEL_HIGH>;
+
+ renesas,channels-mask = <0x3f>;
+
+ status = "disabled";
+ };
+
irqpin0: irqpin@e6900000 {
compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
#interrupt-cells = <2>;
# CONFIG_HWMON is not set
CONFIG_FB=y
CONFIG_FB_CLPS711X=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_LCD_PLATFORM=y
+CONFIG_BACKLIGHT_PWM=y
# CONFIG_USB_SUPPORT is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_PWM=y
+CONFIG_PWM_CLPS711X=y
CONFIG_EXT2_FS=y
CONFIG_CRAMFS=y
CONFIG_MINIX_FS=y
#include <linux/types.h>
#include <linux/i2c-gpio.h>
#include <linux/interrupt.h>
-#include <linux/backlight.h>
#include <linux/platform_device.h>
+#include <linux/pwm.h>
+#include <linux/pwm_backlight.h>
#include <linux/memblock.h>
#include <linux/mtd/physmap.h>
.set_power = edb7211_lcd_power_set,
};
-static void edb7211_lcd_backlight_set_intensity(int intensity)
-{
- gpio_set_value(EDB7211_LCDBL, !!intensity);
- clps_writel((clps_readl(PMPCON) & 0xf0ff) | (intensity << 8), PMPCON);
-}
+static struct pwm_lookup edb7211_pwm_lookup[] = {
+ PWM_LOOKUP("clps711x-pwm", 0, "pwm-backlight.0", NULL,
+ 0, PWM_POLARITY_NORMAL),
+};
-static struct generic_bl_info edb7211_lcd_backlight_pdata = {
- .name = "lcd-backlight.0",
- .default_intensity = 0x01,
- .max_intensity = 0x0f,
- .set_bl_intensity = edb7211_lcd_backlight_set_intensity,
+static struct platform_pwm_backlight_data pwm_bl_pdata = {
+ .dft_brightness = 0x01,
+ .max_brightness = 0x0f,
+ .enable_gpio = EDB7211_LCDBL,
};
+static struct resource clps711x_pwm_res =
+ DEFINE_RES_MEM(CLPS711X_PHYS_BASE + PMPCON, SZ_4);
+
static struct gpio edb7211_gpios[] __initconst = {
{ EDB7211_LCD_DC_DC_EN, GPIOF_OUT_INIT_LOW, "LCD DC-DC" },
{ EDB7211_LCDEN, GPIOF_OUT_INIT_LOW, "LCD POWER" },
- { EDB7211_LCDBL, GPIOF_OUT_INIT_LOW, "LCD BACKLIGHT" },
};
/* Reserve screen memory region at the start of main system memory. */
gpio_request_array(edb7211_gpios, ARRAY_SIZE(edb7211_gpios));
platform_device_register(&edb7211_flash_pdev);
+
platform_device_register_data(NULL, "platform-lcd", 0,
&edb7211_lcd_power_pdata,
sizeof(edb7211_lcd_power_pdata));
- platform_device_register_data(NULL, "generic-bl", 0,
- &edb7211_lcd_backlight_pdata,
- sizeof(edb7211_lcd_backlight_pdata));
+
+ platform_device_register_simple("clps711x-pwm", PLATFORM_DEVID_NONE,
+ &clps711x_pwm_res, 1);
+ pwm_add_table(edb7211_pwm_lookup, ARRAY_SIZE(edb7211_pwm_lookup));
+
+ platform_device_register_data(&platform_bus, "pwm-backlight", 0,
+ &pwm_bl_pdata, sizeof(pwm_bl_pdata));
+
platform_device_register_simple("video-clps711x", 0, NULL, 0);
platform_device_register_simple("cs89x0", 0, edb7211_cs8900_resource,
ARRAY_SIZE(edb7211_cs8900_resource));
/*
* CLPS711X common devices definitions
*
- * Author: Alexander Shiyan <shc_work@mail.ru>, 2013
+ * Author: Alexander Shiyan <shc_work@mail.ru>, 2013-2014
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* (at your option) any later version.
*/
+#include <linux/io.h>
+#include <linux/of_fdt.h>
#include <linux/platform_device.h>
+#include <linux/random.h>
#include <linux/sizes.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>
+
+#include <asm/system_info.h>
#include <mach/hardware.h>
ARRAY_SIZE(clps711x_uart2_res));
};
+static void __init clps711x_soc_init(void)
+{
+ struct soc_device_attribute *soc_dev_attr;
+ struct soc_device *soc_dev;
+ void __iomem *base;
+ u32 id[5];
+
+ base = ioremap(CLPS711X_PHYS_BASE, SZ_32K);
+ if (!base)
+ return;
+
+ id[0] = readl(base + UNIQID);
+ id[1] = readl(base + RANDID0);
+ id[2] = readl(base + RANDID1);
+ id[3] = readl(base + RANDID2);
+ id[4] = readl(base + RANDID3);
+ system_rev = SYSFLG1_VERID(readl(base + SYSFLG1));
+
+ add_device_randomness(id, sizeof(id));
+
+ system_serial_low = id[0];
+
+ soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+ if (!soc_dev_attr)
+ goto out_unmap;
+
+ soc_dev_attr->machine = of_flat_dt_get_machine_name();
+ soc_dev_attr->family = "Cirrus Logic CLPS711X";
+ soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%u", system_rev);
+ soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%08x", id[0]);
+
+ soc_dev = soc_device_register(soc_dev_attr);
+ if (IS_ERR(soc_dev)) {
+ kfree(soc_dev_attr->revision);
+ kfree(soc_dev_attr->soc_id);
+ kfree(soc_dev_attr);
+ }
+
+out_unmap:
+ iounmap(base);
+}
+
void __init clps711x_devices_init(void)
{
clps711x_add_cpuidle();
clps711x_add_gpio();
clps711x_add_syscon();
clps711x_add_uart();
+ clps711x_soc_init();
}
#include <linux/mm.h>
#include <linux/amba/bus.h>
#include <linux/amba/clcd.h>
+#include <linux/amba/mmci.h>
+#include <linux/amba/pl061.h>
#include <linux/io.h>
#include <linux/platform_data/clk-integrator.h>
#include <linux/slab.h>
#include <linux/irqchip/arm-vic.h>
+#include <linux/gpio/machine.h>
#include <asm/sizes.h>
#include "lm.h"
EXPORT_SYMBOL(impd1_tweak_control);
+/*
+ * MMC support
+ */
+static struct mmci_platform_data mmc_data = {
+ .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
+};
+
/*
* CLCD support
*/
.offset = 0x00700000,
.irq = { 7, 8 },
.id = 0x00041181,
+ .platform_data = &mmc_data,
}, {
.offset = 0x00800000,
.irq = { 9 },
pc_base = dev->resource.start + idev->offset;
snprintf(devname, 32, "lm%x:%5.5lx", dev->id, idev->offset >> 12);
+
+ /* Add GPIO descriptor lookup table for the PL061 block */
+ if (idev->offset == 0x00400000) {
+ struct gpiod_lookup_table *lookup;
+ char *chipname;
+ char *mmciname;
+
+ lookup = devm_kzalloc(&dev->dev,
+ sizeof(*lookup) + 3 * sizeof(struct gpiod_lookup),
+ GFP_KERNEL);
+ chipname = devm_kstrdup(&dev->dev, devname, GFP_KERNEL);
+ mmciname = kasprintf(GFP_KERNEL, "lm%x:00700", dev->id);
+ lookup->dev_id = mmciname;
+ /*
+ * Offsets on GPIO block 1:
+ * 3 = MMC WP (write protect)
+ * 4 = MMC CD (card detect)
+ *
+ * Offsets on GPIO block 2:
+ * 0 = Up key
+ * 1 = Down key
+ * 2 = Left key
+ * 3 = Right key
+ * 4 = Key lower left
+ * 5 = Key lower right
+ */
+ /* We need the two MMCI GPIO entries */
+ lookup->table[0].chip_label = chipname;
+ lookup->table[0].chip_hwnum = 3;
+ lookup->table[0].con_id = "wp";
+ lookup->table[1].chip_label = chipname;
+ lookup->table[1].chip_hwnum = 4;
+ lookup->table[1].con_id = "cd";
+ lookup->table[1].flags = GPIO_ACTIVE_LOW;
+ gpiod_add_lookup_table(lookup);
+ }
+
d = amba_ahb_device_add_res(&dev->dev, devname, pc_base, SZ_4K,
irq1, irq2,
idev->platform_data, idev->id,
bool "RZ/A1H (R7S72100)"
select SYS_SUPPORTS_SH_MTU2
+config ARCH_R8A7740
+ bool "R-Mobile A1 (R8A77400)"
+ select ARCH_RMOBILE
+ select RENESAS_INTC_IRQPIN
+
config ARCH_R8A7779
bool "R-Car H1 (R8A77790)"
select RENESAS_INTC_IRQPIN
select RENESAS_IRQC
select SYS_SUPPORTS_SH_CMT
-comment "Renesas ARM SoCs Board Type"
+config ARCH_R8A7794
+ bool "R-Car E2 (R8A77940)"
+ select ARCH_RCAR_GEN2
-config MACH_GENMAI
- bool "Genmai board"
- depends on ARCH_R7S72100
+comment "Renesas ARM SoCs Board Type"
config MACH_KOELSCH
bool "Koelsch board"
select SYS_SUPPORTS_SH_CMT
select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
-config ARCH_R7S72100
- bool "RZ/A1H (R7S72100)"
- select ARCH_WANT_OPTIONAL_GPIOLIB
- select ARM_GIC
- select CPU_V7
- select SH_CLK_CPG
- select SYS_SUPPORTS_SH_MTU2
-
comment "Renesas ARM SoCs Board Type"
config MACH_APE6EVM
select SND_SOC_WM8978 if SND_SIMPLE_CARD
select USE_OF
-config MACH_ARMADILLO800EVA_REFERENCE
- bool "Armadillo-800 EVA board - Reference Device Tree Implementation"
- depends on ARCH_R8A7740
- select ARCH_REQUIRE_GPIOLIB
- select REGULATOR_FIXED_VOLTAGE if REGULATOR
- select SMSC_PHY if SH_ETH
- select SND_SOC_WM8978 if SND_SIMPLE_CARD
- select USE_OF
- ---help---
- Use reference implementation of Armadillo800 EVA board support
- which makes greater use of device tree at the expense
- of not supporting a number of devices.
-
- This is intended to aid developers
-
config MACH_BOCKW
bool "BOCK-W platform"
depends on ARCH_R8A7778
This is intended to aid developers
-config MACH_GENMAI
- bool "Genmai board"
- depends on ARCH_R7S72100
- select USE_OF
-
config MACH_MARZEN
bool "MARZEN board"
depends on ARCH_R8A7779
# Makefile for the linux kernel.
#
-ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/mach-shmobile/include
-
# Common objects
obj-y := timer.o console.o
obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o
obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o setup-rcar-gen2.o
obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o setup-rcar-gen2.o
+obj-$(CONFIG_ARCH_R8A7794) += setup-r8a7794.o
obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o
obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o
obj-$(CONFIG_ARCH_R8A7779) += clock-r8a7779.o
obj-$(CONFIG_ARCH_R8A7790) += clock-r8a7790.o
obj-$(CONFIG_ARCH_R8A7791) += clock-r8a7791.o
-obj-$(CONFIG_ARCH_R7S72100) += clock-r7s72100.o
endif
# CPU reset vector handling objects
# Board objects
ifdef CONFIG_ARCH_SHMOBILE_MULTI
-obj-$(CONFIG_MACH_GENMAI) += board-genmai-reference.o
obj-$(CONFIG_MACH_KOELSCH) += board-koelsch-reference.o
obj-$(CONFIG_MACH_LAGER) += board-lager-reference.o
obj-$(CONFIG_MACH_MARZEN) += board-marzen-reference.o
obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o
obj-$(CONFIG_MACH_BOCKW) += board-bockw.o
obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o
-obj-$(CONFIG_MACH_GENMAI) += board-genmai.o
obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
obj-$(CONFIG_MACH_LAGER) += board-lager.o
obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
-obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o
obj-$(CONFIG_MACH_KOELSCH) += board-koelsch.o
obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o
obj-$(CONFIG_MACH_KZM9G_REFERENCE) += board-kzm9g-reference.o
loadaddr-$(CONFIG_MACH_APE6EVM) += 0x40008000
loadaddr-$(CONFIG_MACH_APE6EVM_REFERENCE) += 0x40008000
loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
-loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
-loadaddr-$(CONFIG_MACH_GENMAI) += 0x08008000
loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
r8a73a4_add_dt_devices();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
- platform_device_register_simple("cpufreq-cpu0", -1, NULL, 0);
}
static const char *ape6evm_boards_compat_dt[] __initdata = {
};
DT_MACHINE_START(APE6EVM_DT, "ape6evm")
- .init_early = r8a73a4_init_early,
+ .init_early = shmobile_init_delay,
.init_machine = ape6evm_add_standard_devices,
+ .init_late = shmobile_init_late,
.dt_compat = ape6evm_boards_compat_dt,
MACHINE_END
};
DT_MACHINE_START(APE6EVM_DT, "ape6evm")
- .init_early = r8a73a4_init_early,
+ .init_early = shmobile_init_delay,
.init_machine = ape6evm_add_standard_devices,
+ .init_late = shmobile_init_late,
.dt_compat = ape6evm_boards_compat_dt,
MACHINE_END
+++ /dev/null
-/*
- * armadillo 800 eva board support
- *
- * Copyright (C) 2012 Renesas Solutions Corp.
- * Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- *
- */
-
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/kernel.h>
-#include <linux/gpio.h>
-#include <linux/io.h>
-
-#include <asm/mach/arch.h>
-#include <asm/hardware/cache-l2x0.h>
-
-#include "common.h"
-#include "r8a7740.h"
-
-/*
- * CON1 Camera Module
- * CON2 Extension Bus
- * CON3 HDMI Output
- * CON4 Composite Video Output
- * CON5 H-UDI JTAG
- * CON6 ARM JTAG
- * CON7 SD1
- * CON8 SD2
- * CON9 RTC BackUp
- * CON10 Monaural Mic Input
- * CON11 Stereo Headphone Output
- * CON12 Audio Line Output(L)
- * CON13 Audio Line Output(R)
- * CON14 AWL13 Module
- * CON15 Extension
- * CON16 LCD1
- * CON17 LCD2
- * CON19 Power Input
- * CON20 USB1
- * CON21 USB2
- * CON22 Serial
- * CON23 LAN
- * CON24 USB3
- * LED1 Camera LED (Yellow)
- * LED2 Power LED (Green)
- * LED3-LED6 User LED (Yellow)
- * LED7 LAN link LED (Green)
- * LED8 LAN activity LED (Yellow)
- */
-
-/*
- * DipSwitch
- *
- * SW1
- *
- * -12345678-+---------------+----------------------------
- * 1 | boot | hermit
- * 0 | boot | OS auto boot
- * -12345678-+---------------+----------------------------
- * 00 | boot device | eMMC
- * 10 | boot device | SDHI0 (CON7)
- * 01 | boot device | -
- * 11 | boot device | Extension Buss (CS0)
- * -12345678-+---------------+----------------------------
- * 0 | Extension Bus | D8-D15 disable, eMMC enable
- * 1 | Extension Bus | D8-D15 enable, eMMC disable
- * -12345678-+---------------+----------------------------
- * 0 | SDHI1 | COM8 disable, COM14 enable
- * 1 | SDHI1 | COM8 enable, COM14 disable
- * -12345678-+---------------+----------------------------
- * 0 | USB0 | COM20 enable, COM24 disable
- * 1 | USB0 | COM20 disable, COM24 enable
- * -12345678-+---------------+----------------------------
- * 00 | JTAG | SH-X2
- * 10 | JTAG | ARM
- * 01 | JTAG | -
- * 11 | JTAG | Boundary Scan
- *-----------+---------------+----------------------------
- */
-
-/*
- * FSI-WM8978
- *
- * this command is required when playback.
- *
- * # amixer set "Headphone" 50
- *
- * this command is required when capture.
- *
- * # amixer set "Input PGA" 15
- * # amixer set "Left Input Mixer MicP" on
- * # amixer set "Left Input Mixer MicN" on
- * # amixer set "Right Input Mixer MicN" on
- * # amixer set "Right Input Mixer MicP" on
- */
-
-/*
- * USB function
- *
- * When you use USB Function,
- * set SW1.6 ON, and connect cable to CN24.
- *
- * USBF needs workaround on R8A7740 chip.
- * These are a little bit complex.
- * see
- * usbhsf_power_ctrl()
- */
-
-static void __init eva_clock_init(void)
-{
- struct clk *system = clk_get(NULL, "system_clk");
- struct clk *xtal1 = clk_get(NULL, "extal1");
- struct clk *usb24s = clk_get(NULL, "usb24s");
- struct clk *fsibck = clk_get(NULL, "fsibck");
-
- if (IS_ERR(system) ||
- IS_ERR(xtal1) ||
- IS_ERR(usb24s) ||
- IS_ERR(fsibck)) {
- pr_err("armadillo800eva board clock init failed\n");
- goto clock_error;
- }
-
- /* armadillo 800 eva extal1 is 24MHz */
- clk_set_rate(xtal1, 24000000);
-
- /* usb24s use extal1 (= system) clock (= 24MHz) */
- clk_set_parent(usb24s, system);
-
- /* FSIBCK is 12.288MHz, and it is parent of FSI-B */
- clk_set_rate(fsibck, 12288000);
-
-clock_error:
- if (!IS_ERR(system))
- clk_put(system);
- if (!IS_ERR(xtal1))
- clk_put(xtal1);
- if (!IS_ERR(usb24s))
- clk_put(usb24s);
- if (!IS_ERR(fsibck))
- clk_put(fsibck);
-}
-
-/*
- * board init
- */
-static void __init eva_init(void)
-{
- r8a7740_clock_init(MD_CK0 | MD_CK2);
- eva_clock_init();
-
- r8a7740_meram_workaround();
-
-#ifdef CONFIG_CACHE_L2X0
- /* Shared attribute override enable, 32K*8way */
- l2x0_init(IOMEM(0xf0002000), 0x00400000, 0xc20f0fff);
-#endif
-
- r8a7740_add_standard_devices_dt();
-
- r8a7740_pm_init();
-}
-
-#define RESCNT2 IOMEM(0xe6188020)
-static void eva_restart(enum reboot_mode mode, const char *cmd)
-{
- /* Do soft power on reset */
- writel(1 << 31, RESCNT2);
-}
-
-static const char *eva_boards_compat_dt[] __initdata = {
- "renesas,armadillo800eva-reference",
- NULL,
-};
-
-DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva-reference")
- .map_io = r8a7740_map_io,
- .init_early = shmobile_init_delay,
- .init_irq = r8a7740_init_irq_of,
- .init_machine = eva_init,
- .init_late = shmobile_init_late,
- .dt_compat = eva_boards_compat_dt,
- .restart = eva_restart,
-MACHINE_END
};
DT_MACHINE_START(BOCKW_DT, "bockw")
- .init_early = r8a7778_init_delay,
+ .init_early = shmobile_init_delay,
.init_irq = r8a7778_init_irq_dt,
.init_machine = bockw_init,
+ .init_late = shmobile_init_late,
.dt_compat = bockw_boards_compat_dt,
MACHINE_END
};
DT_MACHINE_START(BOCKW_DT, "bockw")
- .init_early = r8a7778_init_delay,
+ .init_early = shmobile_init_delay,
.init_irq = r8a7778_init_irq_dt,
.init_machine = bockw_init,
.dt_compat = bockw_boards_compat_dt,
+++ /dev/null
-/*
- * Genmai board support
- *
- * Copyright (C) 2013 Renesas Solutions Corp.
- * Copyright (C) 2013 Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <linux/kernel.h>
-#include <linux/of_platform.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-#include "clock.h"
-#include "common.h"
-#include "r7s72100.h"
-
-/*
- * This is a really crude hack to provide clkdev support to platform
- * devices until they get moved to DT.
- */
-static const struct clk_name clk_names[] = {
- { "mtu2", "fck", "sh-mtu2" },
-};
-
-static void __init genmai_add_standard_devices(void)
-{
- shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), true);
- r7s72100_add_dt_devices();
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-}
-
-static const char * const genmai_boards_compat_dt[] __initconst = {
- "renesas,genmai",
- NULL,
-};
-
-DT_MACHINE_START(GENMAI_DT, "genmai")
- .init_early = shmobile_init_delay,
- .init_machine = genmai_add_standard_devices,
- .dt_compat = genmai_boards_compat_dt,
-MACHINE_END
+++ /dev/null
-/*
- * Genmai board support
- *
- * Copyright (C) 2013-2014 Renesas Solutions Corp.
- * Copyright (C) 2013 Magnus Damm
- * Copyright (C) 2014 Cogent Embedded, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/serial_sci.h>
-#include <linux/sh_eth.h>
-#include <linux/spi/rspi.h>
-#include <linux/spi/spi.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-#include "common.h"
-#include "irqs.h"
-#include "r7s72100.h"
-
-/* Ether */
-static const struct sh_eth_plat_data ether_pdata __initconst = {
- .phy = 0x00, /* PD60610 */
- .edmac_endian = EDMAC_LITTLE_ENDIAN,
- .phy_interface = PHY_INTERFACE_MODE_MII,
- .no_ether_link = 1
-};
-
-static const struct resource ether_resources[] __initconst = {
- DEFINE_RES_MEM(0xe8203000, 0x800),
- DEFINE_RES_MEM(0xe8204800, 0x200),
- DEFINE_RES_IRQ(gic_iid(359)),
-};
-
-static const struct platform_device_info ether_info __initconst = {
- .name = "r7s72100-ether",
- .id = -1,
- .res = ether_resources,
- .num_res = ARRAY_SIZE(ether_resources),
- .data = ðer_pdata,
- .size_data = sizeof(ether_pdata),
- .dma_mask = DMA_BIT_MASK(32),
-};
-
-/* RSPI */
-#define RSPI_RESOURCE(idx, baseaddr, irq) \
-static const struct resource rspi##idx##_resources[] __initconst = { \
- DEFINE_RES_MEM(baseaddr, 0x24), \
- DEFINE_RES_IRQ_NAMED(irq, "error"), \
- DEFINE_RES_IRQ_NAMED(irq + 1, "rx"), \
- DEFINE_RES_IRQ_NAMED(irq + 2, "tx"), \
-}
-
-RSPI_RESOURCE(0, 0xe800c800, gic_iid(270));
-RSPI_RESOURCE(1, 0xe800d000, gic_iid(273));
-RSPI_RESOURCE(2, 0xe800d800, gic_iid(276));
-RSPI_RESOURCE(3, 0xe800e000, gic_iid(279));
-RSPI_RESOURCE(4, 0xe800e800, gic_iid(282));
-
-static const struct rspi_plat_data rspi_pdata __initconst = {
- .num_chipselect = 1,
-};
-
-#define r7s72100_register_rspi(idx) \
- platform_device_register_resndata(NULL, "rspi-rz", idx, \
- rspi##idx##_resources, \
- ARRAY_SIZE(rspi##idx##_resources), \
- &rspi_pdata, sizeof(rspi_pdata))
-
-static const struct spi_board_info spi_info[] __initconst = {
- {
- .modalias = "wm8978",
- .max_speed_hz = 5000000,
- .bus_num = 4,
- .chip_select = 0,
- },
-};
-
-/* SCIF */
-#define R7S72100_SCIF(index, baseaddr, irq) \
-static const struct plat_sci_port scif##index##_platform_data = { \
- .type = PORT_SCIF, \
- .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, \
- .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
- .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \
- SCSCR_REIE, \
-}; \
- \
-static struct resource scif##index##_resources[] = { \
- DEFINE_RES_MEM(baseaddr, 0x100), \
- DEFINE_RES_IRQ(irq + 1), \
- DEFINE_RES_IRQ(irq + 2), \
- DEFINE_RES_IRQ(irq + 3), \
- DEFINE_RES_IRQ(irq), \
-} \
-
-R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
-R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
-R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
-R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
-R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
-R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
-R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
-R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
-
-#define r7s72100_register_scif(index) \
- platform_device_register_resndata(NULL, "sh-sci", index, \
- scif##index##_resources, \
- ARRAY_SIZE(scif##index##_resources), \
- &scif##index##_platform_data, \
- sizeof(scif##index##_platform_data))
-
-static void __init genmai_add_standard_devices(void)
-{
- r7s72100_clock_init();
- r7s72100_add_dt_devices();
-
- platform_device_register_full(ðer_info);
-
- r7s72100_register_rspi(0);
- r7s72100_register_rspi(1);
- r7s72100_register_rspi(2);
- r7s72100_register_rspi(3);
- r7s72100_register_rspi(4);
- spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
-
- r7s72100_register_scif(0);
- r7s72100_register_scif(1);
- r7s72100_register_scif(2);
- r7s72100_register_scif(3);
- r7s72100_register_scif(4);
- r7s72100_register_scif(5);
- r7s72100_register_scif(6);
- r7s72100_register_scif(7);
-}
-
-static const char * const genmai_boards_compat_dt[] __initconst = {
- "renesas,genmai",
- NULL,
-};
-
-DT_MACHINE_START(GENMAI_DT, "genmai")
- .init_early = shmobile_init_delay,
- .init_machine = genmai_add_standard_devices,
- .dt_compat = genmai_boards_compat_dt,
-MACHINE_END
* devices until they get moved to DT.
*/
static const struct clk_name clk_names[] __initconst = {
- { "cmt0", "fck", "sh-cmt-48-gen2.0" },
{ "du0", "du.0", "rcar-du-r8a7791" },
{ "du1", "du.1", "rcar-du-r8a7791" },
{ "lvds0", "lvds.0", "rcar-du-r8a7791" },
static void __init koelsch_add_standard_devices(void)
{
shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false);
- r8a7791_add_dt_devices();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
koelsch_add_du_device();
DT_MACHINE_START(KZM9G_DT, "kzm9g-reference")
.smp = smp_ops(sh73a0_smp_ops),
.map_io = sh73a0_map_io,
- .init_early = sh73a0_init_delay,
- .nr_irqs = NR_IRQS_LEGACY,
+ .init_early = shmobile_init_delay,
.init_machine = kzm_init,
+ .init_late = shmobile_init_late,
.dt_compat = kzm9g_boards_compat_dt,
MACHINE_END
#include <video/sh_mobile_lcdc.h>
#include "common.h"
+#include "intc.h"
#include "irqs.h"
#include "sh73a0.h"
.smp = smp_ops(sh73a0_smp_ops),
.map_io = sh73a0_map_io,
.init_early = sh73a0_add_early_devices,
- .nr_irqs = NR_IRQS_LEGACY,
.init_irq = sh73a0_init_irq,
.init_machine = kzm_init,
.init_late = shmobile_init_late,
* devices until they get moved to DT.
*/
static const struct clk_name clk_names[] __initconst = {
- { "cmt0", "fck", "sh-cmt-48-gen2.0" },
{ "du0", "du.0", "rcar-du-r8a7790" },
{ "du1", "du.1", "rcar-du-r8a7790" },
{ "du2", "du.2", "rcar-du-r8a7790" },
static void __init lager_add_standard_devices(void)
{
shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false);
- r8a7790_add_dt_devices();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
lager_add_du_device();
#include <asm/mach-types.h>
#include "common.h"
+#include "intc.h"
#include "irqs.h"
#include "pm-rmobile.h"
#include "sh-gpio.h"
clocksource_of_init();
}
-/*
- * This is a really crude hack to provide clkdev support to platform
- * devices until they get moved to DT.
- */
-static const struct clk_name clk_names[] __initconst = {
- { "tmu0", "fck", "sh-tmu.0" },
-};
-
static void __init marzen_init(void)
{
- shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false);
- r8a7779_add_standard_devices_dt();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
r8a7779_init_irq_extpin_dt(1); /* IRQ1 as individual interrupt */
}
.map_io = r8a7779_map_io,
.init_early = shmobile_init_delay,
.init_time = marzen_init_timer,
- .nr_irqs = NR_IRQS_LEGACY,
.init_irq = r8a7779_init_irq_dt,
.init_machine = marzen_init,
+ .init_late = shmobile_init_late,
.dt_compat = marzen_boards_compat_dt,
MACHINE_END
+++ /dev/null
-/*
- * r7a72100 clock framework support
- *
- * Copyright (C) 2013 Renesas Solutions Corp.
- * Copyright (C) 2012 Phil Edworthy
- * Copyright (C) 2011 Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/sh_clk.h>
-#include <linux/clkdev.h>
-
-#include "common.h"
-#include "r7s72100.h"
-
-/* Frequency Control Registers */
-#define FRQCR 0xfcfe0010
-#define FRQCR2 0xfcfe0014
-/* Standby Control Registers */
-#define STBCR3 0xfcfe0420
-#define STBCR4 0xfcfe0424
-#define STBCR7 0xfcfe0430
-#define STBCR9 0xfcfe0438
-#define STBCR10 0xfcfe043c
-
-#define PLL_RATE 30
-
-static struct clk_mapping cpg_mapping = {
- .phys = 0xfcfe0000,
- .len = 0x1000,
-};
-
-/* Fixed 32 KHz root clock for RTC */
-static struct clk r_clk = {
- .rate = 32768,
-};
-
-/*
- * Default rate for the root input clock, reset this with clk_set_rate()
- * from the platform code.
- */
-static struct clk extal_clk = {
- .rate = 13330000,
- .mapping = &cpg_mapping,
-};
-
-static unsigned long pll_recalc(struct clk *clk)
-{
- return clk->parent->rate * PLL_RATE;
-}
-
-static struct sh_clk_ops pll_clk_ops = {
- .recalc = pll_recalc,
-};
-
-static struct clk pll_clk = {
- .ops = &pll_clk_ops,
- .parent = &extal_clk,
- .flags = CLK_ENABLE_ON_INIT,
-};
-
-static unsigned long bus_recalc(struct clk *clk)
-{
- return clk->parent->rate / 3;
-}
-
-static struct sh_clk_ops bus_clk_ops = {
- .recalc = bus_recalc,
-};
-
-static struct clk bus_clk = {
- .ops = &bus_clk_ops,
- .parent = &pll_clk,
- .flags = CLK_ENABLE_ON_INIT,
-};
-
-static unsigned long peripheral0_recalc(struct clk *clk)
-{
- return clk->parent->rate / 12;
-}
-
-static struct sh_clk_ops peripheral0_clk_ops = {
- .recalc = peripheral0_recalc,
-};
-
-static struct clk peripheral0_clk = {
- .ops = &peripheral0_clk_ops,
- .parent = &pll_clk,
- .flags = CLK_ENABLE_ON_INIT,
-};
-
-static unsigned long peripheral1_recalc(struct clk *clk)
-{
- return clk->parent->rate / 6;
-}
-
-static struct sh_clk_ops peripheral1_clk_ops = {
- .recalc = peripheral1_recalc,
-};
-
-static struct clk peripheral1_clk = {
- .ops = &peripheral1_clk_ops,
- .parent = &pll_clk,
- .flags = CLK_ENABLE_ON_INIT,
-};
-
-struct clk *main_clks[] = {
- &r_clk,
- &extal_clk,
- &pll_clk,
- &bus_clk,
- &peripheral0_clk,
- &peripheral1_clk,
-};
-
-static int div2[] = { 1, 3, 0, 3 }; /* 1, 2/3, reserve, 1/3 */
-static int multipliers[] = { 1, 2, 1, 1 };
-
-static struct clk_div_mult_table div4_div_mult_table = {
- .divisors = div2,
- .nr_divisors = ARRAY_SIZE(div2),
- .multipliers = multipliers,
- .nr_multipliers = ARRAY_SIZE(multipliers),
-};
-
-static struct clk_div4_table div4_table = {
- .div_mult_table = &div4_div_mult_table,
-};
-
-enum { DIV4_I,
- DIV4_NR };
-
-#define DIV4(_reg, _bit, _mask, _flags) \
- SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
-
-/* The mask field specifies the div2 entries that are valid */
-struct clk div4_clks[DIV4_NR] = {
- [DIV4_I] = DIV4(FRQCR, 8, 0xB, CLK_ENABLE_REG_16BIT
- | CLK_ENABLE_ON_INIT),
-};
-
-enum {
- MSTP107, MSTP106, MSTP105, MSTP104, MSTP103,
- MSTP97, MSTP96, MSTP95, MSTP94,
- MSTP74,
- MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
- MSTP33, MSTP_NR
-};
-
-static struct clk mstp_clks[MSTP_NR] = {
- [MSTP107] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 7, 0), /* RSPI0 */
- [MSTP106] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 6, 0), /* RSPI1 */
- [MSTP105] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 5, 0), /* RSPI2 */
- [MSTP104] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 4, 0), /* RSPI3 */
- [MSTP103] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 3, 0), /* RSPI4 */
- [MSTP97] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 7, 0), /* RIIC0 */
- [MSTP96] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 6, 0), /* RIIC1 */
- [MSTP95] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 5, 0), /* RIIC2 */
- [MSTP94] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 4, 0), /* RIIC3 */
- [MSTP74] = SH_CLK_MSTP8(&peripheral1_clk, STBCR7, 4, 0), /* Ether */
- [MSTP47] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 7, 0), /* SCIF0 */
- [MSTP46] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 6, 0), /* SCIF1 */
- [MSTP45] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 5, 0), /* SCIF2 */
- [MSTP44] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 4, 0), /* SCIF3 */
- [MSTP43] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 3, 0), /* SCIF4 */
- [MSTP42] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 2, 0), /* SCIF5 */
- [MSTP41] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 1, 0), /* SCIF6 */
- [MSTP40] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 0, 0), /* SCIF7 */
- [MSTP33] = SH_CLK_MSTP8(&peripheral0_clk, STBCR3, 3, 0), /* MTU2 */
-};
-
-static struct clk_lookup lookups[] = {
- /* main clocks */
- CLKDEV_CON_ID("rclk", &r_clk),
- CLKDEV_CON_ID("extal", &extal_clk),
- CLKDEV_CON_ID("pll_clk", &pll_clk),
- CLKDEV_CON_ID("peripheral_clk", &peripheral1_clk),
-
- /* DIV4 clocks */
- CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
-
- /* MSTP clocks */
- CLKDEV_DEV_ID("rspi-rz.0", &mstp_clks[MSTP107]),
- CLKDEV_DEV_ID("rspi-rz.1", &mstp_clks[MSTP106]),
- CLKDEV_DEV_ID("rspi-rz.2", &mstp_clks[MSTP105]),
- CLKDEV_DEV_ID("rspi-rz.3", &mstp_clks[MSTP104]),
- CLKDEV_DEV_ID("rspi-rz.4", &mstp_clks[MSTP103]),
- CLKDEV_DEV_ID("r7s72100-ether", &mstp_clks[MSTP74]),
-
- /* ICK */
- CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP47]),
- CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP46]),
- CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP45]),
- CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[MSTP44]),
- CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[MSTP43]),
- CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]),
- CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]),
- CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]),
- CLKDEV_ICK_ID("fck", "sh-mtu2", &mstp_clks[MSTP33]),
-};
-
-void __init r7s72100_clock_init(void)
-{
- int k, ret = 0;
-
- for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
- ret = clk_register(main_clks[k]);
-
- clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-
- if (!ret)
- ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
-
- if (!ret)
- ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
-
- if (!ret)
- shmobile_clk_init();
- else
- panic("failed to setup rza1 clocks\n");
-}
#define __ARCH_MACH_COMMON_H
extern void shmobile_earlytimer_init(void);
-extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz,
- unsigned int mult, unsigned int div);
extern void shmobile_init_delay(void);
struct twd_local_timer;
extern void shmobile_setup_console(void);
((((i) & TS_LOW_BIT) << TS_LOW_SHIFT) |\
(((i) & TS_HI_BIT) << TS_HI_SHIFT))
-#define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL((xmit_sz)))
-#define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL((xmit_sz)))
+#define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL((xmit_sz)))
+#define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL((xmit_sz)))
/*
p ## _sense_registers, NULL), \
}
+/* INTCS */
+#define INTCS_VECT_BASE 0x3400
+#define INTCS_VECT(n, vect) INTC_VECT((n), INTCS_VECT_BASE + (vect))
+#define intcs_evt2irq(evt) evt2irq(INTCS_VECT_BASE + (evt))
+
#endif /* __ASM_MACH_INTC_H */
#ifndef __SHMOBILE_IRQS_H
#define __SHMOBILE_IRQS_H
-#include <linux/sh_intc.h>
-#include <mach/irqs.h>
+#include "include/mach/irqs.h"
/* GIC */
#define gic_spi(nr) ((nr) + 32)
#define gic_iid(nr) (nr) /* ICCIAR / interrupt ID */
-/* INTCS */
-#define INTCS_VECT_BASE 0x3400
-#define INTCS_VECT(n, vect) INTC_VECT((n), INTCS_VECT_BASE + (vect))
-#define intcs_evt2irq(evt) evt2irq(INTCS_VECT_BASE + (evt))
-
/* GPIO IRQ */
#define _GPIO_IRQ_BASE 2500
#define GPIO_IRQ_BASE(x) (_GPIO_IRQ_BASE + (32 * x))
#include "common.h"
#include "pm-rmobile.h"
-#ifdef CONFIG_PM
+#if defined(CONFIG_PM) && !defined(CONFIG_ARCH_MULTIPLATFORM)
static int r8a7740_pd_a4s_suspend(void)
{
/*
rmobile_init_domains(r8a7740_pm_domains, ARRAY_SIZE(r8a7740_pm_domains));
pm_genpd_add_subdomain_names("A4S", "A3SP");
}
-
-#endif /* CONFIG_PM */
+#endif /* CONFIG_PM && !CONFIG_ARCH_MULTIPLATFORM */
#ifdef CONFIG_SUSPEND
static int r8a7740_enter_suspend(suspend_state_t suspend_state)
+++ /dev/null
-#ifndef __ASM_R7S72100_H__
-#define __ASM_R7S72100_H__
-
-void r7s72100_add_dt_devices(void);
-void r7s72100_clock_init(void);
-
-#endif /* __ASM_R7S72100_H__ */
void r8a73a4_add_dt_devices(void);
void r8a73a4_clock_init(void);
void r8a73a4_pinmux_init(void);
-void r8a73a4_init_early(void);
#endif /* __ASM_R8A73A4_H__ */
extern void r8a7740_map_io(void);
extern void r8a7740_add_early_devices(void);
extern void r8a7740_add_standard_devices(void);
-extern void r8a7740_add_standard_devices_dt(void);
extern void r8a7740_clock_init(u8 md_ck);
extern void r8a7740_pinmux_init(void);
extern void r8a7740_pm_init(void);
-#ifdef CONFIG_PM
+#if defined(CONFIG_PM) && !defined(CONFIG_ARCH_MULTIPLATFORM)
extern void __init r8a7740_init_pm_domains(void);
#else
static inline void r8a7740_init_pm_domains(void) {}
-#endif /* CONFIG_PM */
+#endif /* CONFIG_PM && !CONFIG_ARCH_MULTIPLATFORM */
#endif /* __ASM_R8A7740_H__ */
extern void r8a7779_earlytimer_init(void);
extern void r8a7779_add_early_devices(void);
extern void r8a7779_add_standard_devices(void);
-extern void r8a7779_add_standard_devices_dt(void);
extern void r8a7779_init_late(void);
extern u32 r8a7779_read_mode_pins(void);
extern void r8a7779_clock_init(void);
};
void r8a7790_add_standard_devices(void);
-void r8a7790_add_dt_devices(void);
void r8a7790_clock_init(void);
void r8a7790_pinmux_init(void);
void r8a7790_pm_init(void);
#define __ASM_R8A7791_H__
void r8a7791_add_standard_devices(void);
-void r8a7791_add_dt_devices(void);
void r8a7791_clock_init(void);
void r8a7791_pinmux_init(void);
void r8a7791_pm_init(void);
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include <linux/irq.h>
#include <linux/kernel.h>
-#include <linux/of_platform.h>
-#include <linux/sh_timer.h>
#include <asm/mach/arch.h>
#include "common.h"
-#include "irqs.h"
-#include "r7s72100.h"
-static struct resource mtu2_resources[] __initdata = {
- DEFINE_RES_MEM(0xfcff0000, 0x400),
- DEFINE_RES_IRQ_NAMED(gic_iid(139), "tgi0a"),
-};
-
-#define r7s72100_register_mtu2() \
- platform_device_register_resndata(NULL, "sh-mtu2", \
- -1, mtu2_resources, \
- ARRAY_SIZE(mtu2_resources), \
- NULL, 0)
-
-void __init r7s72100_add_dt_devices(void)
-{
- r7s72100_register_mtu2();
-}
-
-#ifdef CONFIG_USE_OF
static const char *r7s72100_boards_compat_dt[] __initdata = {
"renesas,r7s72100",
NULL,
DT_MACHINE_START(R7S72100_DT, "Generic R7S72100 (Flattened Device Tree)")
.init_early = shmobile_init_delay,
+ .init_late = shmobile_init_late,
.dt_compat = r7s72100_boards_compat_dt,
MACHINE_END
-#endif /* CONFIG_USE_OF */
r8a73a4_register_dmac();
}
-void __init r8a73a4_init_early(void)
-{
-#ifndef CONFIG_ARM_ARCH_TIMER
- shmobile_setup_delay(1500, 2, 4); /* Cortex-A15 @ 1500MHz */
-#endif
-}
-
#ifdef CONFIG_USE_OF
static const char *r8a73a4_boards_compat_dt[] __initdata = {
};
DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
- .init_early = r8a73a4_init_early,
+ .init_early = shmobile_init_delay,
+ .init_late = shmobile_init_late,
.dt_compat = r8a73a4_boards_compat_dt,
MACHINE_END
#endif /* CONFIG_USE_OF */
#include <asm/mach/map.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
+#include <asm/hardware/cache-l2x0.h>
#include "common.h"
#include "dma-register.h"
.num_resources = ARRAY_SIZE(ipmmu_resources),
};
-static struct platform_device *r8a7740_devices_dt[] __initdata = {
- &cmt1_device,
-};
-
static struct platform_device *r8a7740_early_devices[] __initdata = {
&scif0_device,
&scif1_device,
&irqpin3_device,
&tmu0_device,
&ipmmu_device,
+ &cmt1_device,
};
/* DMA */
/* add devices */
platform_add_devices(r8a7740_early_devices,
ARRAY_SIZE(r8a7740_early_devices));
- platform_add_devices(r8a7740_devices_dt,
- ARRAY_SIZE(r8a7740_devices_dt));
platform_add_devices(r8a7740_late_devices,
ARRAY_SIZE(r8a7740_late_devices));
{
early_platform_add_devices(r8a7740_early_devices,
ARRAY_SIZE(r8a7740_early_devices));
- early_platform_add_devices(r8a7740_devices_dt,
- ARRAY_SIZE(r8a7740_devices_dt));
/* setup early console here as well */
shmobile_setup_console();
#ifdef CONFIG_USE_OF
-void __init r8a7740_add_standard_devices_dt(void)
-{
- platform_add_devices(r8a7740_devices_dt,
- ARRAY_SIZE(r8a7740_devices_dt));
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-}
-
void __init r8a7740_init_irq_of(void)
{
void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
static void __init r8a7740_generic_init(void)
{
- r8a7740_clock_init(0);
- r8a7740_add_standard_devices_dt();
+ r8a7740_meram_workaround();
+
+#ifdef CONFIG_CACHE_L2X0
+ /* Shared attribute override enable, 32K*8way */
+ l2x0_init(IOMEM(0xf0002000), 0x00400000, 0xc20f0fff);
+#endif
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+#define RESCNT2 IOMEM(0xe6188020)
+static void r8a7740_restart(enum reboot_mode mode, const char *cmd)
+{
+ /* Do soft power on reset */
+ writel(1 << 31, RESCNT2);
}
static const char *r8a7740_boards_compat_dt[] __initdata = {
.init_machine = r8a7740_generic_init,
.init_late = shmobile_init_late,
.dt_compat = r8a7740_boards_compat_dt,
+ .restart = r8a7740_restart,
MACHINE_END
#endif /* CONFIG_USE_OF */
void __init r8a7778_init_late(void)
{
+ shmobile_init_late();
platform_device_register_full(&ehci_info);
platform_device_register_full(&ohci_info);
}
void __init r8a7778_init_delay(void)
{
- shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
+ shmobile_init_delay();
}
#ifdef CONFIG_USE_OF
DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
.init_early = r8a7778_init_delay,
.init_irq = r8a7778_init_irq_dt,
+ .init_late = shmobile_init_late,
.dt_compat = r8a7778_compat_dt,
- .init_late = r8a7778_init_late,
MACHINE_END
#endif /* CONFIG_USE_OF */
sizeof(dma_platform_data));
}
-static struct platform_device *r8a7779_devices_dt[] __initdata = {
+static struct platform_device *r8a7779_early_devices[] __initdata = {
&tmu0_device,
};
r8a7779_init_pm_domains();
- platform_add_devices(r8a7779_devices_dt,
- ARRAY_SIZE(r8a7779_devices_dt));
+ platform_add_devices(r8a7779_early_devices,
+ ARRAY_SIZE(r8a7779_early_devices));
platform_add_devices(r8a7779_standard_devices,
ARRAY_SIZE(r8a7779_standard_devices));
r8a7779_register_hpb_dmae();
void __init r8a7779_add_early_devices(void)
{
- early_platform_add_devices(r8a7779_devices_dt,
- ARRAY_SIZE(r8a7779_devices_dt));
+ early_platform_add_devices(r8a7779_early_devices,
+ ARRAY_SIZE(r8a7779_early_devices));
/* Early serial console setup is not included here due to
* memory map collisions. The SCIF serial ports in r8a7779
__raw_writel(0x003fee3f, INT2SMSKCR4);
}
-void __init r8a7779_add_standard_devices_dt(void)
-{
- platform_add_devices(r8a7779_devices_dt,
- ARRAY_SIZE(r8a7779_devices_dt));
-}
-
#define MODEMR 0xffcc0020
u32 __init r8a7779_read_mode_pins(void)
DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
.map_io = r8a7779_map_io,
.init_early = shmobile_init_delay,
- .nr_irqs = NR_IRQS_LEGACY,
.init_irq = r8a7779_init_irq_dt,
- .init_machine = r8a7779_add_standard_devices_dt,
- .init_late = r8a7779_init_late,
+ .init_late = shmobile_init_late,
.dt_compat = r8a7779_compat_dt,
MACHINE_END
#endif /* CONFIG_USE_OF */
&cmt##idx##_platform_data, \
sizeof(struct sh_timer_config))
-void __init r8a7790_add_dt_devices(void)
-{
- r8a7790_register_cmt(0);
-}
-
void __init r8a7790_add_standard_devices(void)
{
r8a7790_register_scif(0);
r8a7790_register_scif(7);
r8a7790_register_scif(8);
r8a7790_register_scif(9);
- r8a7790_add_dt_devices();
+ r8a7790_register_cmt(0);
r8a7790_register_irqc(0);
r8a7790_register_thermal();
r8a7790_register_i2c(0);
thermal_resources, \
ARRAY_SIZE(thermal_resources))
-void __init r8a7791_add_dt_devices(void)
-{
- r8a7791_register_cmt(0);
-}
-
void __init r8a7791_add_standard_devices(void)
{
r8a7791_register_scif(0);
r8a7791_register_scif(12);
r8a7791_register_scif(13);
r8a7791_register_scif(14);
- r8a7791_add_dt_devices();
+ r8a7791_register_cmt(0);
r8a7791_register_irqc(0);
r8a7791_register_thermal();
}
--- /dev/null
+/*
+ * r8a7794 processor support
+ *
+ * Copyright (C) 2014 Renesas Electronics Corporation
+ * Copyright (C) 2014 Ulrich Hecht
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/of_platform.h>
+#include "common.h"
+#include "rcar-gen2.h"
+#include <asm/mach/arch.h>
+
+#ifdef CONFIG_USE_OF
+
+static const char * const r8a7794_boards_compat_dt[] __initconst = {
+ "renesas,r8a7794",
+ NULL,
+};
+
+DT_MACHINE_START(R8A7794_DT, "Generic R8A7794 (Flattened Device Tree)")
+ .init_early = shmobile_init_delay,
+ .init_late = shmobile_init_late,
+ .init_time = rcar_gen2_timer_init,
+ .dt_compat = r8a7794_boards_compat_dt,
+MACHINE_END
+#endif /* CONFIG_USE_OF */
#include "common.h"
#include "dma-register.h"
+#include "intc.h"
#include "irqs.h"
#include "pm-rmobile.h"
#include "sh7372.h"
void __init sh7372_add_early_devices_dt(void)
{
- shmobile_setup_delay(800, 1, 3); /* Cortex-A8 @ 800MHz */
+ shmobile_init_delay();
sh7372_add_early_devices();
}
DT_MACHINE_START(SH7372_DT, "Generic SH7372 (Flattened Device Tree)")
.map_io = sh7372_map_io,
.init_early = sh7372_add_early_devices_dt,
- .nr_irqs = NR_IRQS_LEGACY,
.init_irq = sh7372_init_irq,
.handle_irq = shmobile_handle_irq_intc,
.init_machine = sh7372_add_standard_devices_dt,
#include "common.h"
#include "dma-register.h"
+#include "intc.h"
#include "irqs.h"
#include "sh73a0.h"
},
};
-static struct platform_device *sh73a0_devices_dt[] __initdata = {
- &cmt1_device,
-};
-
static struct platform_device *sh73a0_early_devices[] __initdata = {
&scif0_device,
&scif1_device,
&scif8_device,
&tmu0_device,
&ipmmu_device,
+ &cmt1_device,
};
static struct platform_device *sh73a0_late_devices[] __initdata = {
/* Clear software reset bit on SY-DMAC module */
__raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2);
- platform_add_devices(sh73a0_devices_dt,
- ARRAY_SIZE(sh73a0_devices_dt));
platform_add_devices(sh73a0_early_devices,
ARRAY_SIZE(sh73a0_early_devices));
platform_add_devices(sh73a0_late_devices,
void __init sh73a0_init_delay(void)
{
- shmobile_setup_delay(1196, 44, 46); /* Cortex-A9 @ 1196MHz */
+ shmobile_init_delay();
}
/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
void __init sh73a0_add_early_devices(void)
{
- early_platform_add_devices(sh73a0_devices_dt,
- ARRAY_SIZE(sh73a0_devices_dt));
early_platform_add_devices(sh73a0_early_devices,
ARRAY_SIZE(sh73a0_early_devices));
void __init sh73a0_add_standard_devices_dt(void)
{
- struct platform_device_info devinfo = { .name = "cpufreq-cpu0", .id = -1, };
-
/* clocks are setup late during boot in the case of DT */
sh73a0_clock_init();
- platform_add_devices(sh73a0_devices_dt,
- ARRAY_SIZE(sh73a0_devices_dt));
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-
- /* Instantiate cpufreq-cpu0 */
- platform_device_register_full(&devinfo);
}
static const char *sh73a0_boards_compat_dt[] __initdata = {
.smp = smp_ops(sh73a0_smp_ops),
.map_io = sh73a0_map_io,
.init_early = sh73a0_init_delay,
- .nr_irqs = NR_IRQS_LEGACY,
.init_machine = sh73a0_add_standard_devices_dt,
+ .init_late = shmobile_init_late,
.dt_compat = sh73a0_boards_compat_dt,
MACHINE_END
#endif /* CONFIG_USE_OF */
#include <linux/delay.h>
#include <linux/of_address.h>
-void __init shmobile_setup_delay_hz(unsigned int max_cpu_core_hz,
- unsigned int mult, unsigned int div)
+static void __init shmobile_setup_delay_hz(unsigned int max_cpu_core_hz,
+ unsigned int mult, unsigned int div)
{
/* calculate a worst-case loops-per-jiffy value
* based on maximum cpu core hz setting and the
preset_lpj = max_cpu_core_hz / value;
}
-void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz,
- unsigned int mult, unsigned int div)
-{
- /* calculate a worst-case loops-per-jiffy value
- * based on maximum cpu core mhz setting and the
- * __delay() implementation in arch/arm/lib/delay.S
- *
- * this will result in a longer delay than expected
- * when the cpu core runs on lower frequencies.
- */
-
- unsigned int value = (1000000 * mult) / (HZ * div);
-
- if (!preset_lpj)
- preset_lpj = max_cpu_core_mhz * value;
-}
-
void __init shmobile_init_delay(void)
{
struct device_node *np, *cpus;
- bool is_a8_a9 = false;
+ bool is_a7_a8_a9 = false;
bool is_a15 = false;
u32 max_freq = 0;
if (!of_property_read_u32(np, "clock-frequency", &freq))
max_freq = max(max_freq, freq);
- if (of_device_is_compatible(np, "arm,cortex-a8") ||
+ if (of_device_is_compatible(np, "arm,cortex-a7") ||
+ of_device_is_compatible(np, "arm,cortex-a8") ||
of_device_is_compatible(np, "arm,cortex-a9"))
- is_a8_a9 = true;
+ is_a7_a8_a9 = true;
else if (of_device_is_compatible(np, "arm,cortex-a15"))
is_a15 = true;
}
if (!max_freq)
return;
- if (is_a8_a9)
+ if (is_a7_a8_a9)
shmobile_setup_delay_hz(max_freq, 1, 3);
else if (is_a15 && !IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
shmobile_setup_delay_hz(max_freq, 2, 4);
obj-$(CONFIG_ARCH_R8A7779) += clk-r8a7779.o
obj-$(CONFIG_ARCH_R8A7790) += clk-rcar-gen2.o
obj-$(CONFIG_ARCH_R8A7791) += clk-rcar-gen2.o
+obj-$(CONFIG_ARCH_R8A7794) += clk-rcar-gen2.o
obj-$(CONFIG_ARCH_SHMOBILE_MULTI) += clk-div6.o
obj-$(CONFIG_ARCH_SHMOBILE_MULTI) += clk-mstp.o
# for emply built-in.o
--- /dev/null
+/*
+ * Copyright 2014 Ulrich Hecht
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_R8A7740_H__
+#define __DT_BINDINGS_CLOCK_R8A7740_H__
+
+/* CPG */
+#define R8A7740_CLK_SYSTEM 0
+#define R8A7740_CLK_PLLC0 1
+#define R8A7740_CLK_PLLC1 2
+#define R8A7740_CLK_PLLC2 3
+#define R8A7740_CLK_R 4
+#define R8A7740_CLK_USB24S 5
+#define R8A7740_CLK_I 6
+#define R8A7740_CLK_ZG 7
+#define R8A7740_CLK_B 8
+#define R8A7740_CLK_M1 9
+#define R8A7740_CLK_HP 10
+#define R8A7740_CLK_HPP 11
+#define R8A7740_CLK_USBP 12
+#define R8A7740_CLK_S 13
+#define R8A7740_CLK_ZB 14
+#define R8A7740_CLK_M3 15
+#define R8A7740_CLK_CP 16
+
+/* MSTP1 */
+#define R8A7740_CLK_CEU21 28
+#define R8A7740_CLK_CEU20 27
+#define R8A7740_CLK_TMU0 25
+#define R8A7740_CLK_LCDC1 17
+#define R8A7740_CLK_IIC0 16
+#define R8A7740_CLK_TMU1 11
+#define R8A7740_CLK_LCDC0 0
+
+/* MSTP2 */
+#define R8A7740_CLK_SCIFA6 30
+#define R8A7740_CLK_SCIFA7 22
+#define R8A7740_CLK_DMAC1 18
+#define R8A7740_CLK_DMAC2 17
+#define R8A7740_CLK_DMAC3 16
+#define R8A7740_CLK_USBDMAC 14
+#define R8A7740_CLK_SCIFA5 7
+#define R8A7740_CLK_SCIFB 6
+#define R8A7740_CLK_SCIFA0 4
+#define R8A7740_CLK_SCIFA1 3
+#define R8A7740_CLK_SCIFA2 2
+#define R8A7740_CLK_SCIFA3 1
+#define R8A7740_CLK_SCIFA4 0
+
+/* MSTP3 */
+#define R8A7740_CLK_CMT1 29
+#define R8A7740_CLK_FSI 28
+#define R8A7740_CLK_IIC1 23
+#define R8A7740_CLK_USBF 20
+#define R8A7740_CLK_SDHI0 14
+#define R8A7740_CLK_SDHI1 13
+#define R8A7740_CLK_MMC 12
+#define R8A7740_CLK_GETHER 9
+#define R8A7740_CLK_TPU0 4
+
+/* MSTP4 */
+#define R8A7740_CLK_USBH 16
+#define R8A7740_CLK_SDHI2 15
+#define R8A7740_CLK_USBFUNC 7
+#define R8A7740_CLK_USBPHY 6
+
+/* SUBCK* */
+#define R8A7740_CLK_SUBCK 9
+#define R8A7740_CLK_SUBCK2 10
+
+#endif /* __DT_BINDINGS_CLOCK_R8A7740_H__ */
projects / cascardo / linux.git / commitdiff