ath9k: Update AR9565 initvals
authorMiaoqing Pan <miaoqing@codeaurora.org>
Fri, 26 Feb 2016 08:08:38 +0000 (16:08 +0800)
committerKalle Valo <kvalo@qca.qualcomm.com>
Fri, 11 Mar 2016 11:59:58 +0000 (13:59 +0200)
HW peak detect calibration would fail for AR9300 chips and
we went for implementing the SW way of doing it instead of
HW doing the peak detect calibration.

Signed-off-by: Miaoqing Pan <miaoqing@codeaurora.org>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
drivers/net/wireless/ath/ath9k/ar9565_1p0_initvals.h

index 10d4a6c..35c1bbb 100644 (file)
@@ -347,7 +347,7 @@ static const u32 ar9565_1p0_baseband_postamble[][5] = {
        {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
        {0x00009e20, 0x000003b5, 0x000003b5, 0x000003a4, 0x000003a4},
        {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},
-       {0x00009e3c, 0xcf946222, 0xcf946222, 0xcf946220, 0xcf946220},
+       {0x00009e3c, 0xcf946220, 0xcf946220, 0xcf946220, 0xcf946220},
        {0x00009e44, 0xfe321e27, 0xfe321e27, 0xfe291e27, 0xfe291e27},
        {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012},
        {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},