ath9k: Handle MCI_STATE_AIC_START
authorSujith Manoharan <c_manoha@qca.qualcomm.com>
Sat, 14 Mar 2015 05:57:55 +0000 (11:27 +0530)
committerKalle Valo <kvalo@codeaurora.org>
Fri, 20 Mar 2015 06:28:08 +0000 (08:28 +0200)
This patch adds a function to handle the
MCI message MCI_STATE_AIC_START.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
drivers/net/wireless/ath/ath9k/ar9003_aic.c
drivers/net/wireless/ath/ath9k/ar9003_aic.h
drivers/net/wireless/ath/ath9k/ar9003_mci.c

index 4e8cf08..5b4f818 100644 (file)
@@ -18,6 +18,7 @@
 #include "hw-ops.h"
 #include "ar9003_mci.h"
 #include "ar9003_aic.h"
+#include "ar9003_phy.h"
 #include "reg_aic.h"
 
 static const u8 com_att_db_table[ATH_AIC_MAX_COM_ATT_DB_TABLE] = {
@@ -512,6 +513,38 @@ exit:
 
 }
 
+u8 ar9003_aic_start_normal(struct ath_hw *ah)
+{
+       struct ath9k_hw_aic *aic = &ah->btcoex_hw.aic;
+       int16_t i;
+
+       if (aic->aic_cal_state != AIC_CAL_STATE_DONE)
+               return 1;
+
+       ar9003_aic_gain_table(ah);
+
+       REG_WRITE(ah, AR_PHY_AIC_SRAM_ADDR_B1, ATH_AIC_SRAM_AUTO_INCREMENT);
+
+       for (i = 0; i < ATH_AIC_MAX_BT_CHANNEL; i++) {
+               REG_WRITE(ah, AR_PHY_AIC_SRAM_DATA_B1, aic->aic_sram[i]);
+       }
+
+       /* FIXME: Replace these with proper register names */
+       REG_WRITE(ah, 0xa6b0, 0x80);
+       REG_WRITE(ah, 0xa6b4, 0x5b2df0);
+       REG_WRITE(ah, 0xa6b8, 0x10762cc8);
+       REG_WRITE(ah, 0xa6bc, 0x1219a4b);
+       REG_WRITE(ah, 0xa6c0, 0x1e01);
+       REG_WRITE(ah, 0xb6b4, 0xf0);
+       REG_WRITE(ah, 0xb6c0, 0x1e01);
+       REG_WRITE(ah, 0xb6b0, 0x81);
+       REG_WRITE(ah, AR_PHY_65NM_CH1_RXTX4, 0x40000000);
+
+       aic->aic_enabled = true;
+
+       return 0;
+}
+
 u8 ar9003_aic_cal_reset(struct ath_hw *ah)
 {
        struct ath9k_hw_aic *aic = &ah->btcoex_hw.aic;
index f7c9546..4dbff96 100644 (file)
@@ -53,6 +53,7 @@ struct ath_aic_out_info {
        struct ath_aic_sram_info sram;
 };
 
+u8 ar9003_aic_start_normal(struct ath_hw *ah);
 u8 ar9003_aic_cal_reset(struct ath_hw *ah);
 u8 ar9003_aic_calibration_single(struct ath_hw *ah);
 
index d6ed628..b559d75 100644 (file)
@@ -1363,6 +1363,10 @@ u32 ar9003_mci_state(struct ath_hw *ah, u32 state_type)
                value = (!mci->unhalt_bt_gpm && mci->need_flush_btinfo) ? 1 : 0;
                mci->need_flush_btinfo = false;
                break;
+       case MCI_STATE_AIC_START:
+               if (ath9k_hw_is_aic_enabled(ah))
+                       ar9003_aic_start_normal(ah);
+               break;
        case MCI_STATE_AIC_CAL_RESET:
                if (ath9k_hw_is_aic_enabled(ah))
                        value = ar9003_aic_cal_reset(ah);