arch/arm/boot/dts/armada-38x.dtsi

   1 /*
   2  * Device Tree Include file for Marvell Armada 38x family of SoCs.
   3  *
   4  * Copyright (C) 2014 Marvell
   5  *
   6  * Lior Amsalem <alior@marvell.com>
   7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   9  *
  10  * This file is dual-licensed: you can use it either under the terms
  11  * of the GPL or the X11 license, at your option. Note that this dual
  12  * licensing only applies to this file, and not this project as a
  13  * whole.
  14  *
  15  *  a) This file is free software; you can redistribute it and/or
  16  *     modify it under the terms of the GNU General Public License as
  17  *     published by the Free Software Foundation; either version 2 of the
  18  *     License, or (at your option) any later version.
  19  *
  20  *     This file is distributed in the hope that it will be useful
  21  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *     GNU General Public License for more details.
  24  *
  25  * Or, alternatively
  26  *
  27  *  b) Permission is hereby granted, free of charge, to any person
  28  *     obtaining a copy of this software and associated documentation
  29  *     files (the "Software"), to deal in the Software without
  30  *     restriction, including without limitation the rights to use
  31  *     copy, modify, merge, publish, distribute, sublicense, and/or
  32  *     sell copies of the Software, and to permit persons to whom the
  33  *     Software is furnished to do so, subject to the following
  34  *     conditions:
  35  *
  36  *     The above copyright notice and this permission notice shall be
  37  *     included in all copies or substantial portions of the Software.
  38  *
  39  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  40  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  41  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  42  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  43  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  44  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  45  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  46  *     OTHER DEALINGS IN THE SOFTWARE.
  47  */
  48
  49 #include "skeleton.dtsi"
  50 #include <dt-bindings/interrupt-controller/arm-gic.h>
  51 #include <dt-bindings/interrupt-controller/irq.h>
  52
  53 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
  54
  55 / {
  56         model = "Marvell Armada 38x family SoC";
  57         compatible = "marvell,armada380";
  58
  59         aliases {
  60                 gpio0 = &gpio0;
  61                 gpio1 = &gpio1;
  62                 serial0 = &uart0;
  63                 serial1 = &uart1;
  64         };
  65
  66         pmu {
  67                 compatible = "arm,cortex-a9-pmu";
  68                 interrupts-extended = <&mpic 3>;
  69         };
  70
  71         soc {
  72                 compatible = "marvell,armada380-mbus", "simple-bus";
  73                 #address-cells = <2>;
  74                 #size-cells = <1>;
  75                 controller = <&mbusc>;
  76                 interrupt-parent = <&gic>;
  77                 pcie-mem-aperture = <0xe0000000 0x8000000>;
  78                 pcie-io-aperture  = <0xe8000000 0x100000>;
  79
  80                 bootrom {
  81                         compatible = "marvell,bootrom";
  82                         reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
  83                 };
  84
  85                 devbus-bootcs {
  86                         compatible = "marvell,mvebu-devbus";
  87                         reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
  88                         ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
  89                         #address-cells = <1>;
  90                         #size-cells = <1>;
  91                         clocks = <&coreclk 0>;
  92                         status = "disabled";
  93                 };
  94
  95                 devbus-cs0 {
  96                         compatible = "marvell,mvebu-devbus";
  97                         reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
  98                         ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
  99                         #address-cells = <1>;
 100                         #size-cells = <1>;
 101                         clocks = <&coreclk 0>;
 102                         status = "disabled";
 103                 };
 104
 105                 devbus-cs1 {
 106                         compatible = "marvell,mvebu-devbus";
 107                         reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
 108                         ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
 109                         #address-cells = <1>;
 110                         #size-cells = <1>;
 111                         clocks = <&coreclk 0>;
 112                         status = "disabled";
 113                 };
 114
 115                 devbus-cs2 {
 116                         compatible = "marvell,mvebu-devbus";
 117                         reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
 118                         ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
 119                         #address-cells = <1>;
 120                         #size-cells = <1>;
 121                         clocks = <&coreclk 0>;
 122                         status = "disabled";
 123                 };
 124
 125                 devbus-cs3 {
 126                         compatible = "marvell,mvebu-devbus";
 127                         reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
 128                         ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
 129                         #address-cells = <1>;
 130                         #size-cells = <1>;
 131                         clocks = <&coreclk 0>;
 132                         status = "disabled";
 133                 };
 134
 135                 internal-regs {
 136                         compatible = "simple-bus";
 137                         #address-cells = <1>;
 138                         #size-cells = <1>;
 139                         ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
 140
 141                         L2: cache-controller@8000 {
 142                                 compatible = "arm,pl310-cache";
 143                                 reg = <0x8000 0x1000>;
 144                                 cache-unified;
 145                                 cache-level = <2>;
 146                                 arm,double-linefill-incr = <1>;
 147                                 arm,double-linefill-wrap = <0>;
 148                                 arm,double-linefill = <1>;
 149                                 prefetch-data = <1>;
 150                         };
 151
 152                         scu@c000 {
 153                                 compatible = "arm,cortex-a9-scu";
 154                                 reg = <0xc000 0x58>;
 155                         };
 156
 157                         timer@c600 {
 158                                 compatible = "arm,cortex-a9-twd-timer";
 159                                 reg = <0xc600 0x20>;
 160                                 interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
 161                                 clocks = <&coreclk 2>;
 162                         };
 163
 164                         gic: interrupt-controller@d000 {
 165                                 compatible = "arm,cortex-a9-gic";
 166                                 #interrupt-cells = <3>;
 167                                 #size-cells = <0>;
 168                                 interrupt-controller;
 169                                 reg = <0xd000 0x1000>,
 170                                       <0xc100 0x100>;
 171                         };
 172
 173                         i2c0: i2c@11000 {
 174                                 compatible = "marvell,mv64xxx-i2c";
 175                                 reg = <0x11000 0x20>;
 176                                 #address-cells = <1>;
 177                                 #size-cells = <0>;
 178                                 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 179                                 timeout-ms = <1000>;
 180                                 clocks = <&coreclk 0>;
 181                                 status = "disabled";
 182                         };
 183
 184                         i2c1: i2c@11100 {
 185                                 compatible = "marvell,mv64xxx-i2c";
 186                                 reg = <0x11100 0x20>;
 187                                 #address-cells = <1>;
 188                                 #size-cells = <0>;
 189                                 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
 190                                 timeout-ms = <1000>;
 191                                 clocks = <&coreclk 0>;
 192                                 status = "disabled";
 193                         };
 194
 195                         uart0: serial@12000 {
 196                                 compatible = "snps,dw-apb-uart";
 197                                 reg = <0x12000 0x100>;
 198                                 reg-shift = <2>;
 199                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 200                                 reg-io-width = <1>;
 201                                 clocks = <&coreclk 0>;
 202                                 status = "disabled";
 203                         };
 204
 205                         uart1: serial@12100 {
 206                                 compatible = "snps,dw-apb-uart";
 207                                 reg = <0x12100 0x100>;
 208                                 reg-shift = <2>;
 209                                 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 210                                 reg-io-width = <1>;
 211                                 clocks = <&coreclk 0>;
 212                                 status = "disabled";
 213                         };
 214
 215                         pinctrl: pinctrl@18000 {
 216                                 reg = <0x18000 0x20>;
 217
 218                                 ge0_rgmii_pins: ge-rgmii-pins-0 {
 219                                         marvell,pins = "mpp6", "mpp7", "mpp8",
 220                                                        "mpp9", "mpp10", "mpp11",
 221                                                        "mpp12", "mpp13", "mpp14",
 222                                                        "mpp15", "mpp16", "mpp17";
 223                                         marvell,function = "ge0";
 224                                 };
 225
 226                                 ge1_rgmii_pins: ge-rgmii-pins-1 {
 227                                         marvell,pins = "mpp21", "mpp27", "mpp28",
 228                                                        "mpp29", "mpp30", "mpp31",
 229                                                        "mpp32", "mpp37", "mpp38",
 230                                                        "mpp39", "mpp40", "mpp41";
 231                                         marvell,function = "ge1";
 232                                 };
 233
 234                                 i2c0_pins: i2c-pins-0 {
 235                                         marvell,pins = "mpp2", "mpp3";
 236                                         marvell,function = "i2c0";
 237                                 };
 238
 239                                 mdio_pins: mdio-pins {
 240                                         marvell,pins = "mpp4", "mpp5";
 241                                         marvell,function = "ge";
 242                                 };
 243
 244                                 ref_clk0_pins: ref-clk-pins-0 {
 245                                         marvell,pins = "mpp45";
 246                                         marvell,function = "ref";
 247                                 };
 248
 249                                 ref_clk1_pins: ref-clk-pins-1 {
 250                                         marvell,pins = "mpp46";
 251                                         marvell,function = "ref";
 252                                 };
 253
 254                                 spi0_pins: spi-pins-0 {
 255                                         marvell,pins = "mpp22", "mpp23", "mpp24",
 256                                                        "mpp25";
 257                                         marvell,function = "spi0";
 258                                 };
 259
 260                                 spi1_pins: spi-pins-1 {
 261                                         marvell,pins = "mpp56", "mpp57", "mpp58",
 262                                                        "mpp59";
 263                                         marvell,function = "spi1";
 264                                 };
 265
 266                                 uart0_pins: uart-pins-0 {
 267                                         marvell,pins = "mpp0", "mpp1";
 268                                         marvell,function = "ua0";
 269                                 };
 270
 271                                 uart1_pins: uart-pins-1 {
 272                                         marvell,pins = "mpp19", "mpp20";
 273                                         marvell,function = "ua1";
 274                                 };
 275
 276                                 sdhci_pins: sdhci-pins {
 277                                         marvell,pins = "mpp48", "mpp49", "mpp50",
 278                                                        "mpp52", "mpp53", "mpp54",
 279                                                        "mpp55", "mpp57", "mpp58",
 280                                                        "mpp59";
 281                                         marvell,function = "sd0";
 282                                 };
 283
 284                                 sata0_pins: sata-pins-0 {
 285                                         marvell,pins = "mpp20";
 286                                         marvell,function = "sata0";
 287                                 };
 288
 289                                 sata1_pins: sata-pins-1 {
 290                                         marvell,pins = "mpp19";
 291                                         marvell,function = "sata1";
 292                                 };
 293
 294                                 sata2_pins: sata-pins-2 {
 295                                         marvell,pins = "mpp47";
 296                                         marvell,function = "sata2";
 297                                 };
 298
 299                                 sata3_pins: sata-pins-3 {
 300                                         marvell,pins = "mpp44";
 301                                         marvell,function = "sata3";
 302                                 };
 303                         };
 304
 305                         gpio0: gpio@18100 {
 306                                 compatible = "marvell,orion-gpio";
 307                                 reg = <0x18100 0x40>;
 308                                 ngpios = <32>;
 309                                 gpio-controller;
 310                                 #gpio-cells = <2>;
 311                                 interrupt-controller;
 312                                 #interrupt-cells = <2>;
 313                                 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 314                                              <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 315                                              <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 316                                              <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 317                         };
 318
 319                         gpio1: gpio@18140 {
 320                                 compatible = "marvell,orion-gpio";
 321                                 reg = <0x18140 0x40>;
 322                                 ngpios = <28>;
 323                                 gpio-controller;
 324                                 #gpio-cells = <2>;
 325                                 interrupt-controller;
 326                                 #interrupt-cells = <2>;
 327                                 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 328                                              <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 329                                              <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 330                                              <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
 331                         };
 332
 333                         system-controller@18200 {
 334                                 compatible = "marvell,armada-380-system-controller",
 335                                              "marvell,armada-370-xp-system-controller";
 336                                 reg = <0x18200 0x100>;
 337                         };
 338
 339                         gateclk: clock-gating-control@18220 {
 340                                 compatible = "marvell,armada-380-gating-clock";
 341                                 reg = <0x18220 0x4>;
 342                                 clocks = <&coreclk 0>;
 343                                 #clock-cells = <1>;
 344                         };
 345
 346                         coreclk: mvebu-sar@18600 {
 347                                 compatible = "marvell,armada-380-core-clock";
 348                                 reg = <0x18600 0x04>;
 349                                 #clock-cells = <1>;
 350                         };
 351
 352                         mbusc: mbus-controller@20000 {
 353                                 compatible = "marvell,mbus-controller";
 354                                 reg = <0x20000 0x100>, <0x20180 0x20>;
 355                         };
 356
 357                         mpic: interrupt-controller@20a00 {
 358                                 compatible = "marvell,mpic";
 359                                 reg = <0x20a00 0x2d0>, <0x21070 0x58>;
 360                                 #interrupt-cells = <1>;
 361                                 #size-cells = <1>;
 362                                 interrupt-controller;
 363                                 msi-controller;
 364                                 interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
 365                         };
 366
 367                         timer@20300 {
 368                                 compatible = "marvell,armada-380-timer",
 369                                              "marvell,armada-xp-timer";
 370                                 reg = <0x20300 0x30>, <0x21040 0x30>;
 371                                 interrupts-extended = <&gic  GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>,
 372                                                       <&gic  GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,
 373                                                       <&gic  GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
 374                                                       <&gic  GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
 375                                                       <&mpic 5>,
 376                                                       <&mpic 6>;
 377                                 clocks = <&coreclk 2>, <&refclk>;
 378                                 clock-names = "nbclk", "fixed";
 379                         };
 380
 381                         watchdog@20300 {
 382                                 compatible = "marvell,armada-380-wdt";
 383                                 reg = <0x20300 0x34>, <0x20704 0x4>, <0x18260 0x4>;
 384                                 clocks = <&coreclk 2>, <&refclk>;
 385                                 clock-names = "nbclk", "fixed";
 386                         };
 387
 388                         cpurst@20800 {
 389                                 compatible = "marvell,armada-370-cpu-reset";
 390                                 reg = <0x20800 0x10>;
 391                         };
 392
 393                         mpcore-soc-ctrl@20d20 {
 394                                 compatible = "marvell,armada-380-mpcore-soc-ctrl";
 395                                 reg = <0x20d20 0x6c>;
 396                         };
 397
 398                         coherency-fabric@21010 {
 399                                 compatible = "marvell,armada-380-coherency-fabric";
 400                                 reg = <0x21010 0x1c>;
 401                         };
 402
 403                         pmsu@22000 {
 404                                 compatible = "marvell,armada-380-pmsu";
 405                                 reg = <0x22000 0x1000>;
 406                         };
 407
 408                         /*
 409                          * As a special exception to the "order by
 410                          * register address" rule, the eth0 node is
 411                          * placed here to ensure that it gets
 412                          * registered as the first interface, since
 413                          * the network subsystem doesn't allow naming
 414                          * interfaces using DT aliases. Without this,
 415                          * the ordering of interfaces is different
 416                          * from the one used in U-Boot and the
 417                          * labeling of interfaces on the boards, which
 418                          * is very confusing for users.
 419                          */
 420                         eth0: ethernet@70000 {
 421                                 compatible = "marvell,armada-370-neta";
 422                                 reg = <0x70000 0x4000>;
 423                                 interrupts-extended = <&mpic 8>;
 424                                 clocks = <&gateclk 4>;
 425                                 tx-csum-limit = <9800>;
 426                                 status = "disabled";
 427                         };
 428
 429                         eth1: ethernet@30000 {
 430                                 compatible = "marvell,armada-370-neta";
 431                                 reg = <0x30000 0x4000>;
 432                                 interrupts-extended = <&mpic 10>;
 433                                 clocks = <&gateclk 3>;
 434                                 status = "disabled";
 435                         };
 436
 437                         eth2: ethernet@34000 {
 438                                 compatible = "marvell,armada-370-neta";
 439                                 reg = <0x34000 0x4000>;
 440                                 interrupts-extended = <&mpic 12>;
 441                                 clocks = <&gateclk 2>;
 442                                 status = "disabled";
 443                         };
 444
 445                         usb@58000 {
 446                                 compatible = "marvell,orion-ehci";
 447                                 reg = <0x58000 0x500>;
 448                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 449                                 clocks = <&gateclk 18>;
 450                                 status = "disabled";
 451                         };
 452
 453                         xor@60800 {
 454                                 compatible = "marvell,armada-380-xor", "marvell,orion-xor";
 455                                 reg = <0x60800 0x100
 456                                        0x60a00 0x100>;
 457                                 clocks = <&gateclk 22>;
 458                                 status = "okay";
 459
 460                                 xor00 {
 461                                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 462                                         dmacap,memcpy;
 463                                         dmacap,xor;
 464                                 };
 465                                 xor01 {
 466                                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 467                                         dmacap,memcpy;
 468                                         dmacap,xor;
 469                                         dmacap,memset;
 470                                 };
 471                         };
 472
 473                         xor@60900 {
 474                                 compatible = "marvell,armada-380-xor", "marvell,orion-xor";
 475                                 reg = <0x60900 0x100
 476                                        0x60b00 0x100>;
 477                                 clocks = <&gateclk 28>;
 478                                 status = "okay";
 479
 480                                 xor10 {
 481                                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 482                                         dmacap,memcpy;
 483                                         dmacap,xor;
 484                                 };
 485                                 xor11 {
 486                                         interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
 487                                         dmacap,memcpy;
 488                                         dmacap,xor;
 489                                         dmacap,memset;
 490                                 };
 491                         };
 492
 493                         mdio: mdio@72004 {
 494                                 #address-cells = <1>;
 495                                 #size-cells = <0>;
 496                                 compatible = "marvell,orion-mdio";
 497                                 reg = <0x72004 0x4>;
 498                                 clocks = <&gateclk 4>;
 499                         };
 500
 501                         crypto@90000 {
 502                                 compatible = "marvell,armada-38x-crypto";
 503                                 reg = <0x90000 0x10000>;
 504                                 reg-names = "regs";
 505                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
 506                                              <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 507                                 clocks = <&gateclk 23>, <&gateclk 21>,
 508                                          <&gateclk 14>, <&gateclk 16>;
 509                                 clock-names = "cesa0", "cesa1",
 510                                               "cesaz0", "cesaz1";
 511                                 marvell,crypto-srams = <&crypto_sram0>,
 512                                                        <&crypto_sram1>;
 513                                 marvell,crypto-sram-size = <0x800>;
 514                         };
 515
 516                         rtc@a3800 {
 517                                 compatible = "marvell,armada-380-rtc";
 518                                 reg = <0xa3800 0x20>, <0x184a0 0x0c>;
 519                                 reg-names = "rtc", "rtc-soc";
 520                                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 521                         };
 522
 523                         sata@a8000 {
 524                                 compatible = "marvell,armada-380-ahci";
 525                                 reg = <0xa8000 0x2000>;
 526                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 527                                 clocks = <&gateclk 15>;
 528                                 status = "disabled";
 529                         };
 530
 531                         bm: bm@c8000 {
 532                                 compatible = "marvell,armada-380-neta-bm";
 533                                 reg = <0xc8000 0xac>;
 534                                 clocks = <&gateclk 13>;
 535                                 internal-mem = <&bm_bppi>;
 536                                 status = "disabled";
 537                         };
 538
 539                         sata@e0000 {
 540                                 compatible = "marvell,armada-380-ahci";
 541                                 reg = <0xe0000 0x2000>;
 542                                 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 543                                 clocks = <&gateclk 30>;
 544                                 status = "disabled";
 545                         };
 546
 547                         coredivclk: clock@e4250 {
 548                                 compatible = "marvell,armada-380-corediv-clock";
 549                                 reg = <0xe4250 0xc>;
 550                                 #clock-cells = <1>;
 551                                 clocks = <&mainpll>;
 552                                 clock-output-names = "nand";
 553                         };
 554
 555                         thermal@e8078 {
 556                                 compatible = "marvell,armada380-thermal";
 557                                 reg = <0xe4078 0x4>, <0xe4074 0x4>;
 558                                 status = "okay";
 559                         };
 560
 561                         flash@d0000 {
 562                                 compatible = "marvell,armada370-nand";
 563                                 reg = <0xd0000 0x54>;
 564                                 #address-cells = <1>;
 565                                 #size-cells = <1>;
 566                                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 567                                 clocks = <&coredivclk 0>;
 568                                 status = "disabled";
 569                         };
 570
 571                         sdhci@d8000 {
 572                                 compatible = "marvell,armada-380-sdhci";
 573                                 reg-names = "sdhci", "mbus", "conf-sdio3";
 574                                 reg = <0xd8000 0x1000>,
 575                                         <0xdc000 0x100>,
 576                                         <0x18454 0x4>;
 577                                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 578                                 clocks = <&gateclk 17>;
 579                                 mrvl,clk-delay-cycles = <0x1F>;
 580                                 status = "disabled";
 581                         };
 582
 583                         usb3@f0000 {
 584                                 compatible = "marvell,armada-380-xhci";
 585                                 reg = <0xf0000 0x4000>,<0xf4000 0x4000>;
 586                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 587                                 clocks = <&gateclk 9>;
 588                                 status = "disabled";
 589                         };
 590
 591                         usb3@f8000 {
 592                                 compatible = "marvell,armada-380-xhci";
 593                                 reg = <0xf8000 0x4000>,<0xfc000 0x4000>;
 594                                 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 595                                 clocks = <&gateclk 10>;
 596                                 status = "disabled";
 597                         };
 598                 };
 599
 600                 crypto_sram0: sa-sram0 {
 601                         compatible = "mmio-sram";
 602                         reg = <MBUS_ID(0x09, 0x19) 0 0x800>;
 603                         clocks = <&gateclk 23>;
 604                         #address-cells = <1>;
 605                         #size-cells = <1>;
 606                         ranges = <0 MBUS_ID(0x09, 0x19) 0 0x800>;
 607                 };
 608
 609                 crypto_sram1: sa-sram1 {
 610                         compatible = "mmio-sram";
 611                         reg = <MBUS_ID(0x09, 0x15) 0 0x800>;
 612                         clocks = <&gateclk 21>;
 613                         #address-cells = <1>;
 614                         #size-cells = <1>;
 615                         ranges = <0 MBUS_ID(0x09, 0x15) 0 0x800>;
 616                 };
 617
 618                 bm_bppi: bm-bppi {
 619                         compatible = "mmio-sram";
 620                         reg = <MBUS_ID(0x0c, 0x04) 0 0x100000>;
 621                         ranges = <0 MBUS_ID(0x0c, 0x04) 0 0x100000>;
 622                         #address-cells = <1>;
 623                         #size-cells = <1>;
 624                         clocks = <&gateclk 13>;
 625                         no-memory-wc;
 626                         status = "disabled";
 627                 };
 628
 629                 spi0: spi@10600 {
 630                         compatible = "marvell,armada-380-spi",
 631                                         "marvell,orion-spi";
 632                         reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x50>;
 633                         #address-cells = <1>;
 634                         #size-cells = <0>;
 635                         cell-index = <0>;
 636                         interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
 637                         clocks = <&coreclk 0>;
 638                         status = "disabled";
 639                 };
 640
 641                 spi1: spi@10680 {
 642                         compatible = "marvell,armada-380-spi",
 643                                         "marvell,orion-spi";
 644                         reg = <MBUS_ID(0xf0, 0x01) 0x10680 0x50>;
 645                         #address-cells = <1>;
 646                         #size-cells = <0>;
 647                         cell-index = <1>;
 648                         interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 649                         clocks = <&coreclk 0>;
 650                         status = "disabled";
 651                 };
 652         };
 653
 654         clocks {
 655                 /* 2 GHz fixed main PLL */
 656                 mainpll: mainpll {
 657                         compatible = "fixed-clock";
 658                         #clock-cells = <0>;
 659                         clock-frequency = <1000000000>;
 660                 };
 661
 662                 /* 25 MHz reference crystal */
 663                 refclk: oscillator {
 664                         compatible = "fixed-clock";
 665                         #clock-cells = <0>;
 666                         clock-frequency = <25000000>;
 667                 };
 668         };
 669 };