arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <trace/events/kvm.h>
  57
  58 #define CREATE_TRACE_POINTS
  59 #include "trace.h"
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define MAX_IO_MSRS 256
  72 #define KVM_MAX_MCE_BANKS 32
  73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  74
  75 #define emul_to_vcpu(ctxt) \
  76         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static
  84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static void process_nmi(struct kvm_vcpu *vcpu);
  94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  95
  96 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 static bool __read_mostly ignore_msrs = 0;
 100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 unsigned int min_timer_period_us = 500;
 103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 104
 105 static bool __read_mostly kvmclock_periodic_sync = true;
 106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 107
 108 bool __read_mostly kvm_has_tsc_control;
 109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 110 u32  __read_mostly kvm_max_guest_tsc_khz;
 111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 112 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 114 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 116 static u64 __read_mostly kvm_default_tsc_scaling_ratio;
 117
 118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 119 static u32 __read_mostly tsc_tolerance_ppm = 250;
 120 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 121
 122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 123 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 124 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 125
 126 static bool __read_mostly vector_hashing = true;
 127 module_param(vector_hashing, bool, S_IRUGO);
 128
 129 static bool __read_mostly backwards_tsc_observed = false;
 130
 131 #define KVM_NR_SHARED_MSRS 16
 132
 133 struct kvm_shared_msrs_global {
 134         int nr;
 135         u32 msrs[KVM_NR_SHARED_MSRS];
 136 };
 137
 138 struct kvm_shared_msrs {
 139         struct user_return_notifier urn;
 140         bool registered;
 141         struct kvm_shared_msr_values {
 142                 u64 host;
 143                 u64 curr;
 144         } values[KVM_NR_SHARED_MSRS];
 145 };
 146
 147 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 148 static struct kvm_shared_msrs __percpu *shared_msrs;
 149
 150 struct kvm_stats_debugfs_item debugfs_entries[] = {
 151         { "pf_fixed", VCPU_STAT(pf_fixed) },
 152         { "pf_guest", VCPU_STAT(pf_guest) },
 153         { "tlb_flush", VCPU_STAT(tlb_flush) },
 154         { "invlpg", VCPU_STAT(invlpg) },
 155         { "exits", VCPU_STAT(exits) },
 156         { "io_exits", VCPU_STAT(io_exits) },
 157         { "mmio_exits", VCPU_STAT(mmio_exits) },
 158         { "signal_exits", VCPU_STAT(signal_exits) },
 159         { "irq_window", VCPU_STAT(irq_window_exits) },
 160         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 161         { "halt_exits", VCPU_STAT(halt_exits) },
 162         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 163         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 164         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 165         { "hypercalls", VCPU_STAT(hypercalls) },
 166         { "request_irq", VCPU_STAT(request_irq_exits) },
 167         { "irq_exits", VCPU_STAT(irq_exits) },
 168         { "host_state_reload", VCPU_STAT(host_state_reload) },
 169         { "efer_reload", VCPU_STAT(efer_reload) },
 170         { "fpu_reload", VCPU_STAT(fpu_reload) },
 171         { "insn_emulation", VCPU_STAT(insn_emulation) },
 172         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 173         { "irq_injections", VCPU_STAT(irq_injections) },
 174         { "nmi_injections", VCPU_STAT(nmi_injections) },
 175         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 176         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 177         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 178         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 179         { "mmu_flooded", VM_STAT(mmu_flooded) },
 180         { "mmu_recycled", VM_STAT(mmu_recycled) },
 181         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 182         { "mmu_unsync", VM_STAT(mmu_unsync) },
 183         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 184         { "largepages", VM_STAT(lpages) },
 185         { NULL }
 186 };
 187
 188 u64 __read_mostly host_xcr0;
 189
 190 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 191
 192 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 193 {
 194         int i;
 195         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 196                 vcpu->arch.apf.gfns[i] = ~0;
 197 }
 198
 199 static void kvm_on_user_return(struct user_return_notifier *urn)
 200 {
 201         unsigned slot;
 202         struct kvm_shared_msrs *locals
 203                 = container_of(urn, struct kvm_shared_msrs, urn);
 204         struct kvm_shared_msr_values *values;
 205
 206         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 207                 values = &locals->values[slot];
 208                 if (values->host != values->curr) {
 209                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 210                         values->curr = values->host;
 211                 }
 212         }
 213         locals->registered = false;
 214         user_return_notifier_unregister(urn);
 215 }
 216
 217 static void shared_msr_update(unsigned slot, u32 msr)
 218 {
 219         u64 value;
 220         unsigned int cpu = smp_processor_id();
 221         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 222
 223         /* only read, and nobody should modify it at this time,
 224          * so don't need lock */
 225         if (slot >= shared_msrs_global.nr) {
 226                 printk(KERN_ERR "kvm: invalid MSR slot!");
 227                 return;
 228         }
 229         rdmsrl_safe(msr, &value);
 230         smsr->values[slot].host = value;
 231         smsr->values[slot].curr = value;
 232 }
 233
 234 void kvm_define_shared_msr(unsigned slot, u32 msr)
 235 {
 236         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 237         shared_msrs_global.msrs[slot] = msr;
 238         if (slot >= shared_msrs_global.nr)
 239                 shared_msrs_global.nr = slot + 1;
 240 }
 241 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 242
 243 static void kvm_shared_msr_cpu_online(void)
 244 {
 245         unsigned i;
 246
 247         for (i = 0; i < shared_msrs_global.nr; ++i)
 248                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 249 }
 250
 251 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 252 {
 253         unsigned int cpu = smp_processor_id();
 254         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 255         int err;
 256
 257         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 258                 return 0;
 259         smsr->values[slot].curr = value;
 260         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 261         if (err)
 262                 return 1;
 263
 264         if (!smsr->registered) {
 265                 smsr->urn.on_user_return = kvm_on_user_return;
 266                 user_return_notifier_register(&smsr->urn);
 267                 smsr->registered = true;
 268         }
 269         return 0;
 270 }
 271 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 272
 273 static void drop_user_return_notifiers(void)
 274 {
 275         unsigned int cpu = smp_processor_id();
 276         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 277
 278         if (smsr->registered)
 279                 kvm_on_user_return(&smsr->urn);
 280 }
 281
 282 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 283 {
 284         return vcpu->arch.apic_base;
 285 }
 286 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 287
 288 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 289 {
 290         u64 old_state = vcpu->arch.apic_base &
 291                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 292         u64 new_state = msr_info->data &
 293                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 294         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 295                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 296
 297         if (!msr_info->host_initiated &&
 298             ((msr_info->data & reserved_bits) != 0 ||
 299              new_state == X2APIC_ENABLE ||
 300              (new_state == MSR_IA32_APICBASE_ENABLE &&
 301               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 302              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 303               old_state == 0)))
 304                 return 1;
 305
 306         kvm_lapic_set_base(vcpu, msr_info->data);
 307         return 0;
 308 }
 309 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 310
 311 asmlinkage __visible void kvm_spurious_fault(void)
 312 {
 313         /* Fault while not rebooting.  We want the trace. */
 314         BUG();
 315 }
 316 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 317
 318 #define EXCPT_BENIGN            0
 319 #define EXCPT_CONTRIBUTORY      1
 320 #define EXCPT_PF                2
 321
 322 static int exception_class(int vector)
 323 {
 324         switch (vector) {
 325         case PF_VECTOR:
 326                 return EXCPT_PF;
 327         case DE_VECTOR:
 328         case TS_VECTOR:
 329         case NP_VECTOR:
 330         case SS_VECTOR:
 331         case GP_VECTOR:
 332                 return EXCPT_CONTRIBUTORY;
 333         default:
 334                 break;
 335         }
 336         return EXCPT_BENIGN;
 337 }
 338
 339 #define EXCPT_FAULT             0
 340 #define EXCPT_TRAP              1
 341 #define EXCPT_ABORT             2
 342 #define EXCPT_INTERRUPT         3
 343
 344 static int exception_type(int vector)
 345 {
 346         unsigned int mask;
 347
 348         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 349                 return EXCPT_INTERRUPT;
 350
 351         mask = 1 << vector;
 352
 353         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 354         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 355                 return EXCPT_TRAP;
 356
 357         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 358                 return EXCPT_ABORT;
 359
 360         /* Reserved exceptions will result in fault */
 361         return EXCPT_FAULT;
 362 }
 363
 364 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 365                 unsigned nr, bool has_error, u32 error_code,
 366                 bool reinject)
 367 {
 368         u32 prev_nr;
 369         int class1, class2;
 370
 371         kvm_make_request(KVM_REQ_EVENT, vcpu);
 372
 373         if (!vcpu->arch.exception.pending) {
 374         queue:
 375                 if (has_error && !is_protmode(vcpu))
 376                         has_error = false;
 377                 vcpu->arch.exception.pending = true;
 378                 vcpu->arch.exception.has_error_code = has_error;
 379                 vcpu->arch.exception.nr = nr;
 380                 vcpu->arch.exception.error_code = error_code;
 381                 vcpu->arch.exception.reinject = reinject;
 382                 return;
 383         }
 384
 385         /* to check exception */
 386         prev_nr = vcpu->arch.exception.nr;
 387         if (prev_nr == DF_VECTOR) {
 388                 /* triple fault -> shutdown */
 389                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 390                 return;
 391         }
 392         class1 = exception_class(prev_nr);
 393         class2 = exception_class(nr);
 394         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 395                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 396                 /* generate double fault per SDM Table 5-5 */
 397                 vcpu->arch.exception.pending = true;
 398                 vcpu->arch.exception.has_error_code = true;
 399                 vcpu->arch.exception.nr = DF_VECTOR;
 400                 vcpu->arch.exception.error_code = 0;
 401         } else
 402                 /* replace previous exception with a new one in a hope
 403                    that instruction re-execution will regenerate lost
 404                    exception */
 405                 goto queue;
 406 }
 407
 408 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 409 {
 410         kvm_multiple_exception(vcpu, nr, false, 0, false);
 411 }
 412 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 413
 414 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 415 {
 416         kvm_multiple_exception(vcpu, nr, false, 0, true);
 417 }
 418 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 419
 420 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 421 {
 422         if (err)
 423                 kvm_inject_gp(vcpu, 0);
 424         else
 425                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 426 }
 427 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 428
 429 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 430 {
 431         ++vcpu->stat.pf_guest;
 432         vcpu->arch.cr2 = fault->address;
 433         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 434 }
 435 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 436
 437 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 438 {
 439         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 440                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 441         else
 442                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 443
 444         return fault->nested_page_fault;
 445 }
 446
 447 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 448 {
 449         atomic_inc(&vcpu->arch.nmi_queued);
 450         kvm_make_request(KVM_REQ_NMI, vcpu);
 451 }
 452 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 453
 454 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 455 {
 456         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 457 }
 458 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 459
 460 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 461 {
 462         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 463 }
 464 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 465
 466 /*
 467  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 468  * a #GP and return false.
 469  */
 470 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 471 {
 472         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 473                 return true;
 474         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 475         return false;
 476 }
 477 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 478
 479 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 480 {
 481         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 482                 return true;
 483
 484         kvm_queue_exception(vcpu, UD_VECTOR);
 485         return false;
 486 }
 487 EXPORT_SYMBOL_GPL(kvm_require_dr);
 488
 489 /*
 490  * This function will be used to read from the physical memory of the currently
 491  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 492  * can read from guest physical or from the guest's guest physical memory.
 493  */
 494 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 495                             gfn_t ngfn, void *data, int offset, int len,
 496                             u32 access)
 497 {
 498         struct x86_exception exception;
 499         gfn_t real_gfn;
 500         gpa_t ngpa;
 501
 502         ngpa     = gfn_to_gpa(ngfn);
 503         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 504         if (real_gfn == UNMAPPED_GVA)
 505                 return -EFAULT;
 506
 507         real_gfn = gpa_to_gfn(real_gfn);
 508
 509         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 510 }
 511 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 512
 513 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 514                                void *data, int offset, int len, u32 access)
 515 {
 516         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 517                                        data, offset, len, access);
 518 }
 519
 520 /*
 521  * Load the pae pdptrs.  Return true is they are all valid.
 522  */
 523 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 524 {
 525         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 526         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 527         int i;
 528         int ret;
 529         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 530
 531         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 532                                       offset * sizeof(u64), sizeof(pdpte),
 533                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 534         if (ret < 0) {
 535                 ret = 0;
 536                 goto out;
 537         }
 538         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 539                 if (is_present_gpte(pdpte[i]) &&
 540                     (pdpte[i] &
 541                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 542                         ret = 0;
 543                         goto out;
 544                 }
 545         }
 546         ret = 1;
 547
 548         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 549         __set_bit(VCPU_EXREG_PDPTR,
 550                   (unsigned long *)&vcpu->arch.regs_avail);
 551         __set_bit(VCPU_EXREG_PDPTR,
 552                   (unsigned long *)&vcpu->arch.regs_dirty);
 553 out:
 554
 555         return ret;
 556 }
 557 EXPORT_SYMBOL_GPL(load_pdptrs);
 558
 559 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 560 {
 561         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 562         bool changed = true;
 563         int offset;
 564         gfn_t gfn;
 565         int r;
 566
 567         if (is_long_mode(vcpu) || !is_pae(vcpu))
 568                 return false;
 569
 570         if (!test_bit(VCPU_EXREG_PDPTR,
 571                       (unsigned long *)&vcpu->arch.regs_avail))
 572                 return true;
 573
 574         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 575         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 576         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 577                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 578         if (r < 0)
 579                 goto out;
 580         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 581 out:
 582
 583         return changed;
 584 }
 585
 586 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 587 {
 588         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 589         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 590
 591         cr0 |= X86_CR0_ET;
 592
 593 #ifdef CONFIG_X86_64
 594         if (cr0 & 0xffffffff00000000UL)
 595                 return 1;
 596 #endif
 597
 598         cr0 &= ~CR0_RESERVED_BITS;
 599
 600         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 601                 return 1;
 602
 603         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 604                 return 1;
 605
 606         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 607 #ifdef CONFIG_X86_64
 608                 if ((vcpu->arch.efer & EFER_LME)) {
 609                         int cs_db, cs_l;
 610
 611                         if (!is_pae(vcpu))
 612                                 return 1;
 613                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 614                         if (cs_l)
 615                                 return 1;
 616                 } else
 617 #endif
 618                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 619                                                  kvm_read_cr3(vcpu)))
 620                         return 1;
 621         }
 622
 623         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 624                 return 1;
 625
 626         kvm_x86_ops->set_cr0(vcpu, cr0);
 627
 628         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 629                 kvm_clear_async_pf_completion_queue(vcpu);
 630                 kvm_async_pf_hash_reset(vcpu);
 631         }
 632
 633         if ((cr0 ^ old_cr0) & update_bits)
 634                 kvm_mmu_reset_context(vcpu);
 635
 636         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 637             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 638             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 639                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 640
 641         return 0;
 642 }
 643 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 644
 645 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 646 {
 647         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 648 }
 649 EXPORT_SYMBOL_GPL(kvm_lmsw);
 650
 651 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 652 {
 653         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 654                         !vcpu->guest_xcr0_loaded) {
 655                 /* kvm_set_xcr() also depends on this */
 656                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 657                 vcpu->guest_xcr0_loaded = 1;
 658         }
 659 }
 660
 661 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 662 {
 663         if (vcpu->guest_xcr0_loaded) {
 664                 if (vcpu->arch.xcr0 != host_xcr0)
 665                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 666                 vcpu->guest_xcr0_loaded = 0;
 667         }
 668 }
 669
 670 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 671 {
 672         u64 xcr0 = xcr;
 673         u64 old_xcr0 = vcpu->arch.xcr0;
 674         u64 valid_bits;
 675
 676         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 677         if (index != XCR_XFEATURE_ENABLED_MASK)
 678                 return 1;
 679         if (!(xcr0 & XFEATURE_MASK_FP))
 680                 return 1;
 681         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 682                 return 1;
 683
 684         /*
 685          * Do not allow the guest to set bits that we do not support
 686          * saving.  However, xcr0 bit 0 is always set, even if the
 687          * emulated CPU does not support XSAVE (see fx_init).
 688          */
 689         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 690         if (xcr0 & ~valid_bits)
 691                 return 1;
 692
 693         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 694             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 695                 return 1;
 696
 697         if (xcr0 & XFEATURE_MASK_AVX512) {
 698                 if (!(xcr0 & XFEATURE_MASK_YMM))
 699                         return 1;
 700                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 701                         return 1;
 702         }
 703         vcpu->arch.xcr0 = xcr0;
 704
 705         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 706                 kvm_update_cpuid(vcpu);
 707         return 0;
 708 }
 709
 710 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 711 {
 712         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 713             __kvm_set_xcr(vcpu, index, xcr)) {
 714                 kvm_inject_gp(vcpu, 0);
 715                 return 1;
 716         }
 717         return 0;
 718 }
 719 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 720
 721 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 722 {
 723         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 724         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 725                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 726
 727         if (cr4 & CR4_RESERVED_BITS)
 728                 return 1;
 729
 730         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 731                 return 1;
 732
 733         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 734                 return 1;
 735
 736         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 737                 return 1;
 738
 739         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 740                 return 1;
 741
 742         if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
 743                 return 1;
 744
 745         if (is_long_mode(vcpu)) {
 746                 if (!(cr4 & X86_CR4_PAE))
 747                         return 1;
 748         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 749                    && ((cr4 ^ old_cr4) & pdptr_bits)
 750                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 751                                    kvm_read_cr3(vcpu)))
 752                 return 1;
 753
 754         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 755                 if (!guest_cpuid_has_pcid(vcpu))
 756                         return 1;
 757
 758                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 759                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 760                         return 1;
 761         }
 762
 763         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 764                 return 1;
 765
 766         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 767             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 768                 kvm_mmu_reset_context(vcpu);
 769
 770         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 771                 kvm_update_cpuid(vcpu);
 772
 773         return 0;
 774 }
 775 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 776
 777 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 778 {
 779 #ifdef CONFIG_X86_64
 780         cr3 &= ~CR3_PCID_INVD;
 781 #endif
 782
 783         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 784                 kvm_mmu_sync_roots(vcpu);
 785                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 786                 return 0;
 787         }
 788
 789         if (is_long_mode(vcpu)) {
 790                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 791                         return 1;
 792         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 793                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 794                 return 1;
 795
 796         vcpu->arch.cr3 = cr3;
 797         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 798         kvm_mmu_new_cr3(vcpu);
 799         return 0;
 800 }
 801 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 802
 803 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 804 {
 805         if (cr8 & CR8_RESERVED_BITS)
 806                 return 1;
 807         if (lapic_in_kernel(vcpu))
 808                 kvm_lapic_set_tpr(vcpu, cr8);
 809         else
 810                 vcpu->arch.cr8 = cr8;
 811         return 0;
 812 }
 813 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 814
 815 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 816 {
 817         if (lapic_in_kernel(vcpu))
 818                 return kvm_lapic_get_cr8(vcpu);
 819         else
 820                 return vcpu->arch.cr8;
 821 }
 822 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 823
 824 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 825 {
 826         int i;
 827
 828         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 829                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 830                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 831                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 832         }
 833 }
 834
 835 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 836 {
 837         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 838                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 839 }
 840
 841 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 842 {
 843         unsigned long dr7;
 844
 845         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 846                 dr7 = vcpu->arch.guest_debug_dr7;
 847         else
 848                 dr7 = vcpu->arch.dr7;
 849         kvm_x86_ops->set_dr7(vcpu, dr7);
 850         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 851         if (dr7 & DR7_BP_EN_MASK)
 852                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 853 }
 854
 855 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 856 {
 857         u64 fixed = DR6_FIXED_1;
 858
 859         if (!guest_cpuid_has_rtm(vcpu))
 860                 fixed |= DR6_RTM;
 861         return fixed;
 862 }
 863
 864 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 865 {
 866         switch (dr) {
 867         case 0 ... 3:
 868                 vcpu->arch.db[dr] = val;
 869                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 870                         vcpu->arch.eff_db[dr] = val;
 871                 break;
 872         case 4:
 873                 /* fall through */
 874         case 6:
 875                 if (val & 0xffffffff00000000ULL)
 876                         return -1; /* #GP */
 877                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 878                 kvm_update_dr6(vcpu);
 879                 break;
 880         case 5:
 881                 /* fall through */
 882         default: /* 7 */
 883                 if (val & 0xffffffff00000000ULL)
 884                         return -1; /* #GP */
 885                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 886                 kvm_update_dr7(vcpu);
 887                 break;
 888         }
 889
 890         return 0;
 891 }
 892
 893 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 894 {
 895         if (__kvm_set_dr(vcpu, dr, val)) {
 896                 kvm_inject_gp(vcpu, 0);
 897                 return 1;
 898         }
 899         return 0;
 900 }
 901 EXPORT_SYMBOL_GPL(kvm_set_dr);
 902
 903 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 904 {
 905         switch (dr) {
 906         case 0 ... 3:
 907                 *val = vcpu->arch.db[dr];
 908                 break;
 909         case 4:
 910                 /* fall through */
 911         case 6:
 912                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 913                         *val = vcpu->arch.dr6;
 914                 else
 915                         *val = kvm_x86_ops->get_dr6(vcpu);
 916                 break;
 917         case 5:
 918                 /* fall through */
 919         default: /* 7 */
 920                 *val = vcpu->arch.dr7;
 921                 break;
 922         }
 923         return 0;
 924 }
 925 EXPORT_SYMBOL_GPL(kvm_get_dr);
 926
 927 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 928 {
 929         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 930         u64 data;
 931         int err;
 932
 933         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 934         if (err)
 935                 return err;
 936         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 937         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 938         return err;
 939 }
 940 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 941
 942 /*
 943  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 944  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 945  *
 946  * This list is modified at module load time to reflect the
 947  * capabilities of the host cpu. This capabilities test skips MSRs that are
 948  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 949  * may depend on host virtualization features rather than host cpu features.
 950  */
 951
 952 static u32 msrs_to_save[] = {
 953         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 954         MSR_STAR,
 955 #ifdef CONFIG_X86_64
 956         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 957 #endif
 958         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 959         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 960 };
 961
 962 static unsigned num_msrs_to_save;
 963
 964 static u32 emulated_msrs[] = {
 965         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 966         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 967         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 968         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 969         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 970         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 971         HV_X64_MSR_RESET,
 972         HV_X64_MSR_VP_INDEX,
 973         HV_X64_MSR_VP_RUNTIME,
 974         HV_X64_MSR_SCONTROL,
 975         HV_X64_MSR_STIMER0_CONFIG,
 976         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 977         MSR_KVM_PV_EOI_EN,
 978
 979         MSR_IA32_TSC_ADJUST,
 980         MSR_IA32_TSCDEADLINE,
 981         MSR_IA32_MISC_ENABLE,
 982         MSR_IA32_MCG_STATUS,
 983         MSR_IA32_MCG_CTL,
 984         MSR_IA32_SMBASE,
 985 };
 986
 987 static unsigned num_emulated_msrs;
 988
 989 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 990 {
 991         if (efer & efer_reserved_bits)
 992                 return false;
 993
 994         if (efer & EFER_FFXSR) {
 995                 struct kvm_cpuid_entry2 *feat;
 996
 997                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 998                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 999                         return false;
1000         }
1001
1002         if (efer & EFER_SVME) {
1003                 struct kvm_cpuid_entry2 *feat;
1004
1005                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1006                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1007                         return false;
1008         }
1009
1010         return true;
1011 }
1012 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1013
1014 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1015 {
1016         u64 old_efer = vcpu->arch.efer;
1017
1018         if (!kvm_valid_efer(vcpu, efer))
1019                 return 1;
1020
1021         if (is_paging(vcpu)
1022             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1023                 return 1;
1024
1025         efer &= ~EFER_LMA;
1026         efer |= vcpu->arch.efer & EFER_LMA;
1027
1028         kvm_x86_ops->set_efer(vcpu, efer);
1029
1030         /* Update reserved bits */
1031         if ((efer ^ old_efer) & EFER_NX)
1032                 kvm_mmu_reset_context(vcpu);
1033
1034         return 0;
1035 }
1036
1037 void kvm_enable_efer_bits(u64 mask)
1038 {
1039        efer_reserved_bits &= ~mask;
1040 }
1041 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1042
1043 /*
1044  * Writes msr value into into the appropriate "register".
1045  * Returns 0 on success, non-0 otherwise.
1046  * Assumes vcpu_load() was already called.
1047  */
1048 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1049 {
1050         switch (msr->index) {
1051         case MSR_FS_BASE:
1052         case MSR_GS_BASE:
1053         case MSR_KERNEL_GS_BASE:
1054         case MSR_CSTAR:
1055         case MSR_LSTAR:
1056                 if (is_noncanonical_address(msr->data))
1057                         return 1;
1058                 break;
1059         case MSR_IA32_SYSENTER_EIP:
1060         case MSR_IA32_SYSENTER_ESP:
1061                 /*
1062                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1063                  * non-canonical address is written on Intel but not on
1064                  * AMD (which ignores the top 32-bits, because it does
1065                  * not implement 64-bit SYSENTER).
1066                  *
1067                  * 64-bit code should hence be able to write a non-canonical
1068                  * value on AMD.  Making the address canonical ensures that
1069                  * vmentry does not fail on Intel after writing a non-canonical
1070                  * value, and that something deterministic happens if the guest
1071                  * invokes 64-bit SYSENTER.
1072                  */
1073                 msr->data = get_canonical(msr->data);
1074         }
1075         return kvm_x86_ops->set_msr(vcpu, msr);
1076 }
1077 EXPORT_SYMBOL_GPL(kvm_set_msr);
1078
1079 /*
1080  * Adapt set_msr() to msr_io()'s calling convention
1081  */
1082 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1083 {
1084         struct msr_data msr;
1085         int r;
1086
1087         msr.index = index;
1088         msr.host_initiated = true;
1089         r = kvm_get_msr(vcpu, &msr);
1090         if (r)
1091                 return r;
1092
1093         *data = msr.data;
1094         return 0;
1095 }
1096
1097 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1098 {
1099         struct msr_data msr;
1100
1101         msr.data = *data;
1102         msr.index = index;
1103         msr.host_initiated = true;
1104         return kvm_set_msr(vcpu, &msr);
1105 }
1106
1107 #ifdef CONFIG_X86_64
1108 struct pvclock_gtod_data {
1109         seqcount_t      seq;
1110
1111         struct { /* extract of a clocksource struct */
1112                 int vclock_mode;
1113                 cycle_t cycle_last;
1114                 cycle_t mask;
1115                 u32     mult;
1116                 u32     shift;
1117         } clock;
1118
1119         u64             boot_ns;
1120         u64             nsec_base;
1121 };
1122
1123 static struct pvclock_gtod_data pvclock_gtod_data;
1124
1125 static void update_pvclock_gtod(struct timekeeper *tk)
1126 {
1127         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1128         u64 boot_ns;
1129
1130         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1131
1132         write_seqcount_begin(&vdata->seq);
1133
1134         /* copy pvclock gtod data */
1135         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1136         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1137         vdata->clock.mask               = tk->tkr_mono.mask;
1138         vdata->clock.mult               = tk->tkr_mono.mult;
1139         vdata->clock.shift              = tk->tkr_mono.shift;
1140
1141         vdata->boot_ns                  = boot_ns;
1142         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1143
1144         write_seqcount_end(&vdata->seq);
1145 }
1146 #endif
1147
1148 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1149 {
1150         /*
1151          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1152          * vcpu_enter_guest.  This function is only called from
1153          * the physical CPU that is running vcpu.
1154          */
1155         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1156 }
1157
1158 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1159 {
1160         int version;
1161         int r;
1162         struct pvclock_wall_clock wc;
1163         struct timespec boot;
1164
1165         if (!wall_clock)
1166                 return;
1167
1168         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1169         if (r)
1170                 return;
1171
1172         if (version & 1)
1173                 ++version;  /* first time write, random junk */
1174
1175         ++version;
1176
1177         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1178                 return;
1179
1180         /*
1181          * The guest calculates current wall clock time by adding
1182          * system time (updated by kvm_guest_time_update below) to the
1183          * wall clock specified here.  guest system time equals host
1184          * system time for us, thus we must fill in host boot time here.
1185          */
1186         getboottime(&boot);
1187
1188         if (kvm->arch.kvmclock_offset) {
1189                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1190                 boot = timespec_sub(boot, ts);
1191         }
1192         wc.sec = boot.tv_sec;
1193         wc.nsec = boot.tv_nsec;
1194         wc.version = version;
1195
1196         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1197
1198         version++;
1199         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1200 }
1201
1202 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1203 {
1204         do_shl32_div32(dividend, divisor);
1205         return dividend;
1206 }
1207
1208 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1209                                s8 *pshift, u32 *pmultiplier)
1210 {
1211         uint64_t scaled64;
1212         int32_t  shift = 0;
1213         uint64_t tps64;
1214         uint32_t tps32;
1215
1216         tps64 = base_hz;
1217         scaled64 = scaled_hz;
1218         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1219                 tps64 >>= 1;
1220                 shift--;
1221         }
1222
1223         tps32 = (uint32_t)tps64;
1224         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1225                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1226                         scaled64 >>= 1;
1227                 else
1228                         tps32 <<= 1;
1229                 shift++;
1230         }
1231
1232         *pshift = shift;
1233         *pmultiplier = div_frac(scaled64, tps32);
1234
1235         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1236                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1237 }
1238
1239 #ifdef CONFIG_X86_64
1240 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1241 #endif
1242
1243 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1244 static unsigned long max_tsc_khz;
1245
1246 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1247 {
1248         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1249                                    vcpu->arch.virtual_tsc_shift);
1250 }
1251
1252 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1253 {
1254         u64 v = (u64)khz * (1000000 + ppm);
1255         do_div(v, 1000000);
1256         return v;
1257 }
1258
1259 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1260 {
1261         u64 ratio;
1262
1263         /* Guest TSC same frequency as host TSC? */
1264         if (!scale) {
1265                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1266                 return 0;
1267         }
1268
1269         /* TSC scaling supported? */
1270         if (!kvm_has_tsc_control) {
1271                 if (user_tsc_khz > tsc_khz) {
1272                         vcpu->arch.tsc_catchup = 1;
1273                         vcpu->arch.tsc_always_catchup = 1;
1274                         return 0;
1275                 } else {
1276                         WARN(1, "user requested TSC rate below hardware speed\n");
1277                         return -1;
1278                 }
1279         }
1280
1281         /* TSC scaling required  - calculate ratio */
1282         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1283                                 user_tsc_khz, tsc_khz);
1284
1285         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1286                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1287                           user_tsc_khz);
1288                 return -1;
1289         }
1290
1291         vcpu->arch.tsc_scaling_ratio = ratio;
1292         return 0;
1293 }
1294
1295 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1296 {
1297         u32 thresh_lo, thresh_hi;
1298         int use_scaling = 0;
1299
1300         /* tsc_khz can be zero if TSC calibration fails */
1301         if (user_tsc_khz == 0) {
1302                 /* set tsc_scaling_ratio to a safe value */
1303                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1304                 return -1;
1305         }
1306
1307         /* Compute a scale to convert nanoseconds in TSC cycles */
1308         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1309                            &vcpu->arch.virtual_tsc_shift,
1310                            &vcpu->arch.virtual_tsc_mult);
1311         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1312
1313         /*
1314          * Compute the variation in TSC rate which is acceptable
1315          * within the range of tolerance and decide if the
1316          * rate being applied is within that bounds of the hardware
1317          * rate.  If so, no scaling or compensation need be done.
1318          */
1319         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1320         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1321         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1322                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1323                 use_scaling = 1;
1324         }
1325         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1326 }
1327
1328 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1329 {
1330         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1331                                       vcpu->arch.virtual_tsc_mult,
1332                                       vcpu->arch.virtual_tsc_shift);
1333         tsc += vcpu->arch.this_tsc_write;
1334         return tsc;
1335 }
1336
1337 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1338 {
1339 #ifdef CONFIG_X86_64
1340         bool vcpus_matched;
1341         struct kvm_arch *ka = &vcpu->kvm->arch;
1342         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1343
1344         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1345                          atomic_read(&vcpu->kvm->online_vcpus));
1346
1347         /*
1348          * Once the masterclock is enabled, always perform request in
1349          * order to update it.
1350          *
1351          * In order to enable masterclock, the host clocksource must be TSC
1352          * and the vcpus need to have matched TSCs.  When that happens,
1353          * perform request to enable masterclock.
1354          */
1355         if (ka->use_master_clock ||
1356             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1357                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1358
1359         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1360                             atomic_read(&vcpu->kvm->online_vcpus),
1361                             ka->use_master_clock, gtod->clock.vclock_mode);
1362 #endif
1363 }
1364
1365 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1366 {
1367         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1368         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1369 }
1370
1371 /*
1372  * Multiply tsc by a fixed point number represented by ratio.
1373  *
1374  * The most significant 64-N bits (mult) of ratio represent the
1375  * integral part of the fixed point number; the remaining N bits
1376  * (frac) represent the fractional part, ie. ratio represents a fixed
1377  * point number (mult + frac * 2^(-N)).
1378  *
1379  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1380  */
1381 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1382 {
1383         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1384 }
1385
1386 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1387 {
1388         u64 _tsc = tsc;
1389         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1390
1391         if (ratio != kvm_default_tsc_scaling_ratio)
1392                 _tsc = __scale_tsc(ratio, tsc);
1393
1394         return _tsc;
1395 }
1396 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1397
1398 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1399 {
1400         u64 tsc;
1401
1402         tsc = kvm_scale_tsc(vcpu, rdtsc());
1403
1404         return target_tsc - tsc;
1405 }
1406
1407 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1408 {
1409         return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1410 }
1411 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1412
1413 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1414 {
1415         struct kvm *kvm = vcpu->kvm;
1416         u64 offset, ns, elapsed;
1417         unsigned long flags;
1418         s64 usdiff;
1419         bool matched;
1420         bool already_matched;
1421         u64 data = msr->data;
1422
1423         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1424         offset = kvm_compute_tsc_offset(vcpu, data);
1425         ns = get_kernel_ns();
1426         elapsed = ns - kvm->arch.last_tsc_nsec;
1427
1428         if (vcpu->arch.virtual_tsc_khz) {
1429                 int faulted = 0;
1430
1431                 /* n.b - signed multiplication and division required */
1432                 usdiff = data - kvm->arch.last_tsc_write;
1433 #ifdef CONFIG_X86_64
1434                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1435 #else
1436                 /* do_div() only does unsigned */
1437                 asm("1: idivl %[divisor]\n"
1438                     "2: xor %%edx, %%edx\n"
1439                     "   movl $0, %[faulted]\n"
1440                     "3:\n"
1441                     ".section .fixup,\"ax\"\n"
1442                     "4: movl $1, %[faulted]\n"
1443                     "   jmp  3b\n"
1444                     ".previous\n"
1445
1446                 _ASM_EXTABLE(1b, 4b)
1447
1448                 : "=A"(usdiff), [faulted] "=r" (faulted)
1449                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1450
1451 #endif
1452                 do_div(elapsed, 1000);
1453                 usdiff -= elapsed;
1454                 if (usdiff < 0)
1455                         usdiff = -usdiff;
1456
1457                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1458                 if (faulted)
1459                         usdiff = USEC_PER_SEC;
1460         } else
1461                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1462
1463         /*
1464          * Special case: TSC write with a small delta (1 second) of virtual
1465          * cycle time against real time is interpreted as an attempt to
1466          * synchronize the CPU.
1467          *
1468          * For a reliable TSC, we can match TSC offsets, and for an unstable
1469          * TSC, we add elapsed time in this computation.  We could let the
1470          * compensation code attempt to catch up if we fall behind, but
1471          * it's better to try to match offsets from the beginning.
1472          */
1473         if (usdiff < USEC_PER_SEC &&
1474             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1475                 if (!check_tsc_unstable()) {
1476                         offset = kvm->arch.cur_tsc_offset;
1477                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1478                 } else {
1479                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1480                         data += delta;
1481                         offset = kvm_compute_tsc_offset(vcpu, data);
1482                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1483                 }
1484                 matched = true;
1485                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1486         } else {
1487                 /*
1488                  * We split periods of matched TSC writes into generations.
1489                  * For each generation, we track the original measured
1490                  * nanosecond time, offset, and write, so if TSCs are in
1491                  * sync, we can match exact offset, and if not, we can match
1492                  * exact software computation in compute_guest_tsc()
1493                  *
1494                  * These values are tracked in kvm->arch.cur_xxx variables.
1495                  */
1496                 kvm->arch.cur_tsc_generation++;
1497                 kvm->arch.cur_tsc_nsec = ns;
1498                 kvm->arch.cur_tsc_write = data;
1499                 kvm->arch.cur_tsc_offset = offset;
1500                 matched = false;
1501                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1502                          kvm->arch.cur_tsc_generation, data);
1503         }
1504
1505         /*
1506          * We also track th most recent recorded KHZ, write and time to
1507          * allow the matching interval to be extended at each write.
1508          */
1509         kvm->arch.last_tsc_nsec = ns;
1510         kvm->arch.last_tsc_write = data;
1511         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1512
1513         vcpu->arch.last_guest_tsc = data;
1514
1515         /* Keep track of which generation this VCPU has synchronized to */
1516         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1517         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1518         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1519
1520         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1521                 update_ia32_tsc_adjust_msr(vcpu, offset);
1522         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1523         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1524
1525         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1526         if (!matched) {
1527                 kvm->arch.nr_vcpus_matched_tsc = 0;
1528         } else if (!already_matched) {
1529                 kvm->arch.nr_vcpus_matched_tsc++;
1530         }
1531
1532         kvm_track_tsc_matching(vcpu);
1533         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1534 }
1535
1536 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1537
1538 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1539                                            s64 adjustment)
1540 {
1541         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1542 }
1543
1544 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1545 {
1546         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1547                 WARN_ON(adjustment < 0);
1548         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1549         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1550 }
1551
1552 #ifdef CONFIG_X86_64
1553
1554 static cycle_t read_tsc(void)
1555 {
1556         cycle_t ret = (cycle_t)rdtsc_ordered();
1557         u64 last = pvclock_gtod_data.clock.cycle_last;
1558
1559         if (likely(ret >= last))
1560                 return ret;
1561
1562         /*
1563          * GCC likes to generate cmov here, but this branch is extremely
1564          * predictable (it's just a function of time and the likely is
1565          * very likely) and there's a data dependence, so force GCC
1566          * to generate a branch instead.  I don't barrier() because
1567          * we don't actually need a barrier, and if this function
1568          * ever gets inlined it will generate worse code.
1569          */
1570         asm volatile ("");
1571         return last;
1572 }
1573
1574 static inline u64 vgettsc(cycle_t *cycle_now)
1575 {
1576         long v;
1577         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1578
1579         *cycle_now = read_tsc();
1580
1581         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1582         return v * gtod->clock.mult;
1583 }
1584
1585 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1586 {
1587         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1588         unsigned long seq;
1589         int mode;
1590         u64 ns;
1591
1592         do {
1593                 seq = read_seqcount_begin(&gtod->seq);
1594                 mode = gtod->clock.vclock_mode;
1595                 ns = gtod->nsec_base;
1596                 ns += vgettsc(cycle_now);
1597                 ns >>= gtod->clock.shift;
1598                 ns += gtod->boot_ns;
1599         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1600         *t = ns;
1601
1602         return mode;
1603 }
1604
1605 /* returns true if host is using tsc clocksource */
1606 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1607 {
1608         /* checked again under seqlock below */
1609         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1610                 return false;
1611
1612         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1613 }
1614 #endif
1615
1616 /*
1617  *
1618  * Assuming a stable TSC across physical CPUS, and a stable TSC
1619  * across virtual CPUs, the following condition is possible.
1620  * Each numbered line represents an event visible to both
1621  * CPUs at the next numbered event.
1622  *
1623  * "timespecX" represents host monotonic time. "tscX" represents
1624  * RDTSC value.
1625  *
1626  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1627  *
1628  * 1.  read timespec0,tsc0
1629  * 2.                                   | timespec1 = timespec0 + N
1630  *                                      | tsc1 = tsc0 + M
1631  * 3. transition to guest               | transition to guest
1632  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1633  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1634  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1635  *
1636  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1637  *
1638  *      - ret0 < ret1
1639  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1640  *              ...
1641  *      - 0 < N - M => M < N
1642  *
1643  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1644  * always the case (the difference between two distinct xtime instances
1645  * might be smaller then the difference between corresponding TSC reads,
1646  * when updating guest vcpus pvclock areas).
1647  *
1648  * To avoid that problem, do not allow visibility of distinct
1649  * system_timestamp/tsc_timestamp values simultaneously: use a master
1650  * copy of host monotonic time values. Update that master copy
1651  * in lockstep.
1652  *
1653  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1654  *
1655  */
1656
1657 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1658 {
1659 #ifdef CONFIG_X86_64
1660         struct kvm_arch *ka = &kvm->arch;
1661         int vclock_mode;
1662         bool host_tsc_clocksource, vcpus_matched;
1663
1664         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1665                         atomic_read(&kvm->online_vcpus));
1666
1667         /*
1668          * If the host uses TSC clock, then passthrough TSC as stable
1669          * to the guest.
1670          */
1671         host_tsc_clocksource = kvm_get_time_and_clockread(
1672                                         &ka->master_kernel_ns,
1673                                         &ka->master_cycle_now);
1674
1675         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1676                                 && !backwards_tsc_observed
1677                                 && !ka->boot_vcpu_runs_old_kvmclock;
1678
1679         if (ka->use_master_clock)
1680                 atomic_set(&kvm_guest_has_master_clock, 1);
1681
1682         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1683         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1684                                         vcpus_matched);
1685 #endif
1686 }
1687
1688 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1689 {
1690         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1691 }
1692
1693 static void kvm_gen_update_masterclock(struct kvm *kvm)
1694 {
1695 #ifdef CONFIG_X86_64
1696         int i;
1697         struct kvm_vcpu *vcpu;
1698         struct kvm_arch *ka = &kvm->arch;
1699
1700         spin_lock(&ka->pvclock_gtod_sync_lock);
1701         kvm_make_mclock_inprogress_request(kvm);
1702         /* no guest entries from this point */
1703         pvclock_update_vm_gtod_copy(kvm);
1704
1705         kvm_for_each_vcpu(i, vcpu, kvm)
1706                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1707
1708         /* guest entries allowed */
1709         kvm_for_each_vcpu(i, vcpu, kvm)
1710                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1711
1712         spin_unlock(&ka->pvclock_gtod_sync_lock);
1713 #endif
1714 }
1715
1716 static int kvm_guest_time_update(struct kvm_vcpu *v)
1717 {
1718         unsigned long flags, tgt_tsc_khz;
1719         struct kvm_vcpu_arch *vcpu = &v->arch;
1720         struct kvm_arch *ka = &v->kvm->arch;
1721         s64 kernel_ns;
1722         u64 tsc_timestamp, host_tsc;
1723         struct pvclock_vcpu_time_info guest_hv_clock;
1724         u8 pvclock_flags;
1725         bool use_master_clock;
1726
1727         kernel_ns = 0;
1728         host_tsc = 0;
1729
1730         /*
1731          * If the host uses TSC clock, then passthrough TSC as stable
1732          * to the guest.
1733          */
1734         spin_lock(&ka->pvclock_gtod_sync_lock);
1735         use_master_clock = ka->use_master_clock;
1736         if (use_master_clock) {
1737                 host_tsc = ka->master_cycle_now;
1738                 kernel_ns = ka->master_kernel_ns;
1739         }
1740         spin_unlock(&ka->pvclock_gtod_sync_lock);
1741
1742         /* Keep irq disabled to prevent changes to the clock */
1743         local_irq_save(flags);
1744         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1745         if (unlikely(tgt_tsc_khz == 0)) {
1746                 local_irq_restore(flags);
1747                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1748                 return 1;
1749         }
1750         if (!use_master_clock) {
1751                 host_tsc = rdtsc();
1752                 kernel_ns = get_kernel_ns();
1753         }
1754
1755         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1756
1757         /*
1758          * We may have to catch up the TSC to match elapsed wall clock
1759          * time for two reasons, even if kvmclock is used.
1760          *   1) CPU could have been running below the maximum TSC rate
1761          *   2) Broken TSC compensation resets the base at each VCPU
1762          *      entry to avoid unknown leaps of TSC even when running
1763          *      again on the same CPU.  This may cause apparent elapsed
1764          *      time to disappear, and the guest to stand still or run
1765          *      very slowly.
1766          */
1767         if (vcpu->tsc_catchup) {
1768                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1769                 if (tsc > tsc_timestamp) {
1770                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1771                         tsc_timestamp = tsc;
1772                 }
1773         }
1774
1775         local_irq_restore(flags);
1776
1777         if (!vcpu->pv_time_enabled)
1778                 return 0;
1779
1780         if (kvm_has_tsc_control)
1781                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1782
1783         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1784                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1785                                    &vcpu->hv_clock.tsc_shift,
1786                                    &vcpu->hv_clock.tsc_to_system_mul);
1787                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1788         }
1789
1790         /* With all the info we got, fill in the values */
1791         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1792         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1793         vcpu->last_guest_tsc = tsc_timestamp;
1794
1795         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1796                 &guest_hv_clock, sizeof(guest_hv_clock))))
1797                 return 0;
1798
1799         /* This VCPU is paused, but it's legal for a guest to read another
1800          * VCPU's kvmclock, so we really have to follow the specification where
1801          * it says that version is odd if data is being modified, and even after
1802          * it is consistent.
1803          *
1804          * Version field updates must be kept separate.  This is because
1805          * kvm_write_guest_cached might use a "rep movs" instruction, and
1806          * writes within a string instruction are weakly ordered.  So there
1807          * are three writes overall.
1808          *
1809          * As a small optimization, only write the version field in the first
1810          * and third write.  The vcpu->pv_time cache is still valid, because the
1811          * version field is the first in the struct.
1812          */
1813         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1814
1815         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1816         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1817                                 &vcpu->hv_clock,
1818                                 sizeof(vcpu->hv_clock.version));
1819
1820         smp_wmb();
1821
1822         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1823         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1824
1825         if (vcpu->pvclock_set_guest_stopped_request) {
1826                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1827                 vcpu->pvclock_set_guest_stopped_request = false;
1828         }
1829
1830         /* If the host uses TSC clocksource, then it is stable */
1831         if (use_master_clock)
1832                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1833
1834         vcpu->hv_clock.flags = pvclock_flags;
1835
1836         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1837
1838         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1839                                 &vcpu->hv_clock,
1840                                 sizeof(vcpu->hv_clock));
1841
1842         smp_wmb();
1843
1844         vcpu->hv_clock.version++;
1845         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1846                                 &vcpu->hv_clock,
1847                                 sizeof(vcpu->hv_clock.version));
1848         return 0;
1849 }
1850
1851 /*
1852  * kvmclock updates which are isolated to a given vcpu, such as
1853  * vcpu->cpu migration, should not allow system_timestamp from
1854  * the rest of the vcpus to remain static. Otherwise ntp frequency
1855  * correction applies to one vcpu's system_timestamp but not
1856  * the others.
1857  *
1858  * So in those cases, request a kvmclock update for all vcpus.
1859  * We need to rate-limit these requests though, as they can
1860  * considerably slow guests that have a large number of vcpus.
1861  * The time for a remote vcpu to update its kvmclock is bound
1862  * by the delay we use to rate-limit the updates.
1863  */
1864
1865 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1866
1867 static void kvmclock_update_fn(struct work_struct *work)
1868 {
1869         int i;
1870         struct delayed_work *dwork = to_delayed_work(work);
1871         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1872                                            kvmclock_update_work);
1873         struct kvm *kvm = container_of(ka, struct kvm, arch);
1874         struct kvm_vcpu *vcpu;
1875
1876         kvm_for_each_vcpu(i, vcpu, kvm) {
1877                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1878                 kvm_vcpu_kick(vcpu);
1879         }
1880 }
1881
1882 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1883 {
1884         struct kvm *kvm = v->kvm;
1885
1886         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1887         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1888                                         KVMCLOCK_UPDATE_DELAY);
1889 }
1890
1891 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1892
1893 static void kvmclock_sync_fn(struct work_struct *work)
1894 {
1895         struct delayed_work *dwork = to_delayed_work(work);
1896         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1897                                            kvmclock_sync_work);
1898         struct kvm *kvm = container_of(ka, struct kvm, arch);
1899
1900         if (!kvmclock_periodic_sync)
1901                 return;
1902
1903         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1904         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1905                                         KVMCLOCK_SYNC_PERIOD);
1906 }
1907
1908 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1909 {
1910         u64 mcg_cap = vcpu->arch.mcg_cap;
1911         unsigned bank_num = mcg_cap & 0xff;
1912
1913         switch (msr) {
1914         case MSR_IA32_MCG_STATUS:
1915                 vcpu->arch.mcg_status = data;
1916                 break;
1917         case MSR_IA32_MCG_CTL:
1918                 if (!(mcg_cap & MCG_CTL_P))
1919                         return 1;
1920                 if (data != 0 && data != ~(u64)0)
1921                         return -1;
1922                 vcpu->arch.mcg_ctl = data;
1923                 break;
1924         default:
1925                 if (msr >= MSR_IA32_MC0_CTL &&
1926                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1927                         u32 offset = msr - MSR_IA32_MC0_CTL;
1928                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1929                          * some Linux kernels though clear bit 10 in bank 4 to
1930                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1931                          * this to avoid an uncatched #GP in the guest
1932                          */
1933                         if ((offset & 0x3) == 0 &&
1934                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1935                                 return -1;
1936                         vcpu->arch.mce_banks[offset] = data;
1937                         break;
1938                 }
1939                 return 1;
1940         }
1941         return 0;
1942 }
1943
1944 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1945 {
1946         struct kvm *kvm = vcpu->kvm;
1947         int lm = is_long_mode(vcpu);
1948         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1949                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1950         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1951                 : kvm->arch.xen_hvm_config.blob_size_32;
1952         u32 page_num = data & ~PAGE_MASK;
1953         u64 page_addr = data & PAGE_MASK;
1954         u8 *page;
1955         int r;
1956
1957         r = -E2BIG;
1958         if (page_num >= blob_size)
1959                 goto out;
1960         r = -ENOMEM;
1961         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1962         if (IS_ERR(page)) {
1963                 r = PTR_ERR(page);
1964                 goto out;
1965         }
1966         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1967                 goto out_free;
1968         r = 0;
1969 out_free:
1970         kfree(page);
1971 out:
1972         return r;
1973 }
1974
1975 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1976 {
1977         gpa_t gpa = data & ~0x3f;
1978
1979         /* Bits 2:5 are reserved, Should be zero */
1980         if (data & 0x3c)
1981                 return 1;
1982
1983         vcpu->arch.apf.msr_val = data;
1984
1985         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1986                 kvm_clear_async_pf_completion_queue(vcpu);
1987                 kvm_async_pf_hash_reset(vcpu);
1988                 return 0;
1989         }
1990
1991         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1992                                         sizeof(u32)))
1993                 return 1;
1994
1995         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1996         kvm_async_pf_wakeup_all(vcpu);
1997         return 0;
1998 }
1999
2000 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2001 {
2002         vcpu->arch.pv_time_enabled = false;
2003 }
2004
2005 static void record_steal_time(struct kvm_vcpu *vcpu)
2006 {
2007         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2008                 return;
2009
2010         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2011                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2012                 return;
2013
2014         if (vcpu->arch.st.steal.version & 1)
2015                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2016
2017         vcpu->arch.st.steal.version += 1;
2018
2019         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2020                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2021
2022         smp_wmb();
2023
2024         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2025                 vcpu->arch.st.last_steal;
2026         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2027
2028         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2029                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2030
2031         smp_wmb();
2032
2033         vcpu->arch.st.steal.version += 1;
2034
2035         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2036                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2037 }
2038
2039 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2040 {
2041         bool pr = false;
2042         u32 msr = msr_info->index;
2043         u64 data = msr_info->data;
2044
2045         switch (msr) {
2046         case MSR_AMD64_NB_CFG:
2047         case MSR_IA32_UCODE_REV:
2048         case MSR_IA32_UCODE_WRITE:
2049         case MSR_VM_HSAVE_PA:
2050         case MSR_AMD64_PATCH_LOADER:
2051         case MSR_AMD64_BU_CFG2:
2052                 break;
2053
2054         case MSR_EFER:
2055                 return set_efer(vcpu, data);
2056         case MSR_K7_HWCR:
2057                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2058                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2059                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2060                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2061                 if (data != 0) {
2062                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2063                                     data);
2064                         return 1;
2065                 }
2066                 break;
2067         case MSR_FAM10H_MMIO_CONF_BASE:
2068                 if (data != 0) {
2069                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2070                                     "0x%llx\n", data);
2071                         return 1;
2072                 }
2073                 break;
2074         case MSR_IA32_DEBUGCTLMSR:
2075                 if (!data) {
2076                         /* We support the non-activated case already */
2077                         break;
2078                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2079                         /* Values other than LBR and BTF are vendor-specific,
2080                            thus reserved and should throw a #GP */
2081                         return 1;
2082                 }
2083                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2084                             __func__, data);
2085                 break;
2086         case 0x200 ... 0x2ff:
2087                 return kvm_mtrr_set_msr(vcpu, msr, data);
2088         case MSR_IA32_APICBASE:
2089                 return kvm_set_apic_base(vcpu, msr_info);
2090         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2091                 return kvm_x2apic_msr_write(vcpu, msr, data);
2092         case MSR_IA32_TSCDEADLINE:
2093                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2094                 break;
2095         case MSR_IA32_TSC_ADJUST:
2096                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2097                         if (!msr_info->host_initiated) {
2098                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2099                                 adjust_tsc_offset_guest(vcpu, adj);
2100                         }
2101                         vcpu->arch.ia32_tsc_adjust_msr = data;
2102                 }
2103                 break;
2104         case MSR_IA32_MISC_ENABLE:
2105                 vcpu->arch.ia32_misc_enable_msr = data;
2106                 break;
2107         case MSR_IA32_SMBASE:
2108                 if (!msr_info->host_initiated)
2109                         return 1;
2110                 vcpu->arch.smbase = data;
2111                 break;
2112         case MSR_KVM_WALL_CLOCK_NEW:
2113         case MSR_KVM_WALL_CLOCK:
2114                 vcpu->kvm->arch.wall_clock = data;
2115                 kvm_write_wall_clock(vcpu->kvm, data);
2116                 break;
2117         case MSR_KVM_SYSTEM_TIME_NEW:
2118         case MSR_KVM_SYSTEM_TIME: {
2119                 u64 gpa_offset;
2120                 struct kvm_arch *ka = &vcpu->kvm->arch;
2121
2122                 kvmclock_reset(vcpu);
2123
2124                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2125                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2126
2127                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2128                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2129                                         &vcpu->requests);
2130
2131                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2132                 }
2133
2134                 vcpu->arch.time = data;
2135                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2136
2137                 /* we verify if the enable bit is set... */
2138                 if (!(data & 1))
2139                         break;
2140
2141                 gpa_offset = data & ~(PAGE_MASK | 1);
2142
2143                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2144                      &vcpu->arch.pv_time, data & ~1ULL,
2145                      sizeof(struct pvclock_vcpu_time_info)))
2146                         vcpu->arch.pv_time_enabled = false;
2147                 else
2148                         vcpu->arch.pv_time_enabled = true;
2149
2150                 break;
2151         }
2152         case MSR_KVM_ASYNC_PF_EN:
2153                 if (kvm_pv_enable_async_pf(vcpu, data))
2154                         return 1;
2155                 break;
2156         case MSR_KVM_STEAL_TIME:
2157
2158                 if (unlikely(!sched_info_on()))
2159                         return 1;
2160
2161                 if (data & KVM_STEAL_RESERVED_MASK)
2162                         return 1;
2163
2164                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2165                                                 data & KVM_STEAL_VALID_BITS,
2166                                                 sizeof(struct kvm_steal_time)))
2167                         return 1;
2168
2169                 vcpu->arch.st.msr_val = data;
2170
2171                 if (!(data & KVM_MSR_ENABLED))
2172                         break;
2173
2174                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2175
2176                 break;
2177         case MSR_KVM_PV_EOI_EN:
2178                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2179                         return 1;
2180                 break;
2181
2182         case MSR_IA32_MCG_CTL:
2183         case MSR_IA32_MCG_STATUS:
2184         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2185                 return set_msr_mce(vcpu, msr, data);
2186
2187         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2188         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2189                 pr = true; /* fall through */
2190         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2191         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2192                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2193                         return kvm_pmu_set_msr(vcpu, msr_info);
2194
2195                 if (pr || data != 0)
2196                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2197                                     "0x%x data 0x%llx\n", msr, data);
2198                 break;
2199         case MSR_K7_CLK_CTL:
2200                 /*
2201                  * Ignore all writes to this no longer documented MSR.
2202                  * Writes are only relevant for old K7 processors,
2203                  * all pre-dating SVM, but a recommended workaround from
2204                  * AMD for these chips. It is possible to specify the
2205                  * affected processor models on the command line, hence
2206                  * the need to ignore the workaround.
2207                  */
2208                 break;
2209         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2210         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2211         case HV_X64_MSR_CRASH_CTL:
2212         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2213                 return kvm_hv_set_msr_common(vcpu, msr, data,
2214                                              msr_info->host_initiated);
2215         case MSR_IA32_BBL_CR_CTL3:
2216                 /* Drop writes to this legacy MSR -- see rdmsr
2217                  * counterpart for further detail.
2218                  */
2219                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2220                 break;
2221         case MSR_AMD64_OSVW_ID_LENGTH:
2222                 if (!guest_cpuid_has_osvw(vcpu))
2223                         return 1;
2224                 vcpu->arch.osvw.length = data;
2225                 break;
2226         case MSR_AMD64_OSVW_STATUS:
2227                 if (!guest_cpuid_has_osvw(vcpu))
2228                         return 1;
2229                 vcpu->arch.osvw.status = data;
2230                 break;
2231         default:
2232                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2233                         return xen_hvm_config(vcpu, data);
2234                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2235                         return kvm_pmu_set_msr(vcpu, msr_info);
2236                 if (!ignore_msrs) {
2237                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2238                                     msr, data);
2239                         return 1;
2240                 } else {
2241                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2242                                     msr, data);
2243                         break;
2244                 }
2245         }
2246         return 0;
2247 }
2248 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2249
2250
2251 /*
2252  * Reads an msr value (of 'msr_index') into 'pdata'.
2253  * Returns 0 on success, non-0 otherwise.
2254  * Assumes vcpu_load() was already called.
2255  */
2256 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2257 {
2258         return kvm_x86_ops->get_msr(vcpu, msr);
2259 }
2260 EXPORT_SYMBOL_GPL(kvm_get_msr);
2261
2262 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2263 {
2264         u64 data;
2265         u64 mcg_cap = vcpu->arch.mcg_cap;
2266         unsigned bank_num = mcg_cap & 0xff;
2267
2268         switch (msr) {
2269         case MSR_IA32_P5_MC_ADDR:
2270         case MSR_IA32_P5_MC_TYPE:
2271                 data = 0;
2272                 break;
2273         case MSR_IA32_MCG_CAP:
2274                 data = vcpu->arch.mcg_cap;
2275                 break;
2276         case MSR_IA32_MCG_CTL:
2277                 if (!(mcg_cap & MCG_CTL_P))
2278                         return 1;
2279                 data = vcpu->arch.mcg_ctl;
2280                 break;
2281         case MSR_IA32_MCG_STATUS:
2282                 data = vcpu->arch.mcg_status;
2283                 break;
2284         default:
2285                 if (msr >= MSR_IA32_MC0_CTL &&
2286                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2287                         u32 offset = msr - MSR_IA32_MC0_CTL;
2288                         data = vcpu->arch.mce_banks[offset];
2289                         break;
2290                 }
2291                 return 1;
2292         }
2293         *pdata = data;
2294         return 0;
2295 }
2296
2297 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2298 {
2299         switch (msr_info->index) {
2300         case MSR_IA32_PLATFORM_ID:
2301         case MSR_IA32_EBL_CR_POWERON:
2302         case MSR_IA32_DEBUGCTLMSR:
2303         case MSR_IA32_LASTBRANCHFROMIP:
2304         case MSR_IA32_LASTBRANCHTOIP:
2305         case MSR_IA32_LASTINTFROMIP:
2306         case MSR_IA32_LASTINTTOIP:
2307         case MSR_K8_SYSCFG:
2308         case MSR_K8_TSEG_ADDR:
2309         case MSR_K8_TSEG_MASK:
2310         case MSR_K7_HWCR:
2311         case MSR_VM_HSAVE_PA:
2312         case MSR_K8_INT_PENDING_MSG:
2313         case MSR_AMD64_NB_CFG:
2314         case MSR_FAM10H_MMIO_CONF_BASE:
2315         case MSR_AMD64_BU_CFG2:
2316                 msr_info->data = 0;
2317                 break;
2318         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2319         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2320         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2321         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2322                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2323                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2324                 msr_info->data = 0;
2325                 break;
2326         case MSR_IA32_UCODE_REV:
2327                 msr_info->data = 0x100000000ULL;
2328                 break;
2329         case MSR_MTRRcap:
2330         case 0x200 ... 0x2ff:
2331                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2332         case 0xcd: /* fsb frequency */
2333                 msr_info->data = 3;
2334                 break;
2335                 /*
2336                  * MSR_EBC_FREQUENCY_ID
2337                  * Conservative value valid for even the basic CPU models.
2338                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2339                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2340                  * and 266MHz for model 3, or 4. Set Core Clock
2341                  * Frequency to System Bus Frequency Ratio to 1 (bits
2342                  * 31:24) even though these are only valid for CPU
2343                  * models > 2, however guests may end up dividing or
2344                  * multiplying by zero otherwise.
2345                  */
2346         case MSR_EBC_FREQUENCY_ID:
2347                 msr_info->data = 1 << 24;
2348                 break;
2349         case MSR_IA32_APICBASE:
2350                 msr_info->data = kvm_get_apic_base(vcpu);
2351                 break;
2352         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2353                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2354                 break;
2355         case MSR_IA32_TSCDEADLINE:
2356                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2357                 break;
2358         case MSR_IA32_TSC_ADJUST:
2359                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2360                 break;
2361         case MSR_IA32_MISC_ENABLE:
2362                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2363                 break;
2364         case MSR_IA32_SMBASE:
2365                 if (!msr_info->host_initiated)
2366                         return 1;
2367                 msr_info->data = vcpu->arch.smbase;
2368                 break;
2369         case MSR_IA32_PERF_STATUS:
2370                 /* TSC increment by tick */
2371                 msr_info->data = 1000ULL;
2372                 /* CPU multiplier */
2373                 msr_info->data |= (((uint64_t)4ULL) << 40);
2374                 break;
2375         case MSR_EFER:
2376                 msr_info->data = vcpu->arch.efer;
2377                 break;
2378         case MSR_KVM_WALL_CLOCK:
2379         case MSR_KVM_WALL_CLOCK_NEW:
2380                 msr_info->data = vcpu->kvm->arch.wall_clock;
2381                 break;
2382         case MSR_KVM_SYSTEM_TIME:
2383         case MSR_KVM_SYSTEM_TIME_NEW:
2384                 msr_info->data = vcpu->arch.time;
2385                 break;
2386         case MSR_KVM_ASYNC_PF_EN:
2387                 msr_info->data = vcpu->arch.apf.msr_val;
2388                 break;
2389         case MSR_KVM_STEAL_TIME:
2390                 msr_info->data = vcpu->arch.st.msr_val;
2391                 break;
2392         case MSR_KVM_PV_EOI_EN:
2393                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2394                 break;
2395         case MSR_IA32_P5_MC_ADDR:
2396         case MSR_IA32_P5_MC_TYPE:
2397         case MSR_IA32_MCG_CAP:
2398         case MSR_IA32_MCG_CTL:
2399         case MSR_IA32_MCG_STATUS:
2400         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2401                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2402         case MSR_K7_CLK_CTL:
2403                 /*
2404                  * Provide expected ramp-up count for K7. All other
2405                  * are set to zero, indicating minimum divisors for
2406                  * every field.
2407                  *
2408                  * This prevents guest kernels on AMD host with CPU
2409                  * type 6, model 8 and higher from exploding due to
2410                  * the rdmsr failing.
2411                  */
2412                 msr_info->data = 0x20000000;
2413                 break;
2414         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2415         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2416         case HV_X64_MSR_CRASH_CTL:
2417         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2418                 return kvm_hv_get_msr_common(vcpu,
2419                                              msr_info->index, &msr_info->data);
2420                 break;
2421         case MSR_IA32_BBL_CR_CTL3:
2422                 /* This legacy MSR exists but isn't fully documented in current
2423                  * silicon.  It is however accessed by winxp in very narrow
2424                  * scenarios where it sets bit #19, itself documented as
2425                  * a "reserved" bit.  Best effort attempt to source coherent
2426                  * read data here should the balance of the register be
2427                  * interpreted by the guest:
2428                  *
2429                  * L2 cache control register 3: 64GB range, 256KB size,
2430                  * enabled, latency 0x1, configured
2431                  */
2432                 msr_info->data = 0xbe702111;
2433                 break;
2434         case MSR_AMD64_OSVW_ID_LENGTH:
2435                 if (!guest_cpuid_has_osvw(vcpu))
2436                         return 1;
2437                 msr_info->data = vcpu->arch.osvw.length;
2438                 break;
2439         case MSR_AMD64_OSVW_STATUS:
2440                 if (!guest_cpuid_has_osvw(vcpu))
2441                         return 1;
2442                 msr_info->data = vcpu->arch.osvw.status;
2443                 break;
2444         default:
2445                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2446                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2447                 if (!ignore_msrs) {
2448                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2449                         return 1;
2450                 } else {
2451                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2452                         msr_info->data = 0;
2453                 }
2454                 break;
2455         }
2456         return 0;
2457 }
2458 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2459
2460 /*
2461  * Read or write a bunch of msrs. All parameters are kernel addresses.
2462  *
2463  * @return number of msrs set successfully.
2464  */
2465 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2466                     struct kvm_msr_entry *entries,
2467                     int (*do_msr)(struct kvm_vcpu *vcpu,
2468                                   unsigned index, u64 *data))
2469 {
2470         int i, idx;
2471
2472         idx = srcu_read_lock(&vcpu->kvm->srcu);
2473         for (i = 0; i < msrs->nmsrs; ++i)
2474                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2475                         break;
2476         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2477
2478         return i;
2479 }
2480
2481 /*
2482  * Read or write a bunch of msrs. Parameters are user addresses.
2483  *
2484  * @return number of msrs set successfully.
2485  */
2486 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2487                   int (*do_msr)(struct kvm_vcpu *vcpu,
2488                                 unsigned index, u64 *data),
2489                   int writeback)
2490 {
2491         struct kvm_msrs msrs;
2492         struct kvm_msr_entry *entries;
2493         int r, n;
2494         unsigned size;
2495
2496         r = -EFAULT;
2497         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2498                 goto out;
2499
2500         r = -E2BIG;
2501         if (msrs.nmsrs >= MAX_IO_MSRS)
2502                 goto out;
2503
2504         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2505         entries = memdup_user(user_msrs->entries, size);
2506         if (IS_ERR(entries)) {
2507                 r = PTR_ERR(entries);
2508                 goto out;
2509         }
2510
2511         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2512         if (r < 0)
2513                 goto out_free;
2514
2515         r = -EFAULT;
2516         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2517                 goto out_free;
2518
2519         r = n;
2520
2521 out_free:
2522         kfree(entries);
2523 out:
2524         return r;
2525 }
2526
2527 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2528 {
2529         int r;
2530
2531         switch (ext) {
2532         case KVM_CAP_IRQCHIP:
2533         case KVM_CAP_HLT:
2534         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2535         case KVM_CAP_SET_TSS_ADDR:
2536         case KVM_CAP_EXT_CPUID:
2537         case KVM_CAP_EXT_EMUL_CPUID:
2538         case KVM_CAP_CLOCKSOURCE:
2539         case KVM_CAP_PIT:
2540         case KVM_CAP_NOP_IO_DELAY:
2541         case KVM_CAP_MP_STATE:
2542         case KVM_CAP_SYNC_MMU:
2543         case KVM_CAP_USER_NMI:
2544         case KVM_CAP_REINJECT_CONTROL:
2545         case KVM_CAP_IRQ_INJECT_STATUS:
2546         case KVM_CAP_IOEVENTFD:
2547         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2548         case KVM_CAP_PIT2:
2549         case KVM_CAP_PIT_STATE2:
2550         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2551         case KVM_CAP_XEN_HVM:
2552         case KVM_CAP_ADJUST_CLOCK:
2553         case KVM_CAP_VCPU_EVENTS:
2554         case KVM_CAP_HYPERV:
2555         case KVM_CAP_HYPERV_VAPIC:
2556         case KVM_CAP_HYPERV_SPIN:
2557         case KVM_CAP_HYPERV_SYNIC:
2558         case KVM_CAP_PCI_SEGMENT:
2559         case KVM_CAP_DEBUGREGS:
2560         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2561         case KVM_CAP_XSAVE:
2562         case KVM_CAP_ASYNC_PF:
2563         case KVM_CAP_GET_TSC_KHZ:
2564         case KVM_CAP_KVMCLOCK_CTRL:
2565         case KVM_CAP_READONLY_MEM:
2566         case KVM_CAP_HYPERV_TIME:
2567         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2568         case KVM_CAP_TSC_DEADLINE_TIMER:
2569         case KVM_CAP_ENABLE_CAP_VM:
2570         case KVM_CAP_DISABLE_QUIRKS:
2571         case KVM_CAP_SET_BOOT_CPU_ID:
2572         case KVM_CAP_SPLIT_IRQCHIP:
2573 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2574         case KVM_CAP_ASSIGN_DEV_IRQ:
2575         case KVM_CAP_PCI_2_3:
2576 #endif
2577                 r = 1;
2578                 break;
2579         case KVM_CAP_X86_SMM:
2580                 /* SMBASE is usually relocated above 1M on modern chipsets,
2581                  * and SMM handlers might indeed rely on 4G segment limits,
2582                  * so do not report SMM to be available if real mode is
2583                  * emulated via vm86 mode.  Still, do not go to great lengths
2584                  * to avoid userspace's usage of the feature, because it is a
2585                  * fringe case that is not enabled except via specific settings
2586                  * of the module parameters.
2587                  */
2588                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2589                 break;
2590         case KVM_CAP_COALESCED_MMIO:
2591                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2592                 break;
2593         case KVM_CAP_VAPIC:
2594                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2595                 break;
2596         case KVM_CAP_NR_VCPUS:
2597                 r = KVM_SOFT_MAX_VCPUS;
2598                 break;
2599         case KVM_CAP_MAX_VCPUS:
2600                 r = KVM_MAX_VCPUS;
2601                 break;
2602         case KVM_CAP_NR_MEMSLOTS:
2603                 r = KVM_USER_MEM_SLOTS;
2604                 break;
2605         case KVM_CAP_PV_MMU:    /* obsolete */
2606                 r = 0;
2607                 break;
2608 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2609         case KVM_CAP_IOMMU:
2610                 r = iommu_present(&pci_bus_type);
2611                 break;
2612 #endif
2613         case KVM_CAP_MCE:
2614                 r = KVM_MAX_MCE_BANKS;
2615                 break;
2616         case KVM_CAP_XCRS:
2617                 r = cpu_has_xsave;
2618                 break;
2619         case KVM_CAP_TSC_CONTROL:
2620                 r = kvm_has_tsc_control;
2621                 break;
2622         default:
2623                 r = 0;
2624                 break;
2625         }
2626         return r;
2627
2628 }
2629
2630 long kvm_arch_dev_ioctl(struct file *filp,
2631                         unsigned int ioctl, unsigned long arg)
2632 {
2633         void __user *argp = (void __user *)arg;
2634         long r;
2635
2636         switch (ioctl) {
2637         case KVM_GET_MSR_INDEX_LIST: {
2638                 struct kvm_msr_list __user *user_msr_list = argp;
2639                 struct kvm_msr_list msr_list;
2640                 unsigned n;
2641
2642                 r = -EFAULT;
2643                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2644                         goto out;
2645                 n = msr_list.nmsrs;
2646                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2647                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2648                         goto out;
2649                 r = -E2BIG;
2650                 if (n < msr_list.nmsrs)
2651                         goto out;
2652                 r = -EFAULT;
2653                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2654                                  num_msrs_to_save * sizeof(u32)))
2655                         goto out;
2656                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2657                                  &emulated_msrs,
2658                                  num_emulated_msrs * sizeof(u32)))
2659                         goto out;
2660                 r = 0;
2661                 break;
2662         }
2663         case KVM_GET_SUPPORTED_CPUID:
2664         case KVM_GET_EMULATED_CPUID: {
2665                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2666                 struct kvm_cpuid2 cpuid;
2667
2668                 r = -EFAULT;
2669                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2670                         goto out;
2671
2672                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2673                                             ioctl);
2674                 if (r)
2675                         goto out;
2676
2677                 r = -EFAULT;
2678                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2679                         goto out;
2680                 r = 0;
2681                 break;
2682         }
2683         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2684                 u64 mce_cap;
2685
2686                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2687                 r = -EFAULT;
2688                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2689                         goto out;
2690                 r = 0;
2691                 break;
2692         }
2693         default:
2694                 r = -EINVAL;
2695         }
2696 out:
2697         return r;
2698 }
2699
2700 static void wbinvd_ipi(void *garbage)
2701 {
2702         wbinvd();
2703 }
2704
2705 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2706 {
2707         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2708 }
2709
2710 static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
2711 {
2712         set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
2713 }
2714
2715 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2716 {
2717         /* Address WBINVD may be executed by guest */
2718         if (need_emulate_wbinvd(vcpu)) {
2719                 if (kvm_x86_ops->has_wbinvd_exit())
2720                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2721                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2722                         smp_call_function_single(vcpu->cpu,
2723                                         wbinvd_ipi, NULL, 1);
2724         }
2725
2726         kvm_x86_ops->vcpu_load(vcpu, cpu);
2727
2728         /* Apply any externally detected TSC adjustments (due to suspend) */
2729         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2730                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2731                 vcpu->arch.tsc_offset_adjustment = 0;
2732                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2733         }
2734
2735         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2736                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2737                                 rdtsc() - vcpu->arch.last_host_tsc;
2738                 if (tsc_delta < 0)
2739                         mark_tsc_unstable("KVM discovered backwards TSC");
2740                 if (check_tsc_unstable()) {
2741                         u64 offset = kvm_compute_tsc_offset(vcpu,
2742                                                 vcpu->arch.last_guest_tsc);
2743                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2744                         vcpu->arch.tsc_catchup = 1;
2745                 }
2746                 /*
2747                  * On a host with synchronized TSC, there is no need to update
2748                  * kvmclock on vcpu->cpu migration
2749                  */
2750                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2751                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2752                 if (vcpu->cpu != cpu)
2753                         kvm_migrate_timers(vcpu);
2754                 vcpu->cpu = cpu;
2755         }
2756
2757         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2758 }
2759
2760 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2761 {
2762         kvm_x86_ops->vcpu_put(vcpu);
2763         kvm_put_guest_fpu(vcpu);
2764         vcpu->arch.last_host_tsc = rdtsc();
2765 }
2766
2767 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2768                                     struct kvm_lapic_state *s)
2769 {
2770         if (vcpu->arch.apicv_active)
2771                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2772
2773         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2774
2775         return 0;
2776 }
2777
2778 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2779                                     struct kvm_lapic_state *s)
2780 {
2781         kvm_apic_post_state_restore(vcpu, s);
2782         update_cr8_intercept(vcpu);
2783
2784         return 0;
2785 }
2786
2787 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2788 {
2789         return (!lapic_in_kernel(vcpu) ||
2790                 kvm_apic_accept_pic_intr(vcpu));
2791 }
2792
2793 /*
2794  * if userspace requested an interrupt window, check that the
2795  * interrupt window is open.
2796  *
2797  * No need to exit to userspace if we already have an interrupt queued.
2798  */
2799 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2800 {
2801         return kvm_arch_interrupt_allowed(vcpu) &&
2802                 !kvm_cpu_has_interrupt(vcpu) &&
2803                 !kvm_event_needs_reinjection(vcpu) &&
2804                 kvm_cpu_accept_dm_intr(vcpu);
2805 }
2806
2807 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2808                                     struct kvm_interrupt *irq)
2809 {
2810         if (irq->irq >= KVM_NR_INTERRUPTS)
2811                 return -EINVAL;
2812
2813         if (!irqchip_in_kernel(vcpu->kvm)) {
2814                 kvm_queue_interrupt(vcpu, irq->irq, false);
2815                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2816                 return 0;
2817         }
2818
2819         /*
2820          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2821          * fail for in-kernel 8259.
2822          */
2823         if (pic_in_kernel(vcpu->kvm))
2824                 return -ENXIO;
2825
2826         if (vcpu->arch.pending_external_vector != -1)
2827                 return -EEXIST;
2828
2829         vcpu->arch.pending_external_vector = irq->irq;
2830         kvm_make_request(KVM_REQ_EVENT, vcpu);
2831         return 0;
2832 }
2833
2834 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2835 {
2836         kvm_inject_nmi(vcpu);
2837
2838         return 0;
2839 }
2840
2841 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2842 {
2843         kvm_make_request(KVM_REQ_SMI, vcpu);
2844
2845         return 0;
2846 }
2847
2848 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2849                                            struct kvm_tpr_access_ctl *tac)
2850 {
2851         if (tac->flags)
2852                 return -EINVAL;
2853         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2854         return 0;
2855 }
2856
2857 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2858                                         u64 mcg_cap)
2859 {
2860         int r;
2861         unsigned bank_num = mcg_cap & 0xff, bank;
2862
2863         r = -EINVAL;
2864         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2865                 goto out;
2866         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2867                 goto out;
2868         r = 0;
2869         vcpu->arch.mcg_cap = mcg_cap;
2870         /* Init IA32_MCG_CTL to all 1s */
2871         if (mcg_cap & MCG_CTL_P)
2872                 vcpu->arch.mcg_ctl = ~(u64)0;
2873         /* Init IA32_MCi_CTL to all 1s */
2874         for (bank = 0; bank < bank_num; bank++)
2875                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2876 out:
2877         return r;
2878 }
2879
2880 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2881                                       struct kvm_x86_mce *mce)
2882 {
2883         u64 mcg_cap = vcpu->arch.mcg_cap;
2884         unsigned bank_num = mcg_cap & 0xff;
2885         u64 *banks = vcpu->arch.mce_banks;
2886
2887         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2888                 return -EINVAL;
2889         /*
2890          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2891          * reporting is disabled
2892          */
2893         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2894             vcpu->arch.mcg_ctl != ~(u64)0)
2895                 return 0;
2896         banks += 4 * mce->bank;
2897         /*
2898          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2899          * reporting is disabled for the bank
2900          */
2901         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2902                 return 0;
2903         if (mce->status & MCI_STATUS_UC) {
2904                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2905                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2906                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2907                         return 0;
2908                 }
2909                 if (banks[1] & MCI_STATUS_VAL)
2910                         mce->status |= MCI_STATUS_OVER;
2911                 banks[2] = mce->addr;
2912                 banks[3] = mce->misc;
2913                 vcpu->arch.mcg_status = mce->mcg_status;
2914                 banks[1] = mce->status;
2915                 kvm_queue_exception(vcpu, MC_VECTOR);
2916         } else if (!(banks[1] & MCI_STATUS_VAL)
2917                    || !(banks[1] & MCI_STATUS_UC)) {
2918                 if (banks[1] & MCI_STATUS_VAL)
2919                         mce->status |= MCI_STATUS_OVER;
2920                 banks[2] = mce->addr;
2921                 banks[3] = mce->misc;
2922                 banks[1] = mce->status;
2923         } else
2924                 banks[1] |= MCI_STATUS_OVER;
2925         return 0;
2926 }
2927
2928 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2929                                                struct kvm_vcpu_events *events)
2930 {
2931         process_nmi(vcpu);
2932         events->exception.injected =
2933                 vcpu->arch.exception.pending &&
2934                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2935         events->exception.nr = vcpu->arch.exception.nr;
2936         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2937         events->exception.pad = 0;
2938         events->exception.error_code = vcpu->arch.exception.error_code;
2939
2940         events->interrupt.injected =
2941                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2942         events->interrupt.nr = vcpu->arch.interrupt.nr;
2943         events->interrupt.soft = 0;
2944         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2945
2946         events->nmi.injected = vcpu->arch.nmi_injected;
2947         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2948         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2949         events->nmi.pad = 0;
2950
2951         events->sipi_vector = 0; /* never valid when reporting to user space */
2952
2953         events->smi.smm = is_smm(vcpu);
2954         events->smi.pending = vcpu->arch.smi_pending;
2955         events->smi.smm_inside_nmi =
2956                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2957         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2958
2959         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2960                          | KVM_VCPUEVENT_VALID_SHADOW
2961                          | KVM_VCPUEVENT_VALID_SMM);
2962         memset(&events->reserved, 0, sizeof(events->reserved));
2963 }
2964
2965 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2966                                               struct kvm_vcpu_events *events)
2967 {
2968         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2969                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2970                               | KVM_VCPUEVENT_VALID_SHADOW
2971                               | KVM_VCPUEVENT_VALID_SMM))
2972                 return -EINVAL;
2973
2974         process_nmi(vcpu);
2975         vcpu->arch.exception.pending = events->exception.injected;
2976         vcpu->arch.exception.nr = events->exception.nr;
2977         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2978         vcpu->arch.exception.error_code = events->exception.error_code;
2979
2980         vcpu->arch.interrupt.pending = events->interrupt.injected;
2981         vcpu->arch.interrupt.nr = events->interrupt.nr;
2982         vcpu->arch.interrupt.soft = events->interrupt.soft;
2983         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2984                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2985                                                   events->interrupt.shadow);
2986
2987         vcpu->arch.nmi_injected = events->nmi.injected;
2988         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2989                 vcpu->arch.nmi_pending = events->nmi.pending;
2990         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2991
2992         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2993             lapic_in_kernel(vcpu))
2994                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2995
2996         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2997                 if (events->smi.smm)
2998                         vcpu->arch.hflags |= HF_SMM_MASK;
2999                 else
3000                         vcpu->arch.hflags &= ~HF_SMM_MASK;
3001                 vcpu->arch.smi_pending = events->smi.pending;
3002                 if (events->smi.smm_inside_nmi)
3003                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3004                 else
3005                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3006                 if (lapic_in_kernel(vcpu)) {
3007                         if (events->smi.latched_init)
3008                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3009                         else
3010                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3011                 }
3012         }
3013
3014         kvm_make_request(KVM_REQ_EVENT, vcpu);
3015
3016         return 0;
3017 }
3018
3019 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3020                                              struct kvm_debugregs *dbgregs)
3021 {
3022         unsigned long val;
3023
3024         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3025         kvm_get_dr(vcpu, 6, &val);
3026         dbgregs->dr6 = val;
3027         dbgregs->dr7 = vcpu->arch.dr7;
3028         dbgregs->flags = 0;
3029         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3030 }
3031
3032 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3033                                             struct kvm_debugregs *dbgregs)
3034 {
3035         if (dbgregs->flags)
3036                 return -EINVAL;
3037
3038         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3039         kvm_update_dr0123(vcpu);
3040         vcpu->arch.dr6 = dbgregs->dr6;
3041         kvm_update_dr6(vcpu);
3042         vcpu->arch.dr7 = dbgregs->dr7;
3043         kvm_update_dr7(vcpu);
3044
3045         return 0;
3046 }
3047
3048 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3049
3050 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3051 {
3052         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3053         u64 xstate_bv = xsave->header.xfeatures;
3054         u64 valid;
3055
3056         /*
3057          * Copy legacy XSAVE area, to avoid complications with CPUID
3058          * leaves 0 and 1 in the loop below.
3059          */
3060         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3061
3062         /* Set XSTATE_BV */
3063         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3064
3065         /*
3066          * Copy each region from the possibly compacted offset to the
3067          * non-compacted offset.
3068          */
3069         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3070         while (valid) {
3071                 u64 feature = valid & -valid;
3072                 int index = fls64(feature) - 1;
3073                 void *src = get_xsave_addr(xsave, feature);
3074
3075                 if (src) {
3076                         u32 size, offset, ecx, edx;
3077                         cpuid_count(XSTATE_CPUID, index,
3078                                     &size, &offset, &ecx, &edx);
3079                         memcpy(dest + offset, src, size);
3080                 }
3081
3082                 valid -= feature;
3083         }
3084 }
3085
3086 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3087 {
3088         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3089         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3090         u64 valid;
3091
3092         /*
3093          * Copy legacy XSAVE area, to avoid complications with CPUID
3094          * leaves 0 and 1 in the loop below.
3095          */
3096         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3097
3098         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3099         xsave->header.xfeatures = xstate_bv;
3100         if (cpu_has_xsaves)
3101                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3102
3103         /*
3104          * Copy each region from the non-compacted offset to the
3105          * possibly compacted offset.
3106          */
3107         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3108         while (valid) {
3109                 u64 feature = valid & -valid;
3110                 int index = fls64(feature) - 1;
3111                 void *dest = get_xsave_addr(xsave, feature);
3112
3113                 if (dest) {
3114                         u32 size, offset, ecx, edx;
3115                         cpuid_count(XSTATE_CPUID, index,
3116                                     &size, &offset, &ecx, &edx);
3117                         memcpy(dest, src + offset, size);
3118                 }
3119
3120                 valid -= feature;
3121         }
3122 }
3123
3124 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3125                                          struct kvm_xsave *guest_xsave)
3126 {
3127         if (cpu_has_xsave) {
3128                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3129                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3130         } else {
3131                 memcpy(guest_xsave->region,
3132                         &vcpu->arch.guest_fpu.state.fxsave,
3133                         sizeof(struct fxregs_state));
3134                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3135                         XFEATURE_MASK_FPSSE;
3136         }
3137 }
3138
3139 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3140                                         struct kvm_xsave *guest_xsave)
3141 {
3142         u64 xstate_bv =
3143                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3144
3145         if (cpu_has_xsave) {
3146                 /*
3147                  * Here we allow setting states that are not present in
3148                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3149                  * with old userspace.
3150                  */
3151                 if (xstate_bv & ~kvm_supported_xcr0())
3152                         return -EINVAL;
3153                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3154         } else {
3155                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3156                         return -EINVAL;
3157                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3158                         guest_xsave->region, sizeof(struct fxregs_state));
3159         }
3160         return 0;
3161 }
3162
3163 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3164                                         struct kvm_xcrs *guest_xcrs)
3165 {
3166         if (!cpu_has_xsave) {
3167                 guest_xcrs->nr_xcrs = 0;
3168                 return;
3169         }
3170
3171         guest_xcrs->nr_xcrs = 1;
3172         guest_xcrs->flags = 0;
3173         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3174         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3175 }
3176
3177 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3178                                        struct kvm_xcrs *guest_xcrs)
3179 {
3180         int i, r = 0;
3181
3182         if (!cpu_has_xsave)
3183                 return -EINVAL;
3184
3185         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3186                 return -EINVAL;
3187
3188         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3189                 /* Only support XCR0 currently */
3190                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3191                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3192                                 guest_xcrs->xcrs[i].value);
3193                         break;
3194                 }
3195         if (r)
3196                 r = -EINVAL;
3197         return r;
3198 }
3199
3200 /*
3201  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3202  * stopped by the hypervisor.  This function will be called from the host only.
3203  * EINVAL is returned when the host attempts to set the flag for a guest that
3204  * does not support pv clocks.
3205  */
3206 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3207 {
3208         if (!vcpu->arch.pv_time_enabled)
3209                 return -EINVAL;
3210         vcpu->arch.pvclock_set_guest_stopped_request = true;
3211         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3212         return 0;
3213 }
3214
3215 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3216                                      struct kvm_enable_cap *cap)
3217 {
3218         if (cap->flags)
3219                 return -EINVAL;
3220
3221         switch (cap->cap) {
3222         case KVM_CAP_HYPERV_SYNIC:
3223                 return kvm_hv_activate_synic(vcpu);
3224         default:
3225                 return -EINVAL;
3226         }
3227 }
3228
3229 long kvm_arch_vcpu_ioctl(struct file *filp,
3230                          unsigned int ioctl, unsigned long arg)
3231 {
3232         struct kvm_vcpu *vcpu = filp->private_data;
3233         void __user *argp = (void __user *)arg;
3234         int r;
3235         union {
3236                 struct kvm_lapic_state *lapic;
3237                 struct kvm_xsave *xsave;
3238                 struct kvm_xcrs *xcrs;
3239                 void *buffer;
3240         } u;
3241
3242         u.buffer = NULL;
3243         switch (ioctl) {
3244         case KVM_GET_LAPIC: {
3245                 r = -EINVAL;
3246                 if (!lapic_in_kernel(vcpu))
3247                         goto out;
3248                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3249
3250                 r = -ENOMEM;
3251                 if (!u.lapic)
3252                         goto out;
3253                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3254                 if (r)
3255                         goto out;
3256                 r = -EFAULT;
3257                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3258                         goto out;
3259                 r = 0;
3260                 break;
3261         }
3262         case KVM_SET_LAPIC: {
3263                 r = -EINVAL;
3264                 if (!lapic_in_kernel(vcpu))
3265                         goto out;
3266                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3267                 if (IS_ERR(u.lapic))
3268                         return PTR_ERR(u.lapic);
3269
3270                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3271                 break;
3272         }
3273         case KVM_INTERRUPT: {
3274                 struct kvm_interrupt irq;
3275
3276                 r = -EFAULT;
3277                 if (copy_from_user(&irq, argp, sizeof irq))
3278                         goto out;
3279                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3280                 break;
3281         }
3282         case KVM_NMI: {
3283                 r = kvm_vcpu_ioctl_nmi(vcpu);
3284                 break;
3285         }
3286         case KVM_SMI: {
3287                 r = kvm_vcpu_ioctl_smi(vcpu);
3288                 break;
3289         }
3290         case KVM_SET_CPUID: {
3291                 struct kvm_cpuid __user *cpuid_arg = argp;
3292                 struct kvm_cpuid cpuid;
3293
3294                 r = -EFAULT;
3295                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3296                         goto out;
3297                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3298                 break;
3299         }
3300         case KVM_SET_CPUID2: {
3301                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3302                 struct kvm_cpuid2 cpuid;
3303
3304                 r = -EFAULT;
3305                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3306                         goto out;
3307                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3308                                               cpuid_arg->entries);
3309                 break;
3310         }
3311         case KVM_GET_CPUID2: {
3312                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3313                 struct kvm_cpuid2 cpuid;
3314
3315                 r = -EFAULT;
3316                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3317                         goto out;
3318                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3319                                               cpuid_arg->entries);
3320                 if (r)
3321                         goto out;
3322                 r = -EFAULT;
3323                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3324                         goto out;
3325                 r = 0;
3326                 break;
3327         }
3328         case KVM_GET_MSRS:
3329                 r = msr_io(vcpu, argp, do_get_msr, 1);
3330                 break;
3331         case KVM_SET_MSRS:
3332                 r = msr_io(vcpu, argp, do_set_msr, 0);
3333                 break;
3334         case KVM_TPR_ACCESS_REPORTING: {
3335                 struct kvm_tpr_access_ctl tac;
3336
3337                 r = -EFAULT;
3338                 if (copy_from_user(&tac, argp, sizeof tac))
3339                         goto out;
3340                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3341                 if (r)
3342                         goto out;
3343                 r = -EFAULT;
3344                 if (copy_to_user(argp, &tac, sizeof tac))
3345                         goto out;
3346                 r = 0;
3347                 break;
3348         };
3349         case KVM_SET_VAPIC_ADDR: {
3350                 struct kvm_vapic_addr va;
3351
3352                 r = -EINVAL;
3353                 if (!lapic_in_kernel(vcpu))
3354                         goto out;
3355                 r = -EFAULT;
3356                 if (copy_from_user(&va, argp, sizeof va))
3357                         goto out;
3358                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3359                 break;
3360         }
3361         case KVM_X86_SETUP_MCE: {
3362                 u64 mcg_cap;
3363
3364                 r = -EFAULT;
3365                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3366                         goto out;
3367                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3368                 break;
3369         }
3370         case KVM_X86_SET_MCE: {
3371                 struct kvm_x86_mce mce;
3372
3373                 r = -EFAULT;
3374                 if (copy_from_user(&mce, argp, sizeof mce))
3375                         goto out;
3376                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3377                 break;
3378         }
3379         case KVM_GET_VCPU_EVENTS: {
3380                 struct kvm_vcpu_events events;
3381
3382                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3383
3384                 r = -EFAULT;
3385                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3386                         break;
3387                 r = 0;
3388                 break;
3389         }
3390         case KVM_SET_VCPU_EVENTS: {
3391                 struct kvm_vcpu_events events;
3392
3393                 r = -EFAULT;
3394                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3395                         break;
3396
3397                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3398                 break;
3399         }
3400         case KVM_GET_DEBUGREGS: {
3401                 struct kvm_debugregs dbgregs;
3402
3403                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3404
3405                 r = -EFAULT;
3406                 if (copy_to_user(argp, &dbgregs,
3407                                  sizeof(struct kvm_debugregs)))
3408                         break;
3409                 r = 0;
3410                 break;
3411         }
3412         case KVM_SET_DEBUGREGS: {
3413                 struct kvm_debugregs dbgregs;
3414
3415                 r = -EFAULT;
3416                 if (copy_from_user(&dbgregs, argp,
3417                                    sizeof(struct kvm_debugregs)))
3418                         break;
3419
3420                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3421                 break;
3422         }
3423         case KVM_GET_XSAVE: {
3424                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3425                 r = -ENOMEM;
3426                 if (!u.xsave)
3427                         break;
3428
3429                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3430
3431                 r = -EFAULT;
3432                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3433                         break;
3434                 r = 0;
3435                 break;
3436         }
3437         case KVM_SET_XSAVE: {
3438                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3439                 if (IS_ERR(u.xsave))
3440                         return PTR_ERR(u.xsave);
3441
3442                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3443                 break;
3444         }
3445         case KVM_GET_XCRS: {
3446                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3447                 r = -ENOMEM;
3448                 if (!u.xcrs)
3449                         break;
3450
3451                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3452
3453                 r = -EFAULT;
3454                 if (copy_to_user(argp, u.xcrs,
3455                                  sizeof(struct kvm_xcrs)))
3456                         break;
3457                 r = 0;
3458                 break;
3459         }
3460         case KVM_SET_XCRS: {
3461                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3462                 if (IS_ERR(u.xcrs))
3463                         return PTR_ERR(u.xcrs);
3464
3465                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3466                 break;
3467         }
3468         case KVM_SET_TSC_KHZ: {
3469                 u32 user_tsc_khz;
3470
3471                 r = -EINVAL;
3472                 user_tsc_khz = (u32)arg;
3473
3474                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3475                         goto out;
3476
3477                 if (user_tsc_khz == 0)
3478                         user_tsc_khz = tsc_khz;
3479
3480                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3481                         r = 0;
3482
3483                 goto out;
3484         }
3485         case KVM_GET_TSC_KHZ: {
3486                 r = vcpu->arch.virtual_tsc_khz;
3487                 goto out;
3488         }
3489         case KVM_KVMCLOCK_CTRL: {
3490                 r = kvm_set_guest_paused(vcpu);
3491                 goto out;
3492         }
3493         case KVM_ENABLE_CAP: {
3494                 struct kvm_enable_cap cap;
3495
3496                 r = -EFAULT;
3497                 if (copy_from_user(&cap, argp, sizeof(cap)))
3498                         goto out;
3499                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3500                 break;
3501         }
3502         default:
3503                 r = -EINVAL;
3504         }
3505 out:
3506         kfree(u.buffer);
3507         return r;
3508 }
3509
3510 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3511 {
3512         return VM_FAULT_SIGBUS;
3513 }
3514
3515 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3516 {
3517         int ret;
3518
3519         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3520                 return -EINVAL;
3521         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3522         return ret;
3523 }
3524
3525 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3526                                               u64 ident_addr)
3527 {
3528         kvm->arch.ept_identity_map_addr = ident_addr;
3529         return 0;
3530 }
3531
3532 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3533                                           u32 kvm_nr_mmu_pages)
3534 {
3535         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3536                 return -EINVAL;
3537
3538         mutex_lock(&kvm->slots_lock);
3539
3540         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3541         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3542
3543         mutex_unlock(&kvm->slots_lock);
3544         return 0;
3545 }
3546
3547 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3548 {
3549         return kvm->arch.n_max_mmu_pages;
3550 }
3551
3552 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3553 {
3554         int r;
3555
3556         r = 0;
3557         switch (chip->chip_id) {
3558         case KVM_IRQCHIP_PIC_MASTER:
3559                 memcpy(&chip->chip.pic,
3560                         &pic_irqchip(kvm)->pics[0],
3561                         sizeof(struct kvm_pic_state));
3562                 break;
3563         case KVM_IRQCHIP_PIC_SLAVE:
3564                 memcpy(&chip->chip.pic,
3565                         &pic_irqchip(kvm)->pics[1],
3566                         sizeof(struct kvm_pic_state));
3567                 break;
3568         case KVM_IRQCHIP_IOAPIC:
3569                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3570                 break;
3571         default:
3572                 r = -EINVAL;
3573                 break;
3574         }
3575         return r;
3576 }
3577
3578 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3579 {
3580         int r;
3581
3582         r = 0;
3583         switch (chip->chip_id) {
3584         case KVM_IRQCHIP_PIC_MASTER:
3585                 spin_lock(&pic_irqchip(kvm)->lock);
3586                 memcpy(&pic_irqchip(kvm)->pics[0],
3587                         &chip->chip.pic,
3588                         sizeof(struct kvm_pic_state));
3589                 spin_unlock(&pic_irqchip(kvm)->lock);
3590                 break;
3591         case KVM_IRQCHIP_PIC_SLAVE:
3592                 spin_lock(&pic_irqchip(kvm)->lock);
3593                 memcpy(&pic_irqchip(kvm)->pics[1],
3594                         &chip->chip.pic,
3595                         sizeof(struct kvm_pic_state));
3596                 spin_unlock(&pic_irqchip(kvm)->lock);
3597                 break;
3598         case KVM_IRQCHIP_IOAPIC:
3599                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3600                 break;
3601         default:
3602                 r = -EINVAL;
3603                 break;
3604         }
3605         kvm_pic_update_irq(pic_irqchip(kvm));
3606         return r;
3607 }
3608
3609 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3610 {
3611         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3612
3613         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3614
3615         mutex_lock(&kps->lock);
3616         memcpy(ps, &kps->channels, sizeof(*ps));
3617         mutex_unlock(&kps->lock);
3618         return 0;
3619 }
3620
3621 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3622 {
3623         int i;
3624         struct kvm_pit *pit = kvm->arch.vpit;
3625
3626         mutex_lock(&pit->pit_state.lock);
3627         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3628         for (i = 0; i < 3; i++)
3629                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3630         mutex_unlock(&pit->pit_state.lock);
3631         return 0;
3632 }
3633
3634 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3635 {
3636         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3637         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3638                 sizeof(ps->channels));
3639         ps->flags = kvm->arch.vpit->pit_state.flags;
3640         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3641         memset(&ps->reserved, 0, sizeof(ps->reserved));
3642         return 0;
3643 }
3644
3645 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3646 {
3647         int start = 0;
3648         int i;
3649         u32 prev_legacy, cur_legacy;
3650         struct kvm_pit *pit = kvm->arch.vpit;
3651
3652         mutex_lock(&pit->pit_state.lock);
3653         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3654         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3655         if (!prev_legacy && cur_legacy)
3656                 start = 1;
3657         memcpy(&pit->pit_state.channels, &ps->channels,
3658                sizeof(pit->pit_state.channels));
3659         pit->pit_state.flags = ps->flags;
3660         for (i = 0; i < 3; i++)
3661                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3662                                    start && i == 0);
3663         mutex_unlock(&pit->pit_state.lock);
3664         return 0;
3665 }
3666
3667 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3668                                  struct kvm_reinject_control *control)
3669 {
3670         struct kvm_pit *pit = kvm->arch.vpit;
3671
3672         if (!pit)
3673                 return -ENXIO;
3674
3675         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3676          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3677          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3678          */
3679         mutex_lock(&pit->pit_state.lock);
3680         kvm_pit_set_reinject(pit, control->pit_reinject);
3681         mutex_unlock(&pit->pit_state.lock);
3682
3683         return 0;
3684 }
3685
3686 /**
3687  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3688  * @kvm: kvm instance
3689  * @log: slot id and address to which we copy the log
3690  *
3691  * Steps 1-4 below provide general overview of dirty page logging. See
3692  * kvm_get_dirty_log_protect() function description for additional details.
3693  *
3694  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3695  * always flush the TLB (step 4) even if previous step failed  and the dirty
3696  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3697  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3698  * writes will be marked dirty for next log read.
3699  *
3700  *   1. Take a snapshot of the bit and clear it if needed.
3701  *   2. Write protect the corresponding page.
3702  *   3. Copy the snapshot to the userspace.
3703  *   4. Flush TLB's if needed.
3704  */
3705 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3706 {
3707         bool is_dirty = false;
3708         int r;
3709
3710         mutex_lock(&kvm->slots_lock);
3711
3712         /*
3713          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3714          */
3715         if (kvm_x86_ops->flush_log_dirty)
3716                 kvm_x86_ops->flush_log_dirty(kvm);
3717
3718         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3719
3720         /*
3721          * All the TLBs can be flushed out of mmu lock, see the comments in
3722          * kvm_mmu_slot_remove_write_access().
3723          */
3724         lockdep_assert_held(&kvm->slots_lock);
3725         if (is_dirty)
3726                 kvm_flush_remote_tlbs(kvm);
3727
3728         mutex_unlock(&kvm->slots_lock);
3729         return r;
3730 }
3731
3732 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3733                         bool line_status)
3734 {
3735         if (!irqchip_in_kernel(kvm))
3736                 return -ENXIO;
3737
3738         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3739                                         irq_event->irq, irq_event->level,
3740                                         line_status);
3741         return 0;
3742 }
3743
3744 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3745                                    struct kvm_enable_cap *cap)
3746 {
3747         int r;
3748
3749         if (cap->flags)
3750                 return -EINVAL;
3751
3752         switch (cap->cap) {
3753         case KVM_CAP_DISABLE_QUIRKS:
3754                 kvm->arch.disabled_quirks = cap->args[0];
3755                 r = 0;
3756                 break;
3757         case KVM_CAP_SPLIT_IRQCHIP: {
3758                 mutex_lock(&kvm->lock);
3759                 r = -EINVAL;
3760                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3761                         goto split_irqchip_unlock;
3762                 r = -EEXIST;
3763                 if (irqchip_in_kernel(kvm))
3764                         goto split_irqchip_unlock;
3765                 if (atomic_read(&kvm->online_vcpus))
3766                         goto split_irqchip_unlock;
3767                 r = kvm_setup_empty_irq_routing(kvm);
3768                 if (r)
3769                         goto split_irqchip_unlock;
3770                 /* Pairs with irqchip_in_kernel. */
3771                 smp_wmb();
3772                 kvm->arch.irqchip_split = true;
3773                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3774                 r = 0;
3775 split_irqchip_unlock:
3776                 mutex_unlock(&kvm->lock);
3777                 break;
3778         }
3779         default:
3780                 r = -EINVAL;
3781                 break;
3782         }
3783         return r;
3784 }
3785
3786 long kvm_arch_vm_ioctl(struct file *filp,
3787                        unsigned int ioctl, unsigned long arg)
3788 {
3789         struct kvm *kvm = filp->private_data;
3790         void __user *argp = (void __user *)arg;
3791         int r = -ENOTTY;
3792         /*
3793          * This union makes it completely explicit to gcc-3.x
3794          * that these two variables' stack usage should be
3795          * combined, not added together.
3796          */
3797         union {
3798                 struct kvm_pit_state ps;
3799                 struct kvm_pit_state2 ps2;
3800                 struct kvm_pit_config pit_config;
3801         } u;
3802
3803         switch (ioctl) {
3804         case KVM_SET_TSS_ADDR:
3805                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3806                 break;
3807         case KVM_SET_IDENTITY_MAP_ADDR: {
3808                 u64 ident_addr;
3809
3810                 r = -EFAULT;
3811                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3812                         goto out;
3813                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3814                 break;
3815         }
3816         case KVM_SET_NR_MMU_PAGES:
3817                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3818                 break;
3819         case KVM_GET_NR_MMU_PAGES:
3820                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3821                 break;
3822         case KVM_CREATE_IRQCHIP: {
3823                 struct kvm_pic *vpic;
3824
3825                 mutex_lock(&kvm->lock);
3826                 r = -EEXIST;
3827                 if (kvm->arch.vpic)
3828                         goto create_irqchip_unlock;
3829                 r = -EINVAL;
3830                 if (atomic_read(&kvm->online_vcpus))
3831                         goto create_irqchip_unlock;
3832                 r = -ENOMEM;
3833                 vpic = kvm_create_pic(kvm);
3834                 if (vpic) {
3835                         r = kvm_ioapic_init(kvm);
3836                         if (r) {
3837                                 mutex_lock(&kvm->slots_lock);
3838                                 kvm_destroy_pic(vpic);
3839                                 mutex_unlock(&kvm->slots_lock);
3840                                 goto create_irqchip_unlock;
3841                         }
3842                 } else
3843                         goto create_irqchip_unlock;
3844                 r = kvm_setup_default_irq_routing(kvm);
3845                 if (r) {
3846                         mutex_lock(&kvm->slots_lock);
3847                         mutex_lock(&kvm->irq_lock);
3848                         kvm_ioapic_destroy(kvm);
3849                         kvm_destroy_pic(vpic);
3850                         mutex_unlock(&kvm->irq_lock);
3851                         mutex_unlock(&kvm->slots_lock);
3852                         goto create_irqchip_unlock;
3853                 }
3854                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3855                 smp_wmb();
3856                 kvm->arch.vpic = vpic;
3857         create_irqchip_unlock:
3858                 mutex_unlock(&kvm->lock);
3859                 break;
3860         }
3861         case KVM_CREATE_PIT:
3862                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3863                 goto create_pit;
3864         case KVM_CREATE_PIT2:
3865                 r = -EFAULT;
3866                 if (copy_from_user(&u.pit_config, argp,
3867                                    sizeof(struct kvm_pit_config)))
3868                         goto out;
3869         create_pit:
3870                 mutex_lock(&kvm->slots_lock);
3871                 r = -EEXIST;
3872                 if (kvm->arch.vpit)
3873                         goto create_pit_unlock;
3874                 r = -ENOMEM;
3875                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3876                 if (kvm->arch.vpit)
3877                         r = 0;
3878         create_pit_unlock:
3879                 mutex_unlock(&kvm->slots_lock);
3880                 break;
3881         case KVM_GET_IRQCHIP: {
3882                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3883                 struct kvm_irqchip *chip;
3884
3885                 chip = memdup_user(argp, sizeof(*chip));
3886                 if (IS_ERR(chip)) {
3887                         r = PTR_ERR(chip);
3888                         goto out;
3889                 }
3890
3891                 r = -ENXIO;
3892                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3893                         goto get_irqchip_out;
3894                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3895                 if (r)
3896                         goto get_irqchip_out;
3897                 r = -EFAULT;
3898                 if (copy_to_user(argp, chip, sizeof *chip))
3899                         goto get_irqchip_out;
3900                 r = 0;
3901         get_irqchip_out:
3902                 kfree(chip);
3903                 break;
3904         }
3905         case KVM_SET_IRQCHIP: {
3906                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3907                 struct kvm_irqchip *chip;
3908
3909                 chip = memdup_user(argp, sizeof(*chip));
3910                 if (IS_ERR(chip)) {
3911                         r = PTR_ERR(chip);
3912                         goto out;
3913                 }
3914
3915                 r = -ENXIO;
3916                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3917                         goto set_irqchip_out;
3918                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3919                 if (r)
3920                         goto set_irqchip_out;
3921                 r = 0;
3922         set_irqchip_out:
3923                 kfree(chip);
3924                 break;
3925         }
3926         case KVM_GET_PIT: {
3927                 r = -EFAULT;
3928                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3929                         goto out;
3930                 r = -ENXIO;
3931                 if (!kvm->arch.vpit)
3932                         goto out;
3933                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3934                 if (r)
3935                         goto out;
3936                 r = -EFAULT;
3937                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3938                         goto out;
3939                 r = 0;
3940                 break;
3941         }
3942         case KVM_SET_PIT: {
3943                 r = -EFAULT;
3944                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3945                         goto out;
3946                 r = -ENXIO;
3947                 if (!kvm->arch.vpit)
3948                         goto out;
3949                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3950                 break;
3951         }
3952         case KVM_GET_PIT2: {
3953                 r = -ENXIO;
3954                 if (!kvm->arch.vpit)
3955                         goto out;
3956                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3957                 if (r)
3958                         goto out;
3959                 r = -EFAULT;
3960                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3961                         goto out;
3962                 r = 0;
3963                 break;
3964         }
3965         case KVM_SET_PIT2: {
3966                 r = -EFAULT;
3967                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3968                         goto out;
3969                 r = -ENXIO;
3970                 if (!kvm->arch.vpit)
3971                         goto out;
3972                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3973                 break;
3974         }
3975         case KVM_REINJECT_CONTROL: {
3976                 struct kvm_reinject_control control;
3977                 r =  -EFAULT;
3978                 if (copy_from_user(&control, argp, sizeof(control)))
3979                         goto out;
3980                 r = kvm_vm_ioctl_reinject(kvm, &control);
3981                 break;
3982         }
3983         case KVM_SET_BOOT_CPU_ID:
3984                 r = 0;
3985                 mutex_lock(&kvm->lock);
3986                 if (atomic_read(&kvm->online_vcpus) != 0)
3987                         r = -EBUSY;
3988                 else
3989                         kvm->arch.bsp_vcpu_id = arg;
3990                 mutex_unlock(&kvm->lock);
3991                 break;
3992         case KVM_XEN_HVM_CONFIG: {
3993                 r = -EFAULT;
3994                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3995                                    sizeof(struct kvm_xen_hvm_config)))
3996                         goto out;
3997                 r = -EINVAL;
3998                 if (kvm->arch.xen_hvm_config.flags)
3999                         goto out;
4000                 r = 0;
4001                 break;
4002         }
4003         case KVM_SET_CLOCK: {
4004                 struct kvm_clock_data user_ns;
4005                 u64 now_ns;
4006                 s64 delta;
4007
4008                 r = -EFAULT;
4009                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4010                         goto out;
4011
4012                 r = -EINVAL;
4013                 if (user_ns.flags)
4014                         goto out;
4015
4016                 r = 0;
4017                 local_irq_disable();
4018                 now_ns = get_kernel_ns();
4019                 delta = user_ns.clock - now_ns;
4020                 local_irq_enable();
4021                 kvm->arch.kvmclock_offset = delta;
4022                 kvm_gen_update_masterclock(kvm);
4023                 break;
4024         }
4025         case KVM_GET_CLOCK: {
4026                 struct kvm_clock_data user_ns;
4027                 u64 now_ns;
4028
4029                 local_irq_disable();
4030                 now_ns = get_kernel_ns();
4031                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
4032                 local_irq_enable();
4033                 user_ns.flags = 0;
4034                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4035
4036                 r = -EFAULT;
4037                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4038                         goto out;
4039                 r = 0;
4040                 break;
4041         }
4042         case KVM_ENABLE_CAP: {
4043                 struct kvm_enable_cap cap;
4044
4045                 r = -EFAULT;
4046                 if (copy_from_user(&cap, argp, sizeof(cap)))
4047                         goto out;
4048                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4049                 break;
4050         }
4051         default:
4052                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4053         }
4054 out:
4055         return r;
4056 }
4057
4058 static void kvm_init_msr_list(void)
4059 {
4060         u32 dummy[2];
4061         unsigned i, j;
4062
4063         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4064                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4065                         continue;
4066
4067                 /*
4068                  * Even MSRs that are valid in the host may not be exposed
4069                  * to the guests in some cases.
4070                  */
4071                 switch (msrs_to_save[i]) {
4072                 case MSR_IA32_BNDCFGS:
4073                         if (!kvm_x86_ops->mpx_supported())
4074                                 continue;
4075                         break;
4076                 case MSR_TSC_AUX:
4077                         if (!kvm_x86_ops->rdtscp_supported())
4078                                 continue;
4079                         break;
4080                 default:
4081                         break;
4082                 }
4083
4084                 if (j < i)
4085                         msrs_to_save[j] = msrs_to_save[i];
4086                 j++;
4087         }
4088         num_msrs_to_save = j;
4089
4090         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4091                 switch (emulated_msrs[i]) {
4092                 case MSR_IA32_SMBASE:
4093                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4094                                 continue;
4095                         break;
4096                 default:
4097                         break;
4098                 }
4099
4100                 if (j < i)
4101                         emulated_msrs[j] = emulated_msrs[i];
4102                 j++;
4103         }
4104         num_emulated_msrs = j;
4105 }
4106
4107 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4108                            const void *v)
4109 {
4110         int handled = 0;
4111         int n;
4112
4113         do {
4114                 n = min(len, 8);
4115                 if (!(lapic_in_kernel(vcpu) &&
4116                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4117                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4118                         break;
4119                 handled += n;
4120                 addr += n;
4121                 len -= n;
4122                 v += n;
4123         } while (len);
4124
4125         return handled;
4126 }
4127
4128 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4129 {
4130         int handled = 0;
4131         int n;
4132
4133         do {
4134                 n = min(len, 8);
4135                 if (!(lapic_in_kernel(vcpu) &&
4136                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4137                                          addr, n, v))
4138                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4139                         break;
4140                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4141                 handled += n;
4142                 addr += n;
4143                 len -= n;
4144                 v += n;
4145         } while (len);
4146
4147         return handled;
4148 }
4149
4150 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4151                         struct kvm_segment *var, int seg)
4152 {
4153         kvm_x86_ops->set_segment(vcpu, var, seg);
4154 }
4155
4156 void kvm_get_segment(struct kvm_vcpu *vcpu,
4157                      struct kvm_segment *var, int seg)
4158 {
4159         kvm_x86_ops->get_segment(vcpu, var, seg);
4160 }
4161
4162 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4163                            struct x86_exception *exception)
4164 {
4165         gpa_t t_gpa;
4166
4167         BUG_ON(!mmu_is_nested(vcpu));
4168
4169         /* NPT walks are always user-walks */
4170         access |= PFERR_USER_MASK;
4171         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4172
4173         return t_gpa;
4174 }
4175
4176 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4177                               struct x86_exception *exception)
4178 {
4179         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4180         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4181 }
4182
4183  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4184                                 struct x86_exception *exception)
4185 {
4186         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4187         access |= PFERR_FETCH_MASK;
4188         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4189 }
4190
4191 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4192                                struct x86_exception *exception)
4193 {
4194         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4195         access |= PFERR_WRITE_MASK;
4196         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4197 }
4198
4199 /* uses this to access any guest's mapped memory without checking CPL */
4200 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4201                                 struct x86_exception *exception)
4202 {
4203         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4204 }
4205
4206 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4207                                       struct kvm_vcpu *vcpu, u32 access,
4208                                       struct x86_exception *exception)
4209 {
4210         void *data = val;
4211         int r = X86EMUL_CONTINUE;
4212
4213         while (bytes) {
4214                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4215                                                             exception);
4216                 unsigned offset = addr & (PAGE_SIZE-1);
4217                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4218                 int ret;
4219
4220                 if (gpa == UNMAPPED_GVA)
4221                         return X86EMUL_PROPAGATE_FAULT;
4222                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4223                                                offset, toread);
4224                 if (ret < 0) {
4225                         r = X86EMUL_IO_NEEDED;
4226                         goto out;
4227                 }
4228
4229                 bytes -= toread;
4230                 data += toread;
4231                 addr += toread;
4232         }
4233 out:
4234         return r;
4235 }
4236
4237 /* used for instruction fetching */
4238 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4239                                 gva_t addr, void *val, unsigned int bytes,
4240                                 struct x86_exception *exception)
4241 {
4242         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4243         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4244         unsigned offset;
4245         int ret;
4246
4247         /* Inline kvm_read_guest_virt_helper for speed.  */
4248         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4249                                                     exception);
4250         if (unlikely(gpa == UNMAPPED_GVA))
4251                 return X86EMUL_PROPAGATE_FAULT;
4252
4253         offset = addr & (PAGE_SIZE-1);
4254         if (WARN_ON(offset + bytes > PAGE_SIZE))
4255                 bytes = (unsigned)PAGE_SIZE - offset;
4256         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4257                                        offset, bytes);
4258         if (unlikely(ret < 0))
4259                 return X86EMUL_IO_NEEDED;
4260
4261         return X86EMUL_CONTINUE;
4262 }
4263
4264 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4265                                gva_t addr, void *val, unsigned int bytes,
4266                                struct x86_exception *exception)
4267 {
4268         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4269         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4270
4271         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4272                                           exception);
4273 }
4274 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4275
4276 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4277                                       gva_t addr, void *val, unsigned int bytes,
4278                                       struct x86_exception *exception)
4279 {
4280         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4281         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4282 }
4283
4284 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4285                 unsigned long addr, void *val, unsigned int bytes)
4286 {
4287         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4288         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4289
4290         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4291 }
4292
4293 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4294                                        gva_t addr, void *val,
4295                                        unsigned int bytes,
4296                                        struct x86_exception *exception)
4297 {
4298         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4299         void *data = val;
4300         int r = X86EMUL_CONTINUE;
4301
4302         while (bytes) {
4303                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4304                                                              PFERR_WRITE_MASK,
4305                                                              exception);
4306                 unsigned offset = addr & (PAGE_SIZE-1);
4307                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4308                 int ret;
4309
4310                 if (gpa == UNMAPPED_GVA)
4311                         return X86EMUL_PROPAGATE_FAULT;
4312                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4313                 if (ret < 0) {
4314                         r = X86EMUL_IO_NEEDED;
4315                         goto out;
4316                 }
4317
4318                 bytes -= towrite;
4319                 data += towrite;
4320                 addr += towrite;
4321         }
4322 out:
4323         return r;
4324 }
4325 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4326
4327 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4328                                 gpa_t *gpa, struct x86_exception *exception,
4329                                 bool write)
4330 {
4331         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4332                 | (write ? PFERR_WRITE_MASK : 0);
4333
4334         /*
4335          * currently PKRU is only applied to ept enabled guest so
4336          * there is no pkey in EPT page table for L1 guest or EPT
4337          * shadow page table for L2 guest.
4338          */
4339         if (vcpu_match_mmio_gva(vcpu, gva)
4340             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4341                                  vcpu->arch.access, 0, access)) {
4342                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4343                                         (gva & (PAGE_SIZE - 1));
4344                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4345                 return 1;
4346         }
4347
4348         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4349
4350         if (*gpa == UNMAPPED_GVA)
4351                 return -1;
4352
4353         /* For APIC access vmexit */
4354         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4355                 return 1;
4356
4357         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4358                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4359                 return 1;
4360         }
4361
4362         return 0;
4363 }
4364
4365 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4366                         const void *val, int bytes)
4367 {
4368         int ret;
4369
4370         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4371         if (ret < 0)
4372                 return 0;
4373         kvm_page_track_write(vcpu, gpa, val, bytes);
4374         return 1;
4375 }
4376
4377 struct read_write_emulator_ops {
4378         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4379                                   int bytes);
4380         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4381                                   void *val, int bytes);
4382         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4383                                int bytes, void *val);
4384         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4385                                     void *val, int bytes);
4386         bool write;
4387 };
4388
4389 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4390 {
4391         if (vcpu->mmio_read_completed) {
4392                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4393                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4394                 vcpu->mmio_read_completed = 0;
4395                 return 1;
4396         }
4397
4398         return 0;
4399 }
4400
4401 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4402                         void *val, int bytes)
4403 {
4404         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4405 }
4406
4407 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4408                          void *val, int bytes)
4409 {
4410         return emulator_write_phys(vcpu, gpa, val, bytes);
4411 }
4412
4413 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4414 {
4415         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4416         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4417 }
4418
4419 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4420                           void *val, int bytes)
4421 {
4422         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4423         return X86EMUL_IO_NEEDED;
4424 }
4425
4426 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4427                            void *val, int bytes)
4428 {
4429         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4430
4431         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4432         return X86EMUL_CONTINUE;
4433 }
4434
4435 static const struct read_write_emulator_ops read_emultor = {
4436         .read_write_prepare = read_prepare,
4437         .read_write_emulate = read_emulate,
4438         .read_write_mmio = vcpu_mmio_read,
4439         .read_write_exit_mmio = read_exit_mmio,
4440 };
4441
4442 static const struct read_write_emulator_ops write_emultor = {
4443         .read_write_emulate = write_emulate,
4444         .read_write_mmio = write_mmio,
4445         .read_write_exit_mmio = write_exit_mmio,
4446         .write = true,
4447 };
4448
4449 static int emulator_read_write_onepage(unsigned long addr, void *val,
4450                                        unsigned int bytes,
4451                                        struct x86_exception *exception,
4452                                        struct kvm_vcpu *vcpu,
4453                                        const struct read_write_emulator_ops *ops)
4454 {
4455         gpa_t gpa;
4456         int handled, ret;
4457         bool write = ops->write;
4458         struct kvm_mmio_fragment *frag;
4459
4460         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4461
4462         if (ret < 0)
4463                 return X86EMUL_PROPAGATE_FAULT;
4464
4465         /* For APIC access vmexit */
4466         if (ret)
4467                 goto mmio;
4468
4469         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4470                 return X86EMUL_CONTINUE;
4471
4472 mmio:
4473         /*
4474          * Is this MMIO handled locally?
4475          */
4476         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4477         if (handled == bytes)
4478                 return X86EMUL_CONTINUE;
4479
4480         gpa += handled;
4481         bytes -= handled;
4482         val += handled;
4483
4484         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4485         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4486         frag->gpa = gpa;
4487         frag->data = val;
4488         frag->len = bytes;
4489         return X86EMUL_CONTINUE;
4490 }
4491
4492 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4493                         unsigned long addr,
4494                         void *val, unsigned int bytes,
4495                         struct x86_exception *exception,
4496                         const struct read_write_emulator_ops *ops)
4497 {
4498         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4499         gpa_t gpa;
4500         int rc;
4501
4502         if (ops->read_write_prepare &&
4503                   ops->read_write_prepare(vcpu, val, bytes))
4504                 return X86EMUL_CONTINUE;
4505
4506         vcpu->mmio_nr_fragments = 0;
4507
4508         /* Crossing a page boundary? */
4509         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4510                 int now;
4511
4512                 now = -addr & ~PAGE_MASK;
4513                 rc = emulator_read_write_onepage(addr, val, now, exception,
4514                                                  vcpu, ops);
4515
4516                 if (rc != X86EMUL_CONTINUE)
4517                         return rc;
4518                 addr += now;
4519                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4520                         addr = (u32)addr;
4521                 val += now;
4522                 bytes -= now;
4523         }
4524
4525         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4526                                          vcpu, ops);
4527         if (rc != X86EMUL_CONTINUE)
4528                 return rc;
4529
4530         if (!vcpu->mmio_nr_fragments)
4531                 return rc;
4532
4533         gpa = vcpu->mmio_fragments[0].gpa;
4534
4535         vcpu->mmio_needed = 1;
4536         vcpu->mmio_cur_fragment = 0;
4537
4538         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4539         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4540         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4541         vcpu->run->mmio.phys_addr = gpa;
4542
4543         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4544 }
4545
4546 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4547                                   unsigned long addr,
4548                                   void *val,
4549                                   unsigned int bytes,
4550                                   struct x86_exception *exception)
4551 {
4552         return emulator_read_write(ctxt, addr, val, bytes,
4553                                    exception, &read_emultor);
4554 }
4555
4556 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4557                             unsigned long addr,
4558                             const void *val,
4559                             unsigned int bytes,
4560                             struct x86_exception *exception)
4561 {
4562         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4563                                    exception, &write_emultor);
4564 }
4565
4566 #define CMPXCHG_TYPE(t, ptr, old, new) \
4567         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4568
4569 #ifdef CONFIG_X86_64
4570 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4571 #else
4572 #  define CMPXCHG64(ptr, old, new) \
4573         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4574 #endif
4575
4576 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4577                                      unsigned long addr,
4578                                      const void *old,
4579                                      const void *new,
4580                                      unsigned int bytes,
4581                                      struct x86_exception *exception)
4582 {
4583         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4584         gpa_t gpa;
4585         struct page *page;
4586         char *kaddr;
4587         bool exchanged;
4588
4589         /* guests cmpxchg8b have to be emulated atomically */
4590         if (bytes > 8 || (bytes & (bytes - 1)))
4591                 goto emul_write;
4592
4593         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4594
4595         if (gpa == UNMAPPED_GVA ||
4596             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4597                 goto emul_write;
4598
4599         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4600                 goto emul_write;
4601
4602         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4603         if (is_error_page(page))
4604                 goto emul_write;
4605
4606         kaddr = kmap_atomic(page);
4607         kaddr += offset_in_page(gpa);
4608         switch (bytes) {
4609         case 1:
4610                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4611                 break;
4612         case 2:
4613                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4614                 break;
4615         case 4:
4616                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4617                 break;
4618         case 8:
4619                 exchanged = CMPXCHG64(kaddr, old, new);
4620                 break;
4621         default:
4622                 BUG();
4623         }
4624         kunmap_atomic(kaddr);
4625         kvm_release_page_dirty(page);
4626
4627         if (!exchanged)
4628                 return X86EMUL_CMPXCHG_FAILED;
4629
4630         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4631         kvm_page_track_write(vcpu, gpa, new, bytes);
4632
4633         return X86EMUL_CONTINUE;
4634
4635 emul_write:
4636         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4637
4638         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4639 }
4640
4641 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4642 {
4643         /* TODO: String I/O for in kernel device */
4644         int r;
4645
4646         if (vcpu->arch.pio.in)
4647                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4648                                     vcpu->arch.pio.size, pd);
4649         else
4650                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4651                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4652                                      pd);
4653         return r;
4654 }
4655
4656 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4657                                unsigned short port, void *val,
4658                                unsigned int count, bool in)
4659 {
4660         vcpu->arch.pio.port = port;
4661         vcpu->arch.pio.in = in;
4662         vcpu->arch.pio.count  = count;
4663         vcpu->arch.pio.size = size;
4664
4665         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4666                 vcpu->arch.pio.count = 0;
4667                 return 1;
4668         }
4669
4670         vcpu->run->exit_reason = KVM_EXIT_IO;
4671         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4672         vcpu->run->io.size = size;
4673         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4674         vcpu->run->io.count = count;
4675         vcpu->run->io.port = port;
4676
4677         return 0;
4678 }
4679
4680 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4681                                     int size, unsigned short port, void *val,
4682                                     unsigned int count)
4683 {
4684         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4685         int ret;
4686
4687         if (vcpu->arch.pio.count)
4688                 goto data_avail;
4689
4690         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4691         if (ret) {
4692 data_avail:
4693                 memcpy(val, vcpu->arch.pio_data, size * count);
4694                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4695                 vcpu->arch.pio.count = 0;
4696                 return 1;
4697         }
4698
4699         return 0;
4700 }
4701
4702 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4703                                      int size, unsigned short port,
4704                                      const void *val, unsigned int count)
4705 {
4706         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4707
4708         memcpy(vcpu->arch.pio_data, val, size * count);
4709         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4710         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4711 }
4712
4713 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4714 {
4715         return kvm_x86_ops->get_segment_base(vcpu, seg);
4716 }
4717
4718 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4719 {
4720         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4721 }
4722
4723 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4724 {
4725         if (!need_emulate_wbinvd(vcpu))
4726                 return X86EMUL_CONTINUE;
4727
4728         if (kvm_x86_ops->has_wbinvd_exit()) {
4729                 int cpu = get_cpu();
4730
4731                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4732                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4733                                 wbinvd_ipi, NULL, 1);
4734                 put_cpu();
4735                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4736         } else
4737                 wbinvd();
4738         return X86EMUL_CONTINUE;
4739 }
4740
4741 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4742 {
4743         kvm_x86_ops->skip_emulated_instruction(vcpu);
4744         return kvm_emulate_wbinvd_noskip(vcpu);
4745 }
4746 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4747
4748
4749
4750 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4751 {
4752         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4753 }
4754
4755 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4756                            unsigned long *dest)
4757 {
4758         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4759 }
4760
4761 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4762                            unsigned long value)
4763 {
4764
4765         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4766 }
4767
4768 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4769 {
4770         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4771 }
4772
4773 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4774 {
4775         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4776         unsigned long value;
4777
4778         switch (cr) {
4779         case 0:
4780                 value = kvm_read_cr0(vcpu);
4781                 break;
4782         case 2:
4783                 value = vcpu->arch.cr2;
4784                 break;
4785         case 3:
4786                 value = kvm_read_cr3(vcpu);
4787                 break;
4788         case 4:
4789                 value = kvm_read_cr4(vcpu);
4790                 break;
4791         case 8:
4792                 value = kvm_get_cr8(vcpu);
4793                 break;
4794         default:
4795                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4796                 return 0;
4797         }
4798
4799         return value;
4800 }
4801
4802 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4803 {
4804         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4805         int res = 0;
4806
4807         switch (cr) {
4808         case 0:
4809                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4810                 break;
4811         case 2:
4812                 vcpu->arch.cr2 = val;
4813                 break;
4814         case 3:
4815                 res = kvm_set_cr3(vcpu, val);
4816                 break;
4817         case 4:
4818                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4819                 break;
4820         case 8:
4821                 res = kvm_set_cr8(vcpu, val);
4822                 break;
4823         default:
4824                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4825                 res = -1;
4826         }
4827
4828         return res;
4829 }
4830
4831 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4832 {
4833         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4834 }
4835
4836 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4837 {
4838         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4839 }
4840
4841 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4842 {
4843         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4844 }
4845
4846 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4847 {
4848         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4849 }
4850
4851 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4852 {
4853         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4854 }
4855
4856 static unsigned long emulator_get_cached_segment_base(
4857         struct x86_emulate_ctxt *ctxt, int seg)
4858 {
4859         return get_segment_base(emul_to_vcpu(ctxt), seg);
4860 }
4861
4862 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4863                                  struct desc_struct *desc, u32 *base3,
4864                                  int seg)
4865 {
4866         struct kvm_segment var;
4867
4868         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4869         *selector = var.selector;
4870
4871         if (var.unusable) {
4872                 memset(desc, 0, sizeof(*desc));
4873                 return false;
4874         }
4875
4876         if (var.g)
4877                 var.limit >>= 12;
4878         set_desc_limit(desc, var.limit);
4879         set_desc_base(desc, (unsigned long)var.base);
4880 #ifdef CONFIG_X86_64
4881         if (base3)
4882                 *base3 = var.base >> 32;
4883 #endif
4884         desc->type = var.type;
4885         desc->s = var.s;
4886         desc->dpl = var.dpl;
4887         desc->p = var.present;
4888         desc->avl = var.avl;
4889         desc->l = var.l;
4890         desc->d = var.db;
4891         desc->g = var.g;
4892
4893         return true;
4894 }
4895
4896 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4897                                  struct desc_struct *desc, u32 base3,
4898                                  int seg)
4899 {
4900         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4901         struct kvm_segment var;
4902
4903         var.selector = selector;
4904         var.base = get_desc_base(desc);
4905 #ifdef CONFIG_X86_64
4906         var.base |= ((u64)base3) << 32;
4907 #endif
4908         var.limit = get_desc_limit(desc);
4909         if (desc->g)
4910                 var.limit = (var.limit << 12) | 0xfff;
4911         var.type = desc->type;
4912         var.dpl = desc->dpl;
4913         var.db = desc->d;
4914         var.s = desc->s;
4915         var.l = desc->l;
4916         var.g = desc->g;
4917         var.avl = desc->avl;
4918         var.present = desc->p;
4919         var.unusable = !var.present;
4920         var.padding = 0;
4921
4922         kvm_set_segment(vcpu, &var, seg);
4923         return;
4924 }
4925
4926 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4927                             u32 msr_index, u64 *pdata)
4928 {
4929         struct msr_data msr;
4930         int r;
4931
4932         msr.index = msr_index;
4933         msr.host_initiated = false;
4934         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4935         if (r)
4936                 return r;
4937
4938         *pdata = msr.data;
4939         return 0;
4940 }
4941
4942 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4943                             u32 msr_index, u64 data)
4944 {
4945         struct msr_data msr;
4946
4947         msr.data = data;
4948         msr.index = msr_index;
4949         msr.host_initiated = false;
4950         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4951 }
4952
4953 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4954 {
4955         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4956
4957         return vcpu->arch.smbase;
4958 }
4959
4960 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4961 {
4962         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4963
4964         vcpu->arch.smbase = smbase;
4965 }
4966
4967 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4968                               u32 pmc)
4969 {
4970         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4971 }
4972
4973 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4974                              u32 pmc, u64 *pdata)
4975 {
4976         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4977 }
4978
4979 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4980 {
4981         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4982 }
4983
4984 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4985 {
4986         preempt_disable();
4987         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4988         /*
4989          * CR0.TS may reference the host fpu state, not the guest fpu state,
4990          * so it may be clear at this point.
4991          */
4992         clts();
4993 }
4994
4995 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4996 {
4997         preempt_enable();
4998 }
4999
5000 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5001                               struct x86_instruction_info *info,
5002                               enum x86_intercept_stage stage)
5003 {
5004         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5005 }
5006
5007 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5008                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5009 {
5010         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5011 }
5012
5013 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5014 {
5015         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5016 }
5017
5018 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5019 {
5020         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5021 }
5022
5023 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5024 {
5025         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5026 }
5027
5028 static const struct x86_emulate_ops emulate_ops = {
5029         .read_gpr            = emulator_read_gpr,
5030         .write_gpr           = emulator_write_gpr,
5031         .read_std            = kvm_read_guest_virt_system,
5032         .write_std           = kvm_write_guest_virt_system,
5033         .read_phys           = kvm_read_guest_phys_system,
5034         .fetch               = kvm_fetch_guest_virt,
5035         .read_emulated       = emulator_read_emulated,
5036         .write_emulated      = emulator_write_emulated,
5037         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5038         .invlpg              = emulator_invlpg,
5039         .pio_in_emulated     = emulator_pio_in_emulated,
5040         .pio_out_emulated    = emulator_pio_out_emulated,
5041         .get_segment         = emulator_get_segment,
5042         .set_segment         = emulator_set_segment,
5043         .get_cached_segment_base = emulator_get_cached_segment_base,
5044         .get_gdt             = emulator_get_gdt,
5045         .get_idt             = emulator_get_idt,
5046         .set_gdt             = emulator_set_gdt,
5047         .set_idt             = emulator_set_idt,
5048         .get_cr              = emulator_get_cr,
5049         .set_cr              = emulator_set_cr,
5050         .cpl                 = emulator_get_cpl,
5051         .get_dr              = emulator_get_dr,
5052         .set_dr              = emulator_set_dr,
5053         .get_smbase          = emulator_get_smbase,
5054         .set_smbase          = emulator_set_smbase,
5055         .set_msr             = emulator_set_msr,
5056         .get_msr             = emulator_get_msr,
5057         .check_pmc           = emulator_check_pmc,
5058         .read_pmc            = emulator_read_pmc,
5059         .halt                = emulator_halt,
5060         .wbinvd              = emulator_wbinvd,
5061         .fix_hypercall       = emulator_fix_hypercall,
5062         .get_fpu             = emulator_get_fpu,
5063         .put_fpu             = emulator_put_fpu,
5064         .intercept           = emulator_intercept,
5065         .get_cpuid           = emulator_get_cpuid,
5066         .set_nmi_mask        = emulator_set_nmi_mask,
5067 };
5068
5069 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5070 {
5071         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5072         /*
5073          * an sti; sti; sequence only disable interrupts for the first
5074          * instruction. So, if the last instruction, be it emulated or
5075          * not, left the system with the INT_STI flag enabled, it
5076          * means that the last instruction is an sti. We should not
5077          * leave the flag on in this case. The same goes for mov ss
5078          */
5079         if (int_shadow & mask)
5080                 mask = 0;
5081         if (unlikely(int_shadow || mask)) {
5082                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5083                 if (!mask)
5084                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5085         }
5086 }
5087
5088 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5089 {
5090         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5091         if (ctxt->exception.vector == PF_VECTOR)
5092                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5093
5094         if (ctxt->exception.error_code_valid)
5095                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5096                                       ctxt->exception.error_code);
5097         else
5098                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5099         return false;
5100 }
5101
5102 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5103 {
5104         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5105         int cs_db, cs_l;
5106
5107         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5108
5109         ctxt->eflags = kvm_get_rflags(vcpu);
5110         ctxt->eip = kvm_rip_read(vcpu);
5111         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5112                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5113                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5114                      cs_db                              ? X86EMUL_MODE_PROT32 :
5115                                                           X86EMUL_MODE_PROT16;
5116         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5117         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5118         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5119         ctxt->emul_flags = vcpu->arch.hflags;
5120
5121         init_decode_cache(ctxt);
5122         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5123 }
5124
5125 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5126 {
5127         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5128         int ret;
5129
5130         init_emulate_ctxt(vcpu);
5131
5132         ctxt->op_bytes = 2;
5133         ctxt->ad_bytes = 2;
5134         ctxt->_eip = ctxt->eip + inc_eip;
5135         ret = emulate_int_real(ctxt, irq);
5136
5137         if (ret != X86EMUL_CONTINUE)
5138                 return EMULATE_FAIL;
5139
5140         ctxt->eip = ctxt->_eip;
5141         kvm_rip_write(vcpu, ctxt->eip);
5142         kvm_set_rflags(vcpu, ctxt->eflags);
5143
5144         if (irq == NMI_VECTOR)
5145                 vcpu->arch.nmi_pending = 0;
5146         else
5147                 vcpu->arch.interrupt.pending = false;
5148
5149         return EMULATE_DONE;
5150 }
5151 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5152
5153 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5154 {
5155         int r = EMULATE_DONE;
5156
5157         ++vcpu->stat.insn_emulation_fail;
5158         trace_kvm_emulate_insn_failed(vcpu);
5159         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5160                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5161                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5162                 vcpu->run->internal.ndata = 0;
5163                 r = EMULATE_FAIL;
5164         }
5165         kvm_queue_exception(vcpu, UD_VECTOR);
5166
5167         return r;
5168 }
5169
5170 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5171                                   bool write_fault_to_shadow_pgtable,
5172                                   int emulation_type)
5173 {
5174         gpa_t gpa = cr2;
5175         kvm_pfn_t pfn;
5176
5177         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5178                 return false;
5179
5180         if (!vcpu->arch.mmu.direct_map) {
5181                 /*
5182                  * Write permission should be allowed since only
5183                  * write access need to be emulated.
5184                  */
5185                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5186
5187                 /*
5188                  * If the mapping is invalid in guest, let cpu retry
5189                  * it to generate fault.
5190                  */
5191                 if (gpa == UNMAPPED_GVA)
5192                         return true;
5193         }
5194
5195         /*
5196          * Do not retry the unhandleable instruction if it faults on the
5197          * readonly host memory, otherwise it will goto a infinite loop:
5198          * retry instruction -> write #PF -> emulation fail -> retry
5199          * instruction -> ...
5200          */
5201         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5202
5203         /*
5204          * If the instruction failed on the error pfn, it can not be fixed,
5205          * report the error to userspace.
5206          */
5207         if (is_error_noslot_pfn(pfn))
5208                 return false;
5209
5210         kvm_release_pfn_clean(pfn);
5211
5212         /* The instructions are well-emulated on direct mmu. */
5213         if (vcpu->arch.mmu.direct_map) {
5214                 unsigned int indirect_shadow_pages;
5215
5216                 spin_lock(&vcpu->kvm->mmu_lock);
5217                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5218                 spin_unlock(&vcpu->kvm->mmu_lock);
5219
5220                 if (indirect_shadow_pages)
5221                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5222
5223                 return true;
5224         }
5225
5226         /*
5227          * if emulation was due to access to shadowed page table
5228          * and it failed try to unshadow page and re-enter the
5229          * guest to let CPU execute the instruction.
5230          */
5231         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5232
5233         /*
5234          * If the access faults on its page table, it can not
5235          * be fixed by unprotecting shadow page and it should
5236          * be reported to userspace.
5237          */
5238         return !write_fault_to_shadow_pgtable;
5239 }
5240
5241 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5242                               unsigned long cr2,  int emulation_type)
5243 {
5244         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5245         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5246
5247         last_retry_eip = vcpu->arch.last_retry_eip;
5248         last_retry_addr = vcpu->arch.last_retry_addr;
5249
5250         /*
5251          * If the emulation is caused by #PF and it is non-page_table
5252          * writing instruction, it means the VM-EXIT is caused by shadow
5253          * page protected, we can zap the shadow page and retry this
5254          * instruction directly.
5255          *
5256          * Note: if the guest uses a non-page-table modifying instruction
5257          * on the PDE that points to the instruction, then we will unmap
5258          * the instruction and go to an infinite loop. So, we cache the
5259          * last retried eip and the last fault address, if we meet the eip
5260          * and the address again, we can break out of the potential infinite
5261          * loop.
5262          */
5263         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5264
5265         if (!(emulation_type & EMULTYPE_RETRY))
5266                 return false;
5267
5268         if (x86_page_table_writing_insn(ctxt))
5269                 return false;
5270
5271         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5272                 return false;
5273
5274         vcpu->arch.last_retry_eip = ctxt->eip;
5275         vcpu->arch.last_retry_addr = cr2;
5276
5277         if (!vcpu->arch.mmu.direct_map)
5278                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5279
5280         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5281
5282         return true;
5283 }
5284
5285 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5286 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5287
5288 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5289 {
5290         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5291                 /* This is a good place to trace that we are exiting SMM.  */
5292                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5293
5294                 if (unlikely(vcpu->arch.smi_pending)) {
5295                         kvm_make_request(KVM_REQ_SMI, vcpu);
5296                         vcpu->arch.smi_pending = 0;
5297                 } else {
5298                         /* Process a latched INIT, if any.  */
5299                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5300                 }
5301         }
5302
5303         kvm_mmu_reset_context(vcpu);
5304 }
5305
5306 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5307 {
5308         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5309
5310         vcpu->arch.hflags = emul_flags;
5311
5312         if (changed & HF_SMM_MASK)
5313                 kvm_smm_changed(vcpu);
5314 }
5315
5316 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5317                                 unsigned long *db)
5318 {
5319         u32 dr6 = 0;
5320         int i;
5321         u32 enable, rwlen;
5322
5323         enable = dr7;
5324         rwlen = dr7 >> 16;
5325         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5326                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5327                         dr6 |= (1 << i);
5328         return dr6;
5329 }
5330
5331 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5332 {
5333         struct kvm_run *kvm_run = vcpu->run;
5334
5335         /*
5336          * rflags is the old, "raw" value of the flags.  The new value has
5337          * not been saved yet.
5338          *
5339          * This is correct even for TF set by the guest, because "the
5340          * processor will not generate this exception after the instruction
5341          * that sets the TF flag".
5342          */
5343         if (unlikely(rflags & X86_EFLAGS_TF)) {
5344                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5345                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5346                                                   DR6_RTM;
5347                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5348                         kvm_run->debug.arch.exception = DB_VECTOR;
5349                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5350                         *r = EMULATE_USER_EXIT;
5351                 } else {
5352                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5353                         /*
5354                          * "Certain debug exceptions may clear bit 0-3.  The
5355                          * remaining contents of the DR6 register are never
5356                          * cleared by the processor".
5357                          */
5358                         vcpu->arch.dr6 &= ~15;
5359                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5360                         kvm_queue_exception(vcpu, DB_VECTOR);
5361                 }
5362         }
5363 }
5364
5365 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5366 {
5367         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5368             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5369                 struct kvm_run *kvm_run = vcpu->run;
5370                 unsigned long eip = kvm_get_linear_rip(vcpu);
5371                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5372                                            vcpu->arch.guest_debug_dr7,
5373                                            vcpu->arch.eff_db);
5374
5375                 if (dr6 != 0) {
5376                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5377                         kvm_run->debug.arch.pc = eip;
5378                         kvm_run->debug.arch.exception = DB_VECTOR;
5379                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5380                         *r = EMULATE_USER_EXIT;
5381                         return true;
5382                 }
5383         }
5384
5385         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5386             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5387                 unsigned long eip = kvm_get_linear_rip(vcpu);
5388                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5389                                            vcpu->arch.dr7,
5390                                            vcpu->arch.db);
5391
5392                 if (dr6 != 0) {
5393                         vcpu->arch.dr6 &= ~15;
5394                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5395                         kvm_queue_exception(vcpu, DB_VECTOR);
5396                         *r = EMULATE_DONE;
5397                         return true;
5398                 }
5399         }
5400
5401         return false;
5402 }
5403
5404 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5405                             unsigned long cr2,
5406                             int emulation_type,
5407                             void *insn,
5408                             int insn_len)
5409 {
5410         int r;
5411         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5412         bool writeback = true;
5413         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5414
5415         /*
5416          * Clear write_fault_to_shadow_pgtable here to ensure it is
5417          * never reused.
5418          */
5419         vcpu->arch.write_fault_to_shadow_pgtable = false;
5420         kvm_clear_exception_queue(vcpu);
5421
5422         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5423                 init_emulate_ctxt(vcpu);
5424
5425                 /*
5426                  * We will reenter on the same instruction since
5427                  * we do not set complete_userspace_io.  This does not
5428                  * handle watchpoints yet, those would be handled in
5429                  * the emulate_ops.
5430                  */
5431                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5432                         return r;
5433
5434                 ctxt->interruptibility = 0;
5435                 ctxt->have_exception = false;
5436                 ctxt->exception.vector = -1;
5437                 ctxt->perm_ok = false;
5438
5439                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5440
5441                 r = x86_decode_insn(ctxt, insn, insn_len);
5442
5443                 trace_kvm_emulate_insn_start(vcpu);
5444                 ++vcpu->stat.insn_emulation;
5445                 if (r != EMULATION_OK)  {
5446                         if (emulation_type & EMULTYPE_TRAP_UD)
5447                                 return EMULATE_FAIL;
5448                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5449                                                 emulation_type))
5450                                 return EMULATE_DONE;
5451                         if (emulation_type & EMULTYPE_SKIP)
5452                                 return EMULATE_FAIL;
5453                         return handle_emulation_failure(vcpu);
5454                 }
5455         }
5456
5457         if (emulation_type & EMULTYPE_SKIP) {
5458                 kvm_rip_write(vcpu, ctxt->_eip);
5459                 if (ctxt->eflags & X86_EFLAGS_RF)
5460                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5461                 return EMULATE_DONE;
5462         }
5463
5464         if (retry_instruction(ctxt, cr2, emulation_type))
5465                 return EMULATE_DONE;
5466
5467         /* this is needed for vmware backdoor interface to work since it
5468            changes registers values  during IO operation */
5469         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5470                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5471                 emulator_invalidate_register_cache(ctxt);
5472         }
5473
5474 restart:
5475         r = x86_emulate_insn(ctxt);
5476
5477         if (r == EMULATION_INTERCEPTED)
5478                 return EMULATE_DONE;
5479
5480         if (r == EMULATION_FAILED) {
5481                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5482                                         emulation_type))
5483                         return EMULATE_DONE;
5484
5485                 return handle_emulation_failure(vcpu);
5486         }
5487
5488         if (ctxt->have_exception) {
5489                 r = EMULATE_DONE;
5490                 if (inject_emulated_exception(vcpu))
5491                         return r;
5492         } else if (vcpu->arch.pio.count) {
5493                 if (!vcpu->arch.pio.in) {
5494                         /* FIXME: return into emulator if single-stepping.  */
5495                         vcpu->arch.pio.count = 0;
5496                 } else {
5497                         writeback = false;
5498                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5499                 }
5500                 r = EMULATE_USER_EXIT;
5501         } else if (vcpu->mmio_needed) {
5502                 if (!vcpu->mmio_is_write)
5503                         writeback = false;
5504                 r = EMULATE_USER_EXIT;
5505                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5506         } else if (r == EMULATION_RESTART)
5507                 goto restart;
5508         else
5509                 r = EMULATE_DONE;
5510
5511         if (writeback) {
5512                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5513                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5514                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5515                 if (vcpu->arch.hflags != ctxt->emul_flags)
5516                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5517                 kvm_rip_write(vcpu, ctxt->eip);
5518                 if (r == EMULATE_DONE)
5519                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5520                 if (!ctxt->have_exception ||
5521                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5522                         __kvm_set_rflags(vcpu, ctxt->eflags);
5523
5524                 /*
5525                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5526                  * do nothing, and it will be requested again as soon as
5527                  * the shadow expires.  But we still need to check here,
5528                  * because POPF has no interrupt shadow.
5529                  */
5530                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5531                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5532         } else
5533                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5534
5535         return r;
5536 }
5537 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5538
5539 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5540 {
5541         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5542         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5543                                             size, port, &val, 1);
5544         /* do not return to emulator after return from userspace */
5545         vcpu->arch.pio.count = 0;
5546         return ret;
5547 }
5548 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5549
5550 static void tsc_bad(void *info)
5551 {
5552         __this_cpu_write(cpu_tsc_khz, 0);
5553 }
5554
5555 static void tsc_khz_changed(void *data)
5556 {
5557         struct cpufreq_freqs *freq = data;
5558         unsigned long khz = 0;
5559
5560         if (data)
5561                 khz = freq->new;
5562         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5563                 khz = cpufreq_quick_get(raw_smp_processor_id());
5564         if (!khz)
5565                 khz = tsc_khz;
5566         __this_cpu_write(cpu_tsc_khz, khz);
5567 }
5568
5569 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5570                                      void *data)
5571 {
5572         struct cpufreq_freqs *freq = data;
5573         struct kvm *kvm;
5574         struct kvm_vcpu *vcpu;
5575         int i, send_ipi = 0;
5576
5577         /*
5578          * We allow guests to temporarily run on slowing clocks,
5579          * provided we notify them after, or to run on accelerating
5580          * clocks, provided we notify them before.  Thus time never
5581          * goes backwards.
5582          *
5583          * However, we have a problem.  We can't atomically update
5584          * the frequency of a given CPU from this function; it is
5585          * merely a notifier, which can be called from any CPU.
5586          * Changing the TSC frequency at arbitrary points in time
5587          * requires a recomputation of local variables related to
5588          * the TSC for each VCPU.  We must flag these local variables
5589          * to be updated and be sure the update takes place with the
5590          * new frequency before any guests proceed.
5591          *
5592          * Unfortunately, the combination of hotplug CPU and frequency
5593          * change creates an intractable locking scenario; the order
5594          * of when these callouts happen is undefined with respect to
5595          * CPU hotplug, and they can race with each other.  As such,
5596          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5597          * undefined; you can actually have a CPU frequency change take
5598          * place in between the computation of X and the setting of the
5599          * variable.  To protect against this problem, all updates of
5600          * the per_cpu tsc_khz variable are done in an interrupt
5601          * protected IPI, and all callers wishing to update the value
5602          * must wait for a synchronous IPI to complete (which is trivial
5603          * if the caller is on the CPU already).  This establishes the
5604          * necessary total order on variable updates.
5605          *
5606          * Note that because a guest time update may take place
5607          * anytime after the setting of the VCPU's request bit, the
5608          * correct TSC value must be set before the request.  However,
5609          * to ensure the update actually makes it to any guest which
5610          * starts running in hardware virtualization between the set
5611          * and the acquisition of the spinlock, we must also ping the
5612          * CPU after setting the request bit.
5613          *
5614          */
5615
5616         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5617                 return 0;
5618         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5619                 return 0;
5620
5621         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5622
5623         spin_lock(&kvm_lock);
5624         list_for_each_entry(kvm, &vm_list, vm_list) {
5625                 kvm_for_each_vcpu(i, vcpu, kvm) {
5626                         if (vcpu->cpu != freq->cpu)
5627                                 continue;
5628                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5629                         if (vcpu->cpu != smp_processor_id())
5630                                 send_ipi = 1;
5631                 }
5632         }
5633         spin_unlock(&kvm_lock);
5634
5635         if (freq->old < freq->new && send_ipi) {
5636                 /*
5637                  * We upscale the frequency.  Must make the guest
5638                  * doesn't see old kvmclock values while running with
5639                  * the new frequency, otherwise we risk the guest sees
5640                  * time go backwards.
5641                  *
5642                  * In case we update the frequency for another cpu
5643                  * (which might be in guest context) send an interrupt
5644                  * to kick the cpu out of guest context.  Next time
5645                  * guest context is entered kvmclock will be updated,
5646                  * so the guest will not see stale values.
5647                  */
5648                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5649         }
5650         return 0;
5651 }
5652
5653 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5654         .notifier_call  = kvmclock_cpufreq_notifier
5655 };
5656
5657 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5658                                         unsigned long action, void *hcpu)
5659 {
5660         unsigned int cpu = (unsigned long)hcpu;
5661
5662         switch (action) {
5663                 case CPU_ONLINE:
5664                 case CPU_DOWN_FAILED:
5665                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5666                         break;
5667                 case CPU_DOWN_PREPARE:
5668                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5669                         break;
5670         }
5671         return NOTIFY_OK;
5672 }
5673
5674 static struct notifier_block kvmclock_cpu_notifier_block = {
5675         .notifier_call  = kvmclock_cpu_notifier,
5676         .priority = -INT_MAX
5677 };
5678
5679 static void kvm_timer_init(void)
5680 {
5681         int cpu;
5682
5683         max_tsc_khz = tsc_khz;
5684
5685         cpu_notifier_register_begin();
5686         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5687 #ifdef CONFIG_CPU_FREQ
5688                 struct cpufreq_policy policy;
5689                 memset(&policy, 0, sizeof(policy));
5690                 cpu = get_cpu();
5691                 cpufreq_get_policy(&policy, cpu);
5692                 if (policy.cpuinfo.max_freq)
5693                         max_tsc_khz = policy.cpuinfo.max_freq;
5694                 put_cpu();
5695 #endif
5696                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5697                                           CPUFREQ_TRANSITION_NOTIFIER);
5698         }
5699         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5700         for_each_online_cpu(cpu)
5701                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5702
5703         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5704         cpu_notifier_register_done();
5705
5706 }
5707
5708 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5709
5710 int kvm_is_in_guest(void)
5711 {
5712         return __this_cpu_read(current_vcpu) != NULL;
5713 }
5714
5715 static int kvm_is_user_mode(void)
5716 {
5717         int user_mode = 3;
5718
5719         if (__this_cpu_read(current_vcpu))
5720                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5721
5722         return user_mode != 0;
5723 }
5724
5725 static unsigned long kvm_get_guest_ip(void)
5726 {
5727         unsigned long ip = 0;
5728
5729         if (__this_cpu_read(current_vcpu))
5730                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5731
5732         return ip;
5733 }
5734
5735 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5736         .is_in_guest            = kvm_is_in_guest,
5737         .is_user_mode           = kvm_is_user_mode,
5738         .get_guest_ip           = kvm_get_guest_ip,
5739 };
5740
5741 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5742 {
5743         __this_cpu_write(current_vcpu, vcpu);
5744 }
5745 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5746
5747 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5748 {
5749         __this_cpu_write(current_vcpu, NULL);
5750 }
5751 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5752
5753 static void kvm_set_mmio_spte_mask(void)
5754 {
5755         u64 mask;
5756         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5757
5758         /*
5759          * Set the reserved bits and the present bit of an paging-structure
5760          * entry to generate page fault with PFER.RSV = 1.
5761          */
5762          /* Mask the reserved physical address bits. */
5763         mask = rsvd_bits(maxphyaddr, 51);
5764
5765         /* Bit 62 is always reserved for 32bit host. */
5766         mask |= 0x3ull << 62;
5767
5768         /* Set the present bit. */
5769         mask |= 1ull;
5770
5771 #ifdef CONFIG_X86_64
5772         /*
5773          * If reserved bit is not supported, clear the present bit to disable
5774          * mmio page fault.
5775          */
5776         if (maxphyaddr == 52)
5777                 mask &= ~1ull;
5778 #endif
5779
5780         kvm_mmu_set_mmio_spte_mask(mask);
5781 }
5782
5783 #ifdef CONFIG_X86_64
5784 static void pvclock_gtod_update_fn(struct work_struct *work)
5785 {
5786         struct kvm *kvm;
5787
5788         struct kvm_vcpu *vcpu;
5789         int i;
5790
5791         spin_lock(&kvm_lock);
5792         list_for_each_entry(kvm, &vm_list, vm_list)
5793                 kvm_for_each_vcpu(i, vcpu, kvm)
5794                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5795         atomic_set(&kvm_guest_has_master_clock, 0);
5796         spin_unlock(&kvm_lock);
5797 }
5798
5799 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5800
5801 /*
5802  * Notification about pvclock gtod data update.
5803  */
5804 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5805                                void *priv)
5806 {
5807         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5808         struct timekeeper *tk = priv;
5809
5810         update_pvclock_gtod(tk);
5811
5812         /* disable master clock if host does not trust, or does not
5813          * use, TSC clocksource
5814          */
5815         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5816             atomic_read(&kvm_guest_has_master_clock) != 0)
5817                 queue_work(system_long_wq, &pvclock_gtod_work);
5818
5819         return 0;
5820 }
5821
5822 static struct notifier_block pvclock_gtod_notifier = {
5823         .notifier_call = pvclock_gtod_notify,
5824 };
5825 #endif
5826
5827 int kvm_arch_init(void *opaque)
5828 {
5829         int r;
5830         struct kvm_x86_ops *ops = opaque;
5831
5832         if (kvm_x86_ops) {
5833                 printk(KERN_ERR "kvm: already loaded the other module\n");
5834                 r = -EEXIST;
5835                 goto out;
5836         }
5837
5838         if (!ops->cpu_has_kvm_support()) {
5839                 printk(KERN_ERR "kvm: no hardware support\n");
5840                 r = -EOPNOTSUPP;
5841                 goto out;
5842         }
5843         if (ops->disabled_by_bios()) {
5844                 printk(KERN_ERR "kvm: disabled by bios\n");
5845                 r = -EOPNOTSUPP;
5846                 goto out;
5847         }
5848
5849         r = -ENOMEM;
5850         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5851         if (!shared_msrs) {
5852                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5853                 goto out;
5854         }
5855
5856         r = kvm_mmu_module_init();
5857         if (r)
5858                 goto out_free_percpu;
5859
5860         kvm_set_mmio_spte_mask();
5861
5862         kvm_x86_ops = ops;
5863
5864         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5865                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5866
5867         kvm_timer_init();
5868
5869         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5870
5871         if (cpu_has_xsave)
5872                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5873
5874         kvm_lapic_init();
5875 #ifdef CONFIG_X86_64
5876         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5877 #endif
5878
5879         return 0;
5880
5881 out_free_percpu:
5882         free_percpu(shared_msrs);
5883 out:
5884         return r;
5885 }
5886
5887 void kvm_arch_exit(void)
5888 {
5889         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5890
5891         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5892                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5893                                             CPUFREQ_TRANSITION_NOTIFIER);
5894         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5895 #ifdef CONFIG_X86_64
5896         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5897 #endif
5898         kvm_x86_ops = NULL;
5899         kvm_mmu_module_exit();
5900         free_percpu(shared_msrs);
5901 }
5902
5903 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5904 {
5905         ++vcpu->stat.halt_exits;
5906         if (lapic_in_kernel(vcpu)) {
5907                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5908                 return 1;
5909         } else {
5910                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5911                 return 0;
5912         }
5913 }
5914 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5915
5916 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5917 {
5918         kvm_x86_ops->skip_emulated_instruction(vcpu);
5919         return kvm_vcpu_halt(vcpu);
5920 }
5921 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5922
5923 /*
5924  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5925  *
5926  * @apicid - apicid of vcpu to be kicked.
5927  */
5928 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5929 {
5930         struct kvm_lapic_irq lapic_irq;
5931
5932         lapic_irq.shorthand = 0;
5933         lapic_irq.dest_mode = 0;
5934         lapic_irq.dest_id = apicid;
5935         lapic_irq.msi_redir_hint = false;
5936
5937         lapic_irq.delivery_mode = APIC_DM_REMRD;
5938         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5939 }
5940
5941 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
5942 {
5943         vcpu->arch.apicv_active = false;
5944         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
5945 }
5946
5947 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5948 {
5949         unsigned long nr, a0, a1, a2, a3, ret;
5950         int op_64_bit, r = 1;
5951
5952         kvm_x86_ops->skip_emulated_instruction(vcpu);
5953
5954         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5955                 return kvm_hv_hypercall(vcpu);
5956
5957         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5958         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5959         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5960         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5961         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5962
5963         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5964
5965         op_64_bit = is_64_bit_mode(vcpu);
5966         if (!op_64_bit) {
5967                 nr &= 0xFFFFFFFF;
5968                 a0 &= 0xFFFFFFFF;
5969                 a1 &= 0xFFFFFFFF;
5970                 a2 &= 0xFFFFFFFF;
5971                 a3 &= 0xFFFFFFFF;
5972         }
5973
5974         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5975                 ret = -KVM_EPERM;
5976                 goto out;
5977         }
5978
5979         switch (nr) {
5980         case KVM_HC_VAPIC_POLL_IRQ:
5981                 ret = 0;
5982                 break;
5983         case KVM_HC_KICK_CPU:
5984                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5985                 ret = 0;
5986                 break;
5987         default:
5988                 ret = -KVM_ENOSYS;
5989                 break;
5990         }
5991 out:
5992         if (!op_64_bit)
5993                 ret = (u32)ret;
5994         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5995         ++vcpu->stat.hypercalls;
5996         return r;
5997 }
5998 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5999
6000 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6001 {
6002         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6003         char instruction[3];
6004         unsigned long rip = kvm_rip_read(vcpu);
6005
6006         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6007
6008         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
6009 }
6010
6011 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6012 {
6013         return vcpu->run->request_interrupt_window &&
6014                 likely(!pic_in_kernel(vcpu->kvm));
6015 }
6016
6017 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6018 {
6019         struct kvm_run *kvm_run = vcpu->run;
6020
6021         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6022         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6023         kvm_run->cr8 = kvm_get_cr8(vcpu);
6024         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6025         kvm_run->ready_for_interrupt_injection =
6026                 pic_in_kernel(vcpu->kvm) ||
6027                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6028 }
6029
6030 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6031 {
6032         int max_irr, tpr;
6033
6034         if (!kvm_x86_ops->update_cr8_intercept)
6035                 return;
6036
6037         if (!lapic_in_kernel(vcpu))
6038                 return;
6039
6040         if (vcpu->arch.apicv_active)
6041                 return;
6042
6043         if (!vcpu->arch.apic->vapic_addr)
6044                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6045         else
6046                 max_irr = -1;
6047
6048         if (max_irr != -1)
6049                 max_irr >>= 4;
6050
6051         tpr = kvm_lapic_get_cr8(vcpu);
6052
6053         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6054 }
6055
6056 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6057 {
6058         int r;
6059
6060         /* try to reinject previous events if any */
6061         if (vcpu->arch.exception.pending) {
6062                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6063                                         vcpu->arch.exception.has_error_code,
6064                                         vcpu->arch.exception.error_code);
6065
6066                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6067                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6068                                              X86_EFLAGS_RF);
6069
6070                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6071                     (vcpu->arch.dr7 & DR7_GD)) {
6072                         vcpu->arch.dr7 &= ~DR7_GD;
6073                         kvm_update_dr7(vcpu);
6074                 }
6075
6076                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6077                                           vcpu->arch.exception.has_error_code,
6078                                           vcpu->arch.exception.error_code,
6079                                           vcpu->arch.exception.reinject);
6080                 return 0;
6081         }
6082
6083         if (vcpu->arch.nmi_injected) {
6084                 kvm_x86_ops->set_nmi(vcpu);
6085                 return 0;
6086         }
6087
6088         if (vcpu->arch.interrupt.pending) {
6089                 kvm_x86_ops->set_irq(vcpu);
6090                 return 0;
6091         }
6092
6093         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6094                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6095                 if (r != 0)
6096                         return r;
6097         }
6098
6099         /* try to inject new event if pending */
6100         if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6101                 --vcpu->arch.nmi_pending;
6102                 vcpu->arch.nmi_injected = true;
6103                 kvm_x86_ops->set_nmi(vcpu);
6104         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6105                 /*
6106                  * Because interrupts can be injected asynchronously, we are
6107                  * calling check_nested_events again here to avoid a race condition.
6108                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6109                  * proposal and current concerns.  Perhaps we should be setting
6110                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6111                  */
6112                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6113                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6114                         if (r != 0)
6115                                 return r;
6116                 }
6117                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6118                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6119                                             false);
6120                         kvm_x86_ops->set_irq(vcpu);
6121                 }
6122         }
6123         return 0;
6124 }
6125
6126 static void process_nmi(struct kvm_vcpu *vcpu)
6127 {
6128         unsigned limit = 2;
6129
6130         /*
6131          * x86 is limited to one NMI running, and one NMI pending after it.
6132          * If an NMI is already in progress, limit further NMIs to just one.
6133          * Otherwise, allow two (and we'll inject the first one immediately).
6134          */
6135         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6136                 limit = 1;
6137
6138         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6139         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6140         kvm_make_request(KVM_REQ_EVENT, vcpu);
6141 }
6142
6143 #define put_smstate(type, buf, offset, val)                       \
6144         *(type *)((buf) + (offset) - 0x7e00) = val
6145
6146 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6147 {
6148         u32 flags = 0;
6149         flags |= seg->g       << 23;
6150         flags |= seg->db      << 22;
6151         flags |= seg->l       << 21;
6152         flags |= seg->avl     << 20;
6153         flags |= seg->present << 15;
6154         flags |= seg->dpl     << 13;
6155         flags |= seg->s       << 12;
6156         flags |= seg->type    << 8;
6157         return flags;
6158 }
6159
6160 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6161 {
6162         struct kvm_segment seg;
6163         int offset;
6164
6165         kvm_get_segment(vcpu, &seg, n);
6166         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6167
6168         if (n < 3)
6169                 offset = 0x7f84 + n * 12;
6170         else
6171                 offset = 0x7f2c + (n - 3) * 12;
6172
6173         put_smstate(u32, buf, offset + 8, seg.base);
6174         put_smstate(u32, buf, offset + 4, seg.limit);
6175         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6176 }
6177
6178 #ifdef CONFIG_X86_64
6179 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6180 {
6181         struct kvm_segment seg;
6182         int offset;
6183         u16 flags;
6184
6185         kvm_get_segment(vcpu, &seg, n);
6186         offset = 0x7e00 + n * 16;
6187
6188         flags = process_smi_get_segment_flags(&seg) >> 8;
6189         put_smstate(u16, buf, offset, seg.selector);
6190         put_smstate(u16, buf, offset + 2, flags);
6191         put_smstate(u32, buf, offset + 4, seg.limit);
6192         put_smstate(u64, buf, offset + 8, seg.base);
6193 }
6194 #endif
6195
6196 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6197 {
6198         struct desc_ptr dt;
6199         struct kvm_segment seg;
6200         unsigned long val;
6201         int i;
6202
6203         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6204         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6205         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6206         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6207
6208         for (i = 0; i < 8; i++)
6209                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6210
6211         kvm_get_dr(vcpu, 6, &val);
6212         put_smstate(u32, buf, 0x7fcc, (u32)val);
6213         kvm_get_dr(vcpu, 7, &val);
6214         put_smstate(u32, buf, 0x7fc8, (u32)val);
6215
6216         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6217         put_smstate(u32, buf, 0x7fc4, seg.selector);
6218         put_smstate(u32, buf, 0x7f64, seg.base);
6219         put_smstate(u32, buf, 0x7f60, seg.limit);
6220         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6221
6222         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6223         put_smstate(u32, buf, 0x7fc0, seg.selector);
6224         put_smstate(u32, buf, 0x7f80, seg.base);
6225         put_smstate(u32, buf, 0x7f7c, seg.limit);
6226         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6227
6228         kvm_x86_ops->get_gdt(vcpu, &dt);
6229         put_smstate(u32, buf, 0x7f74, dt.address);
6230         put_smstate(u32, buf, 0x7f70, dt.size);
6231
6232         kvm_x86_ops->get_idt(vcpu, &dt);
6233         put_smstate(u32, buf, 0x7f58, dt.address);
6234         put_smstate(u32, buf, 0x7f54, dt.size);
6235
6236         for (i = 0; i < 6; i++)
6237                 process_smi_save_seg_32(vcpu, buf, i);
6238
6239         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6240
6241         /* revision id */
6242         put_smstate(u32, buf, 0x7efc, 0x00020000);
6243         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6244 }
6245
6246 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6247 {
6248 #ifdef CONFIG_X86_64
6249         struct desc_ptr dt;
6250         struct kvm_segment seg;
6251         unsigned long val;
6252         int i;
6253
6254         for (i = 0; i < 16; i++)
6255                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6256
6257         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6258         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6259
6260         kvm_get_dr(vcpu, 6, &val);
6261         put_smstate(u64, buf, 0x7f68, val);
6262         kvm_get_dr(vcpu, 7, &val);
6263         put_smstate(u64, buf, 0x7f60, val);
6264
6265         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6266         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6267         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6268
6269         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6270
6271         /* revision id */
6272         put_smstate(u32, buf, 0x7efc, 0x00020064);
6273
6274         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6275
6276         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6277         put_smstate(u16, buf, 0x7e90, seg.selector);
6278         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6279         put_smstate(u32, buf, 0x7e94, seg.limit);
6280         put_smstate(u64, buf, 0x7e98, seg.base);
6281
6282         kvm_x86_ops->get_idt(vcpu, &dt);
6283         put_smstate(u32, buf, 0x7e84, dt.size);
6284         put_smstate(u64, buf, 0x7e88, dt.address);
6285
6286         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6287         put_smstate(u16, buf, 0x7e70, seg.selector);
6288         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6289         put_smstate(u32, buf, 0x7e74, seg.limit);
6290         put_smstate(u64, buf, 0x7e78, seg.base);
6291
6292         kvm_x86_ops->get_gdt(vcpu, &dt);
6293         put_smstate(u32, buf, 0x7e64, dt.size);
6294         put_smstate(u64, buf, 0x7e68, dt.address);
6295
6296         for (i = 0; i < 6; i++)
6297                 process_smi_save_seg_64(vcpu, buf, i);
6298 #else
6299         WARN_ON_ONCE(1);
6300 #endif
6301 }
6302
6303 static void process_smi(struct kvm_vcpu *vcpu)
6304 {
6305         struct kvm_segment cs, ds;
6306         struct desc_ptr dt;
6307         char buf[512];
6308         u32 cr0;
6309
6310         if (is_smm(vcpu)) {
6311                 vcpu->arch.smi_pending = true;
6312                 return;
6313         }
6314
6315         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6316         vcpu->arch.hflags |= HF_SMM_MASK;
6317         memset(buf, 0, 512);
6318         if (guest_cpuid_has_longmode(vcpu))
6319                 process_smi_save_state_64(vcpu, buf);
6320         else
6321                 process_smi_save_state_32(vcpu, buf);
6322
6323         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6324
6325         if (kvm_x86_ops->get_nmi_mask(vcpu))
6326                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6327         else
6328                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6329
6330         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6331         kvm_rip_write(vcpu, 0x8000);
6332
6333         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6334         kvm_x86_ops->set_cr0(vcpu, cr0);
6335         vcpu->arch.cr0 = cr0;
6336
6337         kvm_x86_ops->set_cr4(vcpu, 0);
6338
6339         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6340         dt.address = dt.size = 0;
6341         kvm_x86_ops->set_idt(vcpu, &dt);
6342
6343         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6344
6345         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6346         cs.base = vcpu->arch.smbase;
6347
6348         ds.selector = 0;
6349         ds.base = 0;
6350
6351         cs.limit    = ds.limit = 0xffffffff;
6352         cs.type     = ds.type = 0x3;
6353         cs.dpl      = ds.dpl = 0;
6354         cs.db       = ds.db = 0;
6355         cs.s        = ds.s = 1;
6356         cs.l        = ds.l = 0;
6357         cs.g        = ds.g = 1;
6358         cs.avl      = ds.avl = 0;
6359         cs.present  = ds.present = 1;
6360         cs.unusable = ds.unusable = 0;
6361         cs.padding  = ds.padding = 0;
6362
6363         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6364         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6365         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6366         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6367         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6368         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6369
6370         if (guest_cpuid_has_longmode(vcpu))
6371                 kvm_x86_ops->set_efer(vcpu, 0);
6372
6373         kvm_update_cpuid(vcpu);
6374         kvm_mmu_reset_context(vcpu);
6375 }
6376
6377 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6378 {
6379         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6380 }
6381
6382 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6383 {
6384         u64 eoi_exit_bitmap[4];
6385
6386         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6387                 return;
6388
6389         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6390
6391         if (irqchip_split(vcpu->kvm))
6392                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6393         else {
6394                 if (vcpu->arch.apicv_active)
6395                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6396                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6397         }
6398         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6399                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6400         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6401 }
6402
6403 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6404 {
6405         ++vcpu->stat.tlb_flush;
6406         kvm_x86_ops->tlb_flush(vcpu);
6407 }
6408
6409 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6410 {
6411         struct page *page = NULL;
6412
6413         if (!lapic_in_kernel(vcpu))
6414                 return;
6415
6416         if (!kvm_x86_ops->set_apic_access_page_addr)
6417                 return;
6418
6419         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6420         if (is_error_page(page))
6421                 return;
6422         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6423
6424         /*
6425          * Do not pin apic access page in memory, the MMU notifier
6426          * will call us again if it is migrated or swapped out.
6427          */
6428         put_page(page);
6429 }
6430 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6431
6432 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6433                                            unsigned long address)
6434 {
6435         /*
6436          * The physical address of apic access page is stored in the VMCS.
6437          * Update it when it becomes invalid.
6438          */
6439         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6440                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6441 }
6442
6443 /*
6444  * Returns 1 to let vcpu_run() continue the guest execution loop without
6445  * exiting to the userspace.  Otherwise, the value will be returned to the
6446  * userspace.
6447  */
6448 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6449 {
6450         int r;
6451         bool req_int_win =
6452                 dm_request_for_irq_injection(vcpu) &&
6453                 kvm_cpu_accept_dm_intr(vcpu);
6454
6455         bool req_immediate_exit = false;
6456
6457         if (vcpu->requests) {
6458                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6459                         kvm_mmu_unload(vcpu);
6460                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6461                         __kvm_migrate_timers(vcpu);
6462                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6463                         kvm_gen_update_masterclock(vcpu->kvm);
6464                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6465                         kvm_gen_kvmclock_update(vcpu);
6466                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6467                         r = kvm_guest_time_update(vcpu);
6468                         if (unlikely(r))
6469                                 goto out;
6470                 }
6471                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6472                         kvm_mmu_sync_roots(vcpu);
6473                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6474                         kvm_vcpu_flush_tlb(vcpu);
6475                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6476                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6477                         r = 0;
6478                         goto out;
6479                 }
6480                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6481                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6482                         r = 0;
6483                         goto out;
6484                 }
6485                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6486                         vcpu->fpu_active = 0;
6487                         kvm_x86_ops->fpu_deactivate(vcpu);
6488                 }
6489                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6490                         /* Page is swapped out. Do synthetic halt */
6491                         vcpu->arch.apf.halted = true;
6492                         r = 1;
6493                         goto out;
6494                 }
6495                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6496                         record_steal_time(vcpu);
6497                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6498                         process_smi(vcpu);
6499                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6500                         process_nmi(vcpu);
6501                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6502                         kvm_pmu_handle_event(vcpu);
6503                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6504                         kvm_pmu_deliver_pmi(vcpu);
6505                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6506                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6507                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6508                                      vcpu->arch.ioapic_handled_vectors)) {
6509                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6510                                 vcpu->run->eoi.vector =
6511                                                 vcpu->arch.pending_ioapic_eoi;
6512                                 r = 0;
6513                                 goto out;
6514                         }
6515                 }
6516                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6517                         vcpu_scan_ioapic(vcpu);
6518                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6519                         kvm_vcpu_reload_apic_access_page(vcpu);
6520                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6521                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6522                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6523                         r = 0;
6524                         goto out;
6525                 }
6526                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6527                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6528                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6529                         r = 0;
6530                         goto out;
6531                 }
6532                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6533                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6534                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6535                         r = 0;
6536                         goto out;
6537                 }
6538
6539                 /*
6540                  * KVM_REQ_HV_STIMER has to be processed after
6541                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6542                  * depend on the guest clock being up-to-date
6543                  */
6544                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6545                         kvm_hv_process_stimers(vcpu);
6546         }
6547
6548         /*
6549          * KVM_REQ_EVENT is not set when posted interrupts are set by
6550          * VT-d hardware, so we have to update RVI unconditionally.
6551          */
6552         if (kvm_lapic_enabled(vcpu)) {
6553                 /*
6554                  * Update architecture specific hints for APIC
6555                  * virtual interrupt delivery.
6556                  */
6557                 if (vcpu->arch.apicv_active)
6558                         kvm_x86_ops->hwapic_irr_update(vcpu,
6559                                 kvm_lapic_find_highest_irr(vcpu));
6560         }
6561
6562         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6563                 kvm_apic_accept_events(vcpu);
6564                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6565                         r = 1;
6566                         goto out;
6567                 }
6568
6569                 if (inject_pending_event(vcpu, req_int_win) != 0)
6570                         req_immediate_exit = true;
6571                 /* enable NMI/IRQ window open exits if needed */
6572                 else {
6573                         if (vcpu->arch.nmi_pending)
6574                                 kvm_x86_ops->enable_nmi_window(vcpu);
6575                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6576                                 kvm_x86_ops->enable_irq_window(vcpu);
6577                 }
6578
6579                 if (kvm_lapic_enabled(vcpu)) {
6580                         update_cr8_intercept(vcpu);
6581                         kvm_lapic_sync_to_vapic(vcpu);
6582                 }
6583         }
6584
6585         r = kvm_mmu_reload(vcpu);
6586         if (unlikely(r)) {
6587                 goto cancel_injection;
6588         }
6589
6590         preempt_disable();
6591
6592         kvm_x86_ops->prepare_guest_switch(vcpu);
6593         if (vcpu->fpu_active)
6594                 kvm_load_guest_fpu(vcpu);
6595         vcpu->mode = IN_GUEST_MODE;
6596
6597         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6598
6599         /*
6600          * We should set ->mode before check ->requests,
6601          * Please see the comment in kvm_make_all_cpus_request.
6602          * This also orders the write to mode from any reads
6603          * to the page tables done while the VCPU is running.
6604          * Please see the comment in kvm_flush_remote_tlbs.
6605          */
6606         smp_mb__after_srcu_read_unlock();
6607
6608         local_irq_disable();
6609
6610         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6611             || need_resched() || signal_pending(current)) {
6612                 vcpu->mode = OUTSIDE_GUEST_MODE;
6613                 smp_wmb();
6614                 local_irq_enable();
6615                 preempt_enable();
6616                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6617                 r = 1;
6618                 goto cancel_injection;
6619         }
6620
6621         kvm_load_guest_xcr0(vcpu);
6622
6623         if (req_immediate_exit)
6624                 smp_send_reschedule(vcpu->cpu);
6625
6626         trace_kvm_entry(vcpu->vcpu_id);
6627         wait_lapic_expire(vcpu);
6628         __kvm_guest_enter();
6629
6630         if (unlikely(vcpu->arch.switch_db_regs)) {
6631                 set_debugreg(0, 7);
6632                 set_debugreg(vcpu->arch.eff_db[0], 0);
6633                 set_debugreg(vcpu->arch.eff_db[1], 1);
6634                 set_debugreg(vcpu->arch.eff_db[2], 2);
6635                 set_debugreg(vcpu->arch.eff_db[3], 3);
6636                 set_debugreg(vcpu->arch.dr6, 6);
6637                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6638         }
6639
6640         kvm_x86_ops->run(vcpu);
6641
6642         /*
6643          * Do this here before restoring debug registers on the host.  And
6644          * since we do this before handling the vmexit, a DR access vmexit
6645          * can (a) read the correct value of the debug registers, (b) set
6646          * KVM_DEBUGREG_WONT_EXIT again.
6647          */
6648         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6649                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6650                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6651                 kvm_update_dr0123(vcpu);
6652                 kvm_update_dr6(vcpu);
6653                 kvm_update_dr7(vcpu);
6654                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6655         }
6656
6657         /*
6658          * If the guest has used debug registers, at least dr7
6659          * will be disabled while returning to the host.
6660          * If we don't have active breakpoints in the host, we don't
6661          * care about the messed up debug address registers. But if
6662          * we have some of them active, restore the old state.
6663          */
6664         if (hw_breakpoint_active())
6665                 hw_breakpoint_restore();
6666
6667         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6668
6669         vcpu->mode = OUTSIDE_GUEST_MODE;
6670         smp_wmb();
6671
6672         kvm_put_guest_xcr0(vcpu);
6673
6674         /* Interrupt is enabled by handle_external_intr() */
6675         kvm_x86_ops->handle_external_intr(vcpu);
6676
6677         ++vcpu->stat.exits;
6678
6679         /*
6680          * We must have an instruction between local_irq_enable() and
6681          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6682          * the interrupt shadow.  The stat.exits increment will do nicely.
6683          * But we need to prevent reordering, hence this barrier():
6684          */
6685         barrier();
6686
6687         kvm_guest_exit();
6688
6689         preempt_enable();
6690
6691         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6692
6693         /*
6694          * Profile KVM exit RIPs:
6695          */
6696         if (unlikely(prof_on == KVM_PROFILING)) {
6697                 unsigned long rip = kvm_rip_read(vcpu);
6698                 profile_hit(KVM_PROFILING, (void *)rip);
6699         }
6700
6701         if (unlikely(vcpu->arch.tsc_always_catchup))
6702                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6703
6704         if (vcpu->arch.apic_attention)
6705                 kvm_lapic_sync_from_vapic(vcpu);
6706
6707         r = kvm_x86_ops->handle_exit(vcpu);
6708         return r;
6709
6710 cancel_injection:
6711         kvm_x86_ops->cancel_injection(vcpu);
6712         if (unlikely(vcpu->arch.apic_attention))
6713                 kvm_lapic_sync_from_vapic(vcpu);
6714 out:
6715         return r;
6716 }
6717
6718 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6719 {
6720         if (!kvm_arch_vcpu_runnable(vcpu) &&
6721             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6722                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6723                 kvm_vcpu_block(vcpu);
6724                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6725
6726                 if (kvm_x86_ops->post_block)
6727                         kvm_x86_ops->post_block(vcpu);
6728
6729                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6730                         return 1;
6731         }
6732
6733         kvm_apic_accept_events(vcpu);
6734         switch(vcpu->arch.mp_state) {
6735         case KVM_MP_STATE_HALTED:
6736                 vcpu->arch.pv.pv_unhalted = false;
6737                 vcpu->arch.mp_state =
6738                         KVM_MP_STATE_RUNNABLE;
6739         case KVM_MP_STATE_RUNNABLE:
6740                 vcpu->arch.apf.halted = false;
6741                 break;
6742         case KVM_MP_STATE_INIT_RECEIVED:
6743                 break;
6744         default:
6745                 return -EINTR;
6746                 break;
6747         }
6748         return 1;
6749 }
6750
6751 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6752 {
6753         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6754                 !vcpu->arch.apf.halted);
6755 }
6756
6757 static int vcpu_run(struct kvm_vcpu *vcpu)
6758 {
6759         int r;
6760         struct kvm *kvm = vcpu->kvm;
6761
6762         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6763
6764         for (;;) {
6765                 if (kvm_vcpu_running(vcpu)) {
6766                         r = vcpu_enter_guest(vcpu);
6767                 } else {
6768                         r = vcpu_block(kvm, vcpu);
6769                 }
6770
6771                 if (r <= 0)
6772                         break;
6773
6774                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6775                 if (kvm_cpu_has_pending_timer(vcpu))
6776                         kvm_inject_pending_timer_irqs(vcpu);
6777
6778                 if (dm_request_for_irq_injection(vcpu) &&
6779                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6780                         r = 0;
6781                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6782                         ++vcpu->stat.request_irq_exits;
6783                         break;
6784                 }
6785
6786                 kvm_check_async_pf_completion(vcpu);
6787
6788                 if (signal_pending(current)) {
6789                         r = -EINTR;
6790                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6791                         ++vcpu->stat.signal_exits;
6792                         break;
6793                 }
6794                 if (need_resched()) {
6795                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6796                         cond_resched();
6797                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6798                 }
6799         }
6800
6801         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6802
6803         return r;
6804 }
6805
6806 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6807 {
6808         int r;
6809         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6810         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6811         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6812         if (r != EMULATE_DONE)
6813                 return 0;
6814         return 1;
6815 }
6816
6817 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6818 {
6819         BUG_ON(!vcpu->arch.pio.count);
6820
6821         return complete_emulated_io(vcpu);
6822 }
6823
6824 /*
6825  * Implements the following, as a state machine:
6826  *
6827  * read:
6828  *   for each fragment
6829  *     for each mmio piece in the fragment
6830  *       write gpa, len
6831  *       exit
6832  *       copy data
6833  *   execute insn
6834  *
6835  * write:
6836  *   for each fragment
6837  *     for each mmio piece in the fragment
6838  *       write gpa, len
6839  *       copy data
6840  *       exit
6841  */
6842 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6843 {
6844         struct kvm_run *run = vcpu->run;
6845         struct kvm_mmio_fragment *frag;
6846         unsigned len;
6847
6848         BUG_ON(!vcpu->mmio_needed);
6849
6850         /* Complete previous fragment */
6851         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6852         len = min(8u, frag->len);
6853         if (!vcpu->mmio_is_write)
6854                 memcpy(frag->data, run->mmio.data, len);
6855
6856         if (frag->len <= 8) {
6857                 /* Switch to the next fragment. */
6858                 frag++;
6859                 vcpu->mmio_cur_fragment++;
6860         } else {
6861                 /* Go forward to the next mmio piece. */
6862                 frag->data += len;
6863                 frag->gpa += len;
6864                 frag->len -= len;
6865         }
6866
6867         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6868                 vcpu->mmio_needed = 0;
6869
6870                 /* FIXME: return into emulator if single-stepping.  */
6871                 if (vcpu->mmio_is_write)
6872                         return 1;
6873                 vcpu->mmio_read_completed = 1;
6874                 return complete_emulated_io(vcpu);
6875         }
6876
6877         run->exit_reason = KVM_EXIT_MMIO;
6878         run->mmio.phys_addr = frag->gpa;
6879         if (vcpu->mmio_is_write)
6880                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6881         run->mmio.len = min(8u, frag->len);
6882         run->mmio.is_write = vcpu->mmio_is_write;
6883         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6884         return 0;
6885 }
6886
6887
6888 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6889 {
6890         struct fpu *fpu = &current->thread.fpu;
6891         int r;
6892         sigset_t sigsaved;
6893
6894         fpu__activate_curr(fpu);
6895
6896         if (vcpu->sigset_active)
6897                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6898
6899         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6900                 kvm_vcpu_block(vcpu);
6901                 kvm_apic_accept_events(vcpu);
6902                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6903                 r = -EAGAIN;
6904                 goto out;
6905         }
6906
6907         /* re-sync apic's tpr */
6908         if (!lapic_in_kernel(vcpu)) {
6909                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6910                         r = -EINVAL;
6911                         goto out;
6912                 }
6913         }
6914
6915         if (unlikely(vcpu->arch.complete_userspace_io)) {
6916                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6917                 vcpu->arch.complete_userspace_io = NULL;
6918                 r = cui(vcpu);
6919                 if (r <= 0)
6920                         goto out;
6921         } else
6922                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6923
6924         r = vcpu_run(vcpu);
6925
6926 out:
6927         post_kvm_run_save(vcpu);
6928         if (vcpu->sigset_active)
6929                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6930
6931         return r;
6932 }
6933
6934 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6935 {
6936         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6937                 /*
6938                  * We are here if userspace calls get_regs() in the middle of
6939                  * instruction emulation. Registers state needs to be copied
6940                  * back from emulation context to vcpu. Userspace shouldn't do
6941                  * that usually, but some bad designed PV devices (vmware
6942                  * backdoor interface) need this to work
6943                  */
6944                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6945                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6946         }
6947         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6948         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6949         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6950         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6951         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6952         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6953         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6954         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6955 #ifdef CONFIG_X86_64
6956         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6957         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6958         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6959         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6960         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6961         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6962         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6963         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6964 #endif
6965
6966         regs->rip = kvm_rip_read(vcpu);
6967         regs->rflags = kvm_get_rflags(vcpu);
6968
6969         return 0;
6970 }
6971
6972 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6973 {
6974         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6975         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6976
6977         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6978         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6979         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6980         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6981         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6982         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6983         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6984         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6985 #ifdef CONFIG_X86_64
6986         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6987         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6988         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6989         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6990         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6991         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6992         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6993         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6994 #endif
6995
6996         kvm_rip_write(vcpu, regs->rip);
6997         kvm_set_rflags(vcpu, regs->rflags);
6998
6999         vcpu->arch.exception.pending = false;
7000
7001         kvm_make_request(KVM_REQ_EVENT, vcpu);
7002
7003         return 0;
7004 }
7005
7006 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7007 {
7008         struct kvm_segment cs;
7009
7010         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7011         *db = cs.db;
7012         *l = cs.l;
7013 }
7014 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7015
7016 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7017                                   struct kvm_sregs *sregs)
7018 {
7019         struct desc_ptr dt;
7020
7021         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7022         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7023         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7024         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7025         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7026         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7027
7028         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7029         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7030
7031         kvm_x86_ops->get_idt(vcpu, &dt);
7032         sregs->idt.limit = dt.size;
7033         sregs->idt.base = dt.address;
7034         kvm_x86_ops->get_gdt(vcpu, &dt);
7035         sregs->gdt.limit = dt.size;
7036         sregs->gdt.base = dt.address;
7037
7038         sregs->cr0 = kvm_read_cr0(vcpu);
7039         sregs->cr2 = vcpu->arch.cr2;
7040         sregs->cr3 = kvm_read_cr3(vcpu);
7041         sregs->cr4 = kvm_read_cr4(vcpu);
7042         sregs->cr8 = kvm_get_cr8(vcpu);
7043         sregs->efer = vcpu->arch.efer;
7044         sregs->apic_base = kvm_get_apic_base(vcpu);
7045
7046         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7047
7048         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7049                 set_bit(vcpu->arch.interrupt.nr,
7050                         (unsigned long *)sregs->interrupt_bitmap);
7051
7052         return 0;
7053 }
7054
7055 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7056                                     struct kvm_mp_state *mp_state)
7057 {
7058         kvm_apic_accept_events(vcpu);
7059         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7060                                         vcpu->arch.pv.pv_unhalted)
7061                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7062         else
7063                 mp_state->mp_state = vcpu->arch.mp_state;
7064
7065         return 0;
7066 }
7067
7068 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7069                                     struct kvm_mp_state *mp_state)
7070 {
7071         if (!lapic_in_kernel(vcpu) &&
7072             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7073                 return -EINVAL;
7074
7075         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7076                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7077                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7078         } else
7079                 vcpu->arch.mp_state = mp_state->mp_state;
7080         kvm_make_request(KVM_REQ_EVENT, vcpu);
7081         return 0;
7082 }
7083
7084 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7085                     int reason, bool has_error_code, u32 error_code)
7086 {
7087         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7088         int ret;
7089
7090         init_emulate_ctxt(vcpu);
7091
7092         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7093                                    has_error_code, error_code);
7094
7095         if (ret)
7096                 return EMULATE_FAIL;
7097
7098         kvm_rip_write(vcpu, ctxt->eip);
7099         kvm_set_rflags(vcpu, ctxt->eflags);
7100         kvm_make_request(KVM_REQ_EVENT, vcpu);
7101         return EMULATE_DONE;
7102 }
7103 EXPORT_SYMBOL_GPL(kvm_task_switch);
7104
7105 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7106                                   struct kvm_sregs *sregs)
7107 {
7108         struct msr_data apic_base_msr;
7109         int mmu_reset_needed = 0;
7110         int pending_vec, max_bits, idx;
7111         struct desc_ptr dt;
7112
7113         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7114                 return -EINVAL;
7115
7116         dt.size = sregs->idt.limit;
7117         dt.address = sregs->idt.base;
7118         kvm_x86_ops->set_idt(vcpu, &dt);
7119         dt.size = sregs->gdt.limit;
7120         dt.address = sregs->gdt.base;
7121         kvm_x86_ops->set_gdt(vcpu, &dt);
7122
7123         vcpu->arch.cr2 = sregs->cr2;
7124         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7125         vcpu->arch.cr3 = sregs->cr3;
7126         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7127
7128         kvm_set_cr8(vcpu, sregs->cr8);
7129
7130         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7131         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7132         apic_base_msr.data = sregs->apic_base;
7133         apic_base_msr.host_initiated = true;
7134         kvm_set_apic_base(vcpu, &apic_base_msr);
7135
7136         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7137         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7138         vcpu->arch.cr0 = sregs->cr0;
7139
7140         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7141         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7142         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7143                 kvm_update_cpuid(vcpu);
7144
7145         idx = srcu_read_lock(&vcpu->kvm->srcu);
7146         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7147                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7148                 mmu_reset_needed = 1;
7149         }
7150         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7151
7152         if (mmu_reset_needed)
7153                 kvm_mmu_reset_context(vcpu);
7154
7155         max_bits = KVM_NR_INTERRUPTS;
7156         pending_vec = find_first_bit(
7157                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7158         if (pending_vec < max_bits) {
7159                 kvm_queue_interrupt(vcpu, pending_vec, false);
7160                 pr_debug("Set back pending irq %d\n", pending_vec);
7161         }
7162
7163         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7164         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7165         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7166         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7167         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7168         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7169
7170         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7171         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7172
7173         update_cr8_intercept(vcpu);
7174
7175         /* Older userspace won't unhalt the vcpu on reset. */
7176         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7177             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7178             !is_protmode(vcpu))
7179                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7180
7181         kvm_make_request(KVM_REQ_EVENT, vcpu);
7182
7183         return 0;
7184 }
7185
7186 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7187                                         struct kvm_guest_debug *dbg)
7188 {
7189         unsigned long rflags;
7190         int i, r;
7191
7192         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7193                 r = -EBUSY;
7194                 if (vcpu->arch.exception.pending)
7195                         goto out;
7196                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7197                         kvm_queue_exception(vcpu, DB_VECTOR);
7198                 else
7199                         kvm_queue_exception(vcpu, BP_VECTOR);
7200         }
7201
7202         /*
7203          * Read rflags as long as potentially injected trace flags are still
7204          * filtered out.
7205          */
7206         rflags = kvm_get_rflags(vcpu);
7207
7208         vcpu->guest_debug = dbg->control;
7209         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7210                 vcpu->guest_debug = 0;
7211
7212         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7213                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7214                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7215                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7216         } else {
7217                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7218                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7219         }
7220         kvm_update_dr7(vcpu);
7221
7222         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7223                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7224                         get_segment_base(vcpu, VCPU_SREG_CS);
7225
7226         /*
7227          * Trigger an rflags update that will inject or remove the trace
7228          * flags.
7229          */
7230         kvm_set_rflags(vcpu, rflags);
7231
7232         kvm_x86_ops->update_bp_intercept(vcpu);
7233
7234         r = 0;
7235
7236 out:
7237
7238         return r;
7239 }
7240
7241 /*
7242  * Translate a guest virtual address to a guest physical address.
7243  */
7244 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7245                                     struct kvm_translation *tr)
7246 {
7247         unsigned long vaddr = tr->linear_address;
7248         gpa_t gpa;
7249         int idx;
7250
7251         idx = srcu_read_lock(&vcpu->kvm->srcu);
7252         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7253         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7254         tr->physical_address = gpa;
7255         tr->valid = gpa != UNMAPPED_GVA;
7256         tr->writeable = 1;
7257         tr->usermode = 0;
7258
7259         return 0;
7260 }
7261
7262 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7263 {
7264         struct fxregs_state *fxsave =
7265                         &vcpu->arch.guest_fpu.state.fxsave;
7266
7267         memcpy(fpu->fpr, fxsave->st_space, 128);
7268         fpu->fcw = fxsave->cwd;
7269         fpu->fsw = fxsave->swd;
7270         fpu->ftwx = fxsave->twd;
7271         fpu->last_opcode = fxsave->fop;
7272         fpu->last_ip = fxsave->rip;
7273         fpu->last_dp = fxsave->rdp;
7274         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7275
7276         return 0;
7277 }
7278
7279 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7280 {
7281         struct fxregs_state *fxsave =
7282                         &vcpu->arch.guest_fpu.state.fxsave;
7283
7284         memcpy(fxsave->st_space, fpu->fpr, 128);
7285         fxsave->cwd = fpu->fcw;
7286         fxsave->swd = fpu->fsw;
7287         fxsave->twd = fpu->ftwx;
7288         fxsave->fop = fpu->last_opcode;
7289         fxsave->rip = fpu->last_ip;
7290         fxsave->rdp = fpu->last_dp;
7291         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7292
7293         return 0;
7294 }
7295
7296 static void fx_init(struct kvm_vcpu *vcpu)
7297 {
7298         fpstate_init(&vcpu->arch.guest_fpu.state);
7299         if (cpu_has_xsaves)
7300                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7301                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7302
7303         /*
7304          * Ensure guest xcr0 is valid for loading
7305          */
7306         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7307
7308         vcpu->arch.cr0 |= X86_CR0_ET;
7309 }
7310
7311 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7312 {
7313         if (vcpu->guest_fpu_loaded)
7314                 return;
7315
7316         /*
7317          * Restore all possible states in the guest,
7318          * and assume host would use all available bits.
7319          * Guest xcr0 would be loaded later.
7320          */
7321         vcpu->guest_fpu_loaded = 1;
7322         __kernel_fpu_begin();
7323         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7324         trace_kvm_fpu(1);
7325 }
7326
7327 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7328 {
7329         if (!vcpu->guest_fpu_loaded) {
7330                 vcpu->fpu_counter = 0;
7331                 return;
7332         }
7333
7334         vcpu->guest_fpu_loaded = 0;
7335         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7336         __kernel_fpu_end();
7337         ++vcpu->stat.fpu_reload;
7338         /*
7339          * If using eager FPU mode, or if the guest is a frequent user
7340          * of the FPU, just leave the FPU active for next time.
7341          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7342          * the FPU in bursts will revert to loading it on demand.
7343          */
7344         if (!use_eager_fpu()) {
7345                 if (++vcpu->fpu_counter < 5)
7346                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7347         }
7348         trace_kvm_fpu(0);
7349 }
7350
7351 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7352 {
7353         kvmclock_reset(vcpu);
7354
7355         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7356         kvm_x86_ops->vcpu_free(vcpu);
7357 }
7358
7359 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7360                                                 unsigned int id)
7361 {
7362         struct kvm_vcpu *vcpu;
7363
7364         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7365                 printk_once(KERN_WARNING
7366                 "kvm: SMP vm created on host with unstable TSC; "
7367                 "guest TSC will not be reliable\n");
7368
7369         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7370
7371         return vcpu;
7372 }
7373
7374 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7375 {
7376         int r;
7377
7378         kvm_vcpu_mtrr_init(vcpu);
7379         r = vcpu_load(vcpu);
7380         if (r)
7381                 return r;
7382         kvm_vcpu_reset(vcpu, false);
7383         kvm_mmu_setup(vcpu);
7384         vcpu_put(vcpu);
7385         return r;
7386 }
7387
7388 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7389 {
7390         struct msr_data msr;
7391         struct kvm *kvm = vcpu->kvm;
7392
7393         if (vcpu_load(vcpu))
7394                 return;
7395         msr.data = 0x0;
7396         msr.index = MSR_IA32_TSC;
7397         msr.host_initiated = true;
7398         kvm_write_tsc(vcpu, &msr);
7399         vcpu_put(vcpu);
7400
7401         if (!kvmclock_periodic_sync)
7402                 return;
7403
7404         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7405                                         KVMCLOCK_SYNC_PERIOD);
7406 }
7407
7408 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7409 {
7410         int r;
7411         vcpu->arch.apf.msr_val = 0;
7412
7413         r = vcpu_load(vcpu);
7414         BUG_ON(r);
7415         kvm_mmu_unload(vcpu);
7416         vcpu_put(vcpu);
7417
7418         kvm_x86_ops->vcpu_free(vcpu);
7419 }
7420
7421 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7422 {
7423         vcpu->arch.hflags = 0;
7424
7425         atomic_set(&vcpu->arch.nmi_queued, 0);
7426         vcpu->arch.nmi_pending = 0;
7427         vcpu->arch.nmi_injected = false;
7428         kvm_clear_interrupt_queue(vcpu);
7429         kvm_clear_exception_queue(vcpu);
7430
7431         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7432         kvm_update_dr0123(vcpu);
7433         vcpu->arch.dr6 = DR6_INIT;
7434         kvm_update_dr6(vcpu);
7435         vcpu->arch.dr7 = DR7_FIXED_1;
7436         kvm_update_dr7(vcpu);
7437
7438         vcpu->arch.cr2 = 0;
7439
7440         kvm_make_request(KVM_REQ_EVENT, vcpu);
7441         vcpu->arch.apf.msr_val = 0;
7442         vcpu->arch.st.msr_val = 0;
7443
7444         kvmclock_reset(vcpu);
7445
7446         kvm_clear_async_pf_completion_queue(vcpu);
7447         kvm_async_pf_hash_reset(vcpu);
7448         vcpu->arch.apf.halted = false;
7449
7450         if (!init_event) {
7451                 kvm_pmu_reset(vcpu);
7452                 vcpu->arch.smbase = 0x30000;
7453         }
7454
7455         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7456         vcpu->arch.regs_avail = ~0;
7457         vcpu->arch.regs_dirty = ~0;
7458
7459         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7460 }
7461
7462 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7463 {
7464         struct kvm_segment cs;
7465
7466         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7467         cs.selector = vector << 8;
7468         cs.base = vector << 12;
7469         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7470         kvm_rip_write(vcpu, 0);
7471 }
7472
7473 int kvm_arch_hardware_enable(void)
7474 {
7475         struct kvm *kvm;
7476         struct kvm_vcpu *vcpu;
7477         int i;
7478         int ret;
7479         u64 local_tsc;
7480         u64 max_tsc = 0;
7481         bool stable, backwards_tsc = false;
7482
7483         kvm_shared_msr_cpu_online();
7484         ret = kvm_x86_ops->hardware_enable();
7485         if (ret != 0)
7486                 return ret;
7487
7488         local_tsc = rdtsc();
7489         stable = !check_tsc_unstable();
7490         list_for_each_entry(kvm, &vm_list, vm_list) {
7491                 kvm_for_each_vcpu(i, vcpu, kvm) {
7492                         if (!stable && vcpu->cpu == smp_processor_id())
7493                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7494                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7495                                 backwards_tsc = true;
7496                                 if (vcpu->arch.last_host_tsc > max_tsc)
7497                                         max_tsc = vcpu->arch.last_host_tsc;
7498                         }
7499                 }
7500         }
7501
7502         /*
7503          * Sometimes, even reliable TSCs go backwards.  This happens on
7504          * platforms that reset TSC during suspend or hibernate actions, but
7505          * maintain synchronization.  We must compensate.  Fortunately, we can
7506          * detect that condition here, which happens early in CPU bringup,
7507          * before any KVM threads can be running.  Unfortunately, we can't
7508          * bring the TSCs fully up to date with real time, as we aren't yet far
7509          * enough into CPU bringup that we know how much real time has actually
7510          * elapsed; our helper function, get_kernel_ns() will be using boot
7511          * variables that haven't been updated yet.
7512          *
7513          * So we simply find the maximum observed TSC above, then record the
7514          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7515          * the adjustment will be applied.  Note that we accumulate
7516          * adjustments, in case multiple suspend cycles happen before some VCPU
7517          * gets a chance to run again.  In the event that no KVM threads get a
7518          * chance to run, we will miss the entire elapsed period, as we'll have
7519          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7520          * loose cycle time.  This isn't too big a deal, since the loss will be
7521          * uniform across all VCPUs (not to mention the scenario is extremely
7522          * unlikely). It is possible that a second hibernate recovery happens
7523          * much faster than a first, causing the observed TSC here to be
7524          * smaller; this would require additional padding adjustment, which is
7525          * why we set last_host_tsc to the local tsc observed here.
7526          *
7527          * N.B. - this code below runs only on platforms with reliable TSC,
7528          * as that is the only way backwards_tsc is set above.  Also note
7529          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7530          * have the same delta_cyc adjustment applied if backwards_tsc
7531          * is detected.  Note further, this adjustment is only done once,
7532          * as we reset last_host_tsc on all VCPUs to stop this from being
7533          * called multiple times (one for each physical CPU bringup).
7534          *
7535          * Platforms with unreliable TSCs don't have to deal with this, they
7536          * will be compensated by the logic in vcpu_load, which sets the TSC to
7537          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7538          * guarantee that they stay in perfect synchronization.
7539          */
7540         if (backwards_tsc) {
7541                 u64 delta_cyc = max_tsc - local_tsc;
7542                 backwards_tsc_observed = true;
7543                 list_for_each_entry(kvm, &vm_list, vm_list) {
7544                         kvm_for_each_vcpu(i, vcpu, kvm) {
7545                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7546                                 vcpu->arch.last_host_tsc = local_tsc;
7547                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7548                         }
7549
7550                         /*
7551                          * We have to disable TSC offset matching.. if you were
7552                          * booting a VM while issuing an S4 host suspend....
7553                          * you may have some problem.  Solving this issue is
7554                          * left as an exercise to the reader.
7555                          */
7556                         kvm->arch.last_tsc_nsec = 0;
7557                         kvm->arch.last_tsc_write = 0;
7558                 }
7559
7560         }
7561         return 0;
7562 }
7563
7564 void kvm_arch_hardware_disable(void)
7565 {
7566         kvm_x86_ops->hardware_disable();
7567         drop_user_return_notifiers();
7568 }
7569
7570 int kvm_arch_hardware_setup(void)
7571 {
7572         int r;
7573
7574         r = kvm_x86_ops->hardware_setup();
7575         if (r != 0)
7576                 return r;
7577
7578         if (kvm_has_tsc_control) {
7579                 /*
7580                  * Make sure the user can only configure tsc_khz values that
7581                  * fit into a signed integer.
7582                  * A min value is not calculated needed because it will always
7583                  * be 1 on all machines.
7584                  */
7585                 u64 max = min(0x7fffffffULL,
7586                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7587                 kvm_max_guest_tsc_khz = max;
7588
7589                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7590         }
7591
7592         kvm_init_msr_list();
7593         return 0;
7594 }
7595
7596 void kvm_arch_hardware_unsetup(void)
7597 {
7598         kvm_x86_ops->hardware_unsetup();
7599 }
7600
7601 void kvm_arch_check_processor_compat(void *rtn)
7602 {
7603         kvm_x86_ops->check_processor_compatibility(rtn);
7604 }
7605
7606 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7607 {
7608         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7609 }
7610 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7611
7612 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7613 {
7614         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7615 }
7616
7617 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7618 {
7619         return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7620 }
7621
7622 struct static_key kvm_no_apic_vcpu __read_mostly;
7623 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7624
7625 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7626 {
7627         struct page *page;
7628         struct kvm *kvm;
7629         int r;
7630
7631         BUG_ON(vcpu->kvm == NULL);
7632         kvm = vcpu->kvm;
7633
7634         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7635         vcpu->arch.pv.pv_unhalted = false;
7636         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7637         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7638                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7639         else
7640                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7641
7642         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7643         if (!page) {
7644                 r = -ENOMEM;
7645                 goto fail;
7646         }
7647         vcpu->arch.pio_data = page_address(page);
7648
7649         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7650
7651         r = kvm_mmu_create(vcpu);
7652         if (r < 0)
7653                 goto fail_free_pio_data;
7654
7655         if (irqchip_in_kernel(kvm)) {
7656                 r = kvm_create_lapic(vcpu);
7657                 if (r < 0)
7658                         goto fail_mmu_destroy;
7659         } else
7660                 static_key_slow_inc(&kvm_no_apic_vcpu);
7661
7662         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7663                                        GFP_KERNEL);
7664         if (!vcpu->arch.mce_banks) {
7665                 r = -ENOMEM;
7666                 goto fail_free_lapic;
7667         }
7668         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7669
7670         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7671                 r = -ENOMEM;
7672                 goto fail_free_mce_banks;
7673         }
7674
7675         fx_init(vcpu);
7676
7677         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7678         vcpu->arch.pv_time_enabled = false;
7679
7680         vcpu->arch.guest_supported_xcr0 = 0;
7681         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7682
7683         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7684
7685         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7686
7687         kvm_async_pf_hash_reset(vcpu);
7688         kvm_pmu_init(vcpu);
7689
7690         vcpu->arch.pending_external_vector = -1;
7691
7692         kvm_hv_vcpu_init(vcpu);
7693
7694         return 0;
7695
7696 fail_free_mce_banks:
7697         kfree(vcpu->arch.mce_banks);
7698 fail_free_lapic:
7699         kvm_free_lapic(vcpu);
7700 fail_mmu_destroy:
7701         kvm_mmu_destroy(vcpu);
7702 fail_free_pio_data:
7703         free_page((unsigned long)vcpu->arch.pio_data);
7704 fail:
7705         return r;
7706 }
7707
7708 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7709 {
7710         int idx;
7711
7712         kvm_hv_vcpu_uninit(vcpu);
7713         kvm_pmu_destroy(vcpu);
7714         kfree(vcpu->arch.mce_banks);
7715         kvm_free_lapic(vcpu);
7716         idx = srcu_read_lock(&vcpu->kvm->srcu);
7717         kvm_mmu_destroy(vcpu);
7718         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7719         free_page((unsigned long)vcpu->arch.pio_data);
7720         if (!lapic_in_kernel(vcpu))
7721                 static_key_slow_dec(&kvm_no_apic_vcpu);
7722 }
7723
7724 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7725 {
7726         kvm_x86_ops->sched_in(vcpu, cpu);
7727 }
7728
7729 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7730 {
7731         if (type)
7732                 return -EINVAL;
7733
7734         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7735         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7736         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7737         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7738         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7739
7740         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7741         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7742         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7743         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7744                 &kvm->arch.irq_sources_bitmap);
7745
7746         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7747         mutex_init(&kvm->arch.apic_map_lock);
7748         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7749
7750         pvclock_update_vm_gtod_copy(kvm);
7751
7752         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7753         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7754
7755         kvm_page_track_init(kvm);
7756         kvm_mmu_init_vm(kvm);
7757
7758         return 0;
7759 }
7760
7761 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7762 {
7763         int r;
7764         r = vcpu_load(vcpu);
7765         BUG_ON(r);
7766         kvm_mmu_unload(vcpu);
7767         vcpu_put(vcpu);
7768 }
7769
7770 static void kvm_free_vcpus(struct kvm *kvm)
7771 {
7772         unsigned int i;
7773         struct kvm_vcpu *vcpu;
7774
7775         /*
7776          * Unpin any mmu pages first.
7777          */
7778         kvm_for_each_vcpu(i, vcpu, kvm) {
7779                 kvm_clear_async_pf_completion_queue(vcpu);
7780                 kvm_unload_vcpu_mmu(vcpu);
7781         }
7782         kvm_for_each_vcpu(i, vcpu, kvm)
7783                 kvm_arch_vcpu_free(vcpu);
7784
7785         mutex_lock(&kvm->lock);
7786         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7787                 kvm->vcpus[i] = NULL;
7788
7789         atomic_set(&kvm->online_vcpus, 0);
7790         mutex_unlock(&kvm->lock);
7791 }
7792
7793 void kvm_arch_sync_events(struct kvm *kvm)
7794 {
7795         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7796         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7797         kvm_free_all_assigned_devices(kvm);
7798         kvm_free_pit(kvm);
7799 }
7800
7801 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7802 {
7803         int i, r;
7804         unsigned long hva;
7805         struct kvm_memslots *slots = kvm_memslots(kvm);
7806         struct kvm_memory_slot *slot, old;
7807
7808         /* Called with kvm->slots_lock held.  */
7809         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7810                 return -EINVAL;
7811
7812         slot = id_to_memslot(slots, id);
7813         if (size) {
7814                 if (WARN_ON(slot->npages))
7815                         return -EEXIST;
7816
7817                 /*
7818                  * MAP_SHARED to prevent internal slot pages from being moved
7819                  * by fork()/COW.
7820                  */
7821                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7822                               MAP_SHARED | MAP_ANONYMOUS, 0);
7823                 if (IS_ERR((void *)hva))
7824                         return PTR_ERR((void *)hva);
7825         } else {
7826                 if (!slot->npages)
7827                         return 0;
7828
7829                 hva = 0;
7830         }
7831
7832         old = *slot;
7833         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7834                 struct kvm_userspace_memory_region m;
7835
7836                 m.slot = id | (i << 16);
7837                 m.flags = 0;
7838                 m.guest_phys_addr = gpa;
7839                 m.userspace_addr = hva;
7840                 m.memory_size = size;
7841                 r = __kvm_set_memory_region(kvm, &m);
7842                 if (r < 0)
7843                         return r;
7844         }
7845
7846         if (!size) {
7847                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7848                 WARN_ON(r < 0);
7849         }
7850
7851         return 0;
7852 }
7853 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7854
7855 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7856 {
7857         int r;
7858
7859         mutex_lock(&kvm->slots_lock);
7860         r = __x86_set_memory_region(kvm, id, gpa, size);
7861         mutex_unlock(&kvm->slots_lock);
7862
7863         return r;
7864 }
7865 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7866
7867 void kvm_arch_destroy_vm(struct kvm *kvm)
7868 {
7869         if (current->mm == kvm->mm) {
7870                 /*
7871                  * Free memory regions allocated on behalf of userspace,
7872                  * unless the the memory map has changed due to process exit
7873                  * or fd copying.
7874                  */
7875                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7876                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7877                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7878         }
7879         kvm_iommu_unmap_guest(kvm);
7880         kfree(kvm->arch.vpic);
7881         kfree(kvm->arch.vioapic);
7882         kvm_free_vcpus(kvm);
7883         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7884         kvm_mmu_uninit_vm(kvm);
7885 }
7886
7887 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7888                            struct kvm_memory_slot *dont)
7889 {
7890         int i;
7891
7892         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7893                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7894                         kvfree(free->arch.rmap[i]);
7895                         free->arch.rmap[i] = NULL;
7896                 }
7897                 if (i == 0)
7898                         continue;
7899
7900                 if (!dont || free->arch.lpage_info[i - 1] !=
7901                              dont->arch.lpage_info[i - 1]) {
7902                         kvfree(free->arch.lpage_info[i - 1]);
7903                         free->arch.lpage_info[i - 1] = NULL;
7904                 }
7905         }
7906
7907         kvm_page_track_free_memslot(free, dont);
7908 }
7909
7910 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7911                             unsigned long npages)
7912 {
7913         int i;
7914
7915         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7916                 struct kvm_lpage_info *linfo;
7917                 unsigned long ugfn;
7918                 int lpages;
7919                 int level = i + 1;
7920
7921                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7922                                       slot->base_gfn, level) + 1;
7923
7924                 slot->arch.rmap[i] =
7925                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7926                 if (!slot->arch.rmap[i])
7927                         goto out_free;
7928                 if (i == 0)
7929                         continue;
7930
7931                 linfo = kvm_kvzalloc(lpages * sizeof(*linfo));
7932                 if (!linfo)
7933                         goto out_free;
7934
7935                 slot->arch.lpage_info[i - 1] = linfo;
7936
7937                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7938                         linfo[0].disallow_lpage = 1;
7939                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7940                         linfo[lpages - 1].disallow_lpage = 1;
7941                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7942                 /*
7943                  * If the gfn and userspace address are not aligned wrt each
7944                  * other, or if explicitly asked to, disable large page
7945                  * support for this slot
7946                  */
7947                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7948                     !kvm_largepages_enabled()) {
7949                         unsigned long j;
7950
7951                         for (j = 0; j < lpages; ++j)
7952                                 linfo[j].disallow_lpage = 1;
7953                 }
7954         }
7955
7956         if (kvm_page_track_create_memslot(slot, npages))
7957                 goto out_free;
7958
7959         return 0;
7960
7961 out_free:
7962         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7963                 kvfree(slot->arch.rmap[i]);
7964                 slot->arch.rmap[i] = NULL;
7965                 if (i == 0)
7966                         continue;
7967
7968                 kvfree(slot->arch.lpage_info[i - 1]);
7969                 slot->arch.lpage_info[i - 1] = NULL;
7970         }
7971         return -ENOMEM;
7972 }
7973
7974 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7975 {
7976         /*
7977          * memslots->generation has been incremented.
7978          * mmio generation may have reached its maximum value.
7979          */
7980         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7981 }
7982
7983 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7984                                 struct kvm_memory_slot *memslot,
7985                                 const struct kvm_userspace_memory_region *mem,
7986                                 enum kvm_mr_change change)
7987 {
7988         return 0;
7989 }
7990
7991 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7992                                      struct kvm_memory_slot *new)
7993 {
7994         /* Still write protect RO slot */
7995         if (new->flags & KVM_MEM_READONLY) {
7996                 kvm_mmu_slot_remove_write_access(kvm, new);
7997                 return;
7998         }
7999
8000         /*
8001          * Call kvm_x86_ops dirty logging hooks when they are valid.
8002          *
8003          * kvm_x86_ops->slot_disable_log_dirty is called when:
8004          *
8005          *  - KVM_MR_CREATE with dirty logging is disabled
8006          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8007          *
8008          * The reason is, in case of PML, we need to set D-bit for any slots
8009          * with dirty logging disabled in order to eliminate unnecessary GPA
8010          * logging in PML buffer (and potential PML buffer full VMEXT). This
8011          * guarantees leaving PML enabled during guest's lifetime won't have
8012          * any additonal overhead from PML when guest is running with dirty
8013          * logging disabled for memory slots.
8014          *
8015          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8016          * to dirty logging mode.
8017          *
8018          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8019          *
8020          * In case of write protect:
8021          *
8022          * Write protect all pages for dirty logging.
8023          *
8024          * All the sptes including the large sptes which point to this
8025          * slot are set to readonly. We can not create any new large
8026          * spte on this slot until the end of the logging.
8027          *
8028          * See the comments in fast_page_fault().
8029          */
8030         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8031                 if (kvm_x86_ops->slot_enable_log_dirty)
8032                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8033                 else
8034                         kvm_mmu_slot_remove_write_access(kvm, new);
8035         } else {
8036                 if (kvm_x86_ops->slot_disable_log_dirty)
8037                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8038         }
8039 }
8040
8041 void kvm_arch_commit_memory_region(struct kvm *kvm,
8042                                 const struct kvm_userspace_memory_region *mem,
8043                                 const struct kvm_memory_slot *old,
8044                                 const struct kvm_memory_slot *new,
8045                                 enum kvm_mr_change change)
8046 {
8047         int nr_mmu_pages = 0;
8048
8049         if (!kvm->arch.n_requested_mmu_pages)
8050                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8051
8052         if (nr_mmu_pages)
8053                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8054
8055         /*
8056          * Dirty logging tracks sptes in 4k granularity, meaning that large
8057          * sptes have to be split.  If live migration is successful, the guest
8058          * in the source machine will be destroyed and large sptes will be
8059          * created in the destination. However, if the guest continues to run
8060          * in the source machine (for example if live migration fails), small
8061          * sptes will remain around and cause bad performance.
8062          *
8063          * Scan sptes if dirty logging has been stopped, dropping those
8064          * which can be collapsed into a single large-page spte.  Later
8065          * page faults will create the large-page sptes.
8066          */
8067         if ((change != KVM_MR_DELETE) &&
8068                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8069                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8070                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8071
8072         /*
8073          * Set up write protection and/or dirty logging for the new slot.
8074          *
8075          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8076          * been zapped so no dirty logging staff is needed for old slot. For
8077          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8078          * new and it's also covered when dealing with the new slot.
8079          *
8080          * FIXME: const-ify all uses of struct kvm_memory_slot.
8081          */
8082         if (change != KVM_MR_DELETE)
8083                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8084 }
8085
8086 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8087 {
8088         kvm_mmu_invalidate_zap_all_pages(kvm);
8089 }
8090
8091 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8092                                    struct kvm_memory_slot *slot)
8093 {
8094         kvm_mmu_invalidate_zap_all_pages(kvm);
8095 }
8096
8097 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8098 {
8099         if (!list_empty_careful(&vcpu->async_pf.done))
8100                 return true;
8101
8102         if (kvm_apic_has_events(vcpu))
8103                 return true;
8104
8105         if (vcpu->arch.pv.pv_unhalted)
8106                 return true;
8107
8108         if (atomic_read(&vcpu->arch.nmi_queued))
8109                 return true;
8110
8111         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8112                 return true;
8113
8114         if (kvm_arch_interrupt_allowed(vcpu) &&
8115             kvm_cpu_has_interrupt(vcpu))
8116                 return true;
8117
8118         if (kvm_hv_has_stimer_pending(vcpu))
8119                 return true;
8120
8121         return false;
8122 }
8123
8124 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8125 {
8126         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8127                 kvm_x86_ops->check_nested_events(vcpu, false);
8128
8129         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8130 }
8131
8132 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8133 {
8134         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8135 }
8136
8137 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8138 {
8139         return kvm_x86_ops->interrupt_allowed(vcpu);
8140 }
8141
8142 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8143 {
8144         if (is_64_bit_mode(vcpu))
8145                 return kvm_rip_read(vcpu);
8146         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8147                      kvm_rip_read(vcpu));
8148 }
8149 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8150
8151 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8152 {
8153         return kvm_get_linear_rip(vcpu) == linear_rip;
8154 }
8155 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8156
8157 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8158 {
8159         unsigned long rflags;
8160
8161         rflags = kvm_x86_ops->get_rflags(vcpu);
8162         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8163                 rflags &= ~X86_EFLAGS_TF;
8164         return rflags;
8165 }
8166 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8167
8168 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8169 {
8170         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8171             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8172                 rflags |= X86_EFLAGS_TF;
8173         kvm_x86_ops->set_rflags(vcpu, rflags);
8174 }
8175
8176 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8177 {
8178         __kvm_set_rflags(vcpu, rflags);
8179         kvm_make_request(KVM_REQ_EVENT, vcpu);
8180 }
8181 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8182
8183 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8184 {
8185         int r;
8186
8187         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8188               work->wakeup_all)
8189                 return;
8190
8191         r = kvm_mmu_reload(vcpu);
8192         if (unlikely(r))
8193                 return;
8194
8195         if (!vcpu->arch.mmu.direct_map &&
8196               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8197                 return;
8198
8199         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8200 }
8201
8202 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8203 {
8204         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8205 }
8206
8207 static inline u32 kvm_async_pf_next_probe(u32 key)
8208 {
8209         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8210 }
8211
8212 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8213 {
8214         u32 key = kvm_async_pf_hash_fn(gfn);
8215
8216         while (vcpu->arch.apf.gfns[key] != ~0)
8217                 key = kvm_async_pf_next_probe(key);
8218
8219         vcpu->arch.apf.gfns[key] = gfn;
8220 }
8221
8222 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8223 {
8224         int i;
8225         u32 key = kvm_async_pf_hash_fn(gfn);
8226
8227         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8228                      (vcpu->arch.apf.gfns[key] != gfn &&
8229                       vcpu->arch.apf.gfns[key] != ~0); i++)
8230                 key = kvm_async_pf_next_probe(key);
8231
8232         return key;
8233 }
8234
8235 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8236 {
8237         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8238 }
8239
8240 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8241 {
8242         u32 i, j, k;
8243
8244         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8245         while (true) {
8246                 vcpu->arch.apf.gfns[i] = ~0;
8247                 do {
8248                         j = kvm_async_pf_next_probe(j);
8249                         if (vcpu->arch.apf.gfns[j] == ~0)
8250                                 return;
8251                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8252                         /*
8253                          * k lies cyclically in ]i,j]
8254                          * |    i.k.j |
8255                          * |....j i.k.| or  |.k..j i...|
8256                          */
8257                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8258                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8259                 i = j;
8260         }
8261 }
8262
8263 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8264 {
8265
8266         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8267                                       sizeof(val));
8268 }
8269
8270 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8271                                      struct kvm_async_pf *work)
8272 {
8273         struct x86_exception fault;
8274
8275         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8276         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8277
8278         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8279             (vcpu->arch.apf.send_user_only &&
8280              kvm_x86_ops->get_cpl(vcpu) == 0))
8281                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8282         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8283                 fault.vector = PF_VECTOR;
8284                 fault.error_code_valid = true;
8285                 fault.error_code = 0;
8286                 fault.nested_page_fault = false;
8287                 fault.address = work->arch.token;
8288                 kvm_inject_page_fault(vcpu, &fault);
8289         }
8290 }
8291
8292 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8293                                  struct kvm_async_pf *work)
8294 {
8295         struct x86_exception fault;
8296
8297         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8298         if (work->wakeup_all)
8299                 work->arch.token = ~0; /* broadcast wakeup */
8300         else
8301                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8302
8303         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8304             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8305                 fault.vector = PF_VECTOR;
8306                 fault.error_code_valid = true;
8307                 fault.error_code = 0;
8308                 fault.nested_page_fault = false;
8309                 fault.address = work->arch.token;
8310                 kvm_inject_page_fault(vcpu, &fault);
8311         }
8312         vcpu->arch.apf.halted = false;
8313         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8314 }
8315
8316 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8317 {
8318         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8319                 return true;
8320         else
8321                 return !kvm_event_needs_reinjection(vcpu) &&
8322                         kvm_x86_ops->interrupt_allowed(vcpu);
8323 }
8324
8325 void kvm_arch_start_assignment(struct kvm *kvm)
8326 {
8327         atomic_inc(&kvm->arch.assigned_device_count);
8328 }
8329 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8330
8331 void kvm_arch_end_assignment(struct kvm *kvm)
8332 {
8333         atomic_dec(&kvm->arch.assigned_device_count);
8334 }
8335 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8336
8337 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8338 {
8339         return atomic_read(&kvm->arch.assigned_device_count);
8340 }
8341 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8342
8343 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8344 {
8345         atomic_inc(&kvm->arch.noncoherent_dma_count);
8346 }
8347 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8348
8349 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8350 {
8351         atomic_dec(&kvm->arch.noncoherent_dma_count);
8352 }
8353 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8354
8355 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8356 {
8357         return atomic_read(&kvm->arch.noncoherent_dma_count);
8358 }
8359 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8360
8361 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8362                                       struct irq_bypass_producer *prod)
8363 {
8364         struct kvm_kernel_irqfd *irqfd =
8365                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8366
8367         if (kvm_x86_ops->update_pi_irte) {
8368                 irqfd->producer = prod;
8369                 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8370                                 prod->irq, irqfd->gsi, 1);
8371         }
8372
8373         return -EINVAL;
8374 }
8375
8376 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8377                                       struct irq_bypass_producer *prod)
8378 {
8379         int ret;
8380         struct kvm_kernel_irqfd *irqfd =
8381                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8382
8383         if (!kvm_x86_ops->update_pi_irte) {
8384                 WARN_ON(irqfd->producer != NULL);
8385                 return;
8386         }
8387
8388         WARN_ON(irqfd->producer != prod);
8389         irqfd->producer = NULL;
8390
8391         /*
8392          * When producer of consumer is unregistered, we change back to
8393          * remapped mode, so we can re-use the current implementation
8394          * when the irq is masked/disabed or the consumer side (KVM
8395          * int this case doesn't want to receive the interrupts.
8396         */
8397         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8398         if (ret)
8399                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8400                        " fails: %d\n", irqfd->consumer.token, ret);
8401 }
8402
8403 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8404                                    uint32_t guest_irq, bool set)
8405 {
8406         if (!kvm_x86_ops->update_pi_irte)
8407                 return -EINVAL;
8408
8409         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8410 }
8411
8412 bool kvm_vector_hashing_enabled(void)
8413 {
8414         return vector_hashing;
8415 }
8416 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8417
8418 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8419 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8420 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8421 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8422 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8423 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8424 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8425 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8426 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8427 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8428 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8429 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8430 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8431 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8432 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8433 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8434 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);