arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <trace/events/kvm.h>
  57
  58 #define CREATE_TRACE_POINTS
  59 #include "trace.h"
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define MAX_IO_MSRS 256
  72 #define KVM_MAX_MCE_BANKS 32
  73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  74
  75 #define emul_to_vcpu(ctxt) \
  76         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static
  84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static void process_nmi(struct kvm_vcpu *vcpu);
  94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  95
  96 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 static bool __read_mostly ignore_msrs = 0;
 100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 unsigned int min_timer_period_us = 500;
 103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 104
 105 static bool __read_mostly kvmclock_periodic_sync = true;
 106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 107
 108 bool __read_mostly kvm_has_tsc_control;
 109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 110 u32  __read_mostly kvm_max_guest_tsc_khz;
 111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 112 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 114 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 116 static u64 __read_mostly kvm_default_tsc_scaling_ratio;
 117
 118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 119 static u32 __read_mostly tsc_tolerance_ppm = 250;
 120 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 121
 122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 123 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 124 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 125
 126 static bool __read_mostly vector_hashing = true;
 127 module_param(vector_hashing, bool, S_IRUGO);
 128
 129 static bool __read_mostly backwards_tsc_observed = false;
 130
 131 #define KVM_NR_SHARED_MSRS 16
 132
 133 struct kvm_shared_msrs_global {
 134         int nr;
 135         u32 msrs[KVM_NR_SHARED_MSRS];
 136 };
 137
 138 struct kvm_shared_msrs {
 139         struct user_return_notifier urn;
 140         bool registered;
 141         struct kvm_shared_msr_values {
 142                 u64 host;
 143                 u64 curr;
 144         } values[KVM_NR_SHARED_MSRS];
 145 };
 146
 147 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 148 static struct kvm_shared_msrs __percpu *shared_msrs;
 149
 150 struct kvm_stats_debugfs_item debugfs_entries[] = {
 151         { "pf_fixed", VCPU_STAT(pf_fixed) },
 152         { "pf_guest", VCPU_STAT(pf_guest) },
 153         { "tlb_flush", VCPU_STAT(tlb_flush) },
 154         { "invlpg", VCPU_STAT(invlpg) },
 155         { "exits", VCPU_STAT(exits) },
 156         { "io_exits", VCPU_STAT(io_exits) },
 157         { "mmio_exits", VCPU_STAT(mmio_exits) },
 158         { "signal_exits", VCPU_STAT(signal_exits) },
 159         { "irq_window", VCPU_STAT(irq_window_exits) },
 160         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 161         { "halt_exits", VCPU_STAT(halt_exits) },
 162         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 163         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 164         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 165         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 166         { "hypercalls", VCPU_STAT(hypercalls) },
 167         { "request_irq", VCPU_STAT(request_irq_exits) },
 168         { "irq_exits", VCPU_STAT(irq_exits) },
 169         { "host_state_reload", VCPU_STAT(host_state_reload) },
 170         { "efer_reload", VCPU_STAT(efer_reload) },
 171         { "fpu_reload", VCPU_STAT(fpu_reload) },
 172         { "insn_emulation", VCPU_STAT(insn_emulation) },
 173         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 174         { "irq_injections", VCPU_STAT(irq_injections) },
 175         { "nmi_injections", VCPU_STAT(nmi_injections) },
 176         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 177         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 178         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 179         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 180         { "mmu_flooded", VM_STAT(mmu_flooded) },
 181         { "mmu_recycled", VM_STAT(mmu_recycled) },
 182         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 183         { "mmu_unsync", VM_STAT(mmu_unsync) },
 184         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 185         { "largepages", VM_STAT(lpages) },
 186         { NULL }
 187 };
 188
 189 u64 __read_mostly host_xcr0;
 190
 191 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 192
 193 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 194 {
 195         int i;
 196         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 197                 vcpu->arch.apf.gfns[i] = ~0;
 198 }
 199
 200 static void kvm_on_user_return(struct user_return_notifier *urn)
 201 {
 202         unsigned slot;
 203         struct kvm_shared_msrs *locals
 204                 = container_of(urn, struct kvm_shared_msrs, urn);
 205         struct kvm_shared_msr_values *values;
 206
 207         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 208                 values = &locals->values[slot];
 209                 if (values->host != values->curr) {
 210                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 211                         values->curr = values->host;
 212                 }
 213         }
 214         locals->registered = false;
 215         user_return_notifier_unregister(urn);
 216 }
 217
 218 static void shared_msr_update(unsigned slot, u32 msr)
 219 {
 220         u64 value;
 221         unsigned int cpu = smp_processor_id();
 222         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 223
 224         /* only read, and nobody should modify it at this time,
 225          * so don't need lock */
 226         if (slot >= shared_msrs_global.nr) {
 227                 printk(KERN_ERR "kvm: invalid MSR slot!");
 228                 return;
 229         }
 230         rdmsrl_safe(msr, &value);
 231         smsr->values[slot].host = value;
 232         smsr->values[slot].curr = value;
 233 }
 234
 235 void kvm_define_shared_msr(unsigned slot, u32 msr)
 236 {
 237         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 238         shared_msrs_global.msrs[slot] = msr;
 239         if (slot >= shared_msrs_global.nr)
 240                 shared_msrs_global.nr = slot + 1;
 241 }
 242 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 243
 244 static void kvm_shared_msr_cpu_online(void)
 245 {
 246         unsigned i;
 247
 248         for (i = 0; i < shared_msrs_global.nr; ++i)
 249                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 250 }
 251
 252 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 253 {
 254         unsigned int cpu = smp_processor_id();
 255         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 256         int err;
 257
 258         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 259                 return 0;
 260         smsr->values[slot].curr = value;
 261         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 262         if (err)
 263                 return 1;
 264
 265         if (!smsr->registered) {
 266                 smsr->urn.on_user_return = kvm_on_user_return;
 267                 user_return_notifier_register(&smsr->urn);
 268                 smsr->registered = true;
 269         }
 270         return 0;
 271 }
 272 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 273
 274 static void drop_user_return_notifiers(void)
 275 {
 276         unsigned int cpu = smp_processor_id();
 277         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 278
 279         if (smsr->registered)
 280                 kvm_on_user_return(&smsr->urn);
 281 }
 282
 283 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 284 {
 285         return vcpu->arch.apic_base;
 286 }
 287 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 288
 289 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 290 {
 291         u64 old_state = vcpu->arch.apic_base &
 292                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 293         u64 new_state = msr_info->data &
 294                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 295         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 296                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 297
 298         if (!msr_info->host_initiated &&
 299             ((msr_info->data & reserved_bits) != 0 ||
 300              new_state == X2APIC_ENABLE ||
 301              (new_state == MSR_IA32_APICBASE_ENABLE &&
 302               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 303              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 304               old_state == 0)))
 305                 return 1;
 306
 307         kvm_lapic_set_base(vcpu, msr_info->data);
 308         return 0;
 309 }
 310 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 311
 312 asmlinkage __visible void kvm_spurious_fault(void)
 313 {
 314         /* Fault while not rebooting.  We want the trace. */
 315         BUG();
 316 }
 317 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 318
 319 #define EXCPT_BENIGN            0
 320 #define EXCPT_CONTRIBUTORY      1
 321 #define EXCPT_PF                2
 322
 323 static int exception_class(int vector)
 324 {
 325         switch (vector) {
 326         case PF_VECTOR:
 327                 return EXCPT_PF;
 328         case DE_VECTOR:
 329         case TS_VECTOR:
 330         case NP_VECTOR:
 331         case SS_VECTOR:
 332         case GP_VECTOR:
 333                 return EXCPT_CONTRIBUTORY;
 334         default:
 335                 break;
 336         }
 337         return EXCPT_BENIGN;
 338 }
 339
 340 #define EXCPT_FAULT             0
 341 #define EXCPT_TRAP              1
 342 #define EXCPT_ABORT             2
 343 #define EXCPT_INTERRUPT         3
 344
 345 static int exception_type(int vector)
 346 {
 347         unsigned int mask;
 348
 349         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 350                 return EXCPT_INTERRUPT;
 351
 352         mask = 1 << vector;
 353
 354         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 355         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 356                 return EXCPT_TRAP;
 357
 358         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 359                 return EXCPT_ABORT;
 360
 361         /* Reserved exceptions will result in fault */
 362         return EXCPT_FAULT;
 363 }
 364
 365 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 366                 unsigned nr, bool has_error, u32 error_code,
 367                 bool reinject)
 368 {
 369         u32 prev_nr;
 370         int class1, class2;
 371
 372         kvm_make_request(KVM_REQ_EVENT, vcpu);
 373
 374         if (!vcpu->arch.exception.pending) {
 375         queue:
 376                 if (has_error && !is_protmode(vcpu))
 377                         has_error = false;
 378                 vcpu->arch.exception.pending = true;
 379                 vcpu->arch.exception.has_error_code = has_error;
 380                 vcpu->arch.exception.nr = nr;
 381                 vcpu->arch.exception.error_code = error_code;
 382                 vcpu->arch.exception.reinject = reinject;
 383                 return;
 384         }
 385
 386         /* to check exception */
 387         prev_nr = vcpu->arch.exception.nr;
 388         if (prev_nr == DF_VECTOR) {
 389                 /* triple fault -> shutdown */
 390                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 391                 return;
 392         }
 393         class1 = exception_class(prev_nr);
 394         class2 = exception_class(nr);
 395         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 396                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 397                 /* generate double fault per SDM Table 5-5 */
 398                 vcpu->arch.exception.pending = true;
 399                 vcpu->arch.exception.has_error_code = true;
 400                 vcpu->arch.exception.nr = DF_VECTOR;
 401                 vcpu->arch.exception.error_code = 0;
 402         } else
 403                 /* replace previous exception with a new one in a hope
 404                    that instruction re-execution will regenerate lost
 405                    exception */
 406                 goto queue;
 407 }
 408
 409 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 410 {
 411         kvm_multiple_exception(vcpu, nr, false, 0, false);
 412 }
 413 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 414
 415 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 416 {
 417         kvm_multiple_exception(vcpu, nr, false, 0, true);
 418 }
 419 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 420
 421 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 422 {
 423         if (err)
 424                 kvm_inject_gp(vcpu, 0);
 425         else
 426                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 427 }
 428 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 429
 430 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 431 {
 432         ++vcpu->stat.pf_guest;
 433         vcpu->arch.cr2 = fault->address;
 434         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 435 }
 436 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 437
 438 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 439 {
 440         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 441                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 442         else
 443                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 444
 445         return fault->nested_page_fault;
 446 }
 447
 448 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 449 {
 450         atomic_inc(&vcpu->arch.nmi_queued);
 451         kvm_make_request(KVM_REQ_NMI, vcpu);
 452 }
 453 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 454
 455 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 456 {
 457         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 458 }
 459 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 460
 461 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 462 {
 463         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 464 }
 465 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 466
 467 /*
 468  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 469  * a #GP and return false.
 470  */
 471 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 472 {
 473         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 474                 return true;
 475         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 476         return false;
 477 }
 478 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 479
 480 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 481 {
 482         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 483                 return true;
 484
 485         kvm_queue_exception(vcpu, UD_VECTOR);
 486         return false;
 487 }
 488 EXPORT_SYMBOL_GPL(kvm_require_dr);
 489
 490 /*
 491  * This function will be used to read from the physical memory of the currently
 492  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 493  * can read from guest physical or from the guest's guest physical memory.
 494  */
 495 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 496                             gfn_t ngfn, void *data, int offset, int len,
 497                             u32 access)
 498 {
 499         struct x86_exception exception;
 500         gfn_t real_gfn;
 501         gpa_t ngpa;
 502
 503         ngpa     = gfn_to_gpa(ngfn);
 504         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 505         if (real_gfn == UNMAPPED_GVA)
 506                 return -EFAULT;
 507
 508         real_gfn = gpa_to_gfn(real_gfn);
 509
 510         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 511 }
 512 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 513
 514 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 515                                void *data, int offset, int len, u32 access)
 516 {
 517         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 518                                        data, offset, len, access);
 519 }
 520
 521 /*
 522  * Load the pae pdptrs.  Return true is they are all valid.
 523  */
 524 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 525 {
 526         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 527         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 528         int i;
 529         int ret;
 530         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 531
 532         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 533                                       offset * sizeof(u64), sizeof(pdpte),
 534                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 535         if (ret < 0) {
 536                 ret = 0;
 537                 goto out;
 538         }
 539         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 540                 if (is_present_gpte(pdpte[i]) &&
 541                     (pdpte[i] &
 542                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 543                         ret = 0;
 544                         goto out;
 545                 }
 546         }
 547         ret = 1;
 548
 549         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 550         __set_bit(VCPU_EXREG_PDPTR,
 551                   (unsigned long *)&vcpu->arch.regs_avail);
 552         __set_bit(VCPU_EXREG_PDPTR,
 553                   (unsigned long *)&vcpu->arch.regs_dirty);
 554 out:
 555
 556         return ret;
 557 }
 558 EXPORT_SYMBOL_GPL(load_pdptrs);
 559
 560 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 561 {
 562         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 563         bool changed = true;
 564         int offset;
 565         gfn_t gfn;
 566         int r;
 567
 568         if (is_long_mode(vcpu) || !is_pae(vcpu))
 569                 return false;
 570
 571         if (!test_bit(VCPU_EXREG_PDPTR,
 572                       (unsigned long *)&vcpu->arch.regs_avail))
 573                 return true;
 574
 575         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 576         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 577         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 578                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 579         if (r < 0)
 580                 goto out;
 581         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 582 out:
 583
 584         return changed;
 585 }
 586
 587 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 588 {
 589         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 590         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 591
 592         cr0 |= X86_CR0_ET;
 593
 594 #ifdef CONFIG_X86_64
 595         if (cr0 & 0xffffffff00000000UL)
 596                 return 1;
 597 #endif
 598
 599         cr0 &= ~CR0_RESERVED_BITS;
 600
 601         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 602                 return 1;
 603
 604         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 605                 return 1;
 606
 607         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 608 #ifdef CONFIG_X86_64
 609                 if ((vcpu->arch.efer & EFER_LME)) {
 610                         int cs_db, cs_l;
 611
 612                         if (!is_pae(vcpu))
 613                                 return 1;
 614                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 615                         if (cs_l)
 616                                 return 1;
 617                 } else
 618 #endif
 619                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 620                                                  kvm_read_cr3(vcpu)))
 621                         return 1;
 622         }
 623
 624         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 625                 return 1;
 626
 627         kvm_x86_ops->set_cr0(vcpu, cr0);
 628
 629         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 630                 kvm_clear_async_pf_completion_queue(vcpu);
 631                 kvm_async_pf_hash_reset(vcpu);
 632         }
 633
 634         if ((cr0 ^ old_cr0) & update_bits)
 635                 kvm_mmu_reset_context(vcpu);
 636
 637         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 638             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 639             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 640                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 641
 642         return 0;
 643 }
 644 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 645
 646 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 647 {
 648         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 649 }
 650 EXPORT_SYMBOL_GPL(kvm_lmsw);
 651
 652 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 653 {
 654         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 655                         !vcpu->guest_xcr0_loaded) {
 656                 /* kvm_set_xcr() also depends on this */
 657                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 658                 vcpu->guest_xcr0_loaded = 1;
 659         }
 660 }
 661
 662 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 663 {
 664         if (vcpu->guest_xcr0_loaded) {
 665                 if (vcpu->arch.xcr0 != host_xcr0)
 666                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 667                 vcpu->guest_xcr0_loaded = 0;
 668         }
 669 }
 670
 671 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 672 {
 673         u64 xcr0 = xcr;
 674         u64 old_xcr0 = vcpu->arch.xcr0;
 675         u64 valid_bits;
 676
 677         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 678         if (index != XCR_XFEATURE_ENABLED_MASK)
 679                 return 1;
 680         if (!(xcr0 & XFEATURE_MASK_FP))
 681                 return 1;
 682         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 683                 return 1;
 684
 685         /*
 686          * Do not allow the guest to set bits that we do not support
 687          * saving.  However, xcr0 bit 0 is always set, even if the
 688          * emulated CPU does not support XSAVE (see fx_init).
 689          */
 690         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 691         if (xcr0 & ~valid_bits)
 692                 return 1;
 693
 694         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 695             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 696                 return 1;
 697
 698         if (xcr0 & XFEATURE_MASK_AVX512) {
 699                 if (!(xcr0 & XFEATURE_MASK_YMM))
 700                         return 1;
 701                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 702                         return 1;
 703         }
 704         vcpu->arch.xcr0 = xcr0;
 705
 706         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 707                 kvm_update_cpuid(vcpu);
 708         return 0;
 709 }
 710
 711 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 712 {
 713         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 714             __kvm_set_xcr(vcpu, index, xcr)) {
 715                 kvm_inject_gp(vcpu, 0);
 716                 return 1;
 717         }
 718         return 0;
 719 }
 720 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 721
 722 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 723 {
 724         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 725         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 726                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 727
 728         if (cr4 & CR4_RESERVED_BITS)
 729                 return 1;
 730
 731         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 732                 return 1;
 733
 734         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 735                 return 1;
 736
 737         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 738                 return 1;
 739
 740         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 741                 return 1;
 742
 743         if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
 744                 return 1;
 745
 746         if (is_long_mode(vcpu)) {
 747                 if (!(cr4 & X86_CR4_PAE))
 748                         return 1;
 749         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 750                    && ((cr4 ^ old_cr4) & pdptr_bits)
 751                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 752                                    kvm_read_cr3(vcpu)))
 753                 return 1;
 754
 755         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 756                 if (!guest_cpuid_has_pcid(vcpu))
 757                         return 1;
 758
 759                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 760                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 761                         return 1;
 762         }
 763
 764         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 765                 return 1;
 766
 767         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 768             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 769                 kvm_mmu_reset_context(vcpu);
 770
 771         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 772                 kvm_update_cpuid(vcpu);
 773
 774         return 0;
 775 }
 776 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 777
 778 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 779 {
 780 #ifdef CONFIG_X86_64
 781         cr3 &= ~CR3_PCID_INVD;
 782 #endif
 783
 784         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 785                 kvm_mmu_sync_roots(vcpu);
 786                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 787                 return 0;
 788         }
 789
 790         if (is_long_mode(vcpu)) {
 791                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 792                         return 1;
 793         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 794                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 795                 return 1;
 796
 797         vcpu->arch.cr3 = cr3;
 798         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 799         kvm_mmu_new_cr3(vcpu);
 800         return 0;
 801 }
 802 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 803
 804 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 805 {
 806         if (cr8 & CR8_RESERVED_BITS)
 807                 return 1;
 808         if (lapic_in_kernel(vcpu))
 809                 kvm_lapic_set_tpr(vcpu, cr8);
 810         else
 811                 vcpu->arch.cr8 = cr8;
 812         return 0;
 813 }
 814 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 815
 816 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 817 {
 818         if (lapic_in_kernel(vcpu))
 819                 return kvm_lapic_get_cr8(vcpu);
 820         else
 821                 return vcpu->arch.cr8;
 822 }
 823 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 824
 825 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 826 {
 827         int i;
 828
 829         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 830                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 831                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 832                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 833         }
 834 }
 835
 836 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 837 {
 838         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 839                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 840 }
 841
 842 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 843 {
 844         unsigned long dr7;
 845
 846         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 847                 dr7 = vcpu->arch.guest_debug_dr7;
 848         else
 849                 dr7 = vcpu->arch.dr7;
 850         kvm_x86_ops->set_dr7(vcpu, dr7);
 851         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 852         if (dr7 & DR7_BP_EN_MASK)
 853                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 854 }
 855
 856 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 857 {
 858         u64 fixed = DR6_FIXED_1;
 859
 860         if (!guest_cpuid_has_rtm(vcpu))
 861                 fixed |= DR6_RTM;
 862         return fixed;
 863 }
 864
 865 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 866 {
 867         switch (dr) {
 868         case 0 ... 3:
 869                 vcpu->arch.db[dr] = val;
 870                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 871                         vcpu->arch.eff_db[dr] = val;
 872                 break;
 873         case 4:
 874                 /* fall through */
 875         case 6:
 876                 if (val & 0xffffffff00000000ULL)
 877                         return -1; /* #GP */
 878                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 879                 kvm_update_dr6(vcpu);
 880                 break;
 881         case 5:
 882                 /* fall through */
 883         default: /* 7 */
 884                 if (val & 0xffffffff00000000ULL)
 885                         return -1; /* #GP */
 886                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 887                 kvm_update_dr7(vcpu);
 888                 break;
 889         }
 890
 891         return 0;
 892 }
 893
 894 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 895 {
 896         if (__kvm_set_dr(vcpu, dr, val)) {
 897                 kvm_inject_gp(vcpu, 0);
 898                 return 1;
 899         }
 900         return 0;
 901 }
 902 EXPORT_SYMBOL_GPL(kvm_set_dr);
 903
 904 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 905 {
 906         switch (dr) {
 907         case 0 ... 3:
 908                 *val = vcpu->arch.db[dr];
 909                 break;
 910         case 4:
 911                 /* fall through */
 912         case 6:
 913                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 914                         *val = vcpu->arch.dr6;
 915                 else
 916                         *val = kvm_x86_ops->get_dr6(vcpu);
 917                 break;
 918         case 5:
 919                 /* fall through */
 920         default: /* 7 */
 921                 *val = vcpu->arch.dr7;
 922                 break;
 923         }
 924         return 0;
 925 }
 926 EXPORT_SYMBOL_GPL(kvm_get_dr);
 927
 928 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 929 {
 930         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 931         u64 data;
 932         int err;
 933
 934         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 935         if (err)
 936                 return err;
 937         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 938         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 939         return err;
 940 }
 941 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 942
 943 /*
 944  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 945  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 946  *
 947  * This list is modified at module load time to reflect the
 948  * capabilities of the host cpu. This capabilities test skips MSRs that are
 949  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 950  * may depend on host virtualization features rather than host cpu features.
 951  */
 952
 953 static u32 msrs_to_save[] = {
 954         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 955         MSR_STAR,
 956 #ifdef CONFIG_X86_64
 957         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 958 #endif
 959         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 960         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 961 };
 962
 963 static unsigned num_msrs_to_save;
 964
 965 static u32 emulated_msrs[] = {
 966         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 967         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 968         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 969         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 970         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 971         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 972         HV_X64_MSR_RESET,
 973         HV_X64_MSR_VP_INDEX,
 974         HV_X64_MSR_VP_RUNTIME,
 975         HV_X64_MSR_SCONTROL,
 976         HV_X64_MSR_STIMER0_CONFIG,
 977         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 978         MSR_KVM_PV_EOI_EN,
 979
 980         MSR_IA32_TSC_ADJUST,
 981         MSR_IA32_TSCDEADLINE,
 982         MSR_IA32_MISC_ENABLE,
 983         MSR_IA32_MCG_STATUS,
 984         MSR_IA32_MCG_CTL,
 985         MSR_IA32_SMBASE,
 986 };
 987
 988 static unsigned num_emulated_msrs;
 989
 990 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 991 {
 992         if (efer & efer_reserved_bits)
 993                 return false;
 994
 995         if (efer & EFER_FFXSR) {
 996                 struct kvm_cpuid_entry2 *feat;
 997
 998                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 999                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
1000                         return false;
1001         }
1002
1003         if (efer & EFER_SVME) {
1004                 struct kvm_cpuid_entry2 *feat;
1005
1006                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1007                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1008                         return false;
1009         }
1010
1011         return true;
1012 }
1013 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1014
1015 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1016 {
1017         u64 old_efer = vcpu->arch.efer;
1018
1019         if (!kvm_valid_efer(vcpu, efer))
1020                 return 1;
1021
1022         if (is_paging(vcpu)
1023             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1024                 return 1;
1025
1026         efer &= ~EFER_LMA;
1027         efer |= vcpu->arch.efer & EFER_LMA;
1028
1029         kvm_x86_ops->set_efer(vcpu, efer);
1030
1031         /* Update reserved bits */
1032         if ((efer ^ old_efer) & EFER_NX)
1033                 kvm_mmu_reset_context(vcpu);
1034
1035         return 0;
1036 }
1037
1038 void kvm_enable_efer_bits(u64 mask)
1039 {
1040        efer_reserved_bits &= ~mask;
1041 }
1042 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1043
1044 /*
1045  * Writes msr value into into the appropriate "register".
1046  * Returns 0 on success, non-0 otherwise.
1047  * Assumes vcpu_load() was already called.
1048  */
1049 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1050 {
1051         switch (msr->index) {
1052         case MSR_FS_BASE:
1053         case MSR_GS_BASE:
1054         case MSR_KERNEL_GS_BASE:
1055         case MSR_CSTAR:
1056         case MSR_LSTAR:
1057                 if (is_noncanonical_address(msr->data))
1058                         return 1;
1059                 break;
1060         case MSR_IA32_SYSENTER_EIP:
1061         case MSR_IA32_SYSENTER_ESP:
1062                 /*
1063                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1064                  * non-canonical address is written on Intel but not on
1065                  * AMD (which ignores the top 32-bits, because it does
1066                  * not implement 64-bit SYSENTER).
1067                  *
1068                  * 64-bit code should hence be able to write a non-canonical
1069                  * value on AMD.  Making the address canonical ensures that
1070                  * vmentry does not fail on Intel after writing a non-canonical
1071                  * value, and that something deterministic happens if the guest
1072                  * invokes 64-bit SYSENTER.
1073                  */
1074                 msr->data = get_canonical(msr->data);
1075         }
1076         return kvm_x86_ops->set_msr(vcpu, msr);
1077 }
1078 EXPORT_SYMBOL_GPL(kvm_set_msr);
1079
1080 /*
1081  * Adapt set_msr() to msr_io()'s calling convention
1082  */
1083 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1084 {
1085         struct msr_data msr;
1086         int r;
1087
1088         msr.index = index;
1089         msr.host_initiated = true;
1090         r = kvm_get_msr(vcpu, &msr);
1091         if (r)
1092                 return r;
1093
1094         *data = msr.data;
1095         return 0;
1096 }
1097
1098 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1099 {
1100         struct msr_data msr;
1101
1102         msr.data = *data;
1103         msr.index = index;
1104         msr.host_initiated = true;
1105         return kvm_set_msr(vcpu, &msr);
1106 }
1107
1108 #ifdef CONFIG_X86_64
1109 struct pvclock_gtod_data {
1110         seqcount_t      seq;
1111
1112         struct { /* extract of a clocksource struct */
1113                 int vclock_mode;
1114                 cycle_t cycle_last;
1115                 cycle_t mask;
1116                 u32     mult;
1117                 u32     shift;
1118         } clock;
1119
1120         u64             boot_ns;
1121         u64             nsec_base;
1122 };
1123
1124 static struct pvclock_gtod_data pvclock_gtod_data;
1125
1126 static void update_pvclock_gtod(struct timekeeper *tk)
1127 {
1128         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1129         u64 boot_ns;
1130
1131         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1132
1133         write_seqcount_begin(&vdata->seq);
1134
1135         /* copy pvclock gtod data */
1136         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1137         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1138         vdata->clock.mask               = tk->tkr_mono.mask;
1139         vdata->clock.mult               = tk->tkr_mono.mult;
1140         vdata->clock.shift              = tk->tkr_mono.shift;
1141
1142         vdata->boot_ns                  = boot_ns;
1143         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1144
1145         write_seqcount_end(&vdata->seq);
1146 }
1147 #endif
1148
1149 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1150 {
1151         /*
1152          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1153          * vcpu_enter_guest.  This function is only called from
1154          * the physical CPU that is running vcpu.
1155          */
1156         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1157 }
1158
1159 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1160 {
1161         int version;
1162         int r;
1163         struct pvclock_wall_clock wc;
1164         struct timespec boot;
1165
1166         if (!wall_clock)
1167                 return;
1168
1169         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1170         if (r)
1171                 return;
1172
1173         if (version & 1)
1174                 ++version;  /* first time write, random junk */
1175
1176         ++version;
1177
1178         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1179                 return;
1180
1181         /*
1182          * The guest calculates current wall clock time by adding
1183          * system time (updated by kvm_guest_time_update below) to the
1184          * wall clock specified here.  guest system time equals host
1185          * system time for us, thus we must fill in host boot time here.
1186          */
1187         getboottime(&boot);
1188
1189         if (kvm->arch.kvmclock_offset) {
1190                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1191                 boot = timespec_sub(boot, ts);
1192         }
1193         wc.sec = boot.tv_sec;
1194         wc.nsec = boot.tv_nsec;
1195         wc.version = version;
1196
1197         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1198
1199         version++;
1200         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1201 }
1202
1203 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1204 {
1205         do_shl32_div32(dividend, divisor);
1206         return dividend;
1207 }
1208
1209 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1210                                s8 *pshift, u32 *pmultiplier)
1211 {
1212         uint64_t scaled64;
1213         int32_t  shift = 0;
1214         uint64_t tps64;
1215         uint32_t tps32;
1216
1217         tps64 = base_hz;
1218         scaled64 = scaled_hz;
1219         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1220                 tps64 >>= 1;
1221                 shift--;
1222         }
1223
1224         tps32 = (uint32_t)tps64;
1225         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1226                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1227                         scaled64 >>= 1;
1228                 else
1229                         tps32 <<= 1;
1230                 shift++;
1231         }
1232
1233         *pshift = shift;
1234         *pmultiplier = div_frac(scaled64, tps32);
1235
1236         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1237                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1238 }
1239
1240 #ifdef CONFIG_X86_64
1241 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1242 #endif
1243
1244 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1245 static unsigned long max_tsc_khz;
1246
1247 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1248 {
1249         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1250                                    vcpu->arch.virtual_tsc_shift);
1251 }
1252
1253 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1254 {
1255         u64 v = (u64)khz * (1000000 + ppm);
1256         do_div(v, 1000000);
1257         return v;
1258 }
1259
1260 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1261 {
1262         u64 ratio;
1263
1264         /* Guest TSC same frequency as host TSC? */
1265         if (!scale) {
1266                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1267                 return 0;
1268         }
1269
1270         /* TSC scaling supported? */
1271         if (!kvm_has_tsc_control) {
1272                 if (user_tsc_khz > tsc_khz) {
1273                         vcpu->arch.tsc_catchup = 1;
1274                         vcpu->arch.tsc_always_catchup = 1;
1275                         return 0;
1276                 } else {
1277                         WARN(1, "user requested TSC rate below hardware speed\n");
1278                         return -1;
1279                 }
1280         }
1281
1282         /* TSC scaling required  - calculate ratio */
1283         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1284                                 user_tsc_khz, tsc_khz);
1285
1286         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1287                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1288                           user_tsc_khz);
1289                 return -1;
1290         }
1291
1292         vcpu->arch.tsc_scaling_ratio = ratio;
1293         return 0;
1294 }
1295
1296 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1297 {
1298         u32 thresh_lo, thresh_hi;
1299         int use_scaling = 0;
1300
1301         /* tsc_khz can be zero if TSC calibration fails */
1302         if (user_tsc_khz == 0) {
1303                 /* set tsc_scaling_ratio to a safe value */
1304                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1305                 return -1;
1306         }
1307
1308         /* Compute a scale to convert nanoseconds in TSC cycles */
1309         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1310                            &vcpu->arch.virtual_tsc_shift,
1311                            &vcpu->arch.virtual_tsc_mult);
1312         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1313
1314         /*
1315          * Compute the variation in TSC rate which is acceptable
1316          * within the range of tolerance and decide if the
1317          * rate being applied is within that bounds of the hardware
1318          * rate.  If so, no scaling or compensation need be done.
1319          */
1320         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1321         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1322         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1323                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1324                 use_scaling = 1;
1325         }
1326         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1327 }
1328
1329 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1330 {
1331         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1332                                       vcpu->arch.virtual_tsc_mult,
1333                                       vcpu->arch.virtual_tsc_shift);
1334         tsc += vcpu->arch.this_tsc_write;
1335         return tsc;
1336 }
1337
1338 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1339 {
1340 #ifdef CONFIG_X86_64
1341         bool vcpus_matched;
1342         struct kvm_arch *ka = &vcpu->kvm->arch;
1343         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1344
1345         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1346                          atomic_read(&vcpu->kvm->online_vcpus));
1347
1348         /*
1349          * Once the masterclock is enabled, always perform request in
1350          * order to update it.
1351          *
1352          * In order to enable masterclock, the host clocksource must be TSC
1353          * and the vcpus need to have matched TSCs.  When that happens,
1354          * perform request to enable masterclock.
1355          */
1356         if (ka->use_master_clock ||
1357             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1358                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1359
1360         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1361                             atomic_read(&vcpu->kvm->online_vcpus),
1362                             ka->use_master_clock, gtod->clock.vclock_mode);
1363 #endif
1364 }
1365
1366 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1367 {
1368         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1369         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1370 }
1371
1372 /*
1373  * Multiply tsc by a fixed point number represented by ratio.
1374  *
1375  * The most significant 64-N bits (mult) of ratio represent the
1376  * integral part of the fixed point number; the remaining N bits
1377  * (frac) represent the fractional part, ie. ratio represents a fixed
1378  * point number (mult + frac * 2^(-N)).
1379  *
1380  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1381  */
1382 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1383 {
1384         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1385 }
1386
1387 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1388 {
1389         u64 _tsc = tsc;
1390         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1391
1392         if (ratio != kvm_default_tsc_scaling_ratio)
1393                 _tsc = __scale_tsc(ratio, tsc);
1394
1395         return _tsc;
1396 }
1397 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1398
1399 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1400 {
1401         u64 tsc;
1402
1403         tsc = kvm_scale_tsc(vcpu, rdtsc());
1404
1405         return target_tsc - tsc;
1406 }
1407
1408 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1409 {
1410         return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1411 }
1412 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1413
1414 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1415 {
1416         struct kvm *kvm = vcpu->kvm;
1417         u64 offset, ns, elapsed;
1418         unsigned long flags;
1419         s64 usdiff;
1420         bool matched;
1421         bool already_matched;
1422         u64 data = msr->data;
1423
1424         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1425         offset = kvm_compute_tsc_offset(vcpu, data);
1426         ns = get_kernel_ns();
1427         elapsed = ns - kvm->arch.last_tsc_nsec;
1428
1429         if (vcpu->arch.virtual_tsc_khz) {
1430                 int faulted = 0;
1431
1432                 /* n.b - signed multiplication and division required */
1433                 usdiff = data - kvm->arch.last_tsc_write;
1434 #ifdef CONFIG_X86_64
1435                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1436 #else
1437                 /* do_div() only does unsigned */
1438                 asm("1: idivl %[divisor]\n"
1439                     "2: xor %%edx, %%edx\n"
1440                     "   movl $0, %[faulted]\n"
1441                     "3:\n"
1442                     ".section .fixup,\"ax\"\n"
1443                     "4: movl $1, %[faulted]\n"
1444                     "   jmp  3b\n"
1445                     ".previous\n"
1446
1447                 _ASM_EXTABLE(1b, 4b)
1448
1449                 : "=A"(usdiff), [faulted] "=r" (faulted)
1450                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1451
1452 #endif
1453                 do_div(elapsed, 1000);
1454                 usdiff -= elapsed;
1455                 if (usdiff < 0)
1456                         usdiff = -usdiff;
1457
1458                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1459                 if (faulted)
1460                         usdiff = USEC_PER_SEC;
1461         } else
1462                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1463
1464         /*
1465          * Special case: TSC write with a small delta (1 second) of virtual
1466          * cycle time against real time is interpreted as an attempt to
1467          * synchronize the CPU.
1468          *
1469          * For a reliable TSC, we can match TSC offsets, and for an unstable
1470          * TSC, we add elapsed time in this computation.  We could let the
1471          * compensation code attempt to catch up if we fall behind, but
1472          * it's better to try to match offsets from the beginning.
1473          */
1474         if (usdiff < USEC_PER_SEC &&
1475             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1476                 if (!check_tsc_unstable()) {
1477                         offset = kvm->arch.cur_tsc_offset;
1478                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1479                 } else {
1480                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1481                         data += delta;
1482                         offset = kvm_compute_tsc_offset(vcpu, data);
1483                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1484                 }
1485                 matched = true;
1486                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1487         } else {
1488                 /*
1489                  * We split periods of matched TSC writes into generations.
1490                  * For each generation, we track the original measured
1491                  * nanosecond time, offset, and write, so if TSCs are in
1492                  * sync, we can match exact offset, and if not, we can match
1493                  * exact software computation in compute_guest_tsc()
1494                  *
1495                  * These values are tracked in kvm->arch.cur_xxx variables.
1496                  */
1497                 kvm->arch.cur_tsc_generation++;
1498                 kvm->arch.cur_tsc_nsec = ns;
1499                 kvm->arch.cur_tsc_write = data;
1500                 kvm->arch.cur_tsc_offset = offset;
1501                 matched = false;
1502                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1503                          kvm->arch.cur_tsc_generation, data);
1504         }
1505
1506         /*
1507          * We also track th most recent recorded KHZ, write and time to
1508          * allow the matching interval to be extended at each write.
1509          */
1510         kvm->arch.last_tsc_nsec = ns;
1511         kvm->arch.last_tsc_write = data;
1512         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1513
1514         vcpu->arch.last_guest_tsc = data;
1515
1516         /* Keep track of which generation this VCPU has synchronized to */
1517         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1518         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1519         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1520
1521         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1522                 update_ia32_tsc_adjust_msr(vcpu, offset);
1523         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1524         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1525
1526         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1527         if (!matched) {
1528                 kvm->arch.nr_vcpus_matched_tsc = 0;
1529         } else if (!already_matched) {
1530                 kvm->arch.nr_vcpus_matched_tsc++;
1531         }
1532
1533         kvm_track_tsc_matching(vcpu);
1534         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1535 }
1536
1537 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1538
1539 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1540                                            s64 adjustment)
1541 {
1542         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1543 }
1544
1545 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1546 {
1547         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1548                 WARN_ON(adjustment < 0);
1549         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1550         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1551 }
1552
1553 #ifdef CONFIG_X86_64
1554
1555 static cycle_t read_tsc(void)
1556 {
1557         cycle_t ret = (cycle_t)rdtsc_ordered();
1558         u64 last = pvclock_gtod_data.clock.cycle_last;
1559
1560         if (likely(ret >= last))
1561                 return ret;
1562
1563         /*
1564          * GCC likes to generate cmov here, but this branch is extremely
1565          * predictable (it's just a function of time and the likely is
1566          * very likely) and there's a data dependence, so force GCC
1567          * to generate a branch instead.  I don't barrier() because
1568          * we don't actually need a barrier, and if this function
1569          * ever gets inlined it will generate worse code.
1570          */
1571         asm volatile ("");
1572         return last;
1573 }
1574
1575 static inline u64 vgettsc(cycle_t *cycle_now)
1576 {
1577         long v;
1578         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1579
1580         *cycle_now = read_tsc();
1581
1582         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1583         return v * gtod->clock.mult;
1584 }
1585
1586 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1587 {
1588         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1589         unsigned long seq;
1590         int mode;
1591         u64 ns;
1592
1593         do {
1594                 seq = read_seqcount_begin(&gtod->seq);
1595                 mode = gtod->clock.vclock_mode;
1596                 ns = gtod->nsec_base;
1597                 ns += vgettsc(cycle_now);
1598                 ns >>= gtod->clock.shift;
1599                 ns += gtod->boot_ns;
1600         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1601         *t = ns;
1602
1603         return mode;
1604 }
1605
1606 /* returns true if host is using tsc clocksource */
1607 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1608 {
1609         /* checked again under seqlock below */
1610         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1611                 return false;
1612
1613         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1614 }
1615 #endif
1616
1617 /*
1618  *
1619  * Assuming a stable TSC across physical CPUS, and a stable TSC
1620  * across virtual CPUs, the following condition is possible.
1621  * Each numbered line represents an event visible to both
1622  * CPUs at the next numbered event.
1623  *
1624  * "timespecX" represents host monotonic time. "tscX" represents
1625  * RDTSC value.
1626  *
1627  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1628  *
1629  * 1.  read timespec0,tsc0
1630  * 2.                                   | timespec1 = timespec0 + N
1631  *                                      | tsc1 = tsc0 + M
1632  * 3. transition to guest               | transition to guest
1633  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1634  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1635  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1636  *
1637  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1638  *
1639  *      - ret0 < ret1
1640  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1641  *              ...
1642  *      - 0 < N - M => M < N
1643  *
1644  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1645  * always the case (the difference between two distinct xtime instances
1646  * might be smaller then the difference between corresponding TSC reads,
1647  * when updating guest vcpus pvclock areas).
1648  *
1649  * To avoid that problem, do not allow visibility of distinct
1650  * system_timestamp/tsc_timestamp values simultaneously: use a master
1651  * copy of host monotonic time values. Update that master copy
1652  * in lockstep.
1653  *
1654  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1655  *
1656  */
1657
1658 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1659 {
1660 #ifdef CONFIG_X86_64
1661         struct kvm_arch *ka = &kvm->arch;
1662         int vclock_mode;
1663         bool host_tsc_clocksource, vcpus_matched;
1664
1665         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1666                         atomic_read(&kvm->online_vcpus));
1667
1668         /*
1669          * If the host uses TSC clock, then passthrough TSC as stable
1670          * to the guest.
1671          */
1672         host_tsc_clocksource = kvm_get_time_and_clockread(
1673                                         &ka->master_kernel_ns,
1674                                         &ka->master_cycle_now);
1675
1676         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1677                                 && !backwards_tsc_observed
1678                                 && !ka->boot_vcpu_runs_old_kvmclock;
1679
1680         if (ka->use_master_clock)
1681                 atomic_set(&kvm_guest_has_master_clock, 1);
1682
1683         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1684         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1685                                         vcpus_matched);
1686 #endif
1687 }
1688
1689 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1690 {
1691         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1692 }
1693
1694 static void kvm_gen_update_masterclock(struct kvm *kvm)
1695 {
1696 #ifdef CONFIG_X86_64
1697         int i;
1698         struct kvm_vcpu *vcpu;
1699         struct kvm_arch *ka = &kvm->arch;
1700
1701         spin_lock(&ka->pvclock_gtod_sync_lock);
1702         kvm_make_mclock_inprogress_request(kvm);
1703         /* no guest entries from this point */
1704         pvclock_update_vm_gtod_copy(kvm);
1705
1706         kvm_for_each_vcpu(i, vcpu, kvm)
1707                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1708
1709         /* guest entries allowed */
1710         kvm_for_each_vcpu(i, vcpu, kvm)
1711                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1712
1713         spin_unlock(&ka->pvclock_gtod_sync_lock);
1714 #endif
1715 }
1716
1717 static int kvm_guest_time_update(struct kvm_vcpu *v)
1718 {
1719         unsigned long flags, tgt_tsc_khz;
1720         struct kvm_vcpu_arch *vcpu = &v->arch;
1721         struct kvm_arch *ka = &v->kvm->arch;
1722         s64 kernel_ns;
1723         u64 tsc_timestamp, host_tsc;
1724         struct pvclock_vcpu_time_info guest_hv_clock;
1725         u8 pvclock_flags;
1726         bool use_master_clock;
1727
1728         kernel_ns = 0;
1729         host_tsc = 0;
1730
1731         /*
1732          * If the host uses TSC clock, then passthrough TSC as stable
1733          * to the guest.
1734          */
1735         spin_lock(&ka->pvclock_gtod_sync_lock);
1736         use_master_clock = ka->use_master_clock;
1737         if (use_master_clock) {
1738                 host_tsc = ka->master_cycle_now;
1739                 kernel_ns = ka->master_kernel_ns;
1740         }
1741         spin_unlock(&ka->pvclock_gtod_sync_lock);
1742
1743         /* Keep irq disabled to prevent changes to the clock */
1744         local_irq_save(flags);
1745         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1746         if (unlikely(tgt_tsc_khz == 0)) {
1747                 local_irq_restore(flags);
1748                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1749                 return 1;
1750         }
1751         if (!use_master_clock) {
1752                 host_tsc = rdtsc();
1753                 kernel_ns = get_kernel_ns();
1754         }
1755
1756         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1757
1758         /*
1759          * We may have to catch up the TSC to match elapsed wall clock
1760          * time for two reasons, even if kvmclock is used.
1761          *   1) CPU could have been running below the maximum TSC rate
1762          *   2) Broken TSC compensation resets the base at each VCPU
1763          *      entry to avoid unknown leaps of TSC even when running
1764          *      again on the same CPU.  This may cause apparent elapsed
1765          *      time to disappear, and the guest to stand still or run
1766          *      very slowly.
1767          */
1768         if (vcpu->tsc_catchup) {
1769                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1770                 if (tsc > tsc_timestamp) {
1771                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1772                         tsc_timestamp = tsc;
1773                 }
1774         }
1775
1776         local_irq_restore(flags);
1777
1778         if (!vcpu->pv_time_enabled)
1779                 return 0;
1780
1781         if (kvm_has_tsc_control)
1782                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1783
1784         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1785                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1786                                    &vcpu->hv_clock.tsc_shift,
1787                                    &vcpu->hv_clock.tsc_to_system_mul);
1788                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1789         }
1790
1791         /* With all the info we got, fill in the values */
1792         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1793         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1794         vcpu->last_guest_tsc = tsc_timestamp;
1795
1796         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1797                 &guest_hv_clock, sizeof(guest_hv_clock))))
1798                 return 0;
1799
1800         /* This VCPU is paused, but it's legal for a guest to read another
1801          * VCPU's kvmclock, so we really have to follow the specification where
1802          * it says that version is odd if data is being modified, and even after
1803          * it is consistent.
1804          *
1805          * Version field updates must be kept separate.  This is because
1806          * kvm_write_guest_cached might use a "rep movs" instruction, and
1807          * writes within a string instruction are weakly ordered.  So there
1808          * are three writes overall.
1809          *
1810          * As a small optimization, only write the version field in the first
1811          * and third write.  The vcpu->pv_time cache is still valid, because the
1812          * version field is the first in the struct.
1813          */
1814         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1815
1816         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1817         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1818                                 &vcpu->hv_clock,
1819                                 sizeof(vcpu->hv_clock.version));
1820
1821         smp_wmb();
1822
1823         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1824         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1825
1826         if (vcpu->pvclock_set_guest_stopped_request) {
1827                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1828                 vcpu->pvclock_set_guest_stopped_request = false;
1829         }
1830
1831         /* If the host uses TSC clocksource, then it is stable */
1832         if (use_master_clock)
1833                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1834
1835         vcpu->hv_clock.flags = pvclock_flags;
1836
1837         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1838
1839         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1840                                 &vcpu->hv_clock,
1841                                 sizeof(vcpu->hv_clock));
1842
1843         smp_wmb();
1844
1845         vcpu->hv_clock.version++;
1846         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1847                                 &vcpu->hv_clock,
1848                                 sizeof(vcpu->hv_clock.version));
1849         return 0;
1850 }
1851
1852 /*
1853  * kvmclock updates which are isolated to a given vcpu, such as
1854  * vcpu->cpu migration, should not allow system_timestamp from
1855  * the rest of the vcpus to remain static. Otherwise ntp frequency
1856  * correction applies to one vcpu's system_timestamp but not
1857  * the others.
1858  *
1859  * So in those cases, request a kvmclock update for all vcpus.
1860  * We need to rate-limit these requests though, as they can
1861  * considerably slow guests that have a large number of vcpus.
1862  * The time for a remote vcpu to update its kvmclock is bound
1863  * by the delay we use to rate-limit the updates.
1864  */
1865
1866 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1867
1868 static void kvmclock_update_fn(struct work_struct *work)
1869 {
1870         int i;
1871         struct delayed_work *dwork = to_delayed_work(work);
1872         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1873                                            kvmclock_update_work);
1874         struct kvm *kvm = container_of(ka, struct kvm, arch);
1875         struct kvm_vcpu *vcpu;
1876
1877         kvm_for_each_vcpu(i, vcpu, kvm) {
1878                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1879                 kvm_vcpu_kick(vcpu);
1880         }
1881 }
1882
1883 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1884 {
1885         struct kvm *kvm = v->kvm;
1886
1887         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1888         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1889                                         KVMCLOCK_UPDATE_DELAY);
1890 }
1891
1892 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1893
1894 static void kvmclock_sync_fn(struct work_struct *work)
1895 {
1896         struct delayed_work *dwork = to_delayed_work(work);
1897         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1898                                            kvmclock_sync_work);
1899         struct kvm *kvm = container_of(ka, struct kvm, arch);
1900
1901         if (!kvmclock_periodic_sync)
1902                 return;
1903
1904         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1905         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1906                                         KVMCLOCK_SYNC_PERIOD);
1907 }
1908
1909 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1910 {
1911         u64 mcg_cap = vcpu->arch.mcg_cap;
1912         unsigned bank_num = mcg_cap & 0xff;
1913
1914         switch (msr) {
1915         case MSR_IA32_MCG_STATUS:
1916                 vcpu->arch.mcg_status = data;
1917                 break;
1918         case MSR_IA32_MCG_CTL:
1919                 if (!(mcg_cap & MCG_CTL_P))
1920                         return 1;
1921                 if (data != 0 && data != ~(u64)0)
1922                         return -1;
1923                 vcpu->arch.mcg_ctl = data;
1924                 break;
1925         default:
1926                 if (msr >= MSR_IA32_MC0_CTL &&
1927                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1928                         u32 offset = msr - MSR_IA32_MC0_CTL;
1929                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1930                          * some Linux kernels though clear bit 10 in bank 4 to
1931                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1932                          * this to avoid an uncatched #GP in the guest
1933                          */
1934                         if ((offset & 0x3) == 0 &&
1935                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1936                                 return -1;
1937                         vcpu->arch.mce_banks[offset] = data;
1938                         break;
1939                 }
1940                 return 1;
1941         }
1942         return 0;
1943 }
1944
1945 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1946 {
1947         struct kvm *kvm = vcpu->kvm;
1948         int lm = is_long_mode(vcpu);
1949         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1950                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1951         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1952                 : kvm->arch.xen_hvm_config.blob_size_32;
1953         u32 page_num = data & ~PAGE_MASK;
1954         u64 page_addr = data & PAGE_MASK;
1955         u8 *page;
1956         int r;
1957
1958         r = -E2BIG;
1959         if (page_num >= blob_size)
1960                 goto out;
1961         r = -ENOMEM;
1962         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1963         if (IS_ERR(page)) {
1964                 r = PTR_ERR(page);
1965                 goto out;
1966         }
1967         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1968                 goto out_free;
1969         r = 0;
1970 out_free:
1971         kfree(page);
1972 out:
1973         return r;
1974 }
1975
1976 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1977 {
1978         gpa_t gpa = data & ~0x3f;
1979
1980         /* Bits 2:5 are reserved, Should be zero */
1981         if (data & 0x3c)
1982                 return 1;
1983
1984         vcpu->arch.apf.msr_val = data;
1985
1986         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1987                 kvm_clear_async_pf_completion_queue(vcpu);
1988                 kvm_async_pf_hash_reset(vcpu);
1989                 return 0;
1990         }
1991
1992         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1993                                         sizeof(u32)))
1994                 return 1;
1995
1996         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1997         kvm_async_pf_wakeup_all(vcpu);
1998         return 0;
1999 }
2000
2001 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2002 {
2003         vcpu->arch.pv_time_enabled = false;
2004 }
2005
2006 static void record_steal_time(struct kvm_vcpu *vcpu)
2007 {
2008         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2009                 return;
2010
2011         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2012                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2013                 return;
2014
2015         if (vcpu->arch.st.steal.version & 1)
2016                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2017
2018         vcpu->arch.st.steal.version += 1;
2019
2020         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2021                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2022
2023         smp_wmb();
2024
2025         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2026                 vcpu->arch.st.last_steal;
2027         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2028
2029         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2030                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2031
2032         smp_wmb();
2033
2034         vcpu->arch.st.steal.version += 1;
2035
2036         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2037                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2038 }
2039
2040 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2041 {
2042         bool pr = false;
2043         u32 msr = msr_info->index;
2044         u64 data = msr_info->data;
2045
2046         switch (msr) {
2047         case MSR_AMD64_NB_CFG:
2048         case MSR_IA32_UCODE_REV:
2049         case MSR_IA32_UCODE_WRITE:
2050         case MSR_VM_HSAVE_PA:
2051         case MSR_AMD64_PATCH_LOADER:
2052         case MSR_AMD64_BU_CFG2:
2053                 break;
2054
2055         case MSR_EFER:
2056                 return set_efer(vcpu, data);
2057         case MSR_K7_HWCR:
2058                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2059                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2060                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2061                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2062                 if (data != 0) {
2063                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2064                                     data);
2065                         return 1;
2066                 }
2067                 break;
2068         case MSR_FAM10H_MMIO_CONF_BASE:
2069                 if (data != 0) {
2070                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2071                                     "0x%llx\n", data);
2072                         return 1;
2073                 }
2074                 break;
2075         case MSR_IA32_DEBUGCTLMSR:
2076                 if (!data) {
2077                         /* We support the non-activated case already */
2078                         break;
2079                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2080                         /* Values other than LBR and BTF are vendor-specific,
2081                            thus reserved and should throw a #GP */
2082                         return 1;
2083                 }
2084                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2085                             __func__, data);
2086                 break;
2087         case 0x200 ... 0x2ff:
2088                 return kvm_mtrr_set_msr(vcpu, msr, data);
2089         case MSR_IA32_APICBASE:
2090                 return kvm_set_apic_base(vcpu, msr_info);
2091         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2092                 return kvm_x2apic_msr_write(vcpu, msr, data);
2093         case MSR_IA32_TSCDEADLINE:
2094                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2095                 break;
2096         case MSR_IA32_TSC_ADJUST:
2097                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2098                         if (!msr_info->host_initiated) {
2099                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2100                                 adjust_tsc_offset_guest(vcpu, adj);
2101                         }
2102                         vcpu->arch.ia32_tsc_adjust_msr = data;
2103                 }
2104                 break;
2105         case MSR_IA32_MISC_ENABLE:
2106                 vcpu->arch.ia32_misc_enable_msr = data;
2107                 break;
2108         case MSR_IA32_SMBASE:
2109                 if (!msr_info->host_initiated)
2110                         return 1;
2111                 vcpu->arch.smbase = data;
2112                 break;
2113         case MSR_KVM_WALL_CLOCK_NEW:
2114         case MSR_KVM_WALL_CLOCK:
2115                 vcpu->kvm->arch.wall_clock = data;
2116                 kvm_write_wall_clock(vcpu->kvm, data);
2117                 break;
2118         case MSR_KVM_SYSTEM_TIME_NEW:
2119         case MSR_KVM_SYSTEM_TIME: {
2120                 u64 gpa_offset;
2121                 struct kvm_arch *ka = &vcpu->kvm->arch;
2122
2123                 kvmclock_reset(vcpu);
2124
2125                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2126                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2127
2128                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2129                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2130                                         &vcpu->requests);
2131
2132                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2133                 }
2134
2135                 vcpu->arch.time = data;
2136                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2137
2138                 /* we verify if the enable bit is set... */
2139                 if (!(data & 1))
2140                         break;
2141
2142                 gpa_offset = data & ~(PAGE_MASK | 1);
2143
2144                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2145                      &vcpu->arch.pv_time, data & ~1ULL,
2146                      sizeof(struct pvclock_vcpu_time_info)))
2147                         vcpu->arch.pv_time_enabled = false;
2148                 else
2149                         vcpu->arch.pv_time_enabled = true;
2150
2151                 break;
2152         }
2153         case MSR_KVM_ASYNC_PF_EN:
2154                 if (kvm_pv_enable_async_pf(vcpu, data))
2155                         return 1;
2156                 break;
2157         case MSR_KVM_STEAL_TIME:
2158
2159                 if (unlikely(!sched_info_on()))
2160                         return 1;
2161
2162                 if (data & KVM_STEAL_RESERVED_MASK)
2163                         return 1;
2164
2165                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2166                                                 data & KVM_STEAL_VALID_BITS,
2167                                                 sizeof(struct kvm_steal_time)))
2168                         return 1;
2169
2170                 vcpu->arch.st.msr_val = data;
2171
2172                 if (!(data & KVM_MSR_ENABLED))
2173                         break;
2174
2175                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2176
2177                 break;
2178         case MSR_KVM_PV_EOI_EN:
2179                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2180                         return 1;
2181                 break;
2182
2183         case MSR_IA32_MCG_CTL:
2184         case MSR_IA32_MCG_STATUS:
2185         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2186                 return set_msr_mce(vcpu, msr, data);
2187
2188         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2189         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2190                 pr = true; /* fall through */
2191         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2192         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2193                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2194                         return kvm_pmu_set_msr(vcpu, msr_info);
2195
2196                 if (pr || data != 0)
2197                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2198                                     "0x%x data 0x%llx\n", msr, data);
2199                 break;
2200         case MSR_K7_CLK_CTL:
2201                 /*
2202                  * Ignore all writes to this no longer documented MSR.
2203                  * Writes are only relevant for old K7 processors,
2204                  * all pre-dating SVM, but a recommended workaround from
2205                  * AMD for these chips. It is possible to specify the
2206                  * affected processor models on the command line, hence
2207                  * the need to ignore the workaround.
2208                  */
2209                 break;
2210         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2211         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2212         case HV_X64_MSR_CRASH_CTL:
2213         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2214                 return kvm_hv_set_msr_common(vcpu, msr, data,
2215                                              msr_info->host_initiated);
2216         case MSR_IA32_BBL_CR_CTL3:
2217                 /* Drop writes to this legacy MSR -- see rdmsr
2218                  * counterpart for further detail.
2219                  */
2220                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2221                 break;
2222         case MSR_AMD64_OSVW_ID_LENGTH:
2223                 if (!guest_cpuid_has_osvw(vcpu))
2224                         return 1;
2225                 vcpu->arch.osvw.length = data;
2226                 break;
2227         case MSR_AMD64_OSVW_STATUS:
2228                 if (!guest_cpuid_has_osvw(vcpu))
2229                         return 1;
2230                 vcpu->arch.osvw.status = data;
2231                 break;
2232         default:
2233                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2234                         return xen_hvm_config(vcpu, data);
2235                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2236                         return kvm_pmu_set_msr(vcpu, msr_info);
2237                 if (!ignore_msrs) {
2238                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2239                                     msr, data);
2240                         return 1;
2241                 } else {
2242                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2243                                     msr, data);
2244                         break;
2245                 }
2246         }
2247         return 0;
2248 }
2249 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2250
2251
2252 /*
2253  * Reads an msr value (of 'msr_index') into 'pdata'.
2254  * Returns 0 on success, non-0 otherwise.
2255  * Assumes vcpu_load() was already called.
2256  */
2257 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2258 {
2259         return kvm_x86_ops->get_msr(vcpu, msr);
2260 }
2261 EXPORT_SYMBOL_GPL(kvm_get_msr);
2262
2263 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2264 {
2265         u64 data;
2266         u64 mcg_cap = vcpu->arch.mcg_cap;
2267         unsigned bank_num = mcg_cap & 0xff;
2268
2269         switch (msr) {
2270         case MSR_IA32_P5_MC_ADDR:
2271         case MSR_IA32_P5_MC_TYPE:
2272                 data = 0;
2273                 break;
2274         case MSR_IA32_MCG_CAP:
2275                 data = vcpu->arch.mcg_cap;
2276                 break;
2277         case MSR_IA32_MCG_CTL:
2278                 if (!(mcg_cap & MCG_CTL_P))
2279                         return 1;
2280                 data = vcpu->arch.mcg_ctl;
2281                 break;
2282         case MSR_IA32_MCG_STATUS:
2283                 data = vcpu->arch.mcg_status;
2284                 break;
2285         default:
2286                 if (msr >= MSR_IA32_MC0_CTL &&
2287                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2288                         u32 offset = msr - MSR_IA32_MC0_CTL;
2289                         data = vcpu->arch.mce_banks[offset];
2290                         break;
2291                 }
2292                 return 1;
2293         }
2294         *pdata = data;
2295         return 0;
2296 }
2297
2298 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2299 {
2300         switch (msr_info->index) {
2301         case MSR_IA32_PLATFORM_ID:
2302         case MSR_IA32_EBL_CR_POWERON:
2303         case MSR_IA32_DEBUGCTLMSR:
2304         case MSR_IA32_LASTBRANCHFROMIP:
2305         case MSR_IA32_LASTBRANCHTOIP:
2306         case MSR_IA32_LASTINTFROMIP:
2307         case MSR_IA32_LASTINTTOIP:
2308         case MSR_K8_SYSCFG:
2309         case MSR_K8_TSEG_ADDR:
2310         case MSR_K8_TSEG_MASK:
2311         case MSR_K7_HWCR:
2312         case MSR_VM_HSAVE_PA:
2313         case MSR_K8_INT_PENDING_MSG:
2314         case MSR_AMD64_NB_CFG:
2315         case MSR_FAM10H_MMIO_CONF_BASE:
2316         case MSR_AMD64_BU_CFG2:
2317         case MSR_IA32_PERF_CTL:
2318                 msr_info->data = 0;
2319                 break;
2320         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2321         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2322         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2323         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2324                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2325                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2326                 msr_info->data = 0;
2327                 break;
2328         case MSR_IA32_UCODE_REV:
2329                 msr_info->data = 0x100000000ULL;
2330                 break;
2331         case MSR_MTRRcap:
2332         case 0x200 ... 0x2ff:
2333                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2334         case 0xcd: /* fsb frequency */
2335                 msr_info->data = 3;
2336                 break;
2337                 /*
2338                  * MSR_EBC_FREQUENCY_ID
2339                  * Conservative value valid for even the basic CPU models.
2340                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2341                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2342                  * and 266MHz for model 3, or 4. Set Core Clock
2343                  * Frequency to System Bus Frequency Ratio to 1 (bits
2344                  * 31:24) even though these are only valid for CPU
2345                  * models > 2, however guests may end up dividing or
2346                  * multiplying by zero otherwise.
2347                  */
2348         case MSR_EBC_FREQUENCY_ID:
2349                 msr_info->data = 1 << 24;
2350                 break;
2351         case MSR_IA32_APICBASE:
2352                 msr_info->data = kvm_get_apic_base(vcpu);
2353                 break;
2354         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2355                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2356                 break;
2357         case MSR_IA32_TSCDEADLINE:
2358                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2359                 break;
2360         case MSR_IA32_TSC_ADJUST:
2361                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2362                 break;
2363         case MSR_IA32_MISC_ENABLE:
2364                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2365                 break;
2366         case MSR_IA32_SMBASE:
2367                 if (!msr_info->host_initiated)
2368                         return 1;
2369                 msr_info->data = vcpu->arch.smbase;
2370                 break;
2371         case MSR_IA32_PERF_STATUS:
2372                 /* TSC increment by tick */
2373                 msr_info->data = 1000ULL;
2374                 /* CPU multiplier */
2375                 msr_info->data |= (((uint64_t)4ULL) << 40);
2376                 break;
2377         case MSR_EFER:
2378                 msr_info->data = vcpu->arch.efer;
2379                 break;
2380         case MSR_KVM_WALL_CLOCK:
2381         case MSR_KVM_WALL_CLOCK_NEW:
2382                 msr_info->data = vcpu->kvm->arch.wall_clock;
2383                 break;
2384         case MSR_KVM_SYSTEM_TIME:
2385         case MSR_KVM_SYSTEM_TIME_NEW:
2386                 msr_info->data = vcpu->arch.time;
2387                 break;
2388         case MSR_KVM_ASYNC_PF_EN:
2389                 msr_info->data = vcpu->arch.apf.msr_val;
2390                 break;
2391         case MSR_KVM_STEAL_TIME:
2392                 msr_info->data = vcpu->arch.st.msr_val;
2393                 break;
2394         case MSR_KVM_PV_EOI_EN:
2395                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2396                 break;
2397         case MSR_IA32_P5_MC_ADDR:
2398         case MSR_IA32_P5_MC_TYPE:
2399         case MSR_IA32_MCG_CAP:
2400         case MSR_IA32_MCG_CTL:
2401         case MSR_IA32_MCG_STATUS:
2402         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2403                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2404         case MSR_K7_CLK_CTL:
2405                 /*
2406                  * Provide expected ramp-up count for K7. All other
2407                  * are set to zero, indicating minimum divisors for
2408                  * every field.
2409                  *
2410                  * This prevents guest kernels on AMD host with CPU
2411                  * type 6, model 8 and higher from exploding due to
2412                  * the rdmsr failing.
2413                  */
2414                 msr_info->data = 0x20000000;
2415                 break;
2416         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2417         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2418         case HV_X64_MSR_CRASH_CTL:
2419         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2420                 return kvm_hv_get_msr_common(vcpu,
2421                                              msr_info->index, &msr_info->data);
2422                 break;
2423         case MSR_IA32_BBL_CR_CTL3:
2424                 /* This legacy MSR exists but isn't fully documented in current
2425                  * silicon.  It is however accessed by winxp in very narrow
2426                  * scenarios where it sets bit #19, itself documented as
2427                  * a "reserved" bit.  Best effort attempt to source coherent
2428                  * read data here should the balance of the register be
2429                  * interpreted by the guest:
2430                  *
2431                  * L2 cache control register 3: 64GB range, 256KB size,
2432                  * enabled, latency 0x1, configured
2433                  */
2434                 msr_info->data = 0xbe702111;
2435                 break;
2436         case MSR_AMD64_OSVW_ID_LENGTH:
2437                 if (!guest_cpuid_has_osvw(vcpu))
2438                         return 1;
2439                 msr_info->data = vcpu->arch.osvw.length;
2440                 break;
2441         case MSR_AMD64_OSVW_STATUS:
2442                 if (!guest_cpuid_has_osvw(vcpu))
2443                         return 1;
2444                 msr_info->data = vcpu->arch.osvw.status;
2445                 break;
2446         default:
2447                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2448                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2449                 if (!ignore_msrs) {
2450                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2451                         return 1;
2452                 } else {
2453                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2454                         msr_info->data = 0;
2455                 }
2456                 break;
2457         }
2458         return 0;
2459 }
2460 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2461
2462 /*
2463  * Read or write a bunch of msrs. All parameters are kernel addresses.
2464  *
2465  * @return number of msrs set successfully.
2466  */
2467 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2468                     struct kvm_msr_entry *entries,
2469                     int (*do_msr)(struct kvm_vcpu *vcpu,
2470                                   unsigned index, u64 *data))
2471 {
2472         int i, idx;
2473
2474         idx = srcu_read_lock(&vcpu->kvm->srcu);
2475         for (i = 0; i < msrs->nmsrs; ++i)
2476                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2477                         break;
2478         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2479
2480         return i;
2481 }
2482
2483 /*
2484  * Read or write a bunch of msrs. Parameters are user addresses.
2485  *
2486  * @return number of msrs set successfully.
2487  */
2488 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2489                   int (*do_msr)(struct kvm_vcpu *vcpu,
2490                                 unsigned index, u64 *data),
2491                   int writeback)
2492 {
2493         struct kvm_msrs msrs;
2494         struct kvm_msr_entry *entries;
2495         int r, n;
2496         unsigned size;
2497
2498         r = -EFAULT;
2499         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2500                 goto out;
2501
2502         r = -E2BIG;
2503         if (msrs.nmsrs >= MAX_IO_MSRS)
2504                 goto out;
2505
2506         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2507         entries = memdup_user(user_msrs->entries, size);
2508         if (IS_ERR(entries)) {
2509                 r = PTR_ERR(entries);
2510                 goto out;
2511         }
2512
2513         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2514         if (r < 0)
2515                 goto out_free;
2516
2517         r = -EFAULT;
2518         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2519                 goto out_free;
2520
2521         r = n;
2522
2523 out_free:
2524         kfree(entries);
2525 out:
2526         return r;
2527 }
2528
2529 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2530 {
2531         int r;
2532
2533         switch (ext) {
2534         case KVM_CAP_IRQCHIP:
2535         case KVM_CAP_HLT:
2536         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2537         case KVM_CAP_SET_TSS_ADDR:
2538         case KVM_CAP_EXT_CPUID:
2539         case KVM_CAP_EXT_EMUL_CPUID:
2540         case KVM_CAP_CLOCKSOURCE:
2541         case KVM_CAP_PIT:
2542         case KVM_CAP_NOP_IO_DELAY:
2543         case KVM_CAP_MP_STATE:
2544         case KVM_CAP_SYNC_MMU:
2545         case KVM_CAP_USER_NMI:
2546         case KVM_CAP_REINJECT_CONTROL:
2547         case KVM_CAP_IRQ_INJECT_STATUS:
2548         case KVM_CAP_IOEVENTFD:
2549         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2550         case KVM_CAP_PIT2:
2551         case KVM_CAP_PIT_STATE2:
2552         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2553         case KVM_CAP_XEN_HVM:
2554         case KVM_CAP_ADJUST_CLOCK:
2555         case KVM_CAP_VCPU_EVENTS:
2556         case KVM_CAP_HYPERV:
2557         case KVM_CAP_HYPERV_VAPIC:
2558         case KVM_CAP_HYPERV_SPIN:
2559         case KVM_CAP_HYPERV_SYNIC:
2560         case KVM_CAP_PCI_SEGMENT:
2561         case KVM_CAP_DEBUGREGS:
2562         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2563         case KVM_CAP_XSAVE:
2564         case KVM_CAP_ASYNC_PF:
2565         case KVM_CAP_GET_TSC_KHZ:
2566         case KVM_CAP_KVMCLOCK_CTRL:
2567         case KVM_CAP_READONLY_MEM:
2568         case KVM_CAP_HYPERV_TIME:
2569         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2570         case KVM_CAP_TSC_DEADLINE_TIMER:
2571         case KVM_CAP_ENABLE_CAP_VM:
2572         case KVM_CAP_DISABLE_QUIRKS:
2573         case KVM_CAP_SET_BOOT_CPU_ID:
2574         case KVM_CAP_SPLIT_IRQCHIP:
2575 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2576         case KVM_CAP_ASSIGN_DEV_IRQ:
2577         case KVM_CAP_PCI_2_3:
2578 #endif
2579                 r = 1;
2580                 break;
2581         case KVM_CAP_X86_SMM:
2582                 /* SMBASE is usually relocated above 1M on modern chipsets,
2583                  * and SMM handlers might indeed rely on 4G segment limits,
2584                  * so do not report SMM to be available if real mode is
2585                  * emulated via vm86 mode.  Still, do not go to great lengths
2586                  * to avoid userspace's usage of the feature, because it is a
2587                  * fringe case that is not enabled except via specific settings
2588                  * of the module parameters.
2589                  */
2590                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2591                 break;
2592         case KVM_CAP_COALESCED_MMIO:
2593                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2594                 break;
2595         case KVM_CAP_VAPIC:
2596                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2597                 break;
2598         case KVM_CAP_NR_VCPUS:
2599                 r = KVM_SOFT_MAX_VCPUS;
2600                 break;
2601         case KVM_CAP_MAX_VCPUS:
2602                 r = KVM_MAX_VCPUS;
2603                 break;
2604         case KVM_CAP_NR_MEMSLOTS:
2605                 r = KVM_USER_MEM_SLOTS;
2606                 break;
2607         case KVM_CAP_PV_MMU:    /* obsolete */
2608                 r = 0;
2609                 break;
2610 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2611         case KVM_CAP_IOMMU:
2612                 r = iommu_present(&pci_bus_type);
2613                 break;
2614 #endif
2615         case KVM_CAP_MCE:
2616                 r = KVM_MAX_MCE_BANKS;
2617                 break;
2618         case KVM_CAP_XCRS:
2619                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2620                 break;
2621         case KVM_CAP_TSC_CONTROL:
2622                 r = kvm_has_tsc_control;
2623                 break;
2624         default:
2625                 r = 0;
2626                 break;
2627         }
2628         return r;
2629
2630 }
2631
2632 long kvm_arch_dev_ioctl(struct file *filp,
2633                         unsigned int ioctl, unsigned long arg)
2634 {
2635         void __user *argp = (void __user *)arg;
2636         long r;
2637
2638         switch (ioctl) {
2639         case KVM_GET_MSR_INDEX_LIST: {
2640                 struct kvm_msr_list __user *user_msr_list = argp;
2641                 struct kvm_msr_list msr_list;
2642                 unsigned n;
2643
2644                 r = -EFAULT;
2645                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2646                         goto out;
2647                 n = msr_list.nmsrs;
2648                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2649                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2650                         goto out;
2651                 r = -E2BIG;
2652                 if (n < msr_list.nmsrs)
2653                         goto out;
2654                 r = -EFAULT;
2655                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2656                                  num_msrs_to_save * sizeof(u32)))
2657                         goto out;
2658                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2659                                  &emulated_msrs,
2660                                  num_emulated_msrs * sizeof(u32)))
2661                         goto out;
2662                 r = 0;
2663                 break;
2664         }
2665         case KVM_GET_SUPPORTED_CPUID:
2666         case KVM_GET_EMULATED_CPUID: {
2667                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2668                 struct kvm_cpuid2 cpuid;
2669
2670                 r = -EFAULT;
2671                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2672                         goto out;
2673
2674                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2675                                             ioctl);
2676                 if (r)
2677                         goto out;
2678
2679                 r = -EFAULT;
2680                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2681                         goto out;
2682                 r = 0;
2683                 break;
2684         }
2685         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2686                 u64 mce_cap;
2687
2688                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2689                 r = -EFAULT;
2690                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2691                         goto out;
2692                 r = 0;
2693                 break;
2694         }
2695         default:
2696                 r = -EINVAL;
2697         }
2698 out:
2699         return r;
2700 }
2701
2702 static void wbinvd_ipi(void *garbage)
2703 {
2704         wbinvd();
2705 }
2706
2707 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2708 {
2709         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2710 }
2711
2712 static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
2713 {
2714         set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
2715 }
2716
2717 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2718 {
2719         /* Address WBINVD may be executed by guest */
2720         if (need_emulate_wbinvd(vcpu)) {
2721                 if (kvm_x86_ops->has_wbinvd_exit())
2722                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2723                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2724                         smp_call_function_single(vcpu->cpu,
2725                                         wbinvd_ipi, NULL, 1);
2726         }
2727
2728         kvm_x86_ops->vcpu_load(vcpu, cpu);
2729
2730         /* Apply any externally detected TSC adjustments (due to suspend) */
2731         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2732                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2733                 vcpu->arch.tsc_offset_adjustment = 0;
2734                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2735         }
2736
2737         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2738                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2739                                 rdtsc() - vcpu->arch.last_host_tsc;
2740                 if (tsc_delta < 0)
2741                         mark_tsc_unstable("KVM discovered backwards TSC");
2742                 if (check_tsc_unstable()) {
2743                         u64 offset = kvm_compute_tsc_offset(vcpu,
2744                                                 vcpu->arch.last_guest_tsc);
2745                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2746                         vcpu->arch.tsc_catchup = 1;
2747                 }
2748                 /*
2749                  * On a host with synchronized TSC, there is no need to update
2750                  * kvmclock on vcpu->cpu migration
2751                  */
2752                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2753                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2754                 if (vcpu->cpu != cpu)
2755                         kvm_migrate_timers(vcpu);
2756                 vcpu->cpu = cpu;
2757         }
2758
2759         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2760 }
2761
2762 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2763 {
2764         kvm_x86_ops->vcpu_put(vcpu);
2765         kvm_put_guest_fpu(vcpu);
2766         vcpu->arch.last_host_tsc = rdtsc();
2767 }
2768
2769 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2770                                     struct kvm_lapic_state *s)
2771 {
2772         if (vcpu->arch.apicv_active)
2773                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2774
2775         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2776
2777         return 0;
2778 }
2779
2780 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2781                                     struct kvm_lapic_state *s)
2782 {
2783         kvm_apic_post_state_restore(vcpu, s);
2784         update_cr8_intercept(vcpu);
2785
2786         return 0;
2787 }
2788
2789 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2790 {
2791         return (!lapic_in_kernel(vcpu) ||
2792                 kvm_apic_accept_pic_intr(vcpu));
2793 }
2794
2795 /*
2796  * if userspace requested an interrupt window, check that the
2797  * interrupt window is open.
2798  *
2799  * No need to exit to userspace if we already have an interrupt queued.
2800  */
2801 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2802 {
2803         return kvm_arch_interrupt_allowed(vcpu) &&
2804                 !kvm_cpu_has_interrupt(vcpu) &&
2805                 !kvm_event_needs_reinjection(vcpu) &&
2806                 kvm_cpu_accept_dm_intr(vcpu);
2807 }
2808
2809 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2810                                     struct kvm_interrupt *irq)
2811 {
2812         if (irq->irq >= KVM_NR_INTERRUPTS)
2813                 return -EINVAL;
2814
2815         if (!irqchip_in_kernel(vcpu->kvm)) {
2816                 kvm_queue_interrupt(vcpu, irq->irq, false);
2817                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2818                 return 0;
2819         }
2820
2821         /*
2822          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2823          * fail for in-kernel 8259.
2824          */
2825         if (pic_in_kernel(vcpu->kvm))
2826                 return -ENXIO;
2827
2828         if (vcpu->arch.pending_external_vector != -1)
2829                 return -EEXIST;
2830
2831         vcpu->arch.pending_external_vector = irq->irq;
2832         kvm_make_request(KVM_REQ_EVENT, vcpu);
2833         return 0;
2834 }
2835
2836 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2837 {
2838         kvm_inject_nmi(vcpu);
2839
2840         return 0;
2841 }
2842
2843 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2844 {
2845         kvm_make_request(KVM_REQ_SMI, vcpu);
2846
2847         return 0;
2848 }
2849
2850 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2851                                            struct kvm_tpr_access_ctl *tac)
2852 {
2853         if (tac->flags)
2854                 return -EINVAL;
2855         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2856         return 0;
2857 }
2858
2859 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2860                                         u64 mcg_cap)
2861 {
2862         int r;
2863         unsigned bank_num = mcg_cap & 0xff, bank;
2864
2865         r = -EINVAL;
2866         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2867                 goto out;
2868         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2869                 goto out;
2870         r = 0;
2871         vcpu->arch.mcg_cap = mcg_cap;
2872         /* Init IA32_MCG_CTL to all 1s */
2873         if (mcg_cap & MCG_CTL_P)
2874                 vcpu->arch.mcg_ctl = ~(u64)0;
2875         /* Init IA32_MCi_CTL to all 1s */
2876         for (bank = 0; bank < bank_num; bank++)
2877                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2878 out:
2879         return r;
2880 }
2881
2882 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2883                                       struct kvm_x86_mce *mce)
2884 {
2885         u64 mcg_cap = vcpu->arch.mcg_cap;
2886         unsigned bank_num = mcg_cap & 0xff;
2887         u64 *banks = vcpu->arch.mce_banks;
2888
2889         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2890                 return -EINVAL;
2891         /*
2892          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2893          * reporting is disabled
2894          */
2895         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2896             vcpu->arch.mcg_ctl != ~(u64)0)
2897                 return 0;
2898         banks += 4 * mce->bank;
2899         /*
2900          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2901          * reporting is disabled for the bank
2902          */
2903         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2904                 return 0;
2905         if (mce->status & MCI_STATUS_UC) {
2906                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2907                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2908                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2909                         return 0;
2910                 }
2911                 if (banks[1] & MCI_STATUS_VAL)
2912                         mce->status |= MCI_STATUS_OVER;
2913                 banks[2] = mce->addr;
2914                 banks[3] = mce->misc;
2915                 vcpu->arch.mcg_status = mce->mcg_status;
2916                 banks[1] = mce->status;
2917                 kvm_queue_exception(vcpu, MC_VECTOR);
2918         } else if (!(banks[1] & MCI_STATUS_VAL)
2919                    || !(banks[1] & MCI_STATUS_UC)) {
2920                 if (banks[1] & MCI_STATUS_VAL)
2921                         mce->status |= MCI_STATUS_OVER;
2922                 banks[2] = mce->addr;
2923                 banks[3] = mce->misc;
2924                 banks[1] = mce->status;
2925         } else
2926                 banks[1] |= MCI_STATUS_OVER;
2927         return 0;
2928 }
2929
2930 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2931                                                struct kvm_vcpu_events *events)
2932 {
2933         process_nmi(vcpu);
2934         events->exception.injected =
2935                 vcpu->arch.exception.pending &&
2936                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2937         events->exception.nr = vcpu->arch.exception.nr;
2938         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2939         events->exception.pad = 0;
2940         events->exception.error_code = vcpu->arch.exception.error_code;
2941
2942         events->interrupt.injected =
2943                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2944         events->interrupt.nr = vcpu->arch.interrupt.nr;
2945         events->interrupt.soft = 0;
2946         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2947
2948         events->nmi.injected = vcpu->arch.nmi_injected;
2949         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2950         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2951         events->nmi.pad = 0;
2952
2953         events->sipi_vector = 0; /* never valid when reporting to user space */
2954
2955         events->smi.smm = is_smm(vcpu);
2956         events->smi.pending = vcpu->arch.smi_pending;
2957         events->smi.smm_inside_nmi =
2958                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2959         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2960
2961         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2962                          | KVM_VCPUEVENT_VALID_SHADOW
2963                          | KVM_VCPUEVENT_VALID_SMM);
2964         memset(&events->reserved, 0, sizeof(events->reserved));
2965 }
2966
2967 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2968                                               struct kvm_vcpu_events *events)
2969 {
2970         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2971                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2972                               | KVM_VCPUEVENT_VALID_SHADOW
2973                               | KVM_VCPUEVENT_VALID_SMM))
2974                 return -EINVAL;
2975
2976         if (events->exception.injected &&
2977             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
2978                 return -EINVAL;
2979
2980         process_nmi(vcpu);
2981         vcpu->arch.exception.pending = events->exception.injected;
2982         vcpu->arch.exception.nr = events->exception.nr;
2983         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2984         vcpu->arch.exception.error_code = events->exception.error_code;
2985
2986         vcpu->arch.interrupt.pending = events->interrupt.injected;
2987         vcpu->arch.interrupt.nr = events->interrupt.nr;
2988         vcpu->arch.interrupt.soft = events->interrupt.soft;
2989         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2990                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2991                                                   events->interrupt.shadow);
2992
2993         vcpu->arch.nmi_injected = events->nmi.injected;
2994         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2995                 vcpu->arch.nmi_pending = events->nmi.pending;
2996         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2997
2998         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2999             lapic_in_kernel(vcpu))
3000                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3001
3002         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3003                 if (events->smi.smm)
3004                         vcpu->arch.hflags |= HF_SMM_MASK;
3005                 else
3006                         vcpu->arch.hflags &= ~HF_SMM_MASK;
3007                 vcpu->arch.smi_pending = events->smi.pending;
3008                 if (events->smi.smm_inside_nmi)
3009                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3010                 else
3011                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3012                 if (lapic_in_kernel(vcpu)) {
3013                         if (events->smi.latched_init)
3014                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3015                         else
3016                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3017                 }
3018         }
3019
3020         kvm_make_request(KVM_REQ_EVENT, vcpu);
3021
3022         return 0;
3023 }
3024
3025 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3026                                              struct kvm_debugregs *dbgregs)
3027 {
3028         unsigned long val;
3029
3030         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3031         kvm_get_dr(vcpu, 6, &val);
3032         dbgregs->dr6 = val;
3033         dbgregs->dr7 = vcpu->arch.dr7;
3034         dbgregs->flags = 0;
3035         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3036 }
3037
3038 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3039                                             struct kvm_debugregs *dbgregs)
3040 {
3041         if (dbgregs->flags)
3042                 return -EINVAL;
3043
3044         if (dbgregs->dr6 & ~0xffffffffull)
3045                 return -EINVAL;
3046         if (dbgregs->dr7 & ~0xffffffffull)
3047                 return -EINVAL;
3048
3049         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3050         kvm_update_dr0123(vcpu);
3051         vcpu->arch.dr6 = dbgregs->dr6;
3052         kvm_update_dr6(vcpu);
3053         vcpu->arch.dr7 = dbgregs->dr7;
3054         kvm_update_dr7(vcpu);
3055
3056         return 0;
3057 }
3058
3059 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3060
3061 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3062 {
3063         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3064         u64 xstate_bv = xsave->header.xfeatures;
3065         u64 valid;
3066
3067         /*
3068          * Copy legacy XSAVE area, to avoid complications with CPUID
3069          * leaves 0 and 1 in the loop below.
3070          */
3071         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3072
3073         /* Set XSTATE_BV */
3074         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3075
3076         /*
3077          * Copy each region from the possibly compacted offset to the
3078          * non-compacted offset.
3079          */
3080         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3081         while (valid) {
3082                 u64 feature = valid & -valid;
3083                 int index = fls64(feature) - 1;
3084                 void *src = get_xsave_addr(xsave, feature);
3085
3086                 if (src) {
3087                         u32 size, offset, ecx, edx;
3088                         cpuid_count(XSTATE_CPUID, index,
3089                                     &size, &offset, &ecx, &edx);
3090                         memcpy(dest + offset, src, size);
3091                 }
3092
3093                 valid -= feature;
3094         }
3095 }
3096
3097 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3098 {
3099         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3100         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3101         u64 valid;
3102
3103         /*
3104          * Copy legacy XSAVE area, to avoid complications with CPUID
3105          * leaves 0 and 1 in the loop below.
3106          */
3107         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3108
3109         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3110         xsave->header.xfeatures = xstate_bv;
3111         if (boot_cpu_has(X86_FEATURE_XSAVES))
3112                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3113
3114         /*
3115          * Copy each region from the non-compacted offset to the
3116          * possibly compacted offset.
3117          */
3118         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3119         while (valid) {
3120                 u64 feature = valid & -valid;
3121                 int index = fls64(feature) - 1;
3122                 void *dest = get_xsave_addr(xsave, feature);
3123
3124                 if (dest) {
3125                         u32 size, offset, ecx, edx;
3126                         cpuid_count(XSTATE_CPUID, index,
3127                                     &size, &offset, &ecx, &edx);
3128                         memcpy(dest, src + offset, size);
3129                 }
3130
3131                 valid -= feature;
3132         }
3133 }
3134
3135 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3136                                          struct kvm_xsave *guest_xsave)
3137 {
3138         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3139                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3140                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3141         } else {
3142                 memcpy(guest_xsave->region,
3143                         &vcpu->arch.guest_fpu.state.fxsave,
3144                         sizeof(struct fxregs_state));
3145                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3146                         XFEATURE_MASK_FPSSE;
3147         }
3148 }
3149
3150 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3151                                         struct kvm_xsave *guest_xsave)
3152 {
3153         u64 xstate_bv =
3154                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3155
3156         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3157                 /*
3158                  * Here we allow setting states that are not present in
3159                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3160                  * with old userspace.
3161                  */
3162                 if (xstate_bv & ~kvm_supported_xcr0())
3163                         return -EINVAL;
3164                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3165         } else {
3166                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3167                         return -EINVAL;
3168                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3169                         guest_xsave->region, sizeof(struct fxregs_state));
3170         }
3171         return 0;
3172 }
3173
3174 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3175                                         struct kvm_xcrs *guest_xcrs)
3176 {
3177         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3178                 guest_xcrs->nr_xcrs = 0;
3179                 return;
3180         }
3181
3182         guest_xcrs->nr_xcrs = 1;
3183         guest_xcrs->flags = 0;
3184         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3185         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3186 }
3187
3188 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3189                                        struct kvm_xcrs *guest_xcrs)
3190 {
3191         int i, r = 0;
3192
3193         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3194                 return -EINVAL;
3195
3196         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3197                 return -EINVAL;
3198
3199         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3200                 /* Only support XCR0 currently */
3201                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3202                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3203                                 guest_xcrs->xcrs[i].value);
3204                         break;
3205                 }
3206         if (r)
3207                 r = -EINVAL;
3208         return r;
3209 }
3210
3211 /*
3212  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3213  * stopped by the hypervisor.  This function will be called from the host only.
3214  * EINVAL is returned when the host attempts to set the flag for a guest that
3215  * does not support pv clocks.
3216  */
3217 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3218 {
3219         if (!vcpu->arch.pv_time_enabled)
3220                 return -EINVAL;
3221         vcpu->arch.pvclock_set_guest_stopped_request = true;
3222         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3223         return 0;
3224 }
3225
3226 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3227                                      struct kvm_enable_cap *cap)
3228 {
3229         if (cap->flags)
3230                 return -EINVAL;
3231
3232         switch (cap->cap) {
3233         case KVM_CAP_HYPERV_SYNIC:
3234                 return kvm_hv_activate_synic(vcpu);
3235         default:
3236                 return -EINVAL;
3237         }
3238 }
3239
3240 long kvm_arch_vcpu_ioctl(struct file *filp,
3241                          unsigned int ioctl, unsigned long arg)
3242 {
3243         struct kvm_vcpu *vcpu = filp->private_data;
3244         void __user *argp = (void __user *)arg;
3245         int r;
3246         union {
3247                 struct kvm_lapic_state *lapic;
3248                 struct kvm_xsave *xsave;
3249                 struct kvm_xcrs *xcrs;
3250                 void *buffer;
3251         } u;
3252
3253         u.buffer = NULL;
3254         switch (ioctl) {
3255         case KVM_GET_LAPIC: {
3256                 r = -EINVAL;
3257                 if (!lapic_in_kernel(vcpu))
3258                         goto out;
3259                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3260
3261                 r = -ENOMEM;
3262                 if (!u.lapic)
3263                         goto out;
3264                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3265                 if (r)
3266                         goto out;
3267                 r = -EFAULT;
3268                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3269                         goto out;
3270                 r = 0;
3271                 break;
3272         }
3273         case KVM_SET_LAPIC: {
3274                 r = -EINVAL;
3275                 if (!lapic_in_kernel(vcpu))
3276                         goto out;
3277                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3278                 if (IS_ERR(u.lapic))
3279                         return PTR_ERR(u.lapic);
3280
3281                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3282                 break;
3283         }
3284         case KVM_INTERRUPT: {
3285                 struct kvm_interrupt irq;
3286
3287                 r = -EFAULT;
3288                 if (copy_from_user(&irq, argp, sizeof irq))
3289                         goto out;
3290                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3291                 break;
3292         }
3293         case KVM_NMI: {
3294                 r = kvm_vcpu_ioctl_nmi(vcpu);
3295                 break;
3296         }
3297         case KVM_SMI: {
3298                 r = kvm_vcpu_ioctl_smi(vcpu);
3299                 break;
3300         }
3301         case KVM_SET_CPUID: {
3302                 struct kvm_cpuid __user *cpuid_arg = argp;
3303                 struct kvm_cpuid cpuid;
3304
3305                 r = -EFAULT;
3306                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3307                         goto out;
3308                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3309                 break;
3310         }
3311         case KVM_SET_CPUID2: {
3312                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3313                 struct kvm_cpuid2 cpuid;
3314
3315                 r = -EFAULT;
3316                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3317                         goto out;
3318                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3319                                               cpuid_arg->entries);
3320                 break;
3321         }
3322         case KVM_GET_CPUID2: {
3323                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3324                 struct kvm_cpuid2 cpuid;
3325
3326                 r = -EFAULT;
3327                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3328                         goto out;
3329                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3330                                               cpuid_arg->entries);
3331                 if (r)
3332                         goto out;
3333                 r = -EFAULT;
3334                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3335                         goto out;
3336                 r = 0;
3337                 break;
3338         }
3339         case KVM_GET_MSRS:
3340                 r = msr_io(vcpu, argp, do_get_msr, 1);
3341                 break;
3342         case KVM_SET_MSRS:
3343                 r = msr_io(vcpu, argp, do_set_msr, 0);
3344                 break;
3345         case KVM_TPR_ACCESS_REPORTING: {
3346                 struct kvm_tpr_access_ctl tac;
3347
3348                 r = -EFAULT;
3349                 if (copy_from_user(&tac, argp, sizeof tac))
3350                         goto out;
3351                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3352                 if (r)
3353                         goto out;
3354                 r = -EFAULT;
3355                 if (copy_to_user(argp, &tac, sizeof tac))
3356                         goto out;
3357                 r = 0;
3358                 break;
3359         };
3360         case KVM_SET_VAPIC_ADDR: {
3361                 struct kvm_vapic_addr va;
3362
3363                 r = -EINVAL;
3364                 if (!lapic_in_kernel(vcpu))
3365                         goto out;
3366                 r = -EFAULT;
3367                 if (copy_from_user(&va, argp, sizeof va))
3368                         goto out;
3369                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3370                 break;
3371         }
3372         case KVM_X86_SETUP_MCE: {
3373                 u64 mcg_cap;
3374
3375                 r = -EFAULT;
3376                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3377                         goto out;
3378                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3379                 break;
3380         }
3381         case KVM_X86_SET_MCE: {
3382                 struct kvm_x86_mce mce;
3383
3384                 r = -EFAULT;
3385                 if (copy_from_user(&mce, argp, sizeof mce))
3386                         goto out;
3387                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3388                 break;
3389         }
3390         case KVM_GET_VCPU_EVENTS: {
3391                 struct kvm_vcpu_events events;
3392
3393                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3394
3395                 r = -EFAULT;
3396                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3397                         break;
3398                 r = 0;
3399                 break;
3400         }
3401         case KVM_SET_VCPU_EVENTS: {
3402                 struct kvm_vcpu_events events;
3403
3404                 r = -EFAULT;
3405                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3406                         break;
3407
3408                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3409                 break;
3410         }
3411         case KVM_GET_DEBUGREGS: {
3412                 struct kvm_debugregs dbgregs;
3413
3414                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3415
3416                 r = -EFAULT;
3417                 if (copy_to_user(argp, &dbgregs,
3418                                  sizeof(struct kvm_debugregs)))
3419                         break;
3420                 r = 0;
3421                 break;
3422         }
3423         case KVM_SET_DEBUGREGS: {
3424                 struct kvm_debugregs dbgregs;
3425
3426                 r = -EFAULT;
3427                 if (copy_from_user(&dbgregs, argp,
3428                                    sizeof(struct kvm_debugregs)))
3429                         break;
3430
3431                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3432                 break;
3433         }
3434         case KVM_GET_XSAVE: {
3435                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3436                 r = -ENOMEM;
3437                 if (!u.xsave)
3438                         break;
3439
3440                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3441
3442                 r = -EFAULT;
3443                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3444                         break;
3445                 r = 0;
3446                 break;
3447         }
3448         case KVM_SET_XSAVE: {
3449                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3450                 if (IS_ERR(u.xsave))
3451                         return PTR_ERR(u.xsave);
3452
3453                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3454                 break;
3455         }
3456         case KVM_GET_XCRS: {
3457                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3458                 r = -ENOMEM;
3459                 if (!u.xcrs)
3460                         break;
3461
3462                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3463
3464                 r = -EFAULT;
3465                 if (copy_to_user(argp, u.xcrs,
3466                                  sizeof(struct kvm_xcrs)))
3467                         break;
3468                 r = 0;
3469                 break;
3470         }
3471         case KVM_SET_XCRS: {
3472                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3473                 if (IS_ERR(u.xcrs))
3474                         return PTR_ERR(u.xcrs);
3475
3476                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3477                 break;
3478         }
3479         case KVM_SET_TSC_KHZ: {
3480                 u32 user_tsc_khz;
3481
3482                 r = -EINVAL;
3483                 user_tsc_khz = (u32)arg;
3484
3485                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3486                         goto out;
3487
3488                 if (user_tsc_khz == 0)
3489                         user_tsc_khz = tsc_khz;
3490
3491                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3492                         r = 0;
3493
3494                 goto out;
3495         }
3496         case KVM_GET_TSC_KHZ: {
3497                 r = vcpu->arch.virtual_tsc_khz;
3498                 goto out;
3499         }
3500         case KVM_KVMCLOCK_CTRL: {
3501                 r = kvm_set_guest_paused(vcpu);
3502                 goto out;
3503         }
3504         case KVM_ENABLE_CAP: {
3505                 struct kvm_enable_cap cap;
3506
3507                 r = -EFAULT;
3508                 if (copy_from_user(&cap, argp, sizeof(cap)))
3509                         goto out;
3510                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3511                 break;
3512         }
3513         default:
3514                 r = -EINVAL;
3515         }
3516 out:
3517         kfree(u.buffer);
3518         return r;
3519 }
3520
3521 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3522 {
3523         return VM_FAULT_SIGBUS;
3524 }
3525
3526 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3527 {
3528         int ret;
3529
3530         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3531                 return -EINVAL;
3532         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3533         return ret;
3534 }
3535
3536 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3537                                               u64 ident_addr)
3538 {
3539         kvm->arch.ept_identity_map_addr = ident_addr;
3540         return 0;
3541 }
3542
3543 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3544                                           u32 kvm_nr_mmu_pages)
3545 {
3546         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3547                 return -EINVAL;
3548
3549         mutex_lock(&kvm->slots_lock);
3550
3551         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3552         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3553
3554         mutex_unlock(&kvm->slots_lock);
3555         return 0;
3556 }
3557
3558 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3559 {
3560         return kvm->arch.n_max_mmu_pages;
3561 }
3562
3563 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3564 {
3565         int r;
3566
3567         r = 0;
3568         switch (chip->chip_id) {
3569         case KVM_IRQCHIP_PIC_MASTER:
3570                 memcpy(&chip->chip.pic,
3571                         &pic_irqchip(kvm)->pics[0],
3572                         sizeof(struct kvm_pic_state));
3573                 break;
3574         case KVM_IRQCHIP_PIC_SLAVE:
3575                 memcpy(&chip->chip.pic,
3576                         &pic_irqchip(kvm)->pics[1],
3577                         sizeof(struct kvm_pic_state));
3578                 break;
3579         case KVM_IRQCHIP_IOAPIC:
3580                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3581                 break;
3582         default:
3583                 r = -EINVAL;
3584                 break;
3585         }
3586         return r;
3587 }
3588
3589 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3590 {
3591         int r;
3592
3593         r = 0;
3594         switch (chip->chip_id) {
3595         case KVM_IRQCHIP_PIC_MASTER:
3596                 spin_lock(&pic_irqchip(kvm)->lock);
3597                 memcpy(&pic_irqchip(kvm)->pics[0],
3598                         &chip->chip.pic,
3599                         sizeof(struct kvm_pic_state));
3600                 spin_unlock(&pic_irqchip(kvm)->lock);
3601                 break;
3602         case KVM_IRQCHIP_PIC_SLAVE:
3603                 spin_lock(&pic_irqchip(kvm)->lock);
3604                 memcpy(&pic_irqchip(kvm)->pics[1],
3605                         &chip->chip.pic,
3606                         sizeof(struct kvm_pic_state));
3607                 spin_unlock(&pic_irqchip(kvm)->lock);
3608                 break;
3609         case KVM_IRQCHIP_IOAPIC:
3610                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3611                 break;
3612         default:
3613                 r = -EINVAL;
3614                 break;
3615         }
3616         kvm_pic_update_irq(pic_irqchip(kvm));
3617         return r;
3618 }
3619
3620 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3621 {
3622         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3623
3624         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3625
3626         mutex_lock(&kps->lock);
3627         memcpy(ps, &kps->channels, sizeof(*ps));
3628         mutex_unlock(&kps->lock);
3629         return 0;
3630 }
3631
3632 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3633 {
3634         int i;
3635         struct kvm_pit *pit = kvm->arch.vpit;
3636
3637         mutex_lock(&pit->pit_state.lock);
3638         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3639         for (i = 0; i < 3; i++)
3640                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3641         mutex_unlock(&pit->pit_state.lock);
3642         return 0;
3643 }
3644
3645 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3646 {
3647         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3648         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3649                 sizeof(ps->channels));
3650         ps->flags = kvm->arch.vpit->pit_state.flags;
3651         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3652         memset(&ps->reserved, 0, sizeof(ps->reserved));
3653         return 0;
3654 }
3655
3656 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3657 {
3658         int start = 0;
3659         int i;
3660         u32 prev_legacy, cur_legacy;
3661         struct kvm_pit *pit = kvm->arch.vpit;
3662
3663         mutex_lock(&pit->pit_state.lock);
3664         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3665         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3666         if (!prev_legacy && cur_legacy)
3667                 start = 1;
3668         memcpy(&pit->pit_state.channels, &ps->channels,
3669                sizeof(pit->pit_state.channels));
3670         pit->pit_state.flags = ps->flags;
3671         for (i = 0; i < 3; i++)
3672                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3673                                    start && i == 0);
3674         mutex_unlock(&pit->pit_state.lock);
3675         return 0;
3676 }
3677
3678 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3679                                  struct kvm_reinject_control *control)
3680 {
3681         struct kvm_pit *pit = kvm->arch.vpit;
3682
3683         if (!pit)
3684                 return -ENXIO;
3685
3686         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3687          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3688          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3689          */
3690         mutex_lock(&pit->pit_state.lock);
3691         kvm_pit_set_reinject(pit, control->pit_reinject);
3692         mutex_unlock(&pit->pit_state.lock);
3693
3694         return 0;
3695 }
3696
3697 /**
3698  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3699  * @kvm: kvm instance
3700  * @log: slot id and address to which we copy the log
3701  *
3702  * Steps 1-4 below provide general overview of dirty page logging. See
3703  * kvm_get_dirty_log_protect() function description for additional details.
3704  *
3705  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3706  * always flush the TLB (step 4) even if previous step failed  and the dirty
3707  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3708  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3709  * writes will be marked dirty for next log read.
3710  *
3711  *   1. Take a snapshot of the bit and clear it if needed.
3712  *   2. Write protect the corresponding page.
3713  *   3. Copy the snapshot to the userspace.
3714  *   4. Flush TLB's if needed.
3715  */
3716 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3717 {
3718         bool is_dirty = false;
3719         int r;
3720
3721         mutex_lock(&kvm->slots_lock);
3722
3723         /*
3724          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3725          */
3726         if (kvm_x86_ops->flush_log_dirty)
3727                 kvm_x86_ops->flush_log_dirty(kvm);
3728
3729         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3730
3731         /*
3732          * All the TLBs can be flushed out of mmu lock, see the comments in
3733          * kvm_mmu_slot_remove_write_access().
3734          */
3735         lockdep_assert_held(&kvm->slots_lock);
3736         if (is_dirty)
3737                 kvm_flush_remote_tlbs(kvm);
3738
3739         mutex_unlock(&kvm->slots_lock);
3740         return r;
3741 }
3742
3743 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3744                         bool line_status)
3745 {
3746         if (!irqchip_in_kernel(kvm))
3747                 return -ENXIO;
3748
3749         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3750                                         irq_event->irq, irq_event->level,
3751                                         line_status);
3752         return 0;
3753 }
3754
3755 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3756                                    struct kvm_enable_cap *cap)
3757 {
3758         int r;
3759
3760         if (cap->flags)
3761                 return -EINVAL;
3762
3763         switch (cap->cap) {
3764         case KVM_CAP_DISABLE_QUIRKS:
3765                 kvm->arch.disabled_quirks = cap->args[0];
3766                 r = 0;
3767                 break;
3768         case KVM_CAP_SPLIT_IRQCHIP: {
3769                 mutex_lock(&kvm->lock);
3770                 r = -EINVAL;
3771                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3772                         goto split_irqchip_unlock;
3773                 r = -EEXIST;
3774                 if (irqchip_in_kernel(kvm))
3775                         goto split_irqchip_unlock;
3776                 if (atomic_read(&kvm->online_vcpus))
3777                         goto split_irqchip_unlock;
3778                 r = kvm_setup_empty_irq_routing(kvm);
3779                 if (r)
3780                         goto split_irqchip_unlock;
3781                 /* Pairs with irqchip_in_kernel. */
3782                 smp_wmb();
3783                 kvm->arch.irqchip_split = true;
3784                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3785                 r = 0;
3786 split_irqchip_unlock:
3787                 mutex_unlock(&kvm->lock);
3788                 break;
3789         }
3790         default:
3791                 r = -EINVAL;
3792                 break;
3793         }
3794         return r;
3795 }
3796
3797 long kvm_arch_vm_ioctl(struct file *filp,
3798                        unsigned int ioctl, unsigned long arg)
3799 {
3800         struct kvm *kvm = filp->private_data;
3801         void __user *argp = (void __user *)arg;
3802         int r = -ENOTTY;
3803         /*
3804          * This union makes it completely explicit to gcc-3.x
3805          * that these two variables' stack usage should be
3806          * combined, not added together.
3807          */
3808         union {
3809                 struct kvm_pit_state ps;
3810                 struct kvm_pit_state2 ps2;
3811                 struct kvm_pit_config pit_config;
3812         } u;
3813
3814         switch (ioctl) {
3815         case KVM_SET_TSS_ADDR:
3816                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3817                 break;
3818         case KVM_SET_IDENTITY_MAP_ADDR: {
3819                 u64 ident_addr;
3820
3821                 r = -EFAULT;
3822                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3823                         goto out;
3824                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3825                 break;
3826         }
3827         case KVM_SET_NR_MMU_PAGES:
3828                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3829                 break;
3830         case KVM_GET_NR_MMU_PAGES:
3831                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3832                 break;
3833         case KVM_CREATE_IRQCHIP: {
3834                 struct kvm_pic *vpic;
3835
3836                 mutex_lock(&kvm->lock);
3837                 r = -EEXIST;
3838                 if (kvm->arch.vpic)
3839                         goto create_irqchip_unlock;
3840                 r = -EINVAL;
3841                 if (atomic_read(&kvm->online_vcpus))
3842                         goto create_irqchip_unlock;
3843                 r = -ENOMEM;
3844                 vpic = kvm_create_pic(kvm);
3845                 if (vpic) {
3846                         r = kvm_ioapic_init(kvm);
3847                         if (r) {
3848                                 mutex_lock(&kvm->slots_lock);
3849                                 kvm_destroy_pic(vpic);
3850                                 mutex_unlock(&kvm->slots_lock);
3851                                 goto create_irqchip_unlock;
3852                         }
3853                 } else
3854                         goto create_irqchip_unlock;
3855                 r = kvm_setup_default_irq_routing(kvm);
3856                 if (r) {
3857                         mutex_lock(&kvm->slots_lock);
3858                         mutex_lock(&kvm->irq_lock);
3859                         kvm_ioapic_destroy(kvm);
3860                         kvm_destroy_pic(vpic);
3861                         mutex_unlock(&kvm->irq_lock);
3862                         mutex_unlock(&kvm->slots_lock);
3863                         goto create_irqchip_unlock;
3864                 }
3865                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3866                 smp_wmb();
3867                 kvm->arch.vpic = vpic;
3868         create_irqchip_unlock:
3869                 mutex_unlock(&kvm->lock);
3870                 break;
3871         }
3872         case KVM_CREATE_PIT:
3873                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3874                 goto create_pit;
3875         case KVM_CREATE_PIT2:
3876                 r = -EFAULT;
3877                 if (copy_from_user(&u.pit_config, argp,
3878                                    sizeof(struct kvm_pit_config)))
3879                         goto out;
3880         create_pit:
3881                 mutex_lock(&kvm->slots_lock);
3882                 r = -EEXIST;
3883                 if (kvm->arch.vpit)
3884                         goto create_pit_unlock;
3885                 r = -ENOMEM;
3886                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3887                 if (kvm->arch.vpit)
3888                         r = 0;
3889         create_pit_unlock:
3890                 mutex_unlock(&kvm->slots_lock);
3891                 break;
3892         case KVM_GET_IRQCHIP: {
3893                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3894                 struct kvm_irqchip *chip;
3895
3896                 chip = memdup_user(argp, sizeof(*chip));
3897                 if (IS_ERR(chip)) {
3898                         r = PTR_ERR(chip);
3899                         goto out;
3900                 }
3901
3902                 r = -ENXIO;
3903                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3904                         goto get_irqchip_out;
3905                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3906                 if (r)
3907                         goto get_irqchip_out;
3908                 r = -EFAULT;
3909                 if (copy_to_user(argp, chip, sizeof *chip))
3910                         goto get_irqchip_out;
3911                 r = 0;
3912         get_irqchip_out:
3913                 kfree(chip);
3914                 break;
3915         }
3916         case KVM_SET_IRQCHIP: {
3917                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3918                 struct kvm_irqchip *chip;
3919
3920                 chip = memdup_user(argp, sizeof(*chip));
3921                 if (IS_ERR(chip)) {
3922                         r = PTR_ERR(chip);
3923                         goto out;
3924                 }
3925
3926                 r = -ENXIO;
3927                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3928                         goto set_irqchip_out;
3929                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3930                 if (r)
3931                         goto set_irqchip_out;
3932                 r = 0;
3933         set_irqchip_out:
3934                 kfree(chip);
3935                 break;
3936         }
3937         case KVM_GET_PIT: {
3938                 r = -EFAULT;
3939                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3940                         goto out;
3941                 r = -ENXIO;
3942                 if (!kvm->arch.vpit)
3943                         goto out;
3944                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3945                 if (r)
3946                         goto out;
3947                 r = -EFAULT;
3948                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3949                         goto out;
3950                 r = 0;
3951                 break;
3952         }
3953         case KVM_SET_PIT: {
3954                 r = -EFAULT;
3955                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3956                         goto out;
3957                 r = -ENXIO;
3958                 if (!kvm->arch.vpit)
3959                         goto out;
3960                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3961                 break;
3962         }
3963         case KVM_GET_PIT2: {
3964                 r = -ENXIO;
3965                 if (!kvm->arch.vpit)
3966                         goto out;
3967                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3968                 if (r)
3969                         goto out;
3970                 r = -EFAULT;
3971                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3972                         goto out;
3973                 r = 0;
3974                 break;
3975         }
3976         case KVM_SET_PIT2: {
3977                 r = -EFAULT;
3978                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3979                         goto out;
3980                 r = -ENXIO;
3981                 if (!kvm->arch.vpit)
3982                         goto out;
3983                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3984                 break;
3985         }
3986         case KVM_REINJECT_CONTROL: {
3987                 struct kvm_reinject_control control;
3988                 r =  -EFAULT;
3989                 if (copy_from_user(&control, argp, sizeof(control)))
3990                         goto out;
3991                 r = kvm_vm_ioctl_reinject(kvm, &control);
3992                 break;
3993         }
3994         case KVM_SET_BOOT_CPU_ID:
3995                 r = 0;
3996                 mutex_lock(&kvm->lock);
3997                 if (atomic_read(&kvm->online_vcpus) != 0)
3998                         r = -EBUSY;
3999                 else
4000                         kvm->arch.bsp_vcpu_id = arg;
4001                 mutex_unlock(&kvm->lock);
4002                 break;
4003         case KVM_XEN_HVM_CONFIG: {
4004                 r = -EFAULT;
4005                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4006                                    sizeof(struct kvm_xen_hvm_config)))
4007                         goto out;
4008                 r = -EINVAL;
4009                 if (kvm->arch.xen_hvm_config.flags)
4010                         goto out;
4011                 r = 0;
4012                 break;
4013         }
4014         case KVM_SET_CLOCK: {
4015                 struct kvm_clock_data user_ns;
4016                 u64 now_ns;
4017                 s64 delta;
4018
4019                 r = -EFAULT;
4020                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4021                         goto out;
4022
4023                 r = -EINVAL;
4024                 if (user_ns.flags)
4025                         goto out;
4026
4027                 r = 0;
4028                 local_irq_disable();
4029                 now_ns = get_kernel_ns();
4030                 delta = user_ns.clock - now_ns;
4031                 local_irq_enable();
4032                 kvm->arch.kvmclock_offset = delta;
4033                 kvm_gen_update_masterclock(kvm);
4034                 break;
4035         }
4036         case KVM_GET_CLOCK: {
4037                 struct kvm_clock_data user_ns;
4038                 u64 now_ns;
4039
4040                 local_irq_disable();
4041                 now_ns = get_kernel_ns();
4042                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
4043                 local_irq_enable();
4044                 user_ns.flags = 0;
4045                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4046
4047                 r = -EFAULT;
4048                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4049                         goto out;
4050                 r = 0;
4051                 break;
4052         }
4053         case KVM_ENABLE_CAP: {
4054                 struct kvm_enable_cap cap;
4055
4056                 r = -EFAULT;
4057                 if (copy_from_user(&cap, argp, sizeof(cap)))
4058                         goto out;
4059                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4060                 break;
4061         }
4062         default:
4063                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4064         }
4065 out:
4066         return r;
4067 }
4068
4069 static void kvm_init_msr_list(void)
4070 {
4071         u32 dummy[2];
4072         unsigned i, j;
4073
4074         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4075                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4076                         continue;
4077
4078                 /*
4079                  * Even MSRs that are valid in the host may not be exposed
4080                  * to the guests in some cases.
4081                  */
4082                 switch (msrs_to_save[i]) {
4083                 case MSR_IA32_BNDCFGS:
4084                         if (!kvm_x86_ops->mpx_supported())
4085                                 continue;
4086                         break;
4087                 case MSR_TSC_AUX:
4088                         if (!kvm_x86_ops->rdtscp_supported())
4089                                 continue;
4090                         break;
4091                 default:
4092                         break;
4093                 }
4094
4095                 if (j < i)
4096                         msrs_to_save[j] = msrs_to_save[i];
4097                 j++;
4098         }
4099         num_msrs_to_save = j;
4100
4101         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4102                 switch (emulated_msrs[i]) {
4103                 case MSR_IA32_SMBASE:
4104                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4105                                 continue;
4106                         break;
4107                 default:
4108                         break;
4109                 }
4110
4111                 if (j < i)
4112                         emulated_msrs[j] = emulated_msrs[i];
4113                 j++;
4114         }
4115         num_emulated_msrs = j;
4116 }
4117
4118 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4119                            const void *v)
4120 {
4121         int handled = 0;
4122         int n;
4123
4124         do {
4125                 n = min(len, 8);
4126                 if (!(lapic_in_kernel(vcpu) &&
4127                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4128                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4129                         break;
4130                 handled += n;
4131                 addr += n;
4132                 len -= n;
4133                 v += n;
4134         } while (len);
4135
4136         return handled;
4137 }
4138
4139 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4140 {
4141         int handled = 0;
4142         int n;
4143
4144         do {
4145                 n = min(len, 8);
4146                 if (!(lapic_in_kernel(vcpu) &&
4147                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4148                                          addr, n, v))
4149                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4150                         break;
4151                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4152                 handled += n;
4153                 addr += n;
4154                 len -= n;
4155                 v += n;
4156         } while (len);
4157
4158         return handled;
4159 }
4160
4161 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4162                         struct kvm_segment *var, int seg)
4163 {
4164         kvm_x86_ops->set_segment(vcpu, var, seg);
4165 }
4166
4167 void kvm_get_segment(struct kvm_vcpu *vcpu,
4168                      struct kvm_segment *var, int seg)
4169 {
4170         kvm_x86_ops->get_segment(vcpu, var, seg);
4171 }
4172
4173 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4174                            struct x86_exception *exception)
4175 {
4176         gpa_t t_gpa;
4177
4178         BUG_ON(!mmu_is_nested(vcpu));
4179
4180         /* NPT walks are always user-walks */
4181         access |= PFERR_USER_MASK;
4182         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4183
4184         return t_gpa;
4185 }
4186
4187 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4188                               struct x86_exception *exception)
4189 {
4190         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4191         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4192 }
4193
4194  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4195                                 struct x86_exception *exception)
4196 {
4197         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4198         access |= PFERR_FETCH_MASK;
4199         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4200 }
4201
4202 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4203                                struct x86_exception *exception)
4204 {
4205         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4206         access |= PFERR_WRITE_MASK;
4207         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4208 }
4209
4210 /* uses this to access any guest's mapped memory without checking CPL */
4211 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4212                                 struct x86_exception *exception)
4213 {
4214         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4215 }
4216
4217 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4218                                       struct kvm_vcpu *vcpu, u32 access,
4219                                       struct x86_exception *exception)
4220 {
4221         void *data = val;
4222         int r = X86EMUL_CONTINUE;
4223
4224         while (bytes) {
4225                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4226                                                             exception);
4227                 unsigned offset = addr & (PAGE_SIZE-1);
4228                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4229                 int ret;
4230
4231                 if (gpa == UNMAPPED_GVA)
4232                         return X86EMUL_PROPAGATE_FAULT;
4233                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4234                                                offset, toread);
4235                 if (ret < 0) {
4236                         r = X86EMUL_IO_NEEDED;
4237                         goto out;
4238                 }
4239
4240                 bytes -= toread;
4241                 data += toread;
4242                 addr += toread;
4243         }
4244 out:
4245         return r;
4246 }
4247
4248 /* used for instruction fetching */
4249 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4250                                 gva_t addr, void *val, unsigned int bytes,
4251                                 struct x86_exception *exception)
4252 {
4253         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4254         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4255         unsigned offset;
4256         int ret;
4257
4258         /* Inline kvm_read_guest_virt_helper for speed.  */
4259         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4260                                                     exception);
4261         if (unlikely(gpa == UNMAPPED_GVA))
4262                 return X86EMUL_PROPAGATE_FAULT;
4263
4264         offset = addr & (PAGE_SIZE-1);
4265         if (WARN_ON(offset + bytes > PAGE_SIZE))
4266                 bytes = (unsigned)PAGE_SIZE - offset;
4267         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4268                                        offset, bytes);
4269         if (unlikely(ret < 0))
4270                 return X86EMUL_IO_NEEDED;
4271
4272         return X86EMUL_CONTINUE;
4273 }
4274
4275 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4276                                gva_t addr, void *val, unsigned int bytes,
4277                                struct x86_exception *exception)
4278 {
4279         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4280         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4281
4282         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4283                                           exception);
4284 }
4285 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4286
4287 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4288                                       gva_t addr, void *val, unsigned int bytes,
4289                                       struct x86_exception *exception)
4290 {
4291         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4292         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4293 }
4294
4295 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4296                 unsigned long addr, void *val, unsigned int bytes)
4297 {
4298         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4299         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4300
4301         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4302 }
4303
4304 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4305                                        gva_t addr, void *val,
4306                                        unsigned int bytes,
4307                                        struct x86_exception *exception)
4308 {
4309         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4310         void *data = val;
4311         int r = X86EMUL_CONTINUE;
4312
4313         while (bytes) {
4314                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4315                                                              PFERR_WRITE_MASK,
4316                                                              exception);
4317                 unsigned offset = addr & (PAGE_SIZE-1);
4318                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4319                 int ret;
4320
4321                 if (gpa == UNMAPPED_GVA)
4322                         return X86EMUL_PROPAGATE_FAULT;
4323                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4324                 if (ret < 0) {
4325                         r = X86EMUL_IO_NEEDED;
4326                         goto out;
4327                 }
4328
4329                 bytes -= towrite;
4330                 data += towrite;
4331                 addr += towrite;
4332         }
4333 out:
4334         return r;
4335 }
4336 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4337
4338 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4339                                 gpa_t *gpa, struct x86_exception *exception,
4340                                 bool write)
4341 {
4342         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4343                 | (write ? PFERR_WRITE_MASK : 0);
4344
4345         /*
4346          * currently PKRU is only applied to ept enabled guest so
4347          * there is no pkey in EPT page table for L1 guest or EPT
4348          * shadow page table for L2 guest.
4349          */
4350         if (vcpu_match_mmio_gva(vcpu, gva)
4351             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4352                                  vcpu->arch.access, 0, access)) {
4353                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4354                                         (gva & (PAGE_SIZE - 1));
4355                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4356                 return 1;
4357         }
4358
4359         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4360
4361         if (*gpa == UNMAPPED_GVA)
4362                 return -1;
4363
4364         /* For APIC access vmexit */
4365         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4366                 return 1;
4367
4368         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4369                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4370                 return 1;
4371         }
4372
4373         return 0;
4374 }
4375
4376 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4377                         const void *val, int bytes)
4378 {
4379         int ret;
4380
4381         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4382         if (ret < 0)
4383                 return 0;
4384         kvm_page_track_write(vcpu, gpa, val, bytes);
4385         return 1;
4386 }
4387
4388 struct read_write_emulator_ops {
4389         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4390                                   int bytes);
4391         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4392                                   void *val, int bytes);
4393         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4394                                int bytes, void *val);
4395         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4396                                     void *val, int bytes);
4397         bool write;
4398 };
4399
4400 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4401 {
4402         if (vcpu->mmio_read_completed) {
4403                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4404                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4405                 vcpu->mmio_read_completed = 0;
4406                 return 1;
4407         }
4408
4409         return 0;
4410 }
4411
4412 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4413                         void *val, int bytes)
4414 {
4415         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4416 }
4417
4418 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4419                          void *val, int bytes)
4420 {
4421         return emulator_write_phys(vcpu, gpa, val, bytes);
4422 }
4423
4424 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4425 {
4426         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4427         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4428 }
4429
4430 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4431                           void *val, int bytes)
4432 {
4433         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4434         return X86EMUL_IO_NEEDED;
4435 }
4436
4437 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4438                            void *val, int bytes)
4439 {
4440         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4441
4442         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4443         return X86EMUL_CONTINUE;
4444 }
4445
4446 static const struct read_write_emulator_ops read_emultor = {
4447         .read_write_prepare = read_prepare,
4448         .read_write_emulate = read_emulate,
4449         .read_write_mmio = vcpu_mmio_read,
4450         .read_write_exit_mmio = read_exit_mmio,
4451 };
4452
4453 static const struct read_write_emulator_ops write_emultor = {
4454         .read_write_emulate = write_emulate,
4455         .read_write_mmio = write_mmio,
4456         .read_write_exit_mmio = write_exit_mmio,
4457         .write = true,
4458 };
4459
4460 static int emulator_read_write_onepage(unsigned long addr, void *val,
4461                                        unsigned int bytes,
4462                                        struct x86_exception *exception,
4463                                        struct kvm_vcpu *vcpu,
4464                                        const struct read_write_emulator_ops *ops)
4465 {
4466         gpa_t gpa;
4467         int handled, ret;
4468         bool write = ops->write;
4469         struct kvm_mmio_fragment *frag;
4470
4471         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4472
4473         if (ret < 0)
4474                 return X86EMUL_PROPAGATE_FAULT;
4475
4476         /* For APIC access vmexit */
4477         if (ret)
4478                 goto mmio;
4479
4480         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4481                 return X86EMUL_CONTINUE;
4482
4483 mmio:
4484         /*
4485          * Is this MMIO handled locally?
4486          */
4487         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4488         if (handled == bytes)
4489                 return X86EMUL_CONTINUE;
4490
4491         gpa += handled;
4492         bytes -= handled;
4493         val += handled;
4494
4495         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4496         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4497         frag->gpa = gpa;
4498         frag->data = val;
4499         frag->len = bytes;
4500         return X86EMUL_CONTINUE;
4501 }
4502
4503 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4504                         unsigned long addr,
4505                         void *val, unsigned int bytes,
4506                         struct x86_exception *exception,
4507                         const struct read_write_emulator_ops *ops)
4508 {
4509         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4510         gpa_t gpa;
4511         int rc;
4512
4513         if (ops->read_write_prepare &&
4514                   ops->read_write_prepare(vcpu, val, bytes))
4515                 return X86EMUL_CONTINUE;
4516
4517         vcpu->mmio_nr_fragments = 0;
4518
4519         /* Crossing a page boundary? */
4520         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4521                 int now;
4522
4523                 now = -addr & ~PAGE_MASK;
4524                 rc = emulator_read_write_onepage(addr, val, now, exception,
4525                                                  vcpu, ops);
4526
4527                 if (rc != X86EMUL_CONTINUE)
4528                         return rc;
4529                 addr += now;
4530                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4531                         addr = (u32)addr;
4532                 val += now;
4533                 bytes -= now;
4534         }
4535
4536         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4537                                          vcpu, ops);
4538         if (rc != X86EMUL_CONTINUE)
4539                 return rc;
4540
4541         if (!vcpu->mmio_nr_fragments)
4542                 return rc;
4543
4544         gpa = vcpu->mmio_fragments[0].gpa;
4545
4546         vcpu->mmio_needed = 1;
4547         vcpu->mmio_cur_fragment = 0;
4548
4549         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4550         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4551         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4552         vcpu->run->mmio.phys_addr = gpa;
4553
4554         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4555 }
4556
4557 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4558                                   unsigned long addr,
4559                                   void *val,
4560                                   unsigned int bytes,
4561                                   struct x86_exception *exception)
4562 {
4563         return emulator_read_write(ctxt, addr, val, bytes,
4564                                    exception, &read_emultor);
4565 }
4566
4567 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4568                             unsigned long addr,
4569                             const void *val,
4570                             unsigned int bytes,
4571                             struct x86_exception *exception)
4572 {
4573         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4574                                    exception, &write_emultor);
4575 }
4576
4577 #define CMPXCHG_TYPE(t, ptr, old, new) \
4578         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4579
4580 #ifdef CONFIG_X86_64
4581 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4582 #else
4583 #  define CMPXCHG64(ptr, old, new) \
4584         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4585 #endif
4586
4587 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4588                                      unsigned long addr,
4589                                      const void *old,
4590                                      const void *new,
4591                                      unsigned int bytes,
4592                                      struct x86_exception *exception)
4593 {
4594         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4595         gpa_t gpa;
4596         struct page *page;
4597         char *kaddr;
4598         bool exchanged;
4599
4600         /* guests cmpxchg8b have to be emulated atomically */
4601         if (bytes > 8 || (bytes & (bytes - 1)))
4602                 goto emul_write;
4603
4604         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4605
4606         if (gpa == UNMAPPED_GVA ||
4607             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4608                 goto emul_write;
4609
4610         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4611                 goto emul_write;
4612
4613         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4614         if (is_error_page(page))
4615                 goto emul_write;
4616
4617         kaddr = kmap_atomic(page);
4618         kaddr += offset_in_page(gpa);
4619         switch (bytes) {
4620         case 1:
4621                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4622                 break;
4623         case 2:
4624                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4625                 break;
4626         case 4:
4627                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4628                 break;
4629         case 8:
4630                 exchanged = CMPXCHG64(kaddr, old, new);
4631                 break;
4632         default:
4633                 BUG();
4634         }
4635         kunmap_atomic(kaddr);
4636         kvm_release_page_dirty(page);
4637
4638         if (!exchanged)
4639                 return X86EMUL_CMPXCHG_FAILED;
4640
4641         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4642         kvm_page_track_write(vcpu, gpa, new, bytes);
4643
4644         return X86EMUL_CONTINUE;
4645
4646 emul_write:
4647         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4648
4649         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4650 }
4651
4652 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4653 {
4654         /* TODO: String I/O for in kernel device */
4655         int r;
4656
4657         if (vcpu->arch.pio.in)
4658                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4659                                     vcpu->arch.pio.size, pd);
4660         else
4661                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4662                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4663                                      pd);
4664         return r;
4665 }
4666
4667 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4668                                unsigned short port, void *val,
4669                                unsigned int count, bool in)
4670 {
4671         vcpu->arch.pio.port = port;
4672         vcpu->arch.pio.in = in;
4673         vcpu->arch.pio.count  = count;
4674         vcpu->arch.pio.size = size;
4675
4676         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4677                 vcpu->arch.pio.count = 0;
4678                 return 1;
4679         }
4680
4681         vcpu->run->exit_reason = KVM_EXIT_IO;
4682         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4683         vcpu->run->io.size = size;
4684         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4685         vcpu->run->io.count = count;
4686         vcpu->run->io.port = port;
4687
4688         return 0;
4689 }
4690
4691 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4692                                     int size, unsigned short port, void *val,
4693                                     unsigned int count)
4694 {
4695         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4696         int ret;
4697
4698         if (vcpu->arch.pio.count)
4699                 goto data_avail;
4700
4701         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4702         if (ret) {
4703 data_avail:
4704                 memcpy(val, vcpu->arch.pio_data, size * count);
4705                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4706                 vcpu->arch.pio.count = 0;
4707                 return 1;
4708         }
4709
4710         return 0;
4711 }
4712
4713 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4714                                      int size, unsigned short port,
4715                                      const void *val, unsigned int count)
4716 {
4717         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4718
4719         memcpy(vcpu->arch.pio_data, val, size * count);
4720         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4721         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4722 }
4723
4724 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4725 {
4726         return kvm_x86_ops->get_segment_base(vcpu, seg);
4727 }
4728
4729 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4730 {
4731         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4732 }
4733
4734 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4735 {
4736         if (!need_emulate_wbinvd(vcpu))
4737                 return X86EMUL_CONTINUE;
4738
4739         if (kvm_x86_ops->has_wbinvd_exit()) {
4740                 int cpu = get_cpu();
4741
4742                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4743                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4744                                 wbinvd_ipi, NULL, 1);
4745                 put_cpu();
4746                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4747         } else
4748                 wbinvd();
4749         return X86EMUL_CONTINUE;
4750 }
4751
4752 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4753 {
4754         kvm_x86_ops->skip_emulated_instruction(vcpu);
4755         return kvm_emulate_wbinvd_noskip(vcpu);
4756 }
4757 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4758
4759
4760
4761 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4762 {
4763         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4764 }
4765
4766 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4767                            unsigned long *dest)
4768 {
4769         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4770 }
4771
4772 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4773                            unsigned long value)
4774 {
4775
4776         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4777 }
4778
4779 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4780 {
4781         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4782 }
4783
4784 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4785 {
4786         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4787         unsigned long value;
4788
4789         switch (cr) {
4790         case 0:
4791                 value = kvm_read_cr0(vcpu);
4792                 break;
4793         case 2:
4794                 value = vcpu->arch.cr2;
4795                 break;
4796         case 3:
4797                 value = kvm_read_cr3(vcpu);
4798                 break;
4799         case 4:
4800                 value = kvm_read_cr4(vcpu);
4801                 break;
4802         case 8:
4803                 value = kvm_get_cr8(vcpu);
4804                 break;
4805         default:
4806                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4807                 return 0;
4808         }
4809
4810         return value;
4811 }
4812
4813 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4814 {
4815         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4816         int res = 0;
4817
4818         switch (cr) {
4819         case 0:
4820                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4821                 break;
4822         case 2:
4823                 vcpu->arch.cr2 = val;
4824                 break;
4825         case 3:
4826                 res = kvm_set_cr3(vcpu, val);
4827                 break;
4828         case 4:
4829                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4830                 break;
4831         case 8:
4832                 res = kvm_set_cr8(vcpu, val);
4833                 break;
4834         default:
4835                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4836                 res = -1;
4837         }
4838
4839         return res;
4840 }
4841
4842 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4843 {
4844         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4845 }
4846
4847 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4848 {
4849         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4850 }
4851
4852 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4853 {
4854         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4855 }
4856
4857 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4858 {
4859         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4860 }
4861
4862 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4863 {
4864         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4865 }
4866
4867 static unsigned long emulator_get_cached_segment_base(
4868         struct x86_emulate_ctxt *ctxt, int seg)
4869 {
4870         return get_segment_base(emul_to_vcpu(ctxt), seg);
4871 }
4872
4873 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4874                                  struct desc_struct *desc, u32 *base3,
4875                                  int seg)
4876 {
4877         struct kvm_segment var;
4878
4879         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4880         *selector = var.selector;
4881
4882         if (var.unusable) {
4883                 memset(desc, 0, sizeof(*desc));
4884                 return false;
4885         }
4886
4887         if (var.g)
4888                 var.limit >>= 12;
4889         set_desc_limit(desc, var.limit);
4890         set_desc_base(desc, (unsigned long)var.base);
4891 #ifdef CONFIG_X86_64
4892         if (base3)
4893                 *base3 = var.base >> 32;
4894 #endif
4895         desc->type = var.type;
4896         desc->s = var.s;
4897         desc->dpl = var.dpl;
4898         desc->p = var.present;
4899         desc->avl = var.avl;
4900         desc->l = var.l;
4901         desc->d = var.db;
4902         desc->g = var.g;
4903
4904         return true;
4905 }
4906
4907 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4908                                  struct desc_struct *desc, u32 base3,
4909                                  int seg)
4910 {
4911         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4912         struct kvm_segment var;
4913
4914         var.selector = selector;
4915         var.base = get_desc_base(desc);
4916 #ifdef CONFIG_X86_64
4917         var.base |= ((u64)base3) << 32;
4918 #endif
4919         var.limit = get_desc_limit(desc);
4920         if (desc->g)
4921                 var.limit = (var.limit << 12) | 0xfff;
4922         var.type = desc->type;
4923         var.dpl = desc->dpl;
4924         var.db = desc->d;
4925         var.s = desc->s;
4926         var.l = desc->l;
4927         var.g = desc->g;
4928         var.avl = desc->avl;
4929         var.present = desc->p;
4930         var.unusable = !var.present;
4931         var.padding = 0;
4932
4933         kvm_set_segment(vcpu, &var, seg);
4934         return;
4935 }
4936
4937 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4938                             u32 msr_index, u64 *pdata)
4939 {
4940         struct msr_data msr;
4941         int r;
4942
4943         msr.index = msr_index;
4944         msr.host_initiated = false;
4945         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4946         if (r)
4947                 return r;
4948
4949         *pdata = msr.data;
4950         return 0;
4951 }
4952
4953 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4954                             u32 msr_index, u64 data)
4955 {
4956         struct msr_data msr;
4957
4958         msr.data = data;
4959         msr.index = msr_index;
4960         msr.host_initiated = false;
4961         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4962 }
4963
4964 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4965 {
4966         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4967
4968         return vcpu->arch.smbase;
4969 }
4970
4971 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4972 {
4973         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4974
4975         vcpu->arch.smbase = smbase;
4976 }
4977
4978 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4979                               u32 pmc)
4980 {
4981         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4982 }
4983
4984 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4985                              u32 pmc, u64 *pdata)
4986 {
4987         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4988 }
4989
4990 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4991 {
4992         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4993 }
4994
4995 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4996 {
4997         preempt_disable();
4998         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4999         /*
5000          * CR0.TS may reference the host fpu state, not the guest fpu state,
5001          * so it may be clear at this point.
5002          */
5003         clts();
5004 }
5005
5006 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5007 {
5008         preempt_enable();
5009 }
5010
5011 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5012                               struct x86_instruction_info *info,
5013                               enum x86_intercept_stage stage)
5014 {
5015         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5016 }
5017
5018 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5019                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5020 {
5021         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5022 }
5023
5024 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5025 {
5026         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5027 }
5028
5029 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5030 {
5031         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5032 }
5033
5034 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5035 {
5036         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5037 }
5038
5039 static const struct x86_emulate_ops emulate_ops = {
5040         .read_gpr            = emulator_read_gpr,
5041         .write_gpr           = emulator_write_gpr,
5042         .read_std            = kvm_read_guest_virt_system,
5043         .write_std           = kvm_write_guest_virt_system,
5044         .read_phys           = kvm_read_guest_phys_system,
5045         .fetch               = kvm_fetch_guest_virt,
5046         .read_emulated       = emulator_read_emulated,
5047         .write_emulated      = emulator_write_emulated,
5048         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5049         .invlpg              = emulator_invlpg,
5050         .pio_in_emulated     = emulator_pio_in_emulated,
5051         .pio_out_emulated    = emulator_pio_out_emulated,
5052         .get_segment         = emulator_get_segment,
5053         .set_segment         = emulator_set_segment,
5054         .get_cached_segment_base = emulator_get_cached_segment_base,
5055         .get_gdt             = emulator_get_gdt,
5056         .get_idt             = emulator_get_idt,
5057         .set_gdt             = emulator_set_gdt,
5058         .set_idt             = emulator_set_idt,
5059         .get_cr              = emulator_get_cr,
5060         .set_cr              = emulator_set_cr,
5061         .cpl                 = emulator_get_cpl,
5062         .get_dr              = emulator_get_dr,
5063         .set_dr              = emulator_set_dr,
5064         .get_smbase          = emulator_get_smbase,
5065         .set_smbase          = emulator_set_smbase,
5066         .set_msr             = emulator_set_msr,
5067         .get_msr             = emulator_get_msr,
5068         .check_pmc           = emulator_check_pmc,
5069         .read_pmc            = emulator_read_pmc,
5070         .halt                = emulator_halt,
5071         .wbinvd              = emulator_wbinvd,
5072         .fix_hypercall       = emulator_fix_hypercall,
5073         .get_fpu             = emulator_get_fpu,
5074         .put_fpu             = emulator_put_fpu,
5075         .intercept           = emulator_intercept,
5076         .get_cpuid           = emulator_get_cpuid,
5077         .set_nmi_mask        = emulator_set_nmi_mask,
5078 };
5079
5080 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5081 {
5082         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5083         /*
5084          * an sti; sti; sequence only disable interrupts for the first
5085          * instruction. So, if the last instruction, be it emulated or
5086          * not, left the system with the INT_STI flag enabled, it
5087          * means that the last instruction is an sti. We should not
5088          * leave the flag on in this case. The same goes for mov ss
5089          */
5090         if (int_shadow & mask)
5091                 mask = 0;
5092         if (unlikely(int_shadow || mask)) {
5093                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5094                 if (!mask)
5095                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5096         }
5097 }
5098
5099 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5100 {
5101         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5102         if (ctxt->exception.vector == PF_VECTOR)
5103                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5104
5105         if (ctxt->exception.error_code_valid)
5106                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5107                                       ctxt->exception.error_code);
5108         else
5109                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5110         return false;
5111 }
5112
5113 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5114 {
5115         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5116         int cs_db, cs_l;
5117
5118         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5119
5120         ctxt->eflags = kvm_get_rflags(vcpu);
5121         ctxt->eip = kvm_rip_read(vcpu);
5122         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5123                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5124                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5125                      cs_db                              ? X86EMUL_MODE_PROT32 :
5126                                                           X86EMUL_MODE_PROT16;
5127         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5128         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5129         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5130         ctxt->emul_flags = vcpu->arch.hflags;
5131
5132         init_decode_cache(ctxt);
5133         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5134 }
5135
5136 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5137 {
5138         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5139         int ret;
5140
5141         init_emulate_ctxt(vcpu);
5142
5143         ctxt->op_bytes = 2;
5144         ctxt->ad_bytes = 2;
5145         ctxt->_eip = ctxt->eip + inc_eip;
5146         ret = emulate_int_real(ctxt, irq);
5147
5148         if (ret != X86EMUL_CONTINUE)
5149                 return EMULATE_FAIL;
5150
5151         ctxt->eip = ctxt->_eip;
5152         kvm_rip_write(vcpu, ctxt->eip);
5153         kvm_set_rflags(vcpu, ctxt->eflags);
5154
5155         if (irq == NMI_VECTOR)
5156                 vcpu->arch.nmi_pending = 0;
5157         else
5158                 vcpu->arch.interrupt.pending = false;
5159
5160         return EMULATE_DONE;
5161 }
5162 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5163
5164 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5165 {
5166         int r = EMULATE_DONE;
5167
5168         ++vcpu->stat.insn_emulation_fail;
5169         trace_kvm_emulate_insn_failed(vcpu);
5170         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5171                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5172                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5173                 vcpu->run->internal.ndata = 0;
5174                 r = EMULATE_FAIL;
5175         }
5176         kvm_queue_exception(vcpu, UD_VECTOR);
5177
5178         return r;
5179 }
5180
5181 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5182                                   bool write_fault_to_shadow_pgtable,
5183                                   int emulation_type)
5184 {
5185         gpa_t gpa = cr2;
5186         kvm_pfn_t pfn;
5187
5188         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5189                 return false;
5190
5191         if (!vcpu->arch.mmu.direct_map) {
5192                 /*
5193                  * Write permission should be allowed since only
5194                  * write access need to be emulated.
5195                  */
5196                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5197
5198                 /*
5199                  * If the mapping is invalid in guest, let cpu retry
5200                  * it to generate fault.
5201                  */
5202                 if (gpa == UNMAPPED_GVA)
5203                         return true;
5204         }
5205
5206         /*
5207          * Do not retry the unhandleable instruction if it faults on the
5208          * readonly host memory, otherwise it will goto a infinite loop:
5209          * retry instruction -> write #PF -> emulation fail -> retry
5210          * instruction -> ...
5211          */
5212         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5213
5214         /*
5215          * If the instruction failed on the error pfn, it can not be fixed,
5216          * report the error to userspace.
5217          */
5218         if (is_error_noslot_pfn(pfn))
5219                 return false;
5220
5221         kvm_release_pfn_clean(pfn);
5222
5223         /* The instructions are well-emulated on direct mmu. */
5224         if (vcpu->arch.mmu.direct_map) {
5225                 unsigned int indirect_shadow_pages;
5226
5227                 spin_lock(&vcpu->kvm->mmu_lock);
5228                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5229                 spin_unlock(&vcpu->kvm->mmu_lock);
5230
5231                 if (indirect_shadow_pages)
5232                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5233
5234                 return true;
5235         }
5236
5237         /*
5238          * if emulation was due to access to shadowed page table
5239          * and it failed try to unshadow page and re-enter the
5240          * guest to let CPU execute the instruction.
5241          */
5242         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5243
5244         /*
5245          * If the access faults on its page table, it can not
5246          * be fixed by unprotecting shadow page and it should
5247          * be reported to userspace.
5248          */
5249         return !write_fault_to_shadow_pgtable;
5250 }
5251
5252 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5253                               unsigned long cr2,  int emulation_type)
5254 {
5255         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5256         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5257
5258         last_retry_eip = vcpu->arch.last_retry_eip;
5259         last_retry_addr = vcpu->arch.last_retry_addr;
5260
5261         /*
5262          * If the emulation is caused by #PF and it is non-page_table
5263          * writing instruction, it means the VM-EXIT is caused by shadow
5264          * page protected, we can zap the shadow page and retry this
5265          * instruction directly.
5266          *
5267          * Note: if the guest uses a non-page-table modifying instruction
5268          * on the PDE that points to the instruction, then we will unmap
5269          * the instruction and go to an infinite loop. So, we cache the
5270          * last retried eip and the last fault address, if we meet the eip
5271          * and the address again, we can break out of the potential infinite
5272          * loop.
5273          */
5274         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5275
5276         if (!(emulation_type & EMULTYPE_RETRY))
5277                 return false;
5278
5279         if (x86_page_table_writing_insn(ctxt))
5280                 return false;
5281
5282         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5283                 return false;
5284
5285         vcpu->arch.last_retry_eip = ctxt->eip;
5286         vcpu->arch.last_retry_addr = cr2;
5287
5288         if (!vcpu->arch.mmu.direct_map)
5289                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5290
5291         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5292
5293         return true;
5294 }
5295
5296 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5297 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5298
5299 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5300 {
5301         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5302                 /* This is a good place to trace that we are exiting SMM.  */
5303                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5304
5305                 if (unlikely(vcpu->arch.smi_pending)) {
5306                         kvm_make_request(KVM_REQ_SMI, vcpu);
5307                         vcpu->arch.smi_pending = 0;
5308                 } else {
5309                         /* Process a latched INIT, if any.  */
5310                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5311                 }
5312         }
5313
5314         kvm_mmu_reset_context(vcpu);
5315 }
5316
5317 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5318 {
5319         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5320
5321         vcpu->arch.hflags = emul_flags;
5322
5323         if (changed & HF_SMM_MASK)
5324                 kvm_smm_changed(vcpu);
5325 }
5326
5327 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5328                                 unsigned long *db)
5329 {
5330         u32 dr6 = 0;
5331         int i;
5332         u32 enable, rwlen;
5333
5334         enable = dr7;
5335         rwlen = dr7 >> 16;
5336         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5337                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5338                         dr6 |= (1 << i);
5339         return dr6;
5340 }
5341
5342 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5343 {
5344         struct kvm_run *kvm_run = vcpu->run;
5345
5346         /*
5347          * rflags is the old, "raw" value of the flags.  The new value has
5348          * not been saved yet.
5349          *
5350          * This is correct even for TF set by the guest, because "the
5351          * processor will not generate this exception after the instruction
5352          * that sets the TF flag".
5353          */
5354         if (unlikely(rflags & X86_EFLAGS_TF)) {
5355                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5356                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5357                                                   DR6_RTM;
5358                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5359                         kvm_run->debug.arch.exception = DB_VECTOR;
5360                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5361                         *r = EMULATE_USER_EXIT;
5362                 } else {
5363                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5364                         /*
5365                          * "Certain debug exceptions may clear bit 0-3.  The
5366                          * remaining contents of the DR6 register are never
5367                          * cleared by the processor".
5368                          */
5369                         vcpu->arch.dr6 &= ~15;
5370                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5371                         kvm_queue_exception(vcpu, DB_VECTOR);
5372                 }
5373         }
5374 }
5375
5376 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5377 {
5378         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5379             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5380                 struct kvm_run *kvm_run = vcpu->run;
5381                 unsigned long eip = kvm_get_linear_rip(vcpu);
5382                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5383                                            vcpu->arch.guest_debug_dr7,
5384                                            vcpu->arch.eff_db);
5385
5386                 if (dr6 != 0) {
5387                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5388                         kvm_run->debug.arch.pc = eip;
5389                         kvm_run->debug.arch.exception = DB_VECTOR;
5390                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5391                         *r = EMULATE_USER_EXIT;
5392                         return true;
5393                 }
5394         }
5395
5396         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5397             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5398                 unsigned long eip = kvm_get_linear_rip(vcpu);
5399                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5400                                            vcpu->arch.dr7,
5401                                            vcpu->arch.db);
5402
5403                 if (dr6 != 0) {
5404                         vcpu->arch.dr6 &= ~15;
5405                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5406                         kvm_queue_exception(vcpu, DB_VECTOR);
5407                         *r = EMULATE_DONE;
5408                         return true;
5409                 }
5410         }
5411
5412         return false;
5413 }
5414
5415 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5416                             unsigned long cr2,
5417                             int emulation_type,
5418                             void *insn,
5419                             int insn_len)
5420 {
5421         int r;
5422         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5423         bool writeback = true;
5424         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5425
5426         /*
5427          * Clear write_fault_to_shadow_pgtable here to ensure it is
5428          * never reused.
5429          */
5430         vcpu->arch.write_fault_to_shadow_pgtable = false;
5431         kvm_clear_exception_queue(vcpu);
5432
5433         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5434                 init_emulate_ctxt(vcpu);
5435
5436                 /*
5437                  * We will reenter on the same instruction since
5438                  * we do not set complete_userspace_io.  This does not
5439                  * handle watchpoints yet, those would be handled in
5440                  * the emulate_ops.
5441                  */
5442                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5443                         return r;
5444
5445                 ctxt->interruptibility = 0;
5446                 ctxt->have_exception = false;
5447                 ctxt->exception.vector = -1;
5448                 ctxt->perm_ok = false;
5449
5450                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5451
5452                 r = x86_decode_insn(ctxt, insn, insn_len);
5453
5454                 trace_kvm_emulate_insn_start(vcpu);
5455                 ++vcpu->stat.insn_emulation;
5456                 if (r != EMULATION_OK)  {
5457                         if (emulation_type & EMULTYPE_TRAP_UD)
5458                                 return EMULATE_FAIL;
5459                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5460                                                 emulation_type))
5461                                 return EMULATE_DONE;
5462                         if (emulation_type & EMULTYPE_SKIP)
5463                                 return EMULATE_FAIL;
5464                         return handle_emulation_failure(vcpu);
5465                 }
5466         }
5467
5468         if (emulation_type & EMULTYPE_SKIP) {
5469                 kvm_rip_write(vcpu, ctxt->_eip);
5470                 if (ctxt->eflags & X86_EFLAGS_RF)
5471                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5472                 return EMULATE_DONE;
5473         }
5474
5475         if (retry_instruction(ctxt, cr2, emulation_type))
5476                 return EMULATE_DONE;
5477
5478         /* this is needed for vmware backdoor interface to work since it
5479            changes registers values  during IO operation */
5480         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5481                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5482                 emulator_invalidate_register_cache(ctxt);
5483         }
5484
5485 restart:
5486         r = x86_emulate_insn(ctxt);
5487
5488         if (r == EMULATION_INTERCEPTED)
5489                 return EMULATE_DONE;
5490
5491         if (r == EMULATION_FAILED) {
5492                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5493                                         emulation_type))
5494                         return EMULATE_DONE;
5495
5496                 return handle_emulation_failure(vcpu);
5497         }
5498
5499         if (ctxt->have_exception) {
5500                 r = EMULATE_DONE;
5501                 if (inject_emulated_exception(vcpu))
5502                         return r;
5503         } else if (vcpu->arch.pio.count) {
5504                 if (!vcpu->arch.pio.in) {
5505                         /* FIXME: return into emulator if single-stepping.  */
5506                         vcpu->arch.pio.count = 0;
5507                 } else {
5508                         writeback = false;
5509                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5510                 }
5511                 r = EMULATE_USER_EXIT;
5512         } else if (vcpu->mmio_needed) {
5513                 if (!vcpu->mmio_is_write)
5514                         writeback = false;
5515                 r = EMULATE_USER_EXIT;
5516                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5517         } else if (r == EMULATION_RESTART)
5518                 goto restart;
5519         else
5520                 r = EMULATE_DONE;
5521
5522         if (writeback) {
5523                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5524                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5525                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5526                 if (vcpu->arch.hflags != ctxt->emul_flags)
5527                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5528                 kvm_rip_write(vcpu, ctxt->eip);
5529                 if (r == EMULATE_DONE)
5530                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5531                 if (!ctxt->have_exception ||
5532                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5533                         __kvm_set_rflags(vcpu, ctxt->eflags);
5534
5535                 /*
5536                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5537                  * do nothing, and it will be requested again as soon as
5538                  * the shadow expires.  But we still need to check here,
5539                  * because POPF has no interrupt shadow.
5540                  */
5541                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5542                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5543         } else
5544                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5545
5546         return r;
5547 }
5548 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5549
5550 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5551 {
5552         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5553         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5554                                             size, port, &val, 1);
5555         /* do not return to emulator after return from userspace */
5556         vcpu->arch.pio.count = 0;
5557         return ret;
5558 }
5559 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5560
5561 static void tsc_bad(void *info)
5562 {
5563         __this_cpu_write(cpu_tsc_khz, 0);
5564 }
5565
5566 static void tsc_khz_changed(void *data)
5567 {
5568         struct cpufreq_freqs *freq = data;
5569         unsigned long khz = 0;
5570
5571         if (data)
5572                 khz = freq->new;
5573         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5574                 khz = cpufreq_quick_get(raw_smp_processor_id());
5575         if (!khz)
5576                 khz = tsc_khz;
5577         __this_cpu_write(cpu_tsc_khz, khz);
5578 }
5579
5580 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5581                                      void *data)
5582 {
5583         struct cpufreq_freqs *freq = data;
5584         struct kvm *kvm;
5585         struct kvm_vcpu *vcpu;
5586         int i, send_ipi = 0;
5587
5588         /*
5589          * We allow guests to temporarily run on slowing clocks,
5590          * provided we notify them after, or to run on accelerating
5591          * clocks, provided we notify them before.  Thus time never
5592          * goes backwards.
5593          *
5594          * However, we have a problem.  We can't atomically update
5595          * the frequency of a given CPU from this function; it is
5596          * merely a notifier, which can be called from any CPU.
5597          * Changing the TSC frequency at arbitrary points in time
5598          * requires a recomputation of local variables related to
5599          * the TSC for each VCPU.  We must flag these local variables
5600          * to be updated and be sure the update takes place with the
5601          * new frequency before any guests proceed.
5602          *
5603          * Unfortunately, the combination of hotplug CPU and frequency
5604          * change creates an intractable locking scenario; the order
5605          * of when these callouts happen is undefined with respect to
5606          * CPU hotplug, and they can race with each other.  As such,
5607          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5608          * undefined; you can actually have a CPU frequency change take
5609          * place in between the computation of X and the setting of the
5610          * variable.  To protect against this problem, all updates of
5611          * the per_cpu tsc_khz variable are done in an interrupt
5612          * protected IPI, and all callers wishing to update the value
5613          * must wait for a synchronous IPI to complete (which is trivial
5614          * if the caller is on the CPU already).  This establishes the
5615          * necessary total order on variable updates.
5616          *
5617          * Note that because a guest time update may take place
5618          * anytime after the setting of the VCPU's request bit, the
5619          * correct TSC value must be set before the request.  However,
5620          * to ensure the update actually makes it to any guest which
5621          * starts running in hardware virtualization between the set
5622          * and the acquisition of the spinlock, we must also ping the
5623          * CPU after setting the request bit.
5624          *
5625          */
5626
5627         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5628                 return 0;
5629         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5630                 return 0;
5631
5632         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5633
5634         spin_lock(&kvm_lock);
5635         list_for_each_entry(kvm, &vm_list, vm_list) {
5636                 kvm_for_each_vcpu(i, vcpu, kvm) {
5637                         if (vcpu->cpu != freq->cpu)
5638                                 continue;
5639                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5640                         if (vcpu->cpu != smp_processor_id())
5641                                 send_ipi = 1;
5642                 }
5643         }
5644         spin_unlock(&kvm_lock);
5645
5646         if (freq->old < freq->new && send_ipi) {
5647                 /*
5648                  * We upscale the frequency.  Must make the guest
5649                  * doesn't see old kvmclock values while running with
5650                  * the new frequency, otherwise we risk the guest sees
5651                  * time go backwards.
5652                  *
5653                  * In case we update the frequency for another cpu
5654                  * (which might be in guest context) send an interrupt
5655                  * to kick the cpu out of guest context.  Next time
5656                  * guest context is entered kvmclock will be updated,
5657                  * so the guest will not see stale values.
5658                  */
5659                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5660         }
5661         return 0;
5662 }
5663
5664 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5665         .notifier_call  = kvmclock_cpufreq_notifier
5666 };
5667
5668 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5669                                         unsigned long action, void *hcpu)
5670 {
5671         unsigned int cpu = (unsigned long)hcpu;
5672
5673         switch (action) {
5674                 case CPU_ONLINE:
5675                 case CPU_DOWN_FAILED:
5676                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5677                         break;
5678                 case CPU_DOWN_PREPARE:
5679                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5680                         break;
5681         }
5682         return NOTIFY_OK;
5683 }
5684
5685 static struct notifier_block kvmclock_cpu_notifier_block = {
5686         .notifier_call  = kvmclock_cpu_notifier,
5687         .priority = -INT_MAX
5688 };
5689
5690 static void kvm_timer_init(void)
5691 {
5692         int cpu;
5693
5694         max_tsc_khz = tsc_khz;
5695
5696         cpu_notifier_register_begin();
5697         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5698 #ifdef CONFIG_CPU_FREQ
5699                 struct cpufreq_policy policy;
5700                 memset(&policy, 0, sizeof(policy));
5701                 cpu = get_cpu();
5702                 cpufreq_get_policy(&policy, cpu);
5703                 if (policy.cpuinfo.max_freq)
5704                         max_tsc_khz = policy.cpuinfo.max_freq;
5705                 put_cpu();
5706 #endif
5707                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5708                                           CPUFREQ_TRANSITION_NOTIFIER);
5709         }
5710         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5711         for_each_online_cpu(cpu)
5712                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5713
5714         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5715         cpu_notifier_register_done();
5716
5717 }
5718
5719 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5720
5721 int kvm_is_in_guest(void)
5722 {
5723         return __this_cpu_read(current_vcpu) != NULL;
5724 }
5725
5726 static int kvm_is_user_mode(void)
5727 {
5728         int user_mode = 3;
5729
5730         if (__this_cpu_read(current_vcpu))
5731                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5732
5733         return user_mode != 0;
5734 }
5735
5736 static unsigned long kvm_get_guest_ip(void)
5737 {
5738         unsigned long ip = 0;
5739
5740         if (__this_cpu_read(current_vcpu))
5741                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5742
5743         return ip;
5744 }
5745
5746 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5747         .is_in_guest            = kvm_is_in_guest,
5748         .is_user_mode           = kvm_is_user_mode,
5749         .get_guest_ip           = kvm_get_guest_ip,
5750 };
5751
5752 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5753 {
5754         __this_cpu_write(current_vcpu, vcpu);
5755 }
5756 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5757
5758 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5759 {
5760         __this_cpu_write(current_vcpu, NULL);
5761 }
5762 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5763
5764 static void kvm_set_mmio_spte_mask(void)
5765 {
5766         u64 mask;
5767         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5768
5769         /*
5770          * Set the reserved bits and the present bit of an paging-structure
5771          * entry to generate page fault with PFER.RSV = 1.
5772          */
5773          /* Mask the reserved physical address bits. */
5774         mask = rsvd_bits(maxphyaddr, 51);
5775
5776         /* Bit 62 is always reserved for 32bit host. */
5777         mask |= 0x3ull << 62;
5778
5779         /* Set the present bit. */
5780         mask |= 1ull;
5781
5782 #ifdef CONFIG_X86_64
5783         /*
5784          * If reserved bit is not supported, clear the present bit to disable
5785          * mmio page fault.
5786          */
5787         if (maxphyaddr == 52)
5788                 mask &= ~1ull;
5789 #endif
5790
5791         kvm_mmu_set_mmio_spte_mask(mask);
5792 }
5793
5794 #ifdef CONFIG_X86_64
5795 static void pvclock_gtod_update_fn(struct work_struct *work)
5796 {
5797         struct kvm *kvm;
5798
5799         struct kvm_vcpu *vcpu;
5800         int i;
5801
5802         spin_lock(&kvm_lock);
5803         list_for_each_entry(kvm, &vm_list, vm_list)
5804                 kvm_for_each_vcpu(i, vcpu, kvm)
5805                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5806         atomic_set(&kvm_guest_has_master_clock, 0);
5807         spin_unlock(&kvm_lock);
5808 }
5809
5810 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5811
5812 /*
5813  * Notification about pvclock gtod data update.
5814  */
5815 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5816                                void *priv)
5817 {
5818         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5819         struct timekeeper *tk = priv;
5820
5821         update_pvclock_gtod(tk);
5822
5823         /* disable master clock if host does not trust, or does not
5824          * use, TSC clocksource
5825          */
5826         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5827             atomic_read(&kvm_guest_has_master_clock) != 0)
5828                 queue_work(system_long_wq, &pvclock_gtod_work);
5829
5830         return 0;
5831 }
5832
5833 static struct notifier_block pvclock_gtod_notifier = {
5834         .notifier_call = pvclock_gtod_notify,
5835 };
5836 #endif
5837
5838 int kvm_arch_init(void *opaque)
5839 {
5840         int r;
5841         struct kvm_x86_ops *ops = opaque;
5842
5843         if (kvm_x86_ops) {
5844                 printk(KERN_ERR "kvm: already loaded the other module\n");
5845                 r = -EEXIST;
5846                 goto out;
5847         }
5848
5849         if (!ops->cpu_has_kvm_support()) {
5850                 printk(KERN_ERR "kvm: no hardware support\n");
5851                 r = -EOPNOTSUPP;
5852                 goto out;
5853         }
5854         if (ops->disabled_by_bios()) {
5855                 printk(KERN_ERR "kvm: disabled by bios\n");
5856                 r = -EOPNOTSUPP;
5857                 goto out;
5858         }
5859
5860         r = -ENOMEM;
5861         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5862         if (!shared_msrs) {
5863                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5864                 goto out;
5865         }
5866
5867         r = kvm_mmu_module_init();
5868         if (r)
5869                 goto out_free_percpu;
5870
5871         kvm_set_mmio_spte_mask();
5872
5873         kvm_x86_ops = ops;
5874
5875         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5876                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5877
5878         kvm_timer_init();
5879
5880         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5881
5882         if (boot_cpu_has(X86_FEATURE_XSAVE))
5883                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5884
5885         kvm_lapic_init();
5886 #ifdef CONFIG_X86_64
5887         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5888 #endif
5889
5890         return 0;
5891
5892 out_free_percpu:
5893         free_percpu(shared_msrs);
5894 out:
5895         return r;
5896 }
5897
5898 void kvm_arch_exit(void)
5899 {
5900         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5901
5902         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5903                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5904                                             CPUFREQ_TRANSITION_NOTIFIER);
5905         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5906 #ifdef CONFIG_X86_64
5907         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5908 #endif
5909         kvm_x86_ops = NULL;
5910         kvm_mmu_module_exit();
5911         free_percpu(shared_msrs);
5912 }
5913
5914 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5915 {
5916         ++vcpu->stat.halt_exits;
5917         if (lapic_in_kernel(vcpu)) {
5918                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5919                 return 1;
5920         } else {
5921                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5922                 return 0;
5923         }
5924 }
5925 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5926
5927 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5928 {
5929         kvm_x86_ops->skip_emulated_instruction(vcpu);
5930         return kvm_vcpu_halt(vcpu);
5931 }
5932 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5933
5934 /*
5935  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5936  *
5937  * @apicid - apicid of vcpu to be kicked.
5938  */
5939 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5940 {
5941         struct kvm_lapic_irq lapic_irq;
5942
5943         lapic_irq.shorthand = 0;
5944         lapic_irq.dest_mode = 0;
5945         lapic_irq.dest_id = apicid;
5946         lapic_irq.msi_redir_hint = false;
5947
5948         lapic_irq.delivery_mode = APIC_DM_REMRD;
5949         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5950 }
5951
5952 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
5953 {
5954         vcpu->arch.apicv_active = false;
5955         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
5956 }
5957
5958 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5959 {
5960         unsigned long nr, a0, a1, a2, a3, ret;
5961         int op_64_bit, r = 1;
5962
5963         kvm_x86_ops->skip_emulated_instruction(vcpu);
5964
5965         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5966                 return kvm_hv_hypercall(vcpu);
5967
5968         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5969         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5970         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5971         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5972         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5973
5974         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5975
5976         op_64_bit = is_64_bit_mode(vcpu);
5977         if (!op_64_bit) {
5978                 nr &= 0xFFFFFFFF;
5979                 a0 &= 0xFFFFFFFF;
5980                 a1 &= 0xFFFFFFFF;
5981                 a2 &= 0xFFFFFFFF;
5982                 a3 &= 0xFFFFFFFF;
5983         }
5984
5985         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5986                 ret = -KVM_EPERM;
5987                 goto out;
5988         }
5989
5990         switch (nr) {
5991         case KVM_HC_VAPIC_POLL_IRQ:
5992                 ret = 0;
5993                 break;
5994         case KVM_HC_KICK_CPU:
5995                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5996                 ret = 0;
5997                 break;
5998         default:
5999                 ret = -KVM_ENOSYS;
6000                 break;
6001         }
6002 out:
6003         if (!op_64_bit)
6004                 ret = (u32)ret;
6005         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6006         ++vcpu->stat.hypercalls;
6007         return r;
6008 }
6009 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6010
6011 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6012 {
6013         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6014         char instruction[3];
6015         unsigned long rip = kvm_rip_read(vcpu);
6016
6017         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6018
6019         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
6020 }
6021
6022 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6023 {
6024         return vcpu->run->request_interrupt_window &&
6025                 likely(!pic_in_kernel(vcpu->kvm));
6026 }
6027
6028 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6029 {
6030         struct kvm_run *kvm_run = vcpu->run;
6031
6032         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6033         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6034         kvm_run->cr8 = kvm_get_cr8(vcpu);
6035         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6036         kvm_run->ready_for_interrupt_injection =
6037                 pic_in_kernel(vcpu->kvm) ||
6038                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6039 }
6040
6041 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6042 {
6043         int max_irr, tpr;
6044
6045         if (!kvm_x86_ops->update_cr8_intercept)
6046                 return;
6047
6048         if (!lapic_in_kernel(vcpu))
6049                 return;
6050
6051         if (vcpu->arch.apicv_active)
6052                 return;
6053
6054         if (!vcpu->arch.apic->vapic_addr)
6055                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6056         else
6057                 max_irr = -1;
6058
6059         if (max_irr != -1)
6060                 max_irr >>= 4;
6061
6062         tpr = kvm_lapic_get_cr8(vcpu);
6063
6064         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6065 }
6066
6067 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6068 {
6069         int r;
6070
6071         /* try to reinject previous events if any */
6072         if (vcpu->arch.exception.pending) {
6073                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6074                                         vcpu->arch.exception.has_error_code,
6075                                         vcpu->arch.exception.error_code);
6076
6077                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6078                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6079                                              X86_EFLAGS_RF);
6080
6081                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6082                     (vcpu->arch.dr7 & DR7_GD)) {
6083                         vcpu->arch.dr7 &= ~DR7_GD;
6084                         kvm_update_dr7(vcpu);
6085                 }
6086
6087                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6088                                           vcpu->arch.exception.has_error_code,
6089                                           vcpu->arch.exception.error_code,
6090                                           vcpu->arch.exception.reinject);
6091                 return 0;
6092         }
6093
6094         if (vcpu->arch.nmi_injected) {
6095                 kvm_x86_ops->set_nmi(vcpu);
6096                 return 0;
6097         }
6098
6099         if (vcpu->arch.interrupt.pending) {
6100                 kvm_x86_ops->set_irq(vcpu);
6101                 return 0;
6102         }
6103
6104         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6105                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6106                 if (r != 0)
6107                         return r;
6108         }
6109
6110         /* try to inject new event if pending */
6111         if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6112                 --vcpu->arch.nmi_pending;
6113                 vcpu->arch.nmi_injected = true;
6114                 kvm_x86_ops->set_nmi(vcpu);
6115         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6116                 /*
6117                  * Because interrupts can be injected asynchronously, we are
6118                  * calling check_nested_events again here to avoid a race condition.
6119                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6120                  * proposal and current concerns.  Perhaps we should be setting
6121                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6122                  */
6123                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6124                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6125                         if (r != 0)
6126                                 return r;
6127                 }
6128                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6129                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6130                                             false);
6131                         kvm_x86_ops->set_irq(vcpu);
6132                 }
6133         }
6134         return 0;
6135 }
6136
6137 static void process_nmi(struct kvm_vcpu *vcpu)
6138 {
6139         unsigned limit = 2;
6140
6141         /*
6142          * x86 is limited to one NMI running, and one NMI pending after it.
6143          * If an NMI is already in progress, limit further NMIs to just one.
6144          * Otherwise, allow two (and we'll inject the first one immediately).
6145          */
6146         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6147                 limit = 1;
6148
6149         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6150         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6151         kvm_make_request(KVM_REQ_EVENT, vcpu);
6152 }
6153
6154 #define put_smstate(type, buf, offset, val)                       \
6155         *(type *)((buf) + (offset) - 0x7e00) = val
6156
6157 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6158 {
6159         u32 flags = 0;
6160         flags |= seg->g       << 23;
6161         flags |= seg->db      << 22;
6162         flags |= seg->l       << 21;
6163         flags |= seg->avl     << 20;
6164         flags |= seg->present << 15;
6165         flags |= seg->dpl     << 13;
6166         flags |= seg->s       << 12;
6167         flags |= seg->type    << 8;
6168         return flags;
6169 }
6170
6171 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6172 {
6173         struct kvm_segment seg;
6174         int offset;
6175
6176         kvm_get_segment(vcpu, &seg, n);
6177         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6178
6179         if (n < 3)
6180                 offset = 0x7f84 + n * 12;
6181         else
6182                 offset = 0x7f2c + (n - 3) * 12;
6183
6184         put_smstate(u32, buf, offset + 8, seg.base);
6185         put_smstate(u32, buf, offset + 4, seg.limit);
6186         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6187 }
6188
6189 #ifdef CONFIG_X86_64
6190 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6191 {
6192         struct kvm_segment seg;
6193         int offset;
6194         u16 flags;
6195
6196         kvm_get_segment(vcpu, &seg, n);
6197         offset = 0x7e00 + n * 16;
6198
6199         flags = process_smi_get_segment_flags(&seg) >> 8;
6200         put_smstate(u16, buf, offset, seg.selector);
6201         put_smstate(u16, buf, offset + 2, flags);
6202         put_smstate(u32, buf, offset + 4, seg.limit);
6203         put_smstate(u64, buf, offset + 8, seg.base);
6204 }
6205 #endif
6206
6207 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6208 {
6209         struct desc_ptr dt;
6210         struct kvm_segment seg;
6211         unsigned long val;
6212         int i;
6213
6214         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6215         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6216         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6217         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6218
6219         for (i = 0; i < 8; i++)
6220                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6221
6222         kvm_get_dr(vcpu, 6, &val);
6223         put_smstate(u32, buf, 0x7fcc, (u32)val);
6224         kvm_get_dr(vcpu, 7, &val);
6225         put_smstate(u32, buf, 0x7fc8, (u32)val);
6226
6227         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6228         put_smstate(u32, buf, 0x7fc4, seg.selector);
6229         put_smstate(u32, buf, 0x7f64, seg.base);
6230         put_smstate(u32, buf, 0x7f60, seg.limit);
6231         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6232
6233         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6234         put_smstate(u32, buf, 0x7fc0, seg.selector);
6235         put_smstate(u32, buf, 0x7f80, seg.base);
6236         put_smstate(u32, buf, 0x7f7c, seg.limit);
6237         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6238
6239         kvm_x86_ops->get_gdt(vcpu, &dt);
6240         put_smstate(u32, buf, 0x7f74, dt.address);
6241         put_smstate(u32, buf, 0x7f70, dt.size);
6242
6243         kvm_x86_ops->get_idt(vcpu, &dt);
6244         put_smstate(u32, buf, 0x7f58, dt.address);
6245         put_smstate(u32, buf, 0x7f54, dt.size);
6246
6247         for (i = 0; i < 6; i++)
6248                 process_smi_save_seg_32(vcpu, buf, i);
6249
6250         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6251
6252         /* revision id */
6253         put_smstate(u32, buf, 0x7efc, 0x00020000);
6254         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6255 }
6256
6257 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6258 {
6259 #ifdef CONFIG_X86_64
6260         struct desc_ptr dt;
6261         struct kvm_segment seg;
6262         unsigned long val;
6263         int i;
6264
6265         for (i = 0; i < 16; i++)
6266                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6267
6268         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6269         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6270
6271         kvm_get_dr(vcpu, 6, &val);
6272         put_smstate(u64, buf, 0x7f68, val);
6273         kvm_get_dr(vcpu, 7, &val);
6274         put_smstate(u64, buf, 0x7f60, val);
6275
6276         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6277         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6278         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6279
6280         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6281
6282         /* revision id */
6283         put_smstate(u32, buf, 0x7efc, 0x00020064);
6284
6285         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6286
6287         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6288         put_smstate(u16, buf, 0x7e90, seg.selector);
6289         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6290         put_smstate(u32, buf, 0x7e94, seg.limit);
6291         put_smstate(u64, buf, 0x7e98, seg.base);
6292
6293         kvm_x86_ops->get_idt(vcpu, &dt);
6294         put_smstate(u32, buf, 0x7e84, dt.size);
6295         put_smstate(u64, buf, 0x7e88, dt.address);
6296
6297         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6298         put_smstate(u16, buf, 0x7e70, seg.selector);
6299         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6300         put_smstate(u32, buf, 0x7e74, seg.limit);
6301         put_smstate(u64, buf, 0x7e78, seg.base);
6302
6303         kvm_x86_ops->get_gdt(vcpu, &dt);
6304         put_smstate(u32, buf, 0x7e64, dt.size);
6305         put_smstate(u64, buf, 0x7e68, dt.address);
6306
6307         for (i = 0; i < 6; i++)
6308                 process_smi_save_seg_64(vcpu, buf, i);
6309 #else
6310         WARN_ON_ONCE(1);
6311 #endif
6312 }
6313
6314 static void process_smi(struct kvm_vcpu *vcpu)
6315 {
6316         struct kvm_segment cs, ds;
6317         struct desc_ptr dt;
6318         char buf[512];
6319         u32 cr0;
6320
6321         if (is_smm(vcpu)) {
6322                 vcpu->arch.smi_pending = true;
6323                 return;
6324         }
6325
6326         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6327         vcpu->arch.hflags |= HF_SMM_MASK;
6328         memset(buf, 0, 512);
6329         if (guest_cpuid_has_longmode(vcpu))
6330                 process_smi_save_state_64(vcpu, buf);
6331         else
6332                 process_smi_save_state_32(vcpu, buf);
6333
6334         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6335
6336         if (kvm_x86_ops->get_nmi_mask(vcpu))
6337                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6338         else
6339                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6340
6341         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6342         kvm_rip_write(vcpu, 0x8000);
6343
6344         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6345         kvm_x86_ops->set_cr0(vcpu, cr0);
6346         vcpu->arch.cr0 = cr0;
6347
6348         kvm_x86_ops->set_cr4(vcpu, 0);
6349
6350         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6351         dt.address = dt.size = 0;
6352         kvm_x86_ops->set_idt(vcpu, &dt);
6353
6354         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6355
6356         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6357         cs.base = vcpu->arch.smbase;
6358
6359         ds.selector = 0;
6360         ds.base = 0;
6361
6362         cs.limit    = ds.limit = 0xffffffff;
6363         cs.type     = ds.type = 0x3;
6364         cs.dpl      = ds.dpl = 0;
6365         cs.db       = ds.db = 0;
6366         cs.s        = ds.s = 1;
6367         cs.l        = ds.l = 0;
6368         cs.g        = ds.g = 1;
6369         cs.avl      = ds.avl = 0;
6370         cs.present  = ds.present = 1;
6371         cs.unusable = ds.unusable = 0;
6372         cs.padding  = ds.padding = 0;
6373
6374         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6375         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6376         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6377         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6378         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6379         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6380
6381         if (guest_cpuid_has_longmode(vcpu))
6382                 kvm_x86_ops->set_efer(vcpu, 0);
6383
6384         kvm_update_cpuid(vcpu);
6385         kvm_mmu_reset_context(vcpu);
6386 }
6387
6388 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6389 {
6390         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6391 }
6392
6393 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6394 {
6395         u64 eoi_exit_bitmap[4];
6396
6397         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6398                 return;
6399
6400         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6401
6402         if (irqchip_split(vcpu->kvm))
6403                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6404         else {
6405                 if (vcpu->arch.apicv_active)
6406                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6407                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6408         }
6409         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6410                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6411         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6412 }
6413
6414 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6415 {
6416         ++vcpu->stat.tlb_flush;
6417         kvm_x86_ops->tlb_flush(vcpu);
6418 }
6419
6420 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6421 {
6422         struct page *page = NULL;
6423
6424         if (!lapic_in_kernel(vcpu))
6425                 return;
6426
6427         if (!kvm_x86_ops->set_apic_access_page_addr)
6428                 return;
6429
6430         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6431         if (is_error_page(page))
6432                 return;
6433         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6434
6435         /*
6436          * Do not pin apic access page in memory, the MMU notifier
6437          * will call us again if it is migrated or swapped out.
6438          */
6439         put_page(page);
6440 }
6441 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6442
6443 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6444                                            unsigned long address)
6445 {
6446         /*
6447          * The physical address of apic access page is stored in the VMCS.
6448          * Update it when it becomes invalid.
6449          */
6450         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6451                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6452 }
6453
6454 /*
6455  * Returns 1 to let vcpu_run() continue the guest execution loop without
6456  * exiting to the userspace.  Otherwise, the value will be returned to the
6457  * userspace.
6458  */
6459 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6460 {
6461         int r;
6462         bool req_int_win =
6463                 dm_request_for_irq_injection(vcpu) &&
6464                 kvm_cpu_accept_dm_intr(vcpu);
6465
6466         bool req_immediate_exit = false;
6467
6468         if (vcpu->requests) {
6469                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6470                         kvm_mmu_unload(vcpu);
6471                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6472                         __kvm_migrate_timers(vcpu);
6473                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6474                         kvm_gen_update_masterclock(vcpu->kvm);
6475                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6476                         kvm_gen_kvmclock_update(vcpu);
6477                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6478                         r = kvm_guest_time_update(vcpu);
6479                         if (unlikely(r))
6480                                 goto out;
6481                 }
6482                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6483                         kvm_mmu_sync_roots(vcpu);
6484                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6485                         kvm_vcpu_flush_tlb(vcpu);
6486                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6487                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6488                         r = 0;
6489                         goto out;
6490                 }
6491                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6492                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6493                         r = 0;
6494                         goto out;
6495                 }
6496                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6497                         vcpu->fpu_active = 0;
6498                         kvm_x86_ops->fpu_deactivate(vcpu);
6499                 }
6500                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6501                         /* Page is swapped out. Do synthetic halt */
6502                         vcpu->arch.apf.halted = true;
6503                         r = 1;
6504                         goto out;
6505                 }
6506                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6507                         record_steal_time(vcpu);
6508                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6509                         process_smi(vcpu);
6510                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6511                         process_nmi(vcpu);
6512                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6513                         kvm_pmu_handle_event(vcpu);
6514                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6515                         kvm_pmu_deliver_pmi(vcpu);
6516                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6517                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6518                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6519                                      vcpu->arch.ioapic_handled_vectors)) {
6520                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6521                                 vcpu->run->eoi.vector =
6522                                                 vcpu->arch.pending_ioapic_eoi;
6523                                 r = 0;
6524                                 goto out;
6525                         }
6526                 }
6527                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6528                         vcpu_scan_ioapic(vcpu);
6529                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6530                         kvm_vcpu_reload_apic_access_page(vcpu);
6531                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6532                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6533                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6534                         r = 0;
6535                         goto out;
6536                 }
6537                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6538                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6539                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6540                         r = 0;
6541                         goto out;
6542                 }
6543                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6544                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6545                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6546                         r = 0;
6547                         goto out;
6548                 }
6549
6550                 /*
6551                  * KVM_REQ_HV_STIMER has to be processed after
6552                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6553                  * depend on the guest clock being up-to-date
6554                  */
6555                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6556                         kvm_hv_process_stimers(vcpu);
6557         }
6558
6559         /*
6560          * KVM_REQ_EVENT is not set when posted interrupts are set by
6561          * VT-d hardware, so we have to update RVI unconditionally.
6562          */
6563         if (kvm_lapic_enabled(vcpu)) {
6564                 /*
6565                  * Update architecture specific hints for APIC
6566                  * virtual interrupt delivery.
6567                  */
6568                 if (vcpu->arch.apicv_active)
6569                         kvm_x86_ops->hwapic_irr_update(vcpu,
6570                                 kvm_lapic_find_highest_irr(vcpu));
6571         }
6572
6573         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6574                 kvm_apic_accept_events(vcpu);
6575                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6576                         r = 1;
6577                         goto out;
6578                 }
6579
6580                 if (inject_pending_event(vcpu, req_int_win) != 0)
6581                         req_immediate_exit = true;
6582                 /* enable NMI/IRQ window open exits if needed */
6583                 else {
6584                         if (vcpu->arch.nmi_pending)
6585                                 kvm_x86_ops->enable_nmi_window(vcpu);
6586                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6587                                 kvm_x86_ops->enable_irq_window(vcpu);
6588                 }
6589
6590                 if (kvm_lapic_enabled(vcpu)) {
6591                         update_cr8_intercept(vcpu);
6592                         kvm_lapic_sync_to_vapic(vcpu);
6593                 }
6594         }
6595
6596         r = kvm_mmu_reload(vcpu);
6597         if (unlikely(r)) {
6598                 goto cancel_injection;
6599         }
6600
6601         preempt_disable();
6602
6603         kvm_x86_ops->prepare_guest_switch(vcpu);
6604         if (vcpu->fpu_active)
6605                 kvm_load_guest_fpu(vcpu);
6606         vcpu->mode = IN_GUEST_MODE;
6607
6608         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6609
6610         /*
6611          * We should set ->mode before check ->requests,
6612          * Please see the comment in kvm_make_all_cpus_request.
6613          * This also orders the write to mode from any reads
6614          * to the page tables done while the VCPU is running.
6615          * Please see the comment in kvm_flush_remote_tlbs.
6616          */
6617         smp_mb__after_srcu_read_unlock();
6618
6619         local_irq_disable();
6620
6621         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6622             || need_resched() || signal_pending(current)) {
6623                 vcpu->mode = OUTSIDE_GUEST_MODE;
6624                 smp_wmb();
6625                 local_irq_enable();
6626                 preempt_enable();
6627                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6628                 r = 1;
6629                 goto cancel_injection;
6630         }
6631
6632         kvm_load_guest_xcr0(vcpu);
6633
6634         if (req_immediate_exit)
6635                 smp_send_reschedule(vcpu->cpu);
6636
6637         trace_kvm_entry(vcpu->vcpu_id);
6638         wait_lapic_expire(vcpu);
6639         __kvm_guest_enter();
6640
6641         if (unlikely(vcpu->arch.switch_db_regs)) {
6642                 set_debugreg(0, 7);
6643                 set_debugreg(vcpu->arch.eff_db[0], 0);
6644                 set_debugreg(vcpu->arch.eff_db[1], 1);
6645                 set_debugreg(vcpu->arch.eff_db[2], 2);
6646                 set_debugreg(vcpu->arch.eff_db[3], 3);
6647                 set_debugreg(vcpu->arch.dr6, 6);
6648                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6649         }
6650
6651         kvm_x86_ops->run(vcpu);
6652
6653         /*
6654          * Do this here before restoring debug registers on the host.  And
6655          * since we do this before handling the vmexit, a DR access vmexit
6656          * can (a) read the correct value of the debug registers, (b) set
6657          * KVM_DEBUGREG_WONT_EXIT again.
6658          */
6659         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6660                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6661                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6662                 kvm_update_dr0123(vcpu);
6663                 kvm_update_dr6(vcpu);
6664                 kvm_update_dr7(vcpu);
6665                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6666         }
6667
6668         /*
6669          * If the guest has used debug registers, at least dr7
6670          * will be disabled while returning to the host.
6671          * If we don't have active breakpoints in the host, we don't
6672          * care about the messed up debug address registers. But if
6673          * we have some of them active, restore the old state.
6674          */
6675         if (hw_breakpoint_active())
6676                 hw_breakpoint_restore();
6677
6678         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6679
6680         vcpu->mode = OUTSIDE_GUEST_MODE;
6681         smp_wmb();
6682
6683         kvm_put_guest_xcr0(vcpu);
6684
6685         /* Interrupt is enabled by handle_external_intr() */
6686         kvm_x86_ops->handle_external_intr(vcpu);
6687
6688         ++vcpu->stat.exits;
6689
6690         /*
6691          * We must have an instruction between local_irq_enable() and
6692          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6693          * the interrupt shadow.  The stat.exits increment will do nicely.
6694          * But we need to prevent reordering, hence this barrier():
6695          */
6696         barrier();
6697
6698         kvm_guest_exit();
6699
6700         preempt_enable();
6701
6702         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6703
6704         /*
6705          * Profile KVM exit RIPs:
6706          */
6707         if (unlikely(prof_on == KVM_PROFILING)) {
6708                 unsigned long rip = kvm_rip_read(vcpu);
6709                 profile_hit(KVM_PROFILING, (void *)rip);
6710         }
6711
6712         if (unlikely(vcpu->arch.tsc_always_catchup))
6713                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6714
6715         if (vcpu->arch.apic_attention)
6716                 kvm_lapic_sync_from_vapic(vcpu);
6717
6718         r = kvm_x86_ops->handle_exit(vcpu);
6719         return r;
6720
6721 cancel_injection:
6722         kvm_x86_ops->cancel_injection(vcpu);
6723         if (unlikely(vcpu->arch.apic_attention))
6724                 kvm_lapic_sync_from_vapic(vcpu);
6725 out:
6726         return r;
6727 }
6728
6729 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6730 {
6731         if (!kvm_arch_vcpu_runnable(vcpu) &&
6732             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6733                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6734                 kvm_vcpu_block(vcpu);
6735                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6736
6737                 if (kvm_x86_ops->post_block)
6738                         kvm_x86_ops->post_block(vcpu);
6739
6740                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6741                         return 1;
6742         }
6743
6744         kvm_apic_accept_events(vcpu);
6745         switch(vcpu->arch.mp_state) {
6746         case KVM_MP_STATE_HALTED:
6747                 vcpu->arch.pv.pv_unhalted = false;
6748                 vcpu->arch.mp_state =
6749                         KVM_MP_STATE_RUNNABLE;
6750         case KVM_MP_STATE_RUNNABLE:
6751                 vcpu->arch.apf.halted = false;
6752                 break;
6753         case KVM_MP_STATE_INIT_RECEIVED:
6754                 break;
6755         default:
6756                 return -EINTR;
6757                 break;
6758         }
6759         return 1;
6760 }
6761
6762 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6763 {
6764         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6765                 !vcpu->arch.apf.halted);
6766 }
6767
6768 static int vcpu_run(struct kvm_vcpu *vcpu)
6769 {
6770         int r;
6771         struct kvm *kvm = vcpu->kvm;
6772
6773         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6774
6775         for (;;) {
6776                 if (kvm_vcpu_running(vcpu)) {
6777                         r = vcpu_enter_guest(vcpu);
6778                 } else {
6779                         r = vcpu_block(kvm, vcpu);
6780                 }
6781
6782                 if (r <= 0)
6783                         break;
6784
6785                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6786                 if (kvm_cpu_has_pending_timer(vcpu))
6787                         kvm_inject_pending_timer_irqs(vcpu);
6788
6789                 if (dm_request_for_irq_injection(vcpu) &&
6790                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6791                         r = 0;
6792                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6793                         ++vcpu->stat.request_irq_exits;
6794                         break;
6795                 }
6796
6797                 kvm_check_async_pf_completion(vcpu);
6798
6799                 if (signal_pending(current)) {
6800                         r = -EINTR;
6801                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6802                         ++vcpu->stat.signal_exits;
6803                         break;
6804                 }
6805                 if (need_resched()) {
6806                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6807                         cond_resched();
6808                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6809                 }
6810         }
6811
6812         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6813
6814         return r;
6815 }
6816
6817 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6818 {
6819         int r;
6820         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6821         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6822         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6823         if (r != EMULATE_DONE)
6824                 return 0;
6825         return 1;
6826 }
6827
6828 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6829 {
6830         BUG_ON(!vcpu->arch.pio.count);
6831
6832         return complete_emulated_io(vcpu);
6833 }
6834
6835 /*
6836  * Implements the following, as a state machine:
6837  *
6838  * read:
6839  *   for each fragment
6840  *     for each mmio piece in the fragment
6841  *       write gpa, len
6842  *       exit
6843  *       copy data
6844  *   execute insn
6845  *
6846  * write:
6847  *   for each fragment
6848  *     for each mmio piece in the fragment
6849  *       write gpa, len
6850  *       copy data
6851  *       exit
6852  */
6853 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6854 {
6855         struct kvm_run *run = vcpu->run;
6856         struct kvm_mmio_fragment *frag;
6857         unsigned len;
6858
6859         BUG_ON(!vcpu->mmio_needed);
6860
6861         /* Complete previous fragment */
6862         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6863         len = min(8u, frag->len);
6864         if (!vcpu->mmio_is_write)
6865                 memcpy(frag->data, run->mmio.data, len);
6866
6867         if (frag->len <= 8) {
6868                 /* Switch to the next fragment. */
6869                 frag++;
6870                 vcpu->mmio_cur_fragment++;
6871         } else {
6872                 /* Go forward to the next mmio piece. */
6873                 frag->data += len;
6874                 frag->gpa += len;
6875                 frag->len -= len;
6876         }
6877
6878         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6879                 vcpu->mmio_needed = 0;
6880
6881                 /* FIXME: return into emulator if single-stepping.  */
6882                 if (vcpu->mmio_is_write)
6883                         return 1;
6884                 vcpu->mmio_read_completed = 1;
6885                 return complete_emulated_io(vcpu);
6886         }
6887
6888         run->exit_reason = KVM_EXIT_MMIO;
6889         run->mmio.phys_addr = frag->gpa;
6890         if (vcpu->mmio_is_write)
6891                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6892         run->mmio.len = min(8u, frag->len);
6893         run->mmio.is_write = vcpu->mmio_is_write;
6894         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6895         return 0;
6896 }
6897
6898
6899 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6900 {
6901         struct fpu *fpu = &current->thread.fpu;
6902         int r;
6903         sigset_t sigsaved;
6904
6905         fpu__activate_curr(fpu);
6906
6907         if (vcpu->sigset_active)
6908                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6909
6910         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6911                 kvm_vcpu_block(vcpu);
6912                 kvm_apic_accept_events(vcpu);
6913                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6914                 r = -EAGAIN;
6915                 goto out;
6916         }
6917
6918         /* re-sync apic's tpr */
6919         if (!lapic_in_kernel(vcpu)) {
6920                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6921                         r = -EINVAL;
6922                         goto out;
6923                 }
6924         }
6925
6926         if (unlikely(vcpu->arch.complete_userspace_io)) {
6927                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6928                 vcpu->arch.complete_userspace_io = NULL;
6929                 r = cui(vcpu);
6930                 if (r <= 0)
6931                         goto out;
6932         } else
6933                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6934
6935         r = vcpu_run(vcpu);
6936
6937 out:
6938         post_kvm_run_save(vcpu);
6939         if (vcpu->sigset_active)
6940                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6941
6942         return r;
6943 }
6944
6945 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6946 {
6947         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6948                 /*
6949                  * We are here if userspace calls get_regs() in the middle of
6950                  * instruction emulation. Registers state needs to be copied
6951                  * back from emulation context to vcpu. Userspace shouldn't do
6952                  * that usually, but some bad designed PV devices (vmware
6953                  * backdoor interface) need this to work
6954                  */
6955                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6956                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6957         }
6958         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6959         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6960         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6961         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6962         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6963         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6964         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6965         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6966 #ifdef CONFIG_X86_64
6967         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6968         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6969         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6970         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6971         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6972         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6973         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6974         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6975 #endif
6976
6977         regs->rip = kvm_rip_read(vcpu);
6978         regs->rflags = kvm_get_rflags(vcpu);
6979
6980         return 0;
6981 }
6982
6983 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6984 {
6985         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6986         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6987
6988         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6989         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6990         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6991         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6992         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6993         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6994         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6995         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6996 #ifdef CONFIG_X86_64
6997         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6998         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6999         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7000         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7001         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7002         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7003         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7004         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7005 #endif
7006
7007         kvm_rip_write(vcpu, regs->rip);
7008         kvm_set_rflags(vcpu, regs->rflags);
7009
7010         vcpu->arch.exception.pending = false;
7011
7012         kvm_make_request(KVM_REQ_EVENT, vcpu);
7013
7014         return 0;
7015 }
7016
7017 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7018 {
7019         struct kvm_segment cs;
7020
7021         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7022         *db = cs.db;
7023         *l = cs.l;
7024 }
7025 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7026
7027 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7028                                   struct kvm_sregs *sregs)
7029 {
7030         struct desc_ptr dt;
7031
7032         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7033         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7034         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7035         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7036         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7037         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7038
7039         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7040         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7041
7042         kvm_x86_ops->get_idt(vcpu, &dt);
7043         sregs->idt.limit = dt.size;
7044         sregs->idt.base = dt.address;
7045         kvm_x86_ops->get_gdt(vcpu, &dt);
7046         sregs->gdt.limit = dt.size;
7047         sregs->gdt.base = dt.address;
7048
7049         sregs->cr0 = kvm_read_cr0(vcpu);
7050         sregs->cr2 = vcpu->arch.cr2;
7051         sregs->cr3 = kvm_read_cr3(vcpu);
7052         sregs->cr4 = kvm_read_cr4(vcpu);
7053         sregs->cr8 = kvm_get_cr8(vcpu);
7054         sregs->efer = vcpu->arch.efer;
7055         sregs->apic_base = kvm_get_apic_base(vcpu);
7056
7057         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7058
7059         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7060                 set_bit(vcpu->arch.interrupt.nr,
7061                         (unsigned long *)sregs->interrupt_bitmap);
7062
7063         return 0;
7064 }
7065
7066 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7067                                     struct kvm_mp_state *mp_state)
7068 {
7069         kvm_apic_accept_events(vcpu);
7070         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7071                                         vcpu->arch.pv.pv_unhalted)
7072                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7073         else
7074                 mp_state->mp_state = vcpu->arch.mp_state;
7075
7076         return 0;
7077 }
7078
7079 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7080                                     struct kvm_mp_state *mp_state)
7081 {
7082         if (!lapic_in_kernel(vcpu) &&
7083             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7084                 return -EINVAL;
7085
7086         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7087                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7088                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7089         } else
7090                 vcpu->arch.mp_state = mp_state->mp_state;
7091         kvm_make_request(KVM_REQ_EVENT, vcpu);
7092         return 0;
7093 }
7094
7095 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7096                     int reason, bool has_error_code, u32 error_code)
7097 {
7098         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7099         int ret;
7100
7101         init_emulate_ctxt(vcpu);
7102
7103         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7104                                    has_error_code, error_code);
7105
7106         if (ret)
7107                 return EMULATE_FAIL;
7108
7109         kvm_rip_write(vcpu, ctxt->eip);
7110         kvm_set_rflags(vcpu, ctxt->eflags);
7111         kvm_make_request(KVM_REQ_EVENT, vcpu);
7112         return EMULATE_DONE;
7113 }
7114 EXPORT_SYMBOL_GPL(kvm_task_switch);
7115
7116 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7117                                   struct kvm_sregs *sregs)
7118 {
7119         struct msr_data apic_base_msr;
7120         int mmu_reset_needed = 0;
7121         int pending_vec, max_bits, idx;
7122         struct desc_ptr dt;
7123
7124         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7125                 return -EINVAL;
7126
7127         dt.size = sregs->idt.limit;
7128         dt.address = sregs->idt.base;
7129         kvm_x86_ops->set_idt(vcpu, &dt);
7130         dt.size = sregs->gdt.limit;
7131         dt.address = sregs->gdt.base;
7132         kvm_x86_ops->set_gdt(vcpu, &dt);
7133
7134         vcpu->arch.cr2 = sregs->cr2;
7135         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7136         vcpu->arch.cr3 = sregs->cr3;
7137         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7138
7139         kvm_set_cr8(vcpu, sregs->cr8);
7140
7141         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7142         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7143         apic_base_msr.data = sregs->apic_base;
7144         apic_base_msr.host_initiated = true;
7145         kvm_set_apic_base(vcpu, &apic_base_msr);
7146
7147         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7148         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7149         vcpu->arch.cr0 = sregs->cr0;
7150
7151         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7152         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7153         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7154                 kvm_update_cpuid(vcpu);
7155
7156         idx = srcu_read_lock(&vcpu->kvm->srcu);
7157         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7158                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7159                 mmu_reset_needed = 1;
7160         }
7161         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7162
7163         if (mmu_reset_needed)
7164                 kvm_mmu_reset_context(vcpu);
7165
7166         max_bits = KVM_NR_INTERRUPTS;
7167         pending_vec = find_first_bit(
7168                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7169         if (pending_vec < max_bits) {
7170                 kvm_queue_interrupt(vcpu, pending_vec, false);
7171                 pr_debug("Set back pending irq %d\n", pending_vec);
7172         }
7173
7174         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7175         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7176         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7177         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7178         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7179         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7180
7181         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7182         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7183
7184         update_cr8_intercept(vcpu);
7185
7186         /* Older userspace won't unhalt the vcpu on reset. */
7187         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7188             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7189             !is_protmode(vcpu))
7190                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7191
7192         kvm_make_request(KVM_REQ_EVENT, vcpu);
7193
7194         return 0;
7195 }
7196
7197 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7198                                         struct kvm_guest_debug *dbg)
7199 {
7200         unsigned long rflags;
7201         int i, r;
7202
7203         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7204                 r = -EBUSY;
7205                 if (vcpu->arch.exception.pending)
7206                         goto out;
7207                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7208                         kvm_queue_exception(vcpu, DB_VECTOR);
7209                 else
7210                         kvm_queue_exception(vcpu, BP_VECTOR);
7211         }
7212
7213         /*
7214          * Read rflags as long as potentially injected trace flags are still
7215          * filtered out.
7216          */
7217         rflags = kvm_get_rflags(vcpu);
7218
7219         vcpu->guest_debug = dbg->control;
7220         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7221                 vcpu->guest_debug = 0;
7222
7223         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7224                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7225                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7226                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7227         } else {
7228                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7229                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7230         }
7231         kvm_update_dr7(vcpu);
7232
7233         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7234                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7235                         get_segment_base(vcpu, VCPU_SREG_CS);
7236
7237         /*
7238          * Trigger an rflags update that will inject or remove the trace
7239          * flags.
7240          */
7241         kvm_set_rflags(vcpu, rflags);
7242
7243         kvm_x86_ops->update_bp_intercept(vcpu);
7244
7245         r = 0;
7246
7247 out:
7248
7249         return r;
7250 }
7251
7252 /*
7253  * Translate a guest virtual address to a guest physical address.
7254  */
7255 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7256                                     struct kvm_translation *tr)
7257 {
7258         unsigned long vaddr = tr->linear_address;
7259         gpa_t gpa;
7260         int idx;
7261
7262         idx = srcu_read_lock(&vcpu->kvm->srcu);
7263         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7264         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7265         tr->physical_address = gpa;
7266         tr->valid = gpa != UNMAPPED_GVA;
7267         tr->writeable = 1;
7268         tr->usermode = 0;
7269
7270         return 0;
7271 }
7272
7273 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7274 {
7275         struct fxregs_state *fxsave =
7276                         &vcpu->arch.guest_fpu.state.fxsave;
7277
7278         memcpy(fpu->fpr, fxsave->st_space, 128);
7279         fpu->fcw = fxsave->cwd;
7280         fpu->fsw = fxsave->swd;
7281         fpu->ftwx = fxsave->twd;
7282         fpu->last_opcode = fxsave->fop;
7283         fpu->last_ip = fxsave->rip;
7284         fpu->last_dp = fxsave->rdp;
7285         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7286
7287         return 0;
7288 }
7289
7290 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7291 {
7292         struct fxregs_state *fxsave =
7293                         &vcpu->arch.guest_fpu.state.fxsave;
7294
7295         memcpy(fxsave->st_space, fpu->fpr, 128);
7296         fxsave->cwd = fpu->fcw;
7297         fxsave->swd = fpu->fsw;
7298         fxsave->twd = fpu->ftwx;
7299         fxsave->fop = fpu->last_opcode;
7300         fxsave->rip = fpu->last_ip;
7301         fxsave->rdp = fpu->last_dp;
7302         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7303
7304         return 0;
7305 }
7306
7307 static void fx_init(struct kvm_vcpu *vcpu)
7308 {
7309         fpstate_init(&vcpu->arch.guest_fpu.state);
7310         if (boot_cpu_has(X86_FEATURE_XSAVES))
7311                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7312                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7313
7314         /*
7315          * Ensure guest xcr0 is valid for loading
7316          */
7317         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7318
7319         vcpu->arch.cr0 |= X86_CR0_ET;
7320 }
7321
7322 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7323 {
7324         if (vcpu->guest_fpu_loaded)
7325                 return;
7326
7327         /*
7328          * Restore all possible states in the guest,
7329          * and assume host would use all available bits.
7330          * Guest xcr0 would be loaded later.
7331          */
7332         vcpu->guest_fpu_loaded = 1;
7333         __kernel_fpu_begin();
7334         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7335         trace_kvm_fpu(1);
7336 }
7337
7338 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7339 {
7340         if (!vcpu->guest_fpu_loaded) {
7341                 vcpu->fpu_counter = 0;
7342                 return;
7343         }
7344
7345         vcpu->guest_fpu_loaded = 0;
7346         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7347         __kernel_fpu_end();
7348         ++vcpu->stat.fpu_reload;
7349         /*
7350          * If using eager FPU mode, or if the guest is a frequent user
7351          * of the FPU, just leave the FPU active for next time.
7352          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7353          * the FPU in bursts will revert to loading it on demand.
7354          */
7355         if (!use_eager_fpu()) {
7356                 if (++vcpu->fpu_counter < 5)
7357                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7358         }
7359         trace_kvm_fpu(0);
7360 }
7361
7362 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7363 {
7364         kvmclock_reset(vcpu);
7365
7366         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7367         kvm_x86_ops->vcpu_free(vcpu);
7368 }
7369
7370 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7371                                                 unsigned int id)
7372 {
7373         struct kvm_vcpu *vcpu;
7374
7375         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7376                 printk_once(KERN_WARNING
7377                 "kvm: SMP vm created on host with unstable TSC; "
7378                 "guest TSC will not be reliable\n");
7379
7380         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7381
7382         return vcpu;
7383 }
7384
7385 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7386 {
7387         int r;
7388
7389         kvm_vcpu_mtrr_init(vcpu);
7390         r = vcpu_load(vcpu);
7391         if (r)
7392                 return r;
7393         kvm_vcpu_reset(vcpu, false);
7394         kvm_mmu_setup(vcpu);
7395         vcpu_put(vcpu);
7396         return r;
7397 }
7398
7399 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7400 {
7401         struct msr_data msr;
7402         struct kvm *kvm = vcpu->kvm;
7403
7404         if (vcpu_load(vcpu))
7405                 return;
7406         msr.data = 0x0;
7407         msr.index = MSR_IA32_TSC;
7408         msr.host_initiated = true;
7409         kvm_write_tsc(vcpu, &msr);
7410         vcpu_put(vcpu);
7411
7412         if (!kvmclock_periodic_sync)
7413                 return;
7414
7415         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7416                                         KVMCLOCK_SYNC_PERIOD);
7417 }
7418
7419 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7420 {
7421         int r;
7422         vcpu->arch.apf.msr_val = 0;
7423
7424         r = vcpu_load(vcpu);
7425         BUG_ON(r);
7426         kvm_mmu_unload(vcpu);
7427         vcpu_put(vcpu);
7428
7429         kvm_x86_ops->vcpu_free(vcpu);
7430 }
7431
7432 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7433 {
7434         vcpu->arch.hflags = 0;
7435
7436         atomic_set(&vcpu->arch.nmi_queued, 0);
7437         vcpu->arch.nmi_pending = 0;
7438         vcpu->arch.nmi_injected = false;
7439         kvm_clear_interrupt_queue(vcpu);
7440         kvm_clear_exception_queue(vcpu);
7441
7442         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7443         kvm_update_dr0123(vcpu);
7444         vcpu->arch.dr6 = DR6_INIT;
7445         kvm_update_dr6(vcpu);
7446         vcpu->arch.dr7 = DR7_FIXED_1;
7447         kvm_update_dr7(vcpu);
7448
7449         vcpu->arch.cr2 = 0;
7450
7451         kvm_make_request(KVM_REQ_EVENT, vcpu);
7452         vcpu->arch.apf.msr_val = 0;
7453         vcpu->arch.st.msr_val = 0;
7454
7455         kvmclock_reset(vcpu);
7456
7457         kvm_clear_async_pf_completion_queue(vcpu);
7458         kvm_async_pf_hash_reset(vcpu);
7459         vcpu->arch.apf.halted = false;
7460
7461         if (!init_event) {
7462                 kvm_pmu_reset(vcpu);
7463                 vcpu->arch.smbase = 0x30000;
7464         }
7465
7466         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7467         vcpu->arch.regs_avail = ~0;
7468         vcpu->arch.regs_dirty = ~0;
7469
7470         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7471 }
7472
7473 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7474 {
7475         struct kvm_segment cs;
7476
7477         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7478         cs.selector = vector << 8;
7479         cs.base = vector << 12;
7480         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7481         kvm_rip_write(vcpu, 0);
7482 }
7483
7484 int kvm_arch_hardware_enable(void)
7485 {
7486         struct kvm *kvm;
7487         struct kvm_vcpu *vcpu;
7488         int i;
7489         int ret;
7490         u64 local_tsc;
7491         u64 max_tsc = 0;
7492         bool stable, backwards_tsc = false;
7493
7494         kvm_shared_msr_cpu_online();
7495         ret = kvm_x86_ops->hardware_enable();
7496         if (ret != 0)
7497                 return ret;
7498
7499         local_tsc = rdtsc();
7500         stable = !check_tsc_unstable();
7501         list_for_each_entry(kvm, &vm_list, vm_list) {
7502                 kvm_for_each_vcpu(i, vcpu, kvm) {
7503                         if (!stable && vcpu->cpu == smp_processor_id())
7504                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7505                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7506                                 backwards_tsc = true;
7507                                 if (vcpu->arch.last_host_tsc > max_tsc)
7508                                         max_tsc = vcpu->arch.last_host_tsc;
7509                         }
7510                 }
7511         }
7512
7513         /*
7514          * Sometimes, even reliable TSCs go backwards.  This happens on
7515          * platforms that reset TSC during suspend or hibernate actions, but
7516          * maintain synchronization.  We must compensate.  Fortunately, we can
7517          * detect that condition here, which happens early in CPU bringup,
7518          * before any KVM threads can be running.  Unfortunately, we can't
7519          * bring the TSCs fully up to date with real time, as we aren't yet far
7520          * enough into CPU bringup that we know how much real time has actually
7521          * elapsed; our helper function, get_kernel_ns() will be using boot
7522          * variables that haven't been updated yet.
7523          *
7524          * So we simply find the maximum observed TSC above, then record the
7525          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7526          * the adjustment will be applied.  Note that we accumulate
7527          * adjustments, in case multiple suspend cycles happen before some VCPU
7528          * gets a chance to run again.  In the event that no KVM threads get a
7529          * chance to run, we will miss the entire elapsed period, as we'll have
7530          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7531          * loose cycle time.  This isn't too big a deal, since the loss will be
7532          * uniform across all VCPUs (not to mention the scenario is extremely
7533          * unlikely). It is possible that a second hibernate recovery happens
7534          * much faster than a first, causing the observed TSC here to be
7535          * smaller; this would require additional padding adjustment, which is
7536          * why we set last_host_tsc to the local tsc observed here.
7537          *
7538          * N.B. - this code below runs only on platforms with reliable TSC,
7539          * as that is the only way backwards_tsc is set above.  Also note
7540          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7541          * have the same delta_cyc adjustment applied if backwards_tsc
7542          * is detected.  Note further, this adjustment is only done once,
7543          * as we reset last_host_tsc on all VCPUs to stop this from being
7544          * called multiple times (one for each physical CPU bringup).
7545          *
7546          * Platforms with unreliable TSCs don't have to deal with this, they
7547          * will be compensated by the logic in vcpu_load, which sets the TSC to
7548          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7549          * guarantee that they stay in perfect synchronization.
7550          */
7551         if (backwards_tsc) {
7552                 u64 delta_cyc = max_tsc - local_tsc;
7553                 backwards_tsc_observed = true;
7554                 list_for_each_entry(kvm, &vm_list, vm_list) {
7555                         kvm_for_each_vcpu(i, vcpu, kvm) {
7556                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7557                                 vcpu->arch.last_host_tsc = local_tsc;
7558                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7559                         }
7560
7561                         /*
7562                          * We have to disable TSC offset matching.. if you were
7563                          * booting a VM while issuing an S4 host suspend....
7564                          * you may have some problem.  Solving this issue is
7565                          * left as an exercise to the reader.
7566                          */
7567                         kvm->arch.last_tsc_nsec = 0;
7568                         kvm->arch.last_tsc_write = 0;
7569                 }
7570
7571         }
7572         return 0;
7573 }
7574
7575 void kvm_arch_hardware_disable(void)
7576 {
7577         kvm_x86_ops->hardware_disable();
7578         drop_user_return_notifiers();
7579 }
7580
7581 int kvm_arch_hardware_setup(void)
7582 {
7583         int r;
7584
7585         r = kvm_x86_ops->hardware_setup();
7586         if (r != 0)
7587                 return r;
7588
7589         if (kvm_has_tsc_control) {
7590                 /*
7591                  * Make sure the user can only configure tsc_khz values that
7592                  * fit into a signed integer.
7593                  * A min value is not calculated needed because it will always
7594                  * be 1 on all machines.
7595                  */
7596                 u64 max = min(0x7fffffffULL,
7597                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7598                 kvm_max_guest_tsc_khz = max;
7599
7600                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7601         }
7602
7603         kvm_init_msr_list();
7604         return 0;
7605 }
7606
7607 void kvm_arch_hardware_unsetup(void)
7608 {
7609         kvm_x86_ops->hardware_unsetup();
7610 }
7611
7612 void kvm_arch_check_processor_compat(void *rtn)
7613 {
7614         kvm_x86_ops->check_processor_compatibility(rtn);
7615 }
7616
7617 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7618 {
7619         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7620 }
7621 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7622
7623 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7624 {
7625         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7626 }
7627
7628 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7629 {
7630         return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7631 }
7632
7633 struct static_key kvm_no_apic_vcpu __read_mostly;
7634 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7635
7636 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7637 {
7638         struct page *page;
7639         struct kvm *kvm;
7640         int r;
7641
7642         BUG_ON(vcpu->kvm == NULL);
7643         kvm = vcpu->kvm;
7644
7645         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7646         vcpu->arch.pv.pv_unhalted = false;
7647         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7648         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7649                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7650         else
7651                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7652
7653         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7654         if (!page) {
7655                 r = -ENOMEM;
7656                 goto fail;
7657         }
7658         vcpu->arch.pio_data = page_address(page);
7659
7660         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7661
7662         r = kvm_mmu_create(vcpu);
7663         if (r < 0)
7664                 goto fail_free_pio_data;
7665
7666         if (irqchip_in_kernel(kvm)) {
7667                 r = kvm_create_lapic(vcpu);
7668                 if (r < 0)
7669                         goto fail_mmu_destroy;
7670         } else
7671                 static_key_slow_inc(&kvm_no_apic_vcpu);
7672
7673         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7674                                        GFP_KERNEL);
7675         if (!vcpu->arch.mce_banks) {
7676                 r = -ENOMEM;
7677                 goto fail_free_lapic;
7678         }
7679         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7680
7681         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7682                 r = -ENOMEM;
7683                 goto fail_free_mce_banks;
7684         }
7685
7686         fx_init(vcpu);
7687
7688         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7689         vcpu->arch.pv_time_enabled = false;
7690
7691         vcpu->arch.guest_supported_xcr0 = 0;
7692         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7693
7694         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7695
7696         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7697
7698         kvm_async_pf_hash_reset(vcpu);
7699         kvm_pmu_init(vcpu);
7700
7701         vcpu->arch.pending_external_vector = -1;
7702
7703         kvm_hv_vcpu_init(vcpu);
7704
7705         return 0;
7706
7707 fail_free_mce_banks:
7708         kfree(vcpu->arch.mce_banks);
7709 fail_free_lapic:
7710         kvm_free_lapic(vcpu);
7711 fail_mmu_destroy:
7712         kvm_mmu_destroy(vcpu);
7713 fail_free_pio_data:
7714         free_page((unsigned long)vcpu->arch.pio_data);
7715 fail:
7716         return r;
7717 }
7718
7719 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7720 {
7721         int idx;
7722
7723         kvm_hv_vcpu_uninit(vcpu);
7724         kvm_pmu_destroy(vcpu);
7725         kfree(vcpu->arch.mce_banks);
7726         kvm_free_lapic(vcpu);
7727         idx = srcu_read_lock(&vcpu->kvm->srcu);
7728         kvm_mmu_destroy(vcpu);
7729         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7730         free_page((unsigned long)vcpu->arch.pio_data);
7731         if (!lapic_in_kernel(vcpu))
7732                 static_key_slow_dec(&kvm_no_apic_vcpu);
7733 }
7734
7735 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7736 {
7737         kvm_x86_ops->sched_in(vcpu, cpu);
7738 }
7739
7740 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7741 {
7742         if (type)
7743                 return -EINVAL;
7744
7745         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7746         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7747         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7748         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7749         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7750
7751         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7752         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7753         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7754         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7755                 &kvm->arch.irq_sources_bitmap);
7756
7757         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7758         mutex_init(&kvm->arch.apic_map_lock);
7759         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7760
7761         pvclock_update_vm_gtod_copy(kvm);
7762
7763         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7764         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7765
7766         kvm_page_track_init(kvm);
7767         kvm_mmu_init_vm(kvm);
7768
7769         if (kvm_x86_ops->vm_init)
7770                 return kvm_x86_ops->vm_init(kvm);
7771
7772         return 0;
7773 }
7774
7775 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7776 {
7777         int r;
7778         r = vcpu_load(vcpu);
7779         BUG_ON(r);
7780         kvm_mmu_unload(vcpu);
7781         vcpu_put(vcpu);
7782 }
7783
7784 static void kvm_free_vcpus(struct kvm *kvm)
7785 {
7786         unsigned int i;
7787         struct kvm_vcpu *vcpu;
7788
7789         /*
7790          * Unpin any mmu pages first.
7791          */
7792         kvm_for_each_vcpu(i, vcpu, kvm) {
7793                 kvm_clear_async_pf_completion_queue(vcpu);
7794                 kvm_unload_vcpu_mmu(vcpu);
7795         }
7796         kvm_for_each_vcpu(i, vcpu, kvm)
7797                 kvm_arch_vcpu_free(vcpu);
7798
7799         mutex_lock(&kvm->lock);
7800         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7801                 kvm->vcpus[i] = NULL;
7802
7803         atomic_set(&kvm->online_vcpus, 0);
7804         mutex_unlock(&kvm->lock);
7805 }
7806
7807 void kvm_arch_sync_events(struct kvm *kvm)
7808 {
7809         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7810         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7811         kvm_free_all_assigned_devices(kvm);
7812         kvm_free_pit(kvm);
7813 }
7814
7815 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7816 {
7817         int i, r;
7818         unsigned long hva;
7819         struct kvm_memslots *slots = kvm_memslots(kvm);
7820         struct kvm_memory_slot *slot, old;
7821
7822         /* Called with kvm->slots_lock held.  */
7823         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7824                 return -EINVAL;
7825
7826         slot = id_to_memslot(slots, id);
7827         if (size) {
7828                 if (slot->npages)
7829                         return -EEXIST;
7830
7831                 /*
7832                  * MAP_SHARED to prevent internal slot pages from being moved
7833                  * by fork()/COW.
7834                  */
7835                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7836                               MAP_SHARED | MAP_ANONYMOUS, 0);
7837                 if (IS_ERR((void *)hva))
7838                         return PTR_ERR((void *)hva);
7839         } else {
7840                 if (!slot->npages)
7841                         return 0;
7842
7843                 hva = 0;
7844         }
7845
7846         old = *slot;
7847         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7848                 struct kvm_userspace_memory_region m;
7849
7850                 m.slot = id | (i << 16);
7851                 m.flags = 0;
7852                 m.guest_phys_addr = gpa;
7853                 m.userspace_addr = hva;
7854                 m.memory_size = size;
7855                 r = __kvm_set_memory_region(kvm, &m);
7856                 if (r < 0)
7857                         return r;
7858         }
7859
7860         if (!size) {
7861                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7862                 WARN_ON(r < 0);
7863         }
7864
7865         return 0;
7866 }
7867 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7868
7869 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7870 {
7871         int r;
7872
7873         mutex_lock(&kvm->slots_lock);
7874         r = __x86_set_memory_region(kvm, id, gpa, size);
7875         mutex_unlock(&kvm->slots_lock);
7876
7877         return r;
7878 }
7879 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7880
7881 void kvm_arch_destroy_vm(struct kvm *kvm)
7882 {
7883         if (current->mm == kvm->mm) {
7884                 /*
7885                  * Free memory regions allocated on behalf of userspace,
7886                  * unless the the memory map has changed due to process exit
7887                  * or fd copying.
7888                  */
7889                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7890                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7891                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7892         }
7893         if (kvm_x86_ops->vm_destroy)
7894                 kvm_x86_ops->vm_destroy(kvm);
7895         kvm_iommu_unmap_guest(kvm);
7896         kfree(kvm->arch.vpic);
7897         kfree(kvm->arch.vioapic);
7898         kvm_free_vcpus(kvm);
7899         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7900         kvm_mmu_uninit_vm(kvm);
7901 }
7902
7903 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7904                            struct kvm_memory_slot *dont)
7905 {
7906         int i;
7907
7908         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7909                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7910                         kvfree(free->arch.rmap[i]);
7911                         free->arch.rmap[i] = NULL;
7912                 }
7913                 if (i == 0)
7914                         continue;
7915
7916                 if (!dont || free->arch.lpage_info[i - 1] !=
7917                              dont->arch.lpage_info[i - 1]) {
7918                         kvfree(free->arch.lpage_info[i - 1]);
7919                         free->arch.lpage_info[i - 1] = NULL;
7920                 }
7921         }
7922
7923         kvm_page_track_free_memslot(free, dont);
7924 }
7925
7926 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7927                             unsigned long npages)
7928 {
7929         int i;
7930
7931         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7932                 struct kvm_lpage_info *linfo;
7933                 unsigned long ugfn;
7934                 int lpages;
7935                 int level = i + 1;
7936
7937                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7938                                       slot->base_gfn, level) + 1;
7939
7940                 slot->arch.rmap[i] =
7941                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7942                 if (!slot->arch.rmap[i])
7943                         goto out_free;
7944                 if (i == 0)
7945                         continue;
7946
7947                 linfo = kvm_kvzalloc(lpages * sizeof(*linfo));
7948                 if (!linfo)
7949                         goto out_free;
7950
7951                 slot->arch.lpage_info[i - 1] = linfo;
7952
7953                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7954                         linfo[0].disallow_lpage = 1;
7955                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7956                         linfo[lpages - 1].disallow_lpage = 1;
7957                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7958                 /*
7959                  * If the gfn and userspace address are not aligned wrt each
7960                  * other, or if explicitly asked to, disable large page
7961                  * support for this slot
7962                  */
7963                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7964                     !kvm_largepages_enabled()) {
7965                         unsigned long j;
7966
7967                         for (j = 0; j < lpages; ++j)
7968                                 linfo[j].disallow_lpage = 1;
7969                 }
7970         }
7971
7972         if (kvm_page_track_create_memslot(slot, npages))
7973                 goto out_free;
7974
7975         return 0;
7976
7977 out_free:
7978         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7979                 kvfree(slot->arch.rmap[i]);
7980                 slot->arch.rmap[i] = NULL;
7981                 if (i == 0)
7982                         continue;
7983
7984                 kvfree(slot->arch.lpage_info[i - 1]);
7985                 slot->arch.lpage_info[i - 1] = NULL;
7986         }
7987         return -ENOMEM;
7988 }
7989
7990 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7991 {
7992         /*
7993          * memslots->generation has been incremented.
7994          * mmio generation may have reached its maximum value.
7995          */
7996         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7997 }
7998
7999 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8000                                 struct kvm_memory_slot *memslot,
8001                                 const struct kvm_userspace_memory_region *mem,
8002                                 enum kvm_mr_change change)
8003 {
8004         return 0;
8005 }
8006
8007 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8008                                      struct kvm_memory_slot *new)
8009 {
8010         /* Still write protect RO slot */
8011         if (new->flags & KVM_MEM_READONLY) {
8012                 kvm_mmu_slot_remove_write_access(kvm, new);
8013                 return;
8014         }
8015
8016         /*
8017          * Call kvm_x86_ops dirty logging hooks when they are valid.
8018          *
8019          * kvm_x86_ops->slot_disable_log_dirty is called when:
8020          *
8021          *  - KVM_MR_CREATE with dirty logging is disabled
8022          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8023          *
8024          * The reason is, in case of PML, we need to set D-bit for any slots
8025          * with dirty logging disabled in order to eliminate unnecessary GPA
8026          * logging in PML buffer (and potential PML buffer full VMEXT). This
8027          * guarantees leaving PML enabled during guest's lifetime won't have
8028          * any additonal overhead from PML when guest is running with dirty
8029          * logging disabled for memory slots.
8030          *
8031          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8032          * to dirty logging mode.
8033          *
8034          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8035          *
8036          * In case of write protect:
8037          *
8038          * Write protect all pages for dirty logging.
8039          *
8040          * All the sptes including the large sptes which point to this
8041          * slot are set to readonly. We can not create any new large
8042          * spte on this slot until the end of the logging.
8043          *
8044          * See the comments in fast_page_fault().
8045          */
8046         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8047                 if (kvm_x86_ops->slot_enable_log_dirty)
8048                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8049                 else
8050                         kvm_mmu_slot_remove_write_access(kvm, new);
8051         } else {
8052                 if (kvm_x86_ops->slot_disable_log_dirty)
8053                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8054         }
8055 }
8056
8057 void kvm_arch_commit_memory_region(struct kvm *kvm,
8058                                 const struct kvm_userspace_memory_region *mem,
8059                                 const struct kvm_memory_slot *old,
8060                                 const struct kvm_memory_slot *new,
8061                                 enum kvm_mr_change change)
8062 {
8063         int nr_mmu_pages = 0;
8064
8065         if (!kvm->arch.n_requested_mmu_pages)
8066                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8067
8068         if (nr_mmu_pages)
8069                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8070
8071         /*
8072          * Dirty logging tracks sptes in 4k granularity, meaning that large
8073          * sptes have to be split.  If live migration is successful, the guest
8074          * in the source machine will be destroyed and large sptes will be
8075          * created in the destination. However, if the guest continues to run
8076          * in the source machine (for example if live migration fails), small
8077          * sptes will remain around and cause bad performance.
8078          *
8079          * Scan sptes if dirty logging has been stopped, dropping those
8080          * which can be collapsed into a single large-page spte.  Later
8081          * page faults will create the large-page sptes.
8082          */
8083         if ((change != KVM_MR_DELETE) &&
8084                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8085                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8086                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8087
8088         /*
8089          * Set up write protection and/or dirty logging for the new slot.
8090          *
8091          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8092          * been zapped so no dirty logging staff is needed for old slot. For
8093          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8094          * new and it's also covered when dealing with the new slot.
8095          *
8096          * FIXME: const-ify all uses of struct kvm_memory_slot.
8097          */
8098         if (change != KVM_MR_DELETE)
8099                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8100 }
8101
8102 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8103 {
8104         kvm_mmu_invalidate_zap_all_pages(kvm);
8105 }
8106
8107 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8108                                    struct kvm_memory_slot *slot)
8109 {
8110         kvm_mmu_invalidate_zap_all_pages(kvm);
8111 }
8112
8113 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8114 {
8115         if (!list_empty_careful(&vcpu->async_pf.done))
8116                 return true;
8117
8118         if (kvm_apic_has_events(vcpu))
8119                 return true;
8120
8121         if (vcpu->arch.pv.pv_unhalted)
8122                 return true;
8123
8124         if (atomic_read(&vcpu->arch.nmi_queued))
8125                 return true;
8126
8127         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8128                 return true;
8129
8130         if (kvm_arch_interrupt_allowed(vcpu) &&
8131             kvm_cpu_has_interrupt(vcpu))
8132                 return true;
8133
8134         if (kvm_hv_has_stimer_pending(vcpu))
8135                 return true;
8136
8137         return false;
8138 }
8139
8140 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8141 {
8142         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8143                 kvm_x86_ops->check_nested_events(vcpu, false);
8144
8145         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8146 }
8147
8148 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8149 {
8150         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8151 }
8152
8153 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8154 {
8155         return kvm_x86_ops->interrupt_allowed(vcpu);
8156 }
8157
8158 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8159 {
8160         if (is_64_bit_mode(vcpu))
8161                 return kvm_rip_read(vcpu);
8162         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8163                      kvm_rip_read(vcpu));
8164 }
8165 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8166
8167 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8168 {
8169         return kvm_get_linear_rip(vcpu) == linear_rip;
8170 }
8171 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8172
8173 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8174 {
8175         unsigned long rflags;
8176
8177         rflags = kvm_x86_ops->get_rflags(vcpu);
8178         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8179                 rflags &= ~X86_EFLAGS_TF;
8180         return rflags;
8181 }
8182 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8183
8184 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8185 {
8186         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8187             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8188                 rflags |= X86_EFLAGS_TF;
8189         kvm_x86_ops->set_rflags(vcpu, rflags);
8190 }
8191
8192 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8193 {
8194         __kvm_set_rflags(vcpu, rflags);
8195         kvm_make_request(KVM_REQ_EVENT, vcpu);
8196 }
8197 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8198
8199 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8200 {
8201         int r;
8202
8203         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8204               work->wakeup_all)
8205                 return;
8206
8207         r = kvm_mmu_reload(vcpu);
8208         if (unlikely(r))
8209                 return;
8210
8211         if (!vcpu->arch.mmu.direct_map &&
8212               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8213                 return;
8214
8215         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8216 }
8217
8218 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8219 {
8220         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8221 }
8222
8223 static inline u32 kvm_async_pf_next_probe(u32 key)
8224 {
8225         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8226 }
8227
8228 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8229 {
8230         u32 key = kvm_async_pf_hash_fn(gfn);
8231
8232         while (vcpu->arch.apf.gfns[key] != ~0)
8233                 key = kvm_async_pf_next_probe(key);
8234
8235         vcpu->arch.apf.gfns[key] = gfn;
8236 }
8237
8238 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8239 {
8240         int i;
8241         u32 key = kvm_async_pf_hash_fn(gfn);
8242
8243         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8244                      (vcpu->arch.apf.gfns[key] != gfn &&
8245                       vcpu->arch.apf.gfns[key] != ~0); i++)
8246                 key = kvm_async_pf_next_probe(key);
8247
8248         return key;
8249 }
8250
8251 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8252 {
8253         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8254 }
8255
8256 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8257 {
8258         u32 i, j, k;
8259
8260         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8261         while (true) {
8262                 vcpu->arch.apf.gfns[i] = ~0;
8263                 do {
8264                         j = kvm_async_pf_next_probe(j);
8265                         if (vcpu->arch.apf.gfns[j] == ~0)
8266                                 return;
8267                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8268                         /*
8269                          * k lies cyclically in ]i,j]
8270                          * |    i.k.j |
8271                          * |....j i.k.| or  |.k..j i...|
8272                          */
8273                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8274                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8275                 i = j;
8276         }
8277 }
8278
8279 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8280 {
8281
8282         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8283                                       sizeof(val));
8284 }
8285
8286 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8287                                      struct kvm_async_pf *work)
8288 {
8289         struct x86_exception fault;
8290
8291         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8292         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8293
8294         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8295             (vcpu->arch.apf.send_user_only &&
8296              kvm_x86_ops->get_cpl(vcpu) == 0))
8297                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8298         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8299                 fault.vector = PF_VECTOR;
8300                 fault.error_code_valid = true;
8301                 fault.error_code = 0;
8302                 fault.nested_page_fault = false;
8303                 fault.address = work->arch.token;
8304                 kvm_inject_page_fault(vcpu, &fault);
8305         }
8306 }
8307
8308 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8309                                  struct kvm_async_pf *work)
8310 {
8311         struct x86_exception fault;
8312
8313         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8314         if (work->wakeup_all)
8315                 work->arch.token = ~0; /* broadcast wakeup */
8316         else
8317                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8318
8319         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8320             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8321                 fault.vector = PF_VECTOR;
8322                 fault.error_code_valid = true;
8323                 fault.error_code = 0;
8324                 fault.nested_page_fault = false;
8325                 fault.address = work->arch.token;
8326                 kvm_inject_page_fault(vcpu, &fault);
8327         }
8328         vcpu->arch.apf.halted = false;
8329         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8330 }
8331
8332 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8333 {
8334         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8335                 return true;
8336         else
8337                 return !kvm_event_needs_reinjection(vcpu) &&
8338                         kvm_x86_ops->interrupt_allowed(vcpu);
8339 }
8340
8341 void kvm_arch_start_assignment(struct kvm *kvm)
8342 {
8343         atomic_inc(&kvm->arch.assigned_device_count);
8344 }
8345 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8346
8347 void kvm_arch_end_assignment(struct kvm *kvm)
8348 {
8349         atomic_dec(&kvm->arch.assigned_device_count);
8350 }
8351 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8352
8353 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8354 {
8355         return atomic_read(&kvm->arch.assigned_device_count);
8356 }
8357 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8358
8359 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8360 {
8361         atomic_inc(&kvm->arch.noncoherent_dma_count);
8362 }
8363 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8364
8365 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8366 {
8367         atomic_dec(&kvm->arch.noncoherent_dma_count);
8368 }
8369 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8370
8371 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8372 {
8373         return atomic_read(&kvm->arch.noncoherent_dma_count);
8374 }
8375 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8376
8377 bool kvm_arch_has_irq_bypass(void)
8378 {
8379         return kvm_x86_ops->update_pi_irte != NULL;
8380 }
8381
8382 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8383                                       struct irq_bypass_producer *prod)
8384 {
8385         struct kvm_kernel_irqfd *irqfd =
8386                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8387
8388         irqfd->producer = prod;
8389
8390         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8391                                            prod->irq, irqfd->gsi, 1);
8392 }
8393
8394 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8395                                       struct irq_bypass_producer *prod)
8396 {
8397         int ret;
8398         struct kvm_kernel_irqfd *irqfd =
8399                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8400
8401         WARN_ON(irqfd->producer != prod);
8402         irqfd->producer = NULL;
8403
8404         /*
8405          * When producer of consumer is unregistered, we change back to
8406          * remapped mode, so we can re-use the current implementation
8407          * when the irq is masked/disabed or the consumer side (KVM
8408          * int this case doesn't want to receive the interrupts.
8409         */
8410         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8411         if (ret)
8412                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8413                        " fails: %d\n", irqfd->consumer.token, ret);
8414 }
8415
8416 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8417                                    uint32_t guest_irq, bool set)
8418 {
8419         if (!kvm_x86_ops->update_pi_irte)
8420                 return -EINVAL;
8421
8422         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8423 }
8424
8425 bool kvm_vector_hashing_enabled(void)
8426 {
8427         return vector_hashing;
8428 }
8429 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8430
8431 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8432 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8433 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8434 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8435 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8436 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8437 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8438 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8439 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8440 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8441 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8442 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8443 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8444 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8445 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8446 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8447 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
8448 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
8449 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);