arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <trace/events/kvm.h>
  57
  58 #define CREATE_TRACE_POINTS
  59 #include "trace.h"
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define MAX_IO_MSRS 256
  72 #define KVM_MAX_MCE_BANKS 32
  73 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  74 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  75
  76 #define emul_to_vcpu(ctxt) \
  77         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  78
  79 /* EFER defaults:
  80  * - enable syscall per default because its emulated by KVM
  81  * - enable LME and LMA per default on 64 bit KVM
  82  */
  83 #ifdef CONFIG_X86_64
  84 static
  85 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  86 #else
  87 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  88 #endif
  89
  90 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  91 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  92
  93 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  94                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
  95
  96 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  97 static void process_nmi(struct kvm_vcpu *vcpu);
  98 static void enter_smm(struct kvm_vcpu *vcpu);
  99 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 100
 101 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 102 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 103
 104 static bool __read_mostly ignore_msrs = 0;
 105 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 106
 107 unsigned int min_timer_period_us = 500;
 108 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 109
 110 static bool __read_mostly kvmclock_periodic_sync = true;
 111 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 112
 113 bool __read_mostly kvm_has_tsc_control;
 114 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 115 u32  __read_mostly kvm_max_guest_tsc_khz;
 116 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 117 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 118 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 119 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 120 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 121 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 122 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 123
 124 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 125 static u32 __read_mostly tsc_tolerance_ppm = 250;
 126 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 127
 128 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 129 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 130 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 131
 132 static bool __read_mostly vector_hashing = true;
 133 module_param(vector_hashing, bool, S_IRUGO);
 134
 135 static bool __read_mostly backwards_tsc_observed = false;
 136
 137 #define KVM_NR_SHARED_MSRS 16
 138
 139 struct kvm_shared_msrs_global {
 140         int nr;
 141         u32 msrs[KVM_NR_SHARED_MSRS];
 142 };
 143
 144 struct kvm_shared_msrs {
 145         struct user_return_notifier urn;
 146         bool registered;
 147         struct kvm_shared_msr_values {
 148                 u64 host;
 149                 u64 curr;
 150         } values[KVM_NR_SHARED_MSRS];
 151 };
 152
 153 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 154 static struct kvm_shared_msrs __percpu *shared_msrs;
 155
 156 struct kvm_stats_debugfs_item debugfs_entries[] = {
 157         { "pf_fixed", VCPU_STAT(pf_fixed) },
 158         { "pf_guest", VCPU_STAT(pf_guest) },
 159         { "tlb_flush", VCPU_STAT(tlb_flush) },
 160         { "invlpg", VCPU_STAT(invlpg) },
 161         { "exits", VCPU_STAT(exits) },
 162         { "io_exits", VCPU_STAT(io_exits) },
 163         { "mmio_exits", VCPU_STAT(mmio_exits) },
 164         { "signal_exits", VCPU_STAT(signal_exits) },
 165         { "irq_window", VCPU_STAT(irq_window_exits) },
 166         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 167         { "halt_exits", VCPU_STAT(halt_exits) },
 168         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 169         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 170         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 171         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 172         { "hypercalls", VCPU_STAT(hypercalls) },
 173         { "request_irq", VCPU_STAT(request_irq_exits) },
 174         { "irq_exits", VCPU_STAT(irq_exits) },
 175         { "host_state_reload", VCPU_STAT(host_state_reload) },
 176         { "efer_reload", VCPU_STAT(efer_reload) },
 177         { "fpu_reload", VCPU_STAT(fpu_reload) },
 178         { "insn_emulation", VCPU_STAT(insn_emulation) },
 179         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 180         { "irq_injections", VCPU_STAT(irq_injections) },
 181         { "nmi_injections", VCPU_STAT(nmi_injections) },
 182         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 183         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 184         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 185         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 186         { "mmu_flooded", VM_STAT(mmu_flooded) },
 187         { "mmu_recycled", VM_STAT(mmu_recycled) },
 188         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 189         { "mmu_unsync", VM_STAT(mmu_unsync) },
 190         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 191         { "largepages", VM_STAT(lpages) },
 192         { NULL }
 193 };
 194
 195 u64 __read_mostly host_xcr0;
 196
 197 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 198
 199 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 200 {
 201         int i;
 202         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 203                 vcpu->arch.apf.gfns[i] = ~0;
 204 }
 205
 206 static void kvm_on_user_return(struct user_return_notifier *urn)
 207 {
 208         unsigned slot;
 209         struct kvm_shared_msrs *locals
 210                 = container_of(urn, struct kvm_shared_msrs, urn);
 211         struct kvm_shared_msr_values *values;
 212
 213         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 214                 values = &locals->values[slot];
 215                 if (values->host != values->curr) {
 216                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 217                         values->curr = values->host;
 218                 }
 219         }
 220         locals->registered = false;
 221         user_return_notifier_unregister(urn);
 222 }
 223
 224 static void shared_msr_update(unsigned slot, u32 msr)
 225 {
 226         u64 value;
 227         unsigned int cpu = smp_processor_id();
 228         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 229
 230         /* only read, and nobody should modify it at this time,
 231          * so don't need lock */
 232         if (slot >= shared_msrs_global.nr) {
 233                 printk(KERN_ERR "kvm: invalid MSR slot!");
 234                 return;
 235         }
 236         rdmsrl_safe(msr, &value);
 237         smsr->values[slot].host = value;
 238         smsr->values[slot].curr = value;
 239 }
 240
 241 void kvm_define_shared_msr(unsigned slot, u32 msr)
 242 {
 243         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 244         shared_msrs_global.msrs[slot] = msr;
 245         if (slot >= shared_msrs_global.nr)
 246                 shared_msrs_global.nr = slot + 1;
 247 }
 248 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 249
 250 static void kvm_shared_msr_cpu_online(void)
 251 {
 252         unsigned i;
 253
 254         for (i = 0; i < shared_msrs_global.nr; ++i)
 255                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 256 }
 257
 258 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 259 {
 260         unsigned int cpu = smp_processor_id();
 261         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 262         int err;
 263
 264         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 265                 return 0;
 266         smsr->values[slot].curr = value;
 267         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 268         if (err)
 269                 return 1;
 270
 271         if (!smsr->registered) {
 272                 smsr->urn.on_user_return = kvm_on_user_return;
 273                 user_return_notifier_register(&smsr->urn);
 274                 smsr->registered = true;
 275         }
 276         return 0;
 277 }
 278 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 279
 280 static void drop_user_return_notifiers(void)
 281 {
 282         unsigned int cpu = smp_processor_id();
 283         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 284
 285         if (smsr->registered)
 286                 kvm_on_user_return(&smsr->urn);
 287 }
 288
 289 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 290 {
 291         return vcpu->arch.apic_base;
 292 }
 293 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 294
 295 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 296 {
 297         u64 old_state = vcpu->arch.apic_base &
 298                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 299         u64 new_state = msr_info->data &
 300                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 301         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 302                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 303
 304         if (!msr_info->host_initiated &&
 305             ((msr_info->data & reserved_bits) != 0 ||
 306              new_state == X2APIC_ENABLE ||
 307              (new_state == MSR_IA32_APICBASE_ENABLE &&
 308               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 309              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 310               old_state == 0)))
 311                 return 1;
 312
 313         kvm_lapic_set_base(vcpu, msr_info->data);
 314         return 0;
 315 }
 316 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 317
 318 asmlinkage __visible void kvm_spurious_fault(void)
 319 {
 320         /* Fault while not rebooting.  We want the trace. */
 321         BUG();
 322 }
 323 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 324
 325 #define EXCPT_BENIGN            0
 326 #define EXCPT_CONTRIBUTORY      1
 327 #define EXCPT_PF                2
 328
 329 static int exception_class(int vector)
 330 {
 331         switch (vector) {
 332         case PF_VECTOR:
 333                 return EXCPT_PF;
 334         case DE_VECTOR:
 335         case TS_VECTOR:
 336         case NP_VECTOR:
 337         case SS_VECTOR:
 338         case GP_VECTOR:
 339                 return EXCPT_CONTRIBUTORY;
 340         default:
 341                 break;
 342         }
 343         return EXCPT_BENIGN;
 344 }
 345
 346 #define EXCPT_FAULT             0
 347 #define EXCPT_TRAP              1
 348 #define EXCPT_ABORT             2
 349 #define EXCPT_INTERRUPT         3
 350
 351 static int exception_type(int vector)
 352 {
 353         unsigned int mask;
 354
 355         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 356                 return EXCPT_INTERRUPT;
 357
 358         mask = 1 << vector;
 359
 360         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 361         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 362                 return EXCPT_TRAP;
 363
 364         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 365                 return EXCPT_ABORT;
 366
 367         /* Reserved exceptions will result in fault */
 368         return EXCPT_FAULT;
 369 }
 370
 371 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 372                 unsigned nr, bool has_error, u32 error_code,
 373                 bool reinject)
 374 {
 375         u32 prev_nr;
 376         int class1, class2;
 377
 378         kvm_make_request(KVM_REQ_EVENT, vcpu);
 379
 380         if (!vcpu->arch.exception.pending) {
 381         queue:
 382                 if (has_error && !is_protmode(vcpu))
 383                         has_error = false;
 384                 vcpu->arch.exception.pending = true;
 385                 vcpu->arch.exception.has_error_code = has_error;
 386                 vcpu->arch.exception.nr = nr;
 387                 vcpu->arch.exception.error_code = error_code;
 388                 vcpu->arch.exception.reinject = reinject;
 389                 return;
 390         }
 391
 392         /* to check exception */
 393         prev_nr = vcpu->arch.exception.nr;
 394         if (prev_nr == DF_VECTOR) {
 395                 /* triple fault -> shutdown */
 396                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 397                 return;
 398         }
 399         class1 = exception_class(prev_nr);
 400         class2 = exception_class(nr);
 401         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 402                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 403                 /* generate double fault per SDM Table 5-5 */
 404                 vcpu->arch.exception.pending = true;
 405                 vcpu->arch.exception.has_error_code = true;
 406                 vcpu->arch.exception.nr = DF_VECTOR;
 407                 vcpu->arch.exception.error_code = 0;
 408         } else
 409                 /* replace previous exception with a new one in a hope
 410                    that instruction re-execution will regenerate lost
 411                    exception */
 412                 goto queue;
 413 }
 414
 415 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 416 {
 417         kvm_multiple_exception(vcpu, nr, false, 0, false);
 418 }
 419 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 420
 421 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 422 {
 423         kvm_multiple_exception(vcpu, nr, false, 0, true);
 424 }
 425 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 426
 427 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 428 {
 429         if (err)
 430                 kvm_inject_gp(vcpu, 0);
 431         else
 432                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 433 }
 434 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 435
 436 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 437 {
 438         ++vcpu->stat.pf_guest;
 439         vcpu->arch.cr2 = fault->address;
 440         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 441 }
 442 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 443
 444 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 445 {
 446         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 447                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 448         else
 449                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 450
 451         return fault->nested_page_fault;
 452 }
 453
 454 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 455 {
 456         atomic_inc(&vcpu->arch.nmi_queued);
 457         kvm_make_request(KVM_REQ_NMI, vcpu);
 458 }
 459 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 460
 461 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 462 {
 463         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 464 }
 465 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 466
 467 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 468 {
 469         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 470 }
 471 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 472
 473 /*
 474  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 475  * a #GP and return false.
 476  */
 477 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 478 {
 479         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 480                 return true;
 481         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 482         return false;
 483 }
 484 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 485
 486 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 487 {
 488         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 489                 return true;
 490
 491         kvm_queue_exception(vcpu, UD_VECTOR);
 492         return false;
 493 }
 494 EXPORT_SYMBOL_GPL(kvm_require_dr);
 495
 496 /*
 497  * This function will be used to read from the physical memory of the currently
 498  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 499  * can read from guest physical or from the guest's guest physical memory.
 500  */
 501 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 502                             gfn_t ngfn, void *data, int offset, int len,
 503                             u32 access)
 504 {
 505         struct x86_exception exception;
 506         gfn_t real_gfn;
 507         gpa_t ngpa;
 508
 509         ngpa     = gfn_to_gpa(ngfn);
 510         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 511         if (real_gfn == UNMAPPED_GVA)
 512                 return -EFAULT;
 513
 514         real_gfn = gpa_to_gfn(real_gfn);
 515
 516         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 517 }
 518 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 519
 520 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 521                                void *data, int offset, int len, u32 access)
 522 {
 523         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 524                                        data, offset, len, access);
 525 }
 526
 527 /*
 528  * Load the pae pdptrs.  Return true is they are all valid.
 529  */
 530 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 531 {
 532         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 533         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 534         int i;
 535         int ret;
 536         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 537
 538         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 539                                       offset * sizeof(u64), sizeof(pdpte),
 540                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 541         if (ret < 0) {
 542                 ret = 0;
 543                 goto out;
 544         }
 545         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 546                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 547                     (pdpte[i] &
 548                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 549                         ret = 0;
 550                         goto out;
 551                 }
 552         }
 553         ret = 1;
 554
 555         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 556         __set_bit(VCPU_EXREG_PDPTR,
 557                   (unsigned long *)&vcpu->arch.regs_avail);
 558         __set_bit(VCPU_EXREG_PDPTR,
 559                   (unsigned long *)&vcpu->arch.regs_dirty);
 560 out:
 561
 562         return ret;
 563 }
 564 EXPORT_SYMBOL_GPL(load_pdptrs);
 565
 566 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 567 {
 568         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 569         bool changed = true;
 570         int offset;
 571         gfn_t gfn;
 572         int r;
 573
 574         if (is_long_mode(vcpu) || !is_pae(vcpu))
 575                 return false;
 576
 577         if (!test_bit(VCPU_EXREG_PDPTR,
 578                       (unsigned long *)&vcpu->arch.regs_avail))
 579                 return true;
 580
 581         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 582         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 583         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 584                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 585         if (r < 0)
 586                 goto out;
 587         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 588 out:
 589
 590         return changed;
 591 }
 592
 593 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 594 {
 595         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 596         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 597
 598         cr0 |= X86_CR0_ET;
 599
 600 #ifdef CONFIG_X86_64
 601         if (cr0 & 0xffffffff00000000UL)
 602                 return 1;
 603 #endif
 604
 605         cr0 &= ~CR0_RESERVED_BITS;
 606
 607         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 608                 return 1;
 609
 610         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 611                 return 1;
 612
 613         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 614 #ifdef CONFIG_X86_64
 615                 if ((vcpu->arch.efer & EFER_LME)) {
 616                         int cs_db, cs_l;
 617
 618                         if (!is_pae(vcpu))
 619                                 return 1;
 620                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 621                         if (cs_l)
 622                                 return 1;
 623                 } else
 624 #endif
 625                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 626                                                  kvm_read_cr3(vcpu)))
 627                         return 1;
 628         }
 629
 630         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 631                 return 1;
 632
 633         kvm_x86_ops->set_cr0(vcpu, cr0);
 634
 635         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 636                 kvm_clear_async_pf_completion_queue(vcpu);
 637                 kvm_async_pf_hash_reset(vcpu);
 638         }
 639
 640         if ((cr0 ^ old_cr0) & update_bits)
 641                 kvm_mmu_reset_context(vcpu);
 642
 643         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 644             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 645             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 646                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 647
 648         return 0;
 649 }
 650 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 651
 652 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 653 {
 654         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 655 }
 656 EXPORT_SYMBOL_GPL(kvm_lmsw);
 657
 658 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 659 {
 660         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 661                         !vcpu->guest_xcr0_loaded) {
 662                 /* kvm_set_xcr() also depends on this */
 663                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 664                 vcpu->guest_xcr0_loaded = 1;
 665         }
 666 }
 667
 668 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 669 {
 670         if (vcpu->guest_xcr0_loaded) {
 671                 if (vcpu->arch.xcr0 != host_xcr0)
 672                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 673                 vcpu->guest_xcr0_loaded = 0;
 674         }
 675 }
 676
 677 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 678 {
 679         u64 xcr0 = xcr;
 680         u64 old_xcr0 = vcpu->arch.xcr0;
 681         u64 valid_bits;
 682
 683         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 684         if (index != XCR_XFEATURE_ENABLED_MASK)
 685                 return 1;
 686         if (!(xcr0 & XFEATURE_MASK_FP))
 687                 return 1;
 688         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 689                 return 1;
 690
 691         /*
 692          * Do not allow the guest to set bits that we do not support
 693          * saving.  However, xcr0 bit 0 is always set, even if the
 694          * emulated CPU does not support XSAVE (see fx_init).
 695          */
 696         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 697         if (xcr0 & ~valid_bits)
 698                 return 1;
 699
 700         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 701             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 702                 return 1;
 703
 704         if (xcr0 & XFEATURE_MASK_AVX512) {
 705                 if (!(xcr0 & XFEATURE_MASK_YMM))
 706                         return 1;
 707                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 708                         return 1;
 709         }
 710         vcpu->arch.xcr0 = xcr0;
 711
 712         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 713                 kvm_update_cpuid(vcpu);
 714         return 0;
 715 }
 716
 717 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 718 {
 719         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 720             __kvm_set_xcr(vcpu, index, xcr)) {
 721                 kvm_inject_gp(vcpu, 0);
 722                 return 1;
 723         }
 724         return 0;
 725 }
 726 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 727
 728 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 729 {
 730         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 731         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 732                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 733
 734         if (cr4 & CR4_RESERVED_BITS)
 735                 return 1;
 736
 737         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 738                 return 1;
 739
 740         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 741                 return 1;
 742
 743         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 744                 return 1;
 745
 746         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 747                 return 1;
 748
 749         if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
 750                 return 1;
 751
 752         if (is_long_mode(vcpu)) {
 753                 if (!(cr4 & X86_CR4_PAE))
 754                         return 1;
 755         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 756                    && ((cr4 ^ old_cr4) & pdptr_bits)
 757                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 758                                    kvm_read_cr3(vcpu)))
 759                 return 1;
 760
 761         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 762                 if (!guest_cpuid_has_pcid(vcpu))
 763                         return 1;
 764
 765                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 766                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 767                         return 1;
 768         }
 769
 770         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 771                 return 1;
 772
 773         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 774             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 775                 kvm_mmu_reset_context(vcpu);
 776
 777         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 778                 kvm_update_cpuid(vcpu);
 779
 780         return 0;
 781 }
 782 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 783
 784 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 785 {
 786 #ifdef CONFIG_X86_64
 787         cr3 &= ~CR3_PCID_INVD;
 788 #endif
 789
 790         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 791                 kvm_mmu_sync_roots(vcpu);
 792                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 793                 return 0;
 794         }
 795
 796         if (is_long_mode(vcpu)) {
 797                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 798                         return 1;
 799         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 800                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 801                 return 1;
 802
 803         vcpu->arch.cr3 = cr3;
 804         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 805         kvm_mmu_new_cr3(vcpu);
 806         return 0;
 807 }
 808 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 809
 810 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 811 {
 812         if (cr8 & CR8_RESERVED_BITS)
 813                 return 1;
 814         if (lapic_in_kernel(vcpu))
 815                 kvm_lapic_set_tpr(vcpu, cr8);
 816         else
 817                 vcpu->arch.cr8 = cr8;
 818         return 0;
 819 }
 820 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 821
 822 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 823 {
 824         if (lapic_in_kernel(vcpu))
 825                 return kvm_lapic_get_cr8(vcpu);
 826         else
 827                 return vcpu->arch.cr8;
 828 }
 829 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 830
 831 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 832 {
 833         int i;
 834
 835         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 836                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 837                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 838                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 839         }
 840 }
 841
 842 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 843 {
 844         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 845                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 846 }
 847
 848 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 849 {
 850         unsigned long dr7;
 851
 852         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 853                 dr7 = vcpu->arch.guest_debug_dr7;
 854         else
 855                 dr7 = vcpu->arch.dr7;
 856         kvm_x86_ops->set_dr7(vcpu, dr7);
 857         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 858         if (dr7 & DR7_BP_EN_MASK)
 859                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 860 }
 861
 862 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 863 {
 864         u64 fixed = DR6_FIXED_1;
 865
 866         if (!guest_cpuid_has_rtm(vcpu))
 867                 fixed |= DR6_RTM;
 868         return fixed;
 869 }
 870
 871 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 872 {
 873         switch (dr) {
 874         case 0 ... 3:
 875                 vcpu->arch.db[dr] = val;
 876                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 877                         vcpu->arch.eff_db[dr] = val;
 878                 break;
 879         case 4:
 880                 /* fall through */
 881         case 6:
 882                 if (val & 0xffffffff00000000ULL)
 883                         return -1; /* #GP */
 884                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 885                 kvm_update_dr6(vcpu);
 886                 break;
 887         case 5:
 888                 /* fall through */
 889         default: /* 7 */
 890                 if (val & 0xffffffff00000000ULL)
 891                         return -1; /* #GP */
 892                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 893                 kvm_update_dr7(vcpu);
 894                 break;
 895         }
 896
 897         return 0;
 898 }
 899
 900 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 901 {
 902         if (__kvm_set_dr(vcpu, dr, val)) {
 903                 kvm_inject_gp(vcpu, 0);
 904                 return 1;
 905         }
 906         return 0;
 907 }
 908 EXPORT_SYMBOL_GPL(kvm_set_dr);
 909
 910 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 911 {
 912         switch (dr) {
 913         case 0 ... 3:
 914                 *val = vcpu->arch.db[dr];
 915                 break;
 916         case 4:
 917                 /* fall through */
 918         case 6:
 919                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 920                         *val = vcpu->arch.dr6;
 921                 else
 922                         *val = kvm_x86_ops->get_dr6(vcpu);
 923                 break;
 924         case 5:
 925                 /* fall through */
 926         default: /* 7 */
 927                 *val = vcpu->arch.dr7;
 928                 break;
 929         }
 930         return 0;
 931 }
 932 EXPORT_SYMBOL_GPL(kvm_get_dr);
 933
 934 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 935 {
 936         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 937         u64 data;
 938         int err;
 939
 940         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 941         if (err)
 942                 return err;
 943         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 944         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 945         return err;
 946 }
 947 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 948
 949 /*
 950  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 951  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 952  *
 953  * This list is modified at module load time to reflect the
 954  * capabilities of the host cpu. This capabilities test skips MSRs that are
 955  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 956  * may depend on host virtualization features rather than host cpu features.
 957  */
 958
 959 static u32 msrs_to_save[] = {
 960         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 961         MSR_STAR,
 962 #ifdef CONFIG_X86_64
 963         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 964 #endif
 965         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 966         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 967 };
 968
 969 static unsigned num_msrs_to_save;
 970
 971 static u32 emulated_msrs[] = {
 972         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 973         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 974         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 975         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 976         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 977         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 978         HV_X64_MSR_RESET,
 979         HV_X64_MSR_VP_INDEX,
 980         HV_X64_MSR_VP_RUNTIME,
 981         HV_X64_MSR_SCONTROL,
 982         HV_X64_MSR_STIMER0_CONFIG,
 983         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 984         MSR_KVM_PV_EOI_EN,
 985
 986         MSR_IA32_TSC_ADJUST,
 987         MSR_IA32_TSCDEADLINE,
 988         MSR_IA32_MISC_ENABLE,
 989         MSR_IA32_MCG_STATUS,
 990         MSR_IA32_MCG_CTL,
 991         MSR_IA32_MCG_EXT_CTL,
 992         MSR_IA32_SMBASE,
 993 };
 994
 995 static unsigned num_emulated_msrs;
 996
 997 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 998 {
 999         if (efer & efer_reserved_bits)
1000                 return false;
1001
1002         if (efer & EFER_FFXSR) {
1003                 struct kvm_cpuid_entry2 *feat;
1004
1005                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1006                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
1007                         return false;
1008         }
1009
1010         if (efer & EFER_SVME) {
1011                 struct kvm_cpuid_entry2 *feat;
1012
1013                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1014                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1015                         return false;
1016         }
1017
1018         return true;
1019 }
1020 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1021
1022 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1023 {
1024         u64 old_efer = vcpu->arch.efer;
1025
1026         if (!kvm_valid_efer(vcpu, efer))
1027                 return 1;
1028
1029         if (is_paging(vcpu)
1030             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1031                 return 1;
1032
1033         efer &= ~EFER_LMA;
1034         efer |= vcpu->arch.efer & EFER_LMA;
1035
1036         kvm_x86_ops->set_efer(vcpu, efer);
1037
1038         /* Update reserved bits */
1039         if ((efer ^ old_efer) & EFER_NX)
1040                 kvm_mmu_reset_context(vcpu);
1041
1042         return 0;
1043 }
1044
1045 void kvm_enable_efer_bits(u64 mask)
1046 {
1047        efer_reserved_bits &= ~mask;
1048 }
1049 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1050
1051 /*
1052  * Writes msr value into into the appropriate "register".
1053  * Returns 0 on success, non-0 otherwise.
1054  * Assumes vcpu_load() was already called.
1055  */
1056 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1057 {
1058         switch (msr->index) {
1059         case MSR_FS_BASE:
1060         case MSR_GS_BASE:
1061         case MSR_KERNEL_GS_BASE:
1062         case MSR_CSTAR:
1063         case MSR_LSTAR:
1064                 if (is_noncanonical_address(msr->data))
1065                         return 1;
1066                 break;
1067         case MSR_IA32_SYSENTER_EIP:
1068         case MSR_IA32_SYSENTER_ESP:
1069                 /*
1070                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1071                  * non-canonical address is written on Intel but not on
1072                  * AMD (which ignores the top 32-bits, because it does
1073                  * not implement 64-bit SYSENTER).
1074                  *
1075                  * 64-bit code should hence be able to write a non-canonical
1076                  * value on AMD.  Making the address canonical ensures that
1077                  * vmentry does not fail on Intel after writing a non-canonical
1078                  * value, and that something deterministic happens if the guest
1079                  * invokes 64-bit SYSENTER.
1080                  */
1081                 msr->data = get_canonical(msr->data);
1082         }
1083         return kvm_x86_ops->set_msr(vcpu, msr);
1084 }
1085 EXPORT_SYMBOL_GPL(kvm_set_msr);
1086
1087 /*
1088  * Adapt set_msr() to msr_io()'s calling convention
1089  */
1090 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1091 {
1092         struct msr_data msr;
1093         int r;
1094
1095         msr.index = index;
1096         msr.host_initiated = true;
1097         r = kvm_get_msr(vcpu, &msr);
1098         if (r)
1099                 return r;
1100
1101         *data = msr.data;
1102         return 0;
1103 }
1104
1105 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1106 {
1107         struct msr_data msr;
1108
1109         msr.data = *data;
1110         msr.index = index;
1111         msr.host_initiated = true;
1112         return kvm_set_msr(vcpu, &msr);
1113 }
1114
1115 #ifdef CONFIG_X86_64
1116 struct pvclock_gtod_data {
1117         seqcount_t      seq;
1118
1119         struct { /* extract of a clocksource struct */
1120                 int vclock_mode;
1121                 cycle_t cycle_last;
1122                 cycle_t mask;
1123                 u32     mult;
1124                 u32     shift;
1125         } clock;
1126
1127         u64             boot_ns;
1128         u64             nsec_base;
1129 };
1130
1131 static struct pvclock_gtod_data pvclock_gtod_data;
1132
1133 static void update_pvclock_gtod(struct timekeeper *tk)
1134 {
1135         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1136         u64 boot_ns;
1137
1138         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1139
1140         write_seqcount_begin(&vdata->seq);
1141
1142         /* copy pvclock gtod data */
1143         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1144         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1145         vdata->clock.mask               = tk->tkr_mono.mask;
1146         vdata->clock.mult               = tk->tkr_mono.mult;
1147         vdata->clock.shift              = tk->tkr_mono.shift;
1148
1149         vdata->boot_ns                  = boot_ns;
1150         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1151
1152         write_seqcount_end(&vdata->seq);
1153 }
1154 #endif
1155
1156 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1157 {
1158         /*
1159          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1160          * vcpu_enter_guest.  This function is only called from
1161          * the physical CPU that is running vcpu.
1162          */
1163         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1164 }
1165
1166 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1167 {
1168         int version;
1169         int r;
1170         struct pvclock_wall_clock wc;
1171         struct timespec64 boot;
1172
1173         if (!wall_clock)
1174                 return;
1175
1176         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1177         if (r)
1178                 return;
1179
1180         if (version & 1)
1181                 ++version;  /* first time write, random junk */
1182
1183         ++version;
1184
1185         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1186                 return;
1187
1188         /*
1189          * The guest calculates current wall clock time by adding
1190          * system time (updated by kvm_guest_time_update below) to the
1191          * wall clock specified here.  guest system time equals host
1192          * system time for us, thus we must fill in host boot time here.
1193          */
1194         getboottime64(&boot);
1195
1196         if (kvm->arch.kvmclock_offset) {
1197                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1198                 boot = timespec64_sub(boot, ts);
1199         }
1200         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1201         wc.nsec = boot.tv_nsec;
1202         wc.version = version;
1203
1204         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1205
1206         version++;
1207         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1208 }
1209
1210 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1211 {
1212         do_shl32_div32(dividend, divisor);
1213         return dividend;
1214 }
1215
1216 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1217                                s8 *pshift, u32 *pmultiplier)
1218 {
1219         uint64_t scaled64;
1220         int32_t  shift = 0;
1221         uint64_t tps64;
1222         uint32_t tps32;
1223
1224         tps64 = base_hz;
1225         scaled64 = scaled_hz;
1226         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1227                 tps64 >>= 1;
1228                 shift--;
1229         }
1230
1231         tps32 = (uint32_t)tps64;
1232         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1233                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1234                         scaled64 >>= 1;
1235                 else
1236                         tps32 <<= 1;
1237                 shift++;
1238         }
1239
1240         *pshift = shift;
1241         *pmultiplier = div_frac(scaled64, tps32);
1242
1243         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1244                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1245 }
1246
1247 #ifdef CONFIG_X86_64
1248 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1249 #endif
1250
1251 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1252 static unsigned long max_tsc_khz;
1253
1254 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1255 {
1256         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1257                                    vcpu->arch.virtual_tsc_shift);
1258 }
1259
1260 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1261 {
1262         u64 v = (u64)khz * (1000000 + ppm);
1263         do_div(v, 1000000);
1264         return v;
1265 }
1266
1267 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1268 {
1269         u64 ratio;
1270
1271         /* Guest TSC same frequency as host TSC? */
1272         if (!scale) {
1273                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1274                 return 0;
1275         }
1276
1277         /* TSC scaling supported? */
1278         if (!kvm_has_tsc_control) {
1279                 if (user_tsc_khz > tsc_khz) {
1280                         vcpu->arch.tsc_catchup = 1;
1281                         vcpu->arch.tsc_always_catchup = 1;
1282                         return 0;
1283                 } else {
1284                         WARN(1, "user requested TSC rate below hardware speed\n");
1285                         return -1;
1286                 }
1287         }
1288
1289         /* TSC scaling required  - calculate ratio */
1290         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1291                                 user_tsc_khz, tsc_khz);
1292
1293         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1294                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1295                           user_tsc_khz);
1296                 return -1;
1297         }
1298
1299         vcpu->arch.tsc_scaling_ratio = ratio;
1300         return 0;
1301 }
1302
1303 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1304 {
1305         u32 thresh_lo, thresh_hi;
1306         int use_scaling = 0;
1307
1308         /* tsc_khz can be zero if TSC calibration fails */
1309         if (user_tsc_khz == 0) {
1310                 /* set tsc_scaling_ratio to a safe value */
1311                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1312                 return -1;
1313         }
1314
1315         /* Compute a scale to convert nanoseconds in TSC cycles */
1316         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1317                            &vcpu->arch.virtual_tsc_shift,
1318                            &vcpu->arch.virtual_tsc_mult);
1319         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1320
1321         /*
1322          * Compute the variation in TSC rate which is acceptable
1323          * within the range of tolerance and decide if the
1324          * rate being applied is within that bounds of the hardware
1325          * rate.  If so, no scaling or compensation need be done.
1326          */
1327         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1328         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1329         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1330                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1331                 use_scaling = 1;
1332         }
1333         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1334 }
1335
1336 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1337 {
1338         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1339                                       vcpu->arch.virtual_tsc_mult,
1340                                       vcpu->arch.virtual_tsc_shift);
1341         tsc += vcpu->arch.this_tsc_write;
1342         return tsc;
1343 }
1344
1345 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1346 {
1347 #ifdef CONFIG_X86_64
1348         bool vcpus_matched;
1349         struct kvm_arch *ka = &vcpu->kvm->arch;
1350         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1351
1352         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1353                          atomic_read(&vcpu->kvm->online_vcpus));
1354
1355         /*
1356          * Once the masterclock is enabled, always perform request in
1357          * order to update it.
1358          *
1359          * In order to enable masterclock, the host clocksource must be TSC
1360          * and the vcpus need to have matched TSCs.  When that happens,
1361          * perform request to enable masterclock.
1362          */
1363         if (ka->use_master_clock ||
1364             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1365                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1366
1367         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1368                             atomic_read(&vcpu->kvm->online_vcpus),
1369                             ka->use_master_clock, gtod->clock.vclock_mode);
1370 #endif
1371 }
1372
1373 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1374 {
1375         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1376         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1377 }
1378
1379 /*
1380  * Multiply tsc by a fixed point number represented by ratio.
1381  *
1382  * The most significant 64-N bits (mult) of ratio represent the
1383  * integral part of the fixed point number; the remaining N bits
1384  * (frac) represent the fractional part, ie. ratio represents a fixed
1385  * point number (mult + frac * 2^(-N)).
1386  *
1387  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1388  */
1389 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1390 {
1391         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1392 }
1393
1394 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1395 {
1396         u64 _tsc = tsc;
1397         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1398
1399         if (ratio != kvm_default_tsc_scaling_ratio)
1400                 _tsc = __scale_tsc(ratio, tsc);
1401
1402         return _tsc;
1403 }
1404 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1405
1406 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1407 {
1408         u64 tsc;
1409
1410         tsc = kvm_scale_tsc(vcpu, rdtsc());
1411
1412         return target_tsc - tsc;
1413 }
1414
1415 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1416 {
1417         return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1418 }
1419 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1420
1421 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1422 {
1423         struct kvm *kvm = vcpu->kvm;
1424         u64 offset, ns, elapsed;
1425         unsigned long flags;
1426         s64 usdiff;
1427         bool matched;
1428         bool already_matched;
1429         u64 data = msr->data;
1430
1431         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1432         offset = kvm_compute_tsc_offset(vcpu, data);
1433         ns = get_kernel_ns();
1434         elapsed = ns - kvm->arch.last_tsc_nsec;
1435
1436         if (vcpu->arch.virtual_tsc_khz) {
1437                 int faulted = 0;
1438
1439                 /* n.b - signed multiplication and division required */
1440                 usdiff = data - kvm->arch.last_tsc_write;
1441 #ifdef CONFIG_X86_64
1442                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1443 #else
1444                 /* do_div() only does unsigned */
1445                 asm("1: idivl %[divisor]\n"
1446                     "2: xor %%edx, %%edx\n"
1447                     "   movl $0, %[faulted]\n"
1448                     "3:\n"
1449                     ".section .fixup,\"ax\"\n"
1450                     "4: movl $1, %[faulted]\n"
1451                     "   jmp  3b\n"
1452                     ".previous\n"
1453
1454                 _ASM_EXTABLE(1b, 4b)
1455
1456                 : "=A"(usdiff), [faulted] "=r" (faulted)
1457                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1458
1459 #endif
1460                 do_div(elapsed, 1000);
1461                 usdiff -= elapsed;
1462                 if (usdiff < 0)
1463                         usdiff = -usdiff;
1464
1465                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1466                 if (faulted)
1467                         usdiff = USEC_PER_SEC;
1468         } else
1469                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1470
1471         /*
1472          * Special case: TSC write with a small delta (1 second) of virtual
1473          * cycle time against real time is interpreted as an attempt to
1474          * synchronize the CPU.
1475          *
1476          * For a reliable TSC, we can match TSC offsets, and for an unstable
1477          * TSC, we add elapsed time in this computation.  We could let the
1478          * compensation code attempt to catch up if we fall behind, but
1479          * it's better to try to match offsets from the beginning.
1480          */
1481         if (usdiff < USEC_PER_SEC &&
1482             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1483                 if (!check_tsc_unstable()) {
1484                         offset = kvm->arch.cur_tsc_offset;
1485                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1486                 } else {
1487                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1488                         data += delta;
1489                         offset = kvm_compute_tsc_offset(vcpu, data);
1490                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1491                 }
1492                 matched = true;
1493                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1494         } else {
1495                 /*
1496                  * We split periods of matched TSC writes into generations.
1497                  * For each generation, we track the original measured
1498                  * nanosecond time, offset, and write, so if TSCs are in
1499                  * sync, we can match exact offset, and if not, we can match
1500                  * exact software computation in compute_guest_tsc()
1501                  *
1502                  * These values are tracked in kvm->arch.cur_xxx variables.
1503                  */
1504                 kvm->arch.cur_tsc_generation++;
1505                 kvm->arch.cur_tsc_nsec = ns;
1506                 kvm->arch.cur_tsc_write = data;
1507                 kvm->arch.cur_tsc_offset = offset;
1508                 matched = false;
1509                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1510                          kvm->arch.cur_tsc_generation, data);
1511         }
1512
1513         /*
1514          * We also track th most recent recorded KHZ, write and time to
1515          * allow the matching interval to be extended at each write.
1516          */
1517         kvm->arch.last_tsc_nsec = ns;
1518         kvm->arch.last_tsc_write = data;
1519         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1520
1521         vcpu->arch.last_guest_tsc = data;
1522
1523         /* Keep track of which generation this VCPU has synchronized to */
1524         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1525         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1526         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1527
1528         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1529                 update_ia32_tsc_adjust_msr(vcpu, offset);
1530         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1531         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1532
1533         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1534         if (!matched) {
1535                 kvm->arch.nr_vcpus_matched_tsc = 0;
1536         } else if (!already_matched) {
1537                 kvm->arch.nr_vcpus_matched_tsc++;
1538         }
1539
1540         kvm_track_tsc_matching(vcpu);
1541         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1542 }
1543
1544 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1545
1546 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1547                                            s64 adjustment)
1548 {
1549         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1550 }
1551
1552 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1553 {
1554         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1555                 WARN_ON(adjustment < 0);
1556         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1557         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1558 }
1559
1560 #ifdef CONFIG_X86_64
1561
1562 static cycle_t read_tsc(void)
1563 {
1564         cycle_t ret = (cycle_t)rdtsc_ordered();
1565         u64 last = pvclock_gtod_data.clock.cycle_last;
1566
1567         if (likely(ret >= last))
1568                 return ret;
1569
1570         /*
1571          * GCC likes to generate cmov here, but this branch is extremely
1572          * predictable (it's just a function of time and the likely is
1573          * very likely) and there's a data dependence, so force GCC
1574          * to generate a branch instead.  I don't barrier() because
1575          * we don't actually need a barrier, and if this function
1576          * ever gets inlined it will generate worse code.
1577          */
1578         asm volatile ("");
1579         return last;
1580 }
1581
1582 static inline u64 vgettsc(cycle_t *cycle_now)
1583 {
1584         long v;
1585         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1586
1587         *cycle_now = read_tsc();
1588
1589         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1590         return v * gtod->clock.mult;
1591 }
1592
1593 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1594 {
1595         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1596         unsigned long seq;
1597         int mode;
1598         u64 ns;
1599
1600         do {
1601                 seq = read_seqcount_begin(&gtod->seq);
1602                 mode = gtod->clock.vclock_mode;
1603                 ns = gtod->nsec_base;
1604                 ns += vgettsc(cycle_now);
1605                 ns >>= gtod->clock.shift;
1606                 ns += gtod->boot_ns;
1607         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1608         *t = ns;
1609
1610         return mode;
1611 }
1612
1613 /* returns true if host is using tsc clocksource */
1614 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1615 {
1616         /* checked again under seqlock below */
1617         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1618                 return false;
1619
1620         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1621 }
1622 #endif
1623
1624 /*
1625  *
1626  * Assuming a stable TSC across physical CPUS, and a stable TSC
1627  * across virtual CPUs, the following condition is possible.
1628  * Each numbered line represents an event visible to both
1629  * CPUs at the next numbered event.
1630  *
1631  * "timespecX" represents host monotonic time. "tscX" represents
1632  * RDTSC value.
1633  *
1634  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1635  *
1636  * 1.  read timespec0,tsc0
1637  * 2.                                   | timespec1 = timespec0 + N
1638  *                                      | tsc1 = tsc0 + M
1639  * 3. transition to guest               | transition to guest
1640  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1641  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1642  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1643  *
1644  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1645  *
1646  *      - ret0 < ret1
1647  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1648  *              ...
1649  *      - 0 < N - M => M < N
1650  *
1651  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1652  * always the case (the difference between two distinct xtime instances
1653  * might be smaller then the difference between corresponding TSC reads,
1654  * when updating guest vcpus pvclock areas).
1655  *
1656  * To avoid that problem, do not allow visibility of distinct
1657  * system_timestamp/tsc_timestamp values simultaneously: use a master
1658  * copy of host monotonic time values. Update that master copy
1659  * in lockstep.
1660  *
1661  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1662  *
1663  */
1664
1665 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1666 {
1667 #ifdef CONFIG_X86_64
1668         struct kvm_arch *ka = &kvm->arch;
1669         int vclock_mode;
1670         bool host_tsc_clocksource, vcpus_matched;
1671
1672         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1673                         atomic_read(&kvm->online_vcpus));
1674
1675         /*
1676          * If the host uses TSC clock, then passthrough TSC as stable
1677          * to the guest.
1678          */
1679         host_tsc_clocksource = kvm_get_time_and_clockread(
1680                                         &ka->master_kernel_ns,
1681                                         &ka->master_cycle_now);
1682
1683         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1684                                 && !backwards_tsc_observed
1685                                 && !ka->boot_vcpu_runs_old_kvmclock;
1686
1687         if (ka->use_master_clock)
1688                 atomic_set(&kvm_guest_has_master_clock, 1);
1689
1690         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1691         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1692                                         vcpus_matched);
1693 #endif
1694 }
1695
1696 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1697 {
1698         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1699 }
1700
1701 static void kvm_gen_update_masterclock(struct kvm *kvm)
1702 {
1703 #ifdef CONFIG_X86_64
1704         int i;
1705         struct kvm_vcpu *vcpu;
1706         struct kvm_arch *ka = &kvm->arch;
1707
1708         spin_lock(&ka->pvclock_gtod_sync_lock);
1709         kvm_make_mclock_inprogress_request(kvm);
1710         /* no guest entries from this point */
1711         pvclock_update_vm_gtod_copy(kvm);
1712
1713         kvm_for_each_vcpu(i, vcpu, kvm)
1714                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1715
1716         /* guest entries allowed */
1717         kvm_for_each_vcpu(i, vcpu, kvm)
1718                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1719
1720         spin_unlock(&ka->pvclock_gtod_sync_lock);
1721 #endif
1722 }
1723
1724 static int kvm_guest_time_update(struct kvm_vcpu *v)
1725 {
1726         unsigned long flags, tgt_tsc_khz;
1727         struct kvm_vcpu_arch *vcpu = &v->arch;
1728         struct kvm_arch *ka = &v->kvm->arch;
1729         s64 kernel_ns;
1730         u64 tsc_timestamp, host_tsc;
1731         struct pvclock_vcpu_time_info guest_hv_clock;
1732         u8 pvclock_flags;
1733         bool use_master_clock;
1734
1735         kernel_ns = 0;
1736         host_tsc = 0;
1737
1738         /*
1739          * If the host uses TSC clock, then passthrough TSC as stable
1740          * to the guest.
1741          */
1742         spin_lock(&ka->pvclock_gtod_sync_lock);
1743         use_master_clock = ka->use_master_clock;
1744         if (use_master_clock) {
1745                 host_tsc = ka->master_cycle_now;
1746                 kernel_ns = ka->master_kernel_ns;
1747         }
1748         spin_unlock(&ka->pvclock_gtod_sync_lock);
1749
1750         /* Keep irq disabled to prevent changes to the clock */
1751         local_irq_save(flags);
1752         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1753         if (unlikely(tgt_tsc_khz == 0)) {
1754                 local_irq_restore(flags);
1755                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1756                 return 1;
1757         }
1758         if (!use_master_clock) {
1759                 host_tsc = rdtsc();
1760                 kernel_ns = get_kernel_ns();
1761         }
1762
1763         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1764
1765         /*
1766          * We may have to catch up the TSC to match elapsed wall clock
1767          * time for two reasons, even if kvmclock is used.
1768          *   1) CPU could have been running below the maximum TSC rate
1769          *   2) Broken TSC compensation resets the base at each VCPU
1770          *      entry to avoid unknown leaps of TSC even when running
1771          *      again on the same CPU.  This may cause apparent elapsed
1772          *      time to disappear, and the guest to stand still or run
1773          *      very slowly.
1774          */
1775         if (vcpu->tsc_catchup) {
1776                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1777                 if (tsc > tsc_timestamp) {
1778                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1779                         tsc_timestamp = tsc;
1780                 }
1781         }
1782
1783         local_irq_restore(flags);
1784
1785         if (!vcpu->pv_time_enabled)
1786                 return 0;
1787
1788         if (kvm_has_tsc_control)
1789                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1790
1791         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1792                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1793                                    &vcpu->hv_clock.tsc_shift,
1794                                    &vcpu->hv_clock.tsc_to_system_mul);
1795                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1796         }
1797
1798         /* With all the info we got, fill in the values */
1799         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1800         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1801         vcpu->last_guest_tsc = tsc_timestamp;
1802
1803         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1804                 &guest_hv_clock, sizeof(guest_hv_clock))))
1805                 return 0;
1806
1807         /* This VCPU is paused, but it's legal for a guest to read another
1808          * VCPU's kvmclock, so we really have to follow the specification where
1809          * it says that version is odd if data is being modified, and even after
1810          * it is consistent.
1811          *
1812          * Version field updates must be kept separate.  This is because
1813          * kvm_write_guest_cached might use a "rep movs" instruction, and
1814          * writes within a string instruction are weakly ordered.  So there
1815          * are three writes overall.
1816          *
1817          * As a small optimization, only write the version field in the first
1818          * and third write.  The vcpu->pv_time cache is still valid, because the
1819          * version field is the first in the struct.
1820          */
1821         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1822
1823         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1824         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1825                                 &vcpu->hv_clock,
1826                                 sizeof(vcpu->hv_clock.version));
1827
1828         smp_wmb();
1829
1830         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1831         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1832
1833         if (vcpu->pvclock_set_guest_stopped_request) {
1834                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1835                 vcpu->pvclock_set_guest_stopped_request = false;
1836         }
1837
1838         /* If the host uses TSC clocksource, then it is stable */
1839         if (use_master_clock)
1840                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1841
1842         vcpu->hv_clock.flags = pvclock_flags;
1843
1844         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1845
1846         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1847                                 &vcpu->hv_clock,
1848                                 sizeof(vcpu->hv_clock));
1849
1850         smp_wmb();
1851
1852         vcpu->hv_clock.version++;
1853         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1854                                 &vcpu->hv_clock,
1855                                 sizeof(vcpu->hv_clock.version));
1856         return 0;
1857 }
1858
1859 /*
1860  * kvmclock updates which are isolated to a given vcpu, such as
1861  * vcpu->cpu migration, should not allow system_timestamp from
1862  * the rest of the vcpus to remain static. Otherwise ntp frequency
1863  * correction applies to one vcpu's system_timestamp but not
1864  * the others.
1865  *
1866  * So in those cases, request a kvmclock update for all vcpus.
1867  * We need to rate-limit these requests though, as they can
1868  * considerably slow guests that have a large number of vcpus.
1869  * The time for a remote vcpu to update its kvmclock is bound
1870  * by the delay we use to rate-limit the updates.
1871  */
1872
1873 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1874
1875 static void kvmclock_update_fn(struct work_struct *work)
1876 {
1877         int i;
1878         struct delayed_work *dwork = to_delayed_work(work);
1879         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1880                                            kvmclock_update_work);
1881         struct kvm *kvm = container_of(ka, struct kvm, arch);
1882         struct kvm_vcpu *vcpu;
1883
1884         kvm_for_each_vcpu(i, vcpu, kvm) {
1885                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1886                 kvm_vcpu_kick(vcpu);
1887         }
1888 }
1889
1890 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1891 {
1892         struct kvm *kvm = v->kvm;
1893
1894         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1895         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1896                                         KVMCLOCK_UPDATE_DELAY);
1897 }
1898
1899 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1900
1901 static void kvmclock_sync_fn(struct work_struct *work)
1902 {
1903         struct delayed_work *dwork = to_delayed_work(work);
1904         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1905                                            kvmclock_sync_work);
1906         struct kvm *kvm = container_of(ka, struct kvm, arch);
1907
1908         if (!kvmclock_periodic_sync)
1909                 return;
1910
1911         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1912         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1913                                         KVMCLOCK_SYNC_PERIOD);
1914 }
1915
1916 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1917 {
1918         u64 mcg_cap = vcpu->arch.mcg_cap;
1919         unsigned bank_num = mcg_cap & 0xff;
1920
1921         switch (msr) {
1922         case MSR_IA32_MCG_STATUS:
1923                 vcpu->arch.mcg_status = data;
1924                 break;
1925         case MSR_IA32_MCG_CTL:
1926                 if (!(mcg_cap & MCG_CTL_P))
1927                         return 1;
1928                 if (data != 0 && data != ~(u64)0)
1929                         return -1;
1930                 vcpu->arch.mcg_ctl = data;
1931                 break;
1932         default:
1933                 if (msr >= MSR_IA32_MC0_CTL &&
1934                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1935                         u32 offset = msr - MSR_IA32_MC0_CTL;
1936                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1937                          * some Linux kernels though clear bit 10 in bank 4 to
1938                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1939                          * this to avoid an uncatched #GP in the guest
1940                          */
1941                         if ((offset & 0x3) == 0 &&
1942                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1943                                 return -1;
1944                         vcpu->arch.mce_banks[offset] = data;
1945                         break;
1946                 }
1947                 return 1;
1948         }
1949         return 0;
1950 }
1951
1952 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1953 {
1954         struct kvm *kvm = vcpu->kvm;
1955         int lm = is_long_mode(vcpu);
1956         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1957                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1958         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1959                 : kvm->arch.xen_hvm_config.blob_size_32;
1960         u32 page_num = data & ~PAGE_MASK;
1961         u64 page_addr = data & PAGE_MASK;
1962         u8 *page;
1963         int r;
1964
1965         r = -E2BIG;
1966         if (page_num >= blob_size)
1967                 goto out;
1968         r = -ENOMEM;
1969         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1970         if (IS_ERR(page)) {
1971                 r = PTR_ERR(page);
1972                 goto out;
1973         }
1974         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1975                 goto out_free;
1976         r = 0;
1977 out_free:
1978         kfree(page);
1979 out:
1980         return r;
1981 }
1982
1983 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1984 {
1985         gpa_t gpa = data & ~0x3f;
1986
1987         /* Bits 2:5 are reserved, Should be zero */
1988         if (data & 0x3c)
1989                 return 1;
1990
1991         vcpu->arch.apf.msr_val = data;
1992
1993         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1994                 kvm_clear_async_pf_completion_queue(vcpu);
1995                 kvm_async_pf_hash_reset(vcpu);
1996                 return 0;
1997         }
1998
1999         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2000                                         sizeof(u32)))
2001                 return 1;
2002
2003         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2004         kvm_async_pf_wakeup_all(vcpu);
2005         return 0;
2006 }
2007
2008 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2009 {
2010         vcpu->arch.pv_time_enabled = false;
2011 }
2012
2013 static void record_steal_time(struct kvm_vcpu *vcpu)
2014 {
2015         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2016                 return;
2017
2018         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2019                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2020                 return;
2021
2022         if (vcpu->arch.st.steal.version & 1)
2023                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2024
2025         vcpu->arch.st.steal.version += 1;
2026
2027         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2028                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2029
2030         smp_wmb();
2031
2032         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2033                 vcpu->arch.st.last_steal;
2034         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2035
2036         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2037                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2038
2039         smp_wmb();
2040
2041         vcpu->arch.st.steal.version += 1;
2042
2043         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2044                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2045 }
2046
2047 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2048 {
2049         bool pr = false;
2050         u32 msr = msr_info->index;
2051         u64 data = msr_info->data;
2052
2053         switch (msr) {
2054         case MSR_AMD64_NB_CFG:
2055         case MSR_IA32_UCODE_REV:
2056         case MSR_IA32_UCODE_WRITE:
2057         case MSR_VM_HSAVE_PA:
2058         case MSR_AMD64_PATCH_LOADER:
2059         case MSR_AMD64_BU_CFG2:
2060                 break;
2061
2062         case MSR_EFER:
2063                 return set_efer(vcpu, data);
2064         case MSR_K7_HWCR:
2065                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2066                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2067                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2068                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2069                 if (data != 0) {
2070                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2071                                     data);
2072                         return 1;
2073                 }
2074                 break;
2075         case MSR_FAM10H_MMIO_CONF_BASE:
2076                 if (data != 0) {
2077                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2078                                     "0x%llx\n", data);
2079                         return 1;
2080                 }
2081                 break;
2082         case MSR_IA32_DEBUGCTLMSR:
2083                 if (!data) {
2084                         /* We support the non-activated case already */
2085                         break;
2086                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2087                         /* Values other than LBR and BTF are vendor-specific,
2088                            thus reserved and should throw a #GP */
2089                         return 1;
2090                 }
2091                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2092                             __func__, data);
2093                 break;
2094         case 0x200 ... 0x2ff:
2095                 return kvm_mtrr_set_msr(vcpu, msr, data);
2096         case MSR_IA32_APICBASE:
2097                 return kvm_set_apic_base(vcpu, msr_info);
2098         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2099                 return kvm_x2apic_msr_write(vcpu, msr, data);
2100         case MSR_IA32_TSCDEADLINE:
2101                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2102                 break;
2103         case MSR_IA32_TSC_ADJUST:
2104                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2105                         if (!msr_info->host_initiated) {
2106                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2107                                 adjust_tsc_offset_guest(vcpu, adj);
2108                         }
2109                         vcpu->arch.ia32_tsc_adjust_msr = data;
2110                 }
2111                 break;
2112         case MSR_IA32_MISC_ENABLE:
2113                 vcpu->arch.ia32_misc_enable_msr = data;
2114                 break;
2115         case MSR_IA32_SMBASE:
2116                 if (!msr_info->host_initiated)
2117                         return 1;
2118                 vcpu->arch.smbase = data;
2119                 break;
2120         case MSR_KVM_WALL_CLOCK_NEW:
2121         case MSR_KVM_WALL_CLOCK:
2122                 vcpu->kvm->arch.wall_clock = data;
2123                 kvm_write_wall_clock(vcpu->kvm, data);
2124                 break;
2125         case MSR_KVM_SYSTEM_TIME_NEW:
2126         case MSR_KVM_SYSTEM_TIME: {
2127                 u64 gpa_offset;
2128                 struct kvm_arch *ka = &vcpu->kvm->arch;
2129
2130                 kvmclock_reset(vcpu);
2131
2132                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2133                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2134
2135                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2136                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2137                                         &vcpu->requests);
2138
2139                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2140                 }
2141
2142                 vcpu->arch.time = data;
2143                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2144
2145                 /* we verify if the enable bit is set... */
2146                 if (!(data & 1))
2147                         break;
2148
2149                 gpa_offset = data & ~(PAGE_MASK | 1);
2150
2151                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2152                      &vcpu->arch.pv_time, data & ~1ULL,
2153                      sizeof(struct pvclock_vcpu_time_info)))
2154                         vcpu->arch.pv_time_enabled = false;
2155                 else
2156                         vcpu->arch.pv_time_enabled = true;
2157
2158                 break;
2159         }
2160         case MSR_KVM_ASYNC_PF_EN:
2161                 if (kvm_pv_enable_async_pf(vcpu, data))
2162                         return 1;
2163                 break;
2164         case MSR_KVM_STEAL_TIME:
2165
2166                 if (unlikely(!sched_info_on()))
2167                         return 1;
2168
2169                 if (data & KVM_STEAL_RESERVED_MASK)
2170                         return 1;
2171
2172                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2173                                                 data & KVM_STEAL_VALID_BITS,
2174                                                 sizeof(struct kvm_steal_time)))
2175                         return 1;
2176
2177                 vcpu->arch.st.msr_val = data;
2178
2179                 if (!(data & KVM_MSR_ENABLED))
2180                         break;
2181
2182                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2183
2184                 break;
2185         case MSR_KVM_PV_EOI_EN:
2186                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2187                         return 1;
2188                 break;
2189
2190         case MSR_IA32_MCG_CTL:
2191         case MSR_IA32_MCG_STATUS:
2192         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2193                 return set_msr_mce(vcpu, msr, data);
2194
2195         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2196         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2197                 pr = true; /* fall through */
2198         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2199         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2200                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2201                         return kvm_pmu_set_msr(vcpu, msr_info);
2202
2203                 if (pr || data != 0)
2204                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2205                                     "0x%x data 0x%llx\n", msr, data);
2206                 break;
2207         case MSR_K7_CLK_CTL:
2208                 /*
2209                  * Ignore all writes to this no longer documented MSR.
2210                  * Writes are only relevant for old K7 processors,
2211                  * all pre-dating SVM, but a recommended workaround from
2212                  * AMD for these chips. It is possible to specify the
2213                  * affected processor models on the command line, hence
2214                  * the need to ignore the workaround.
2215                  */
2216                 break;
2217         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2218         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2219         case HV_X64_MSR_CRASH_CTL:
2220         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2221                 return kvm_hv_set_msr_common(vcpu, msr, data,
2222                                              msr_info->host_initiated);
2223         case MSR_IA32_BBL_CR_CTL3:
2224                 /* Drop writes to this legacy MSR -- see rdmsr
2225                  * counterpart for further detail.
2226                  */
2227                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2228                 break;
2229         case MSR_AMD64_OSVW_ID_LENGTH:
2230                 if (!guest_cpuid_has_osvw(vcpu))
2231                         return 1;
2232                 vcpu->arch.osvw.length = data;
2233                 break;
2234         case MSR_AMD64_OSVW_STATUS:
2235                 if (!guest_cpuid_has_osvw(vcpu))
2236                         return 1;
2237                 vcpu->arch.osvw.status = data;
2238                 break;
2239         default:
2240                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2241                         return xen_hvm_config(vcpu, data);
2242                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2243                         return kvm_pmu_set_msr(vcpu, msr_info);
2244                 if (!ignore_msrs) {
2245                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2246                                     msr, data);
2247                         return 1;
2248                 } else {
2249                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2250                                     msr, data);
2251                         break;
2252                 }
2253         }
2254         return 0;
2255 }
2256 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2257
2258
2259 /*
2260  * Reads an msr value (of 'msr_index') into 'pdata'.
2261  * Returns 0 on success, non-0 otherwise.
2262  * Assumes vcpu_load() was already called.
2263  */
2264 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2265 {
2266         return kvm_x86_ops->get_msr(vcpu, msr);
2267 }
2268 EXPORT_SYMBOL_GPL(kvm_get_msr);
2269
2270 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2271 {
2272         u64 data;
2273         u64 mcg_cap = vcpu->arch.mcg_cap;
2274         unsigned bank_num = mcg_cap & 0xff;
2275
2276         switch (msr) {
2277         case MSR_IA32_P5_MC_ADDR:
2278         case MSR_IA32_P5_MC_TYPE:
2279                 data = 0;
2280                 break;
2281         case MSR_IA32_MCG_CAP:
2282                 data = vcpu->arch.mcg_cap;
2283                 break;
2284         case MSR_IA32_MCG_CTL:
2285                 if (!(mcg_cap & MCG_CTL_P))
2286                         return 1;
2287                 data = vcpu->arch.mcg_ctl;
2288                 break;
2289         case MSR_IA32_MCG_STATUS:
2290                 data = vcpu->arch.mcg_status;
2291                 break;
2292         default:
2293                 if (msr >= MSR_IA32_MC0_CTL &&
2294                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2295                         u32 offset = msr - MSR_IA32_MC0_CTL;
2296                         data = vcpu->arch.mce_banks[offset];
2297                         break;
2298                 }
2299                 return 1;
2300         }
2301         *pdata = data;
2302         return 0;
2303 }
2304
2305 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2306 {
2307         switch (msr_info->index) {
2308         case MSR_IA32_PLATFORM_ID:
2309         case MSR_IA32_EBL_CR_POWERON:
2310         case MSR_IA32_DEBUGCTLMSR:
2311         case MSR_IA32_LASTBRANCHFROMIP:
2312         case MSR_IA32_LASTBRANCHTOIP:
2313         case MSR_IA32_LASTINTFROMIP:
2314         case MSR_IA32_LASTINTTOIP:
2315         case MSR_K8_SYSCFG:
2316         case MSR_K8_TSEG_ADDR:
2317         case MSR_K8_TSEG_MASK:
2318         case MSR_K7_HWCR:
2319         case MSR_VM_HSAVE_PA:
2320         case MSR_K8_INT_PENDING_MSG:
2321         case MSR_AMD64_NB_CFG:
2322         case MSR_FAM10H_MMIO_CONF_BASE:
2323         case MSR_AMD64_BU_CFG2:
2324         case MSR_IA32_PERF_CTL:
2325                 msr_info->data = 0;
2326                 break;
2327         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2328         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2329         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2330         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2331                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2332                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2333                 msr_info->data = 0;
2334                 break;
2335         case MSR_IA32_UCODE_REV:
2336                 msr_info->data = 0x100000000ULL;
2337                 break;
2338         case MSR_MTRRcap:
2339         case 0x200 ... 0x2ff:
2340                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2341         case 0xcd: /* fsb frequency */
2342                 msr_info->data = 3;
2343                 break;
2344                 /*
2345                  * MSR_EBC_FREQUENCY_ID
2346                  * Conservative value valid for even the basic CPU models.
2347                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2348                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2349                  * and 266MHz for model 3, or 4. Set Core Clock
2350                  * Frequency to System Bus Frequency Ratio to 1 (bits
2351                  * 31:24) even though these are only valid for CPU
2352                  * models > 2, however guests may end up dividing or
2353                  * multiplying by zero otherwise.
2354                  */
2355         case MSR_EBC_FREQUENCY_ID:
2356                 msr_info->data = 1 << 24;
2357                 break;
2358         case MSR_IA32_APICBASE:
2359                 msr_info->data = kvm_get_apic_base(vcpu);
2360                 break;
2361         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2362                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2363                 break;
2364         case MSR_IA32_TSCDEADLINE:
2365                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2366                 break;
2367         case MSR_IA32_TSC_ADJUST:
2368                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2369                 break;
2370         case MSR_IA32_MISC_ENABLE:
2371                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2372                 break;
2373         case MSR_IA32_SMBASE:
2374                 if (!msr_info->host_initiated)
2375                         return 1;
2376                 msr_info->data = vcpu->arch.smbase;
2377                 break;
2378         case MSR_IA32_PERF_STATUS:
2379                 /* TSC increment by tick */
2380                 msr_info->data = 1000ULL;
2381                 /* CPU multiplier */
2382                 msr_info->data |= (((uint64_t)4ULL) << 40);
2383                 break;
2384         case MSR_EFER:
2385                 msr_info->data = vcpu->arch.efer;
2386                 break;
2387         case MSR_KVM_WALL_CLOCK:
2388         case MSR_KVM_WALL_CLOCK_NEW:
2389                 msr_info->data = vcpu->kvm->arch.wall_clock;
2390                 break;
2391         case MSR_KVM_SYSTEM_TIME:
2392         case MSR_KVM_SYSTEM_TIME_NEW:
2393                 msr_info->data = vcpu->arch.time;
2394                 break;
2395         case MSR_KVM_ASYNC_PF_EN:
2396                 msr_info->data = vcpu->arch.apf.msr_val;
2397                 break;
2398         case MSR_KVM_STEAL_TIME:
2399                 msr_info->data = vcpu->arch.st.msr_val;
2400                 break;
2401         case MSR_KVM_PV_EOI_EN:
2402                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2403                 break;
2404         case MSR_IA32_P5_MC_ADDR:
2405         case MSR_IA32_P5_MC_TYPE:
2406         case MSR_IA32_MCG_CAP:
2407         case MSR_IA32_MCG_CTL:
2408         case MSR_IA32_MCG_STATUS:
2409         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2410                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2411         case MSR_K7_CLK_CTL:
2412                 /*
2413                  * Provide expected ramp-up count for K7. All other
2414                  * are set to zero, indicating minimum divisors for
2415                  * every field.
2416                  *
2417                  * This prevents guest kernels on AMD host with CPU
2418                  * type 6, model 8 and higher from exploding due to
2419                  * the rdmsr failing.
2420                  */
2421                 msr_info->data = 0x20000000;
2422                 break;
2423         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2424         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2425         case HV_X64_MSR_CRASH_CTL:
2426         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2427                 return kvm_hv_get_msr_common(vcpu,
2428                                              msr_info->index, &msr_info->data);
2429                 break;
2430         case MSR_IA32_BBL_CR_CTL3:
2431                 /* This legacy MSR exists but isn't fully documented in current
2432                  * silicon.  It is however accessed by winxp in very narrow
2433                  * scenarios where it sets bit #19, itself documented as
2434                  * a "reserved" bit.  Best effort attempt to source coherent
2435                  * read data here should the balance of the register be
2436                  * interpreted by the guest:
2437                  *
2438                  * L2 cache control register 3: 64GB range, 256KB size,
2439                  * enabled, latency 0x1, configured
2440                  */
2441                 msr_info->data = 0xbe702111;
2442                 break;
2443         case MSR_AMD64_OSVW_ID_LENGTH:
2444                 if (!guest_cpuid_has_osvw(vcpu))
2445                         return 1;
2446                 msr_info->data = vcpu->arch.osvw.length;
2447                 break;
2448         case MSR_AMD64_OSVW_STATUS:
2449                 if (!guest_cpuid_has_osvw(vcpu))
2450                         return 1;
2451                 msr_info->data = vcpu->arch.osvw.status;
2452                 break;
2453         default:
2454                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2455                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2456                 if (!ignore_msrs) {
2457                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2458                         return 1;
2459                 } else {
2460                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2461                         msr_info->data = 0;
2462                 }
2463                 break;
2464         }
2465         return 0;
2466 }
2467 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2468
2469 /*
2470  * Read or write a bunch of msrs. All parameters are kernel addresses.
2471  *
2472  * @return number of msrs set successfully.
2473  */
2474 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2475                     struct kvm_msr_entry *entries,
2476                     int (*do_msr)(struct kvm_vcpu *vcpu,
2477                                   unsigned index, u64 *data))
2478 {
2479         int i, idx;
2480
2481         idx = srcu_read_lock(&vcpu->kvm->srcu);
2482         for (i = 0; i < msrs->nmsrs; ++i)
2483                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2484                         break;
2485         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2486
2487         return i;
2488 }
2489
2490 /*
2491  * Read or write a bunch of msrs. Parameters are user addresses.
2492  *
2493  * @return number of msrs set successfully.
2494  */
2495 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2496                   int (*do_msr)(struct kvm_vcpu *vcpu,
2497                                 unsigned index, u64 *data),
2498                   int writeback)
2499 {
2500         struct kvm_msrs msrs;
2501         struct kvm_msr_entry *entries;
2502         int r, n;
2503         unsigned size;
2504
2505         r = -EFAULT;
2506         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2507                 goto out;
2508
2509         r = -E2BIG;
2510         if (msrs.nmsrs >= MAX_IO_MSRS)
2511                 goto out;
2512
2513         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2514         entries = memdup_user(user_msrs->entries, size);
2515         if (IS_ERR(entries)) {
2516                 r = PTR_ERR(entries);
2517                 goto out;
2518         }
2519
2520         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2521         if (r < 0)
2522                 goto out_free;
2523
2524         r = -EFAULT;
2525         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2526                 goto out_free;
2527
2528         r = n;
2529
2530 out_free:
2531         kfree(entries);
2532 out:
2533         return r;
2534 }
2535
2536 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2537 {
2538         int r;
2539
2540         switch (ext) {
2541         case KVM_CAP_IRQCHIP:
2542         case KVM_CAP_HLT:
2543         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2544         case KVM_CAP_SET_TSS_ADDR:
2545         case KVM_CAP_EXT_CPUID:
2546         case KVM_CAP_EXT_EMUL_CPUID:
2547         case KVM_CAP_CLOCKSOURCE:
2548         case KVM_CAP_PIT:
2549         case KVM_CAP_NOP_IO_DELAY:
2550         case KVM_CAP_MP_STATE:
2551         case KVM_CAP_SYNC_MMU:
2552         case KVM_CAP_USER_NMI:
2553         case KVM_CAP_REINJECT_CONTROL:
2554         case KVM_CAP_IRQ_INJECT_STATUS:
2555         case KVM_CAP_IOEVENTFD:
2556         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2557         case KVM_CAP_PIT2:
2558         case KVM_CAP_PIT_STATE2:
2559         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2560         case KVM_CAP_XEN_HVM:
2561         case KVM_CAP_ADJUST_CLOCK:
2562         case KVM_CAP_VCPU_EVENTS:
2563         case KVM_CAP_HYPERV:
2564         case KVM_CAP_HYPERV_VAPIC:
2565         case KVM_CAP_HYPERV_SPIN:
2566         case KVM_CAP_HYPERV_SYNIC:
2567         case KVM_CAP_PCI_SEGMENT:
2568         case KVM_CAP_DEBUGREGS:
2569         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2570         case KVM_CAP_XSAVE:
2571         case KVM_CAP_ASYNC_PF:
2572         case KVM_CAP_GET_TSC_KHZ:
2573         case KVM_CAP_KVMCLOCK_CTRL:
2574         case KVM_CAP_READONLY_MEM:
2575         case KVM_CAP_HYPERV_TIME:
2576         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2577         case KVM_CAP_TSC_DEADLINE_TIMER:
2578         case KVM_CAP_ENABLE_CAP_VM:
2579         case KVM_CAP_DISABLE_QUIRKS:
2580         case KVM_CAP_SET_BOOT_CPU_ID:
2581         case KVM_CAP_SPLIT_IRQCHIP:
2582 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2583         case KVM_CAP_ASSIGN_DEV_IRQ:
2584         case KVM_CAP_PCI_2_3:
2585 #endif
2586                 r = 1;
2587                 break;
2588         case KVM_CAP_X86_SMM:
2589                 /* SMBASE is usually relocated above 1M on modern chipsets,
2590                  * and SMM handlers might indeed rely on 4G segment limits,
2591                  * so do not report SMM to be available if real mode is
2592                  * emulated via vm86 mode.  Still, do not go to great lengths
2593                  * to avoid userspace's usage of the feature, because it is a
2594                  * fringe case that is not enabled except via specific settings
2595                  * of the module parameters.
2596                  */
2597                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2598                 break;
2599         case KVM_CAP_COALESCED_MMIO:
2600                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2601                 break;
2602         case KVM_CAP_VAPIC:
2603                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2604                 break;
2605         case KVM_CAP_NR_VCPUS:
2606                 r = KVM_SOFT_MAX_VCPUS;
2607                 break;
2608         case KVM_CAP_MAX_VCPUS:
2609                 r = KVM_MAX_VCPUS;
2610                 break;
2611         case KVM_CAP_NR_MEMSLOTS:
2612                 r = KVM_USER_MEM_SLOTS;
2613                 break;
2614         case KVM_CAP_PV_MMU:    /* obsolete */
2615                 r = 0;
2616                 break;
2617 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2618         case KVM_CAP_IOMMU:
2619                 r = iommu_present(&pci_bus_type);
2620                 break;
2621 #endif
2622         case KVM_CAP_MCE:
2623                 r = KVM_MAX_MCE_BANKS;
2624                 break;
2625         case KVM_CAP_XCRS:
2626                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2627                 break;
2628         case KVM_CAP_TSC_CONTROL:
2629                 r = kvm_has_tsc_control;
2630                 break;
2631         case KVM_CAP_X2APIC_API:
2632                 r = KVM_X2APIC_API_VALID_FLAGS;
2633                 break;
2634         default:
2635                 r = 0;
2636                 break;
2637         }
2638         return r;
2639
2640 }
2641
2642 long kvm_arch_dev_ioctl(struct file *filp,
2643                         unsigned int ioctl, unsigned long arg)
2644 {
2645         void __user *argp = (void __user *)arg;
2646         long r;
2647
2648         switch (ioctl) {
2649         case KVM_GET_MSR_INDEX_LIST: {
2650                 struct kvm_msr_list __user *user_msr_list = argp;
2651                 struct kvm_msr_list msr_list;
2652                 unsigned n;
2653
2654                 r = -EFAULT;
2655                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2656                         goto out;
2657                 n = msr_list.nmsrs;
2658                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2659                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2660                         goto out;
2661                 r = -E2BIG;
2662                 if (n < msr_list.nmsrs)
2663                         goto out;
2664                 r = -EFAULT;
2665                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2666                                  num_msrs_to_save * sizeof(u32)))
2667                         goto out;
2668                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2669                                  &emulated_msrs,
2670                                  num_emulated_msrs * sizeof(u32)))
2671                         goto out;
2672                 r = 0;
2673                 break;
2674         }
2675         case KVM_GET_SUPPORTED_CPUID:
2676         case KVM_GET_EMULATED_CPUID: {
2677                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2678                 struct kvm_cpuid2 cpuid;
2679
2680                 r = -EFAULT;
2681                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2682                         goto out;
2683
2684                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2685                                             ioctl);
2686                 if (r)
2687                         goto out;
2688
2689                 r = -EFAULT;
2690                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2691                         goto out;
2692                 r = 0;
2693                 break;
2694         }
2695         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2696                 r = -EFAULT;
2697                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2698                                  sizeof(kvm_mce_cap_supported)))
2699                         goto out;
2700                 r = 0;
2701                 break;
2702         }
2703         default:
2704                 r = -EINVAL;
2705         }
2706 out:
2707         return r;
2708 }
2709
2710 static void wbinvd_ipi(void *garbage)
2711 {
2712         wbinvd();
2713 }
2714
2715 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2716 {
2717         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2718 }
2719
2720 static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
2721 {
2722         set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
2723 }
2724
2725 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2726 {
2727         /* Address WBINVD may be executed by guest */
2728         if (need_emulate_wbinvd(vcpu)) {
2729                 if (kvm_x86_ops->has_wbinvd_exit())
2730                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2731                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2732                         smp_call_function_single(vcpu->cpu,
2733                                         wbinvd_ipi, NULL, 1);
2734         }
2735
2736         kvm_x86_ops->vcpu_load(vcpu, cpu);
2737
2738         /* Apply any externally detected TSC adjustments (due to suspend) */
2739         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2740                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2741                 vcpu->arch.tsc_offset_adjustment = 0;
2742                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2743         }
2744
2745         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2746                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2747                                 rdtsc() - vcpu->arch.last_host_tsc;
2748                 if (tsc_delta < 0)
2749                         mark_tsc_unstable("KVM discovered backwards TSC");
2750
2751                 if (kvm_lapic_hv_timer_in_use(vcpu) &&
2752                                 kvm_x86_ops->set_hv_timer(vcpu,
2753                                         kvm_get_lapic_tscdeadline_msr(vcpu)))
2754                         kvm_lapic_switch_to_sw_timer(vcpu);
2755                 if (check_tsc_unstable()) {
2756                         u64 offset = kvm_compute_tsc_offset(vcpu,
2757                                                 vcpu->arch.last_guest_tsc);
2758                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2759                         vcpu->arch.tsc_catchup = 1;
2760                 }
2761                 /*
2762                  * On a host with synchronized TSC, there is no need to update
2763                  * kvmclock on vcpu->cpu migration
2764                  */
2765                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2766                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2767                 if (vcpu->cpu != cpu)
2768                         kvm_migrate_timers(vcpu);
2769                 vcpu->cpu = cpu;
2770         }
2771
2772         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2773 }
2774
2775 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2776 {
2777         kvm_x86_ops->vcpu_put(vcpu);
2778         kvm_put_guest_fpu(vcpu);
2779         vcpu->arch.last_host_tsc = rdtsc();
2780 }
2781
2782 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2783                                     struct kvm_lapic_state *s)
2784 {
2785         if (vcpu->arch.apicv_active)
2786                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2787
2788         return kvm_apic_get_state(vcpu, s);
2789 }
2790
2791 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2792                                     struct kvm_lapic_state *s)
2793 {
2794         int r;
2795
2796         r = kvm_apic_set_state(vcpu, s);
2797         if (r)
2798                 return r;
2799         update_cr8_intercept(vcpu);
2800
2801         return 0;
2802 }
2803
2804 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2805 {
2806         return (!lapic_in_kernel(vcpu) ||
2807                 kvm_apic_accept_pic_intr(vcpu));
2808 }
2809
2810 /*
2811  * if userspace requested an interrupt window, check that the
2812  * interrupt window is open.
2813  *
2814  * No need to exit to userspace if we already have an interrupt queued.
2815  */
2816 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2817 {
2818         return kvm_arch_interrupt_allowed(vcpu) &&
2819                 !kvm_cpu_has_interrupt(vcpu) &&
2820                 !kvm_event_needs_reinjection(vcpu) &&
2821                 kvm_cpu_accept_dm_intr(vcpu);
2822 }
2823
2824 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2825                                     struct kvm_interrupt *irq)
2826 {
2827         if (irq->irq >= KVM_NR_INTERRUPTS)
2828                 return -EINVAL;
2829
2830         if (!irqchip_in_kernel(vcpu->kvm)) {
2831                 kvm_queue_interrupt(vcpu, irq->irq, false);
2832                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2833                 return 0;
2834         }
2835
2836         /*
2837          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2838          * fail for in-kernel 8259.
2839          */
2840         if (pic_in_kernel(vcpu->kvm))
2841                 return -ENXIO;
2842
2843         if (vcpu->arch.pending_external_vector != -1)
2844                 return -EEXIST;
2845
2846         vcpu->arch.pending_external_vector = irq->irq;
2847         kvm_make_request(KVM_REQ_EVENT, vcpu);
2848         return 0;
2849 }
2850
2851 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2852 {
2853         kvm_inject_nmi(vcpu);
2854
2855         return 0;
2856 }
2857
2858 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2859 {
2860         kvm_make_request(KVM_REQ_SMI, vcpu);
2861
2862         return 0;
2863 }
2864
2865 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2866                                            struct kvm_tpr_access_ctl *tac)
2867 {
2868         if (tac->flags)
2869                 return -EINVAL;
2870         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2871         return 0;
2872 }
2873
2874 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2875                                         u64 mcg_cap)
2876 {
2877         int r;
2878         unsigned bank_num = mcg_cap & 0xff, bank;
2879
2880         r = -EINVAL;
2881         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2882                 goto out;
2883         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
2884                 goto out;
2885         r = 0;
2886         vcpu->arch.mcg_cap = mcg_cap;
2887         /* Init IA32_MCG_CTL to all 1s */
2888         if (mcg_cap & MCG_CTL_P)
2889                 vcpu->arch.mcg_ctl = ~(u64)0;
2890         /* Init IA32_MCi_CTL to all 1s */
2891         for (bank = 0; bank < bank_num; bank++)
2892                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2893
2894         if (kvm_x86_ops->setup_mce)
2895                 kvm_x86_ops->setup_mce(vcpu);
2896 out:
2897         return r;
2898 }
2899
2900 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2901                                       struct kvm_x86_mce *mce)
2902 {
2903         u64 mcg_cap = vcpu->arch.mcg_cap;
2904         unsigned bank_num = mcg_cap & 0xff;
2905         u64 *banks = vcpu->arch.mce_banks;
2906
2907         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2908                 return -EINVAL;
2909         /*
2910          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2911          * reporting is disabled
2912          */
2913         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2914             vcpu->arch.mcg_ctl != ~(u64)0)
2915                 return 0;
2916         banks += 4 * mce->bank;
2917         /*
2918          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2919          * reporting is disabled for the bank
2920          */
2921         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2922                 return 0;
2923         if (mce->status & MCI_STATUS_UC) {
2924                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2925                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2926                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2927                         return 0;
2928                 }
2929                 if (banks[1] & MCI_STATUS_VAL)
2930                         mce->status |= MCI_STATUS_OVER;
2931                 banks[2] = mce->addr;
2932                 banks[3] = mce->misc;
2933                 vcpu->arch.mcg_status = mce->mcg_status;
2934                 banks[1] = mce->status;
2935                 kvm_queue_exception(vcpu, MC_VECTOR);
2936         } else if (!(banks[1] & MCI_STATUS_VAL)
2937                    || !(banks[1] & MCI_STATUS_UC)) {
2938                 if (banks[1] & MCI_STATUS_VAL)
2939                         mce->status |= MCI_STATUS_OVER;
2940                 banks[2] = mce->addr;
2941                 banks[3] = mce->misc;
2942                 banks[1] = mce->status;
2943         } else
2944                 banks[1] |= MCI_STATUS_OVER;
2945         return 0;
2946 }
2947
2948 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2949                                                struct kvm_vcpu_events *events)
2950 {
2951         process_nmi(vcpu);
2952         events->exception.injected =
2953                 vcpu->arch.exception.pending &&
2954                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2955         events->exception.nr = vcpu->arch.exception.nr;
2956         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2957         events->exception.pad = 0;
2958         events->exception.error_code = vcpu->arch.exception.error_code;
2959
2960         events->interrupt.injected =
2961                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2962         events->interrupt.nr = vcpu->arch.interrupt.nr;
2963         events->interrupt.soft = 0;
2964         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2965
2966         events->nmi.injected = vcpu->arch.nmi_injected;
2967         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2968         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2969         events->nmi.pad = 0;
2970
2971         events->sipi_vector = 0; /* never valid when reporting to user space */
2972
2973         events->smi.smm = is_smm(vcpu);
2974         events->smi.pending = vcpu->arch.smi_pending;
2975         events->smi.smm_inside_nmi =
2976                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2977         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2978
2979         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2980                          | KVM_VCPUEVENT_VALID_SHADOW
2981                          | KVM_VCPUEVENT_VALID_SMM);
2982         memset(&events->reserved, 0, sizeof(events->reserved));
2983 }
2984
2985 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2986                                               struct kvm_vcpu_events *events)
2987 {
2988         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2989                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2990                               | KVM_VCPUEVENT_VALID_SHADOW
2991                               | KVM_VCPUEVENT_VALID_SMM))
2992                 return -EINVAL;
2993
2994         if (events->exception.injected &&
2995             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
2996                 return -EINVAL;
2997
2998         process_nmi(vcpu);
2999         vcpu->arch.exception.pending = events->exception.injected;
3000         vcpu->arch.exception.nr = events->exception.nr;
3001         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3002         vcpu->arch.exception.error_code = events->exception.error_code;
3003
3004         vcpu->arch.interrupt.pending = events->interrupt.injected;
3005         vcpu->arch.interrupt.nr = events->interrupt.nr;
3006         vcpu->arch.interrupt.soft = events->interrupt.soft;
3007         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3008                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3009                                                   events->interrupt.shadow);
3010
3011         vcpu->arch.nmi_injected = events->nmi.injected;
3012         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3013                 vcpu->arch.nmi_pending = events->nmi.pending;
3014         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3015
3016         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3017             lapic_in_kernel(vcpu))
3018                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3019
3020         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3021                 if (events->smi.smm)
3022                         vcpu->arch.hflags |= HF_SMM_MASK;
3023                 else
3024                         vcpu->arch.hflags &= ~HF_SMM_MASK;
3025                 vcpu->arch.smi_pending = events->smi.pending;
3026                 if (events->smi.smm_inside_nmi)
3027                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3028                 else
3029                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3030                 if (lapic_in_kernel(vcpu)) {
3031                         if (events->smi.latched_init)
3032                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3033                         else
3034                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3035                 }
3036         }
3037
3038         kvm_make_request(KVM_REQ_EVENT, vcpu);
3039
3040         return 0;
3041 }
3042
3043 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3044                                              struct kvm_debugregs *dbgregs)
3045 {
3046         unsigned long val;
3047
3048         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3049         kvm_get_dr(vcpu, 6, &val);
3050         dbgregs->dr6 = val;
3051         dbgregs->dr7 = vcpu->arch.dr7;
3052         dbgregs->flags = 0;
3053         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3054 }
3055
3056 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3057                                             struct kvm_debugregs *dbgregs)
3058 {
3059         if (dbgregs->flags)
3060                 return -EINVAL;
3061
3062         if (dbgregs->dr6 & ~0xffffffffull)
3063                 return -EINVAL;
3064         if (dbgregs->dr7 & ~0xffffffffull)
3065                 return -EINVAL;
3066
3067         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3068         kvm_update_dr0123(vcpu);
3069         vcpu->arch.dr6 = dbgregs->dr6;
3070         kvm_update_dr6(vcpu);
3071         vcpu->arch.dr7 = dbgregs->dr7;
3072         kvm_update_dr7(vcpu);
3073
3074         return 0;
3075 }
3076
3077 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3078
3079 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3080 {
3081         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3082         u64 xstate_bv = xsave->header.xfeatures;
3083         u64 valid;
3084
3085         /*
3086          * Copy legacy XSAVE area, to avoid complications with CPUID
3087          * leaves 0 and 1 in the loop below.
3088          */
3089         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3090
3091         /* Set XSTATE_BV */
3092         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3093
3094         /*
3095          * Copy each region from the possibly compacted offset to the
3096          * non-compacted offset.
3097          */
3098         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3099         while (valid) {
3100                 u64 feature = valid & -valid;
3101                 int index = fls64(feature) - 1;
3102                 void *src = get_xsave_addr(xsave, feature);
3103
3104                 if (src) {
3105                         u32 size, offset, ecx, edx;
3106                         cpuid_count(XSTATE_CPUID, index,
3107                                     &size, &offset, &ecx, &edx);
3108                         memcpy(dest + offset, src, size);
3109                 }
3110
3111                 valid -= feature;
3112         }
3113 }
3114
3115 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3116 {
3117         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3118         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3119         u64 valid;
3120
3121         /*
3122          * Copy legacy XSAVE area, to avoid complications with CPUID
3123          * leaves 0 and 1 in the loop below.
3124          */
3125         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3126
3127         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3128         xsave->header.xfeatures = xstate_bv;
3129         if (boot_cpu_has(X86_FEATURE_XSAVES))
3130                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3131
3132         /*
3133          * Copy each region from the non-compacted offset to the
3134          * possibly compacted offset.
3135          */
3136         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3137         while (valid) {
3138                 u64 feature = valid & -valid;
3139                 int index = fls64(feature) - 1;
3140                 void *dest = get_xsave_addr(xsave, feature);
3141
3142                 if (dest) {
3143                         u32 size, offset, ecx, edx;
3144                         cpuid_count(XSTATE_CPUID, index,
3145                                     &size, &offset, &ecx, &edx);
3146                         memcpy(dest, src + offset, size);
3147                 }
3148
3149                 valid -= feature;
3150         }
3151 }
3152
3153 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3154                                          struct kvm_xsave *guest_xsave)
3155 {
3156         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3157                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3158                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3159         } else {
3160                 memcpy(guest_xsave->region,
3161                         &vcpu->arch.guest_fpu.state.fxsave,
3162                         sizeof(struct fxregs_state));
3163                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3164                         XFEATURE_MASK_FPSSE;
3165         }
3166 }
3167
3168 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3169                                         struct kvm_xsave *guest_xsave)
3170 {
3171         u64 xstate_bv =
3172                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3173
3174         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3175                 /*
3176                  * Here we allow setting states that are not present in
3177                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3178                  * with old userspace.
3179                  */
3180                 if (xstate_bv & ~kvm_supported_xcr0())
3181                         return -EINVAL;
3182                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3183         } else {
3184                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3185                         return -EINVAL;
3186                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3187                         guest_xsave->region, sizeof(struct fxregs_state));
3188         }
3189         return 0;
3190 }
3191
3192 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3193                                         struct kvm_xcrs *guest_xcrs)
3194 {
3195         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3196                 guest_xcrs->nr_xcrs = 0;
3197                 return;
3198         }
3199
3200         guest_xcrs->nr_xcrs = 1;
3201         guest_xcrs->flags = 0;
3202         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3203         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3204 }
3205
3206 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3207                                        struct kvm_xcrs *guest_xcrs)
3208 {
3209         int i, r = 0;
3210
3211         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3212                 return -EINVAL;
3213
3214         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3215                 return -EINVAL;
3216
3217         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3218                 /* Only support XCR0 currently */
3219                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3220                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3221                                 guest_xcrs->xcrs[i].value);
3222                         break;
3223                 }
3224         if (r)
3225                 r = -EINVAL;
3226         return r;
3227 }
3228
3229 /*
3230  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3231  * stopped by the hypervisor.  This function will be called from the host only.
3232  * EINVAL is returned when the host attempts to set the flag for a guest that
3233  * does not support pv clocks.
3234  */
3235 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3236 {
3237         if (!vcpu->arch.pv_time_enabled)
3238                 return -EINVAL;
3239         vcpu->arch.pvclock_set_guest_stopped_request = true;
3240         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3241         return 0;
3242 }
3243
3244 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3245                                      struct kvm_enable_cap *cap)
3246 {
3247         if (cap->flags)
3248                 return -EINVAL;
3249
3250         switch (cap->cap) {
3251         case KVM_CAP_HYPERV_SYNIC:
3252                 return kvm_hv_activate_synic(vcpu);
3253         default:
3254                 return -EINVAL;
3255         }
3256 }
3257
3258 long kvm_arch_vcpu_ioctl(struct file *filp,
3259                          unsigned int ioctl, unsigned long arg)
3260 {
3261         struct kvm_vcpu *vcpu = filp->private_data;
3262         void __user *argp = (void __user *)arg;
3263         int r;
3264         union {
3265                 struct kvm_lapic_state *lapic;
3266                 struct kvm_xsave *xsave;
3267                 struct kvm_xcrs *xcrs;
3268                 void *buffer;
3269         } u;
3270
3271         u.buffer = NULL;
3272         switch (ioctl) {
3273         case KVM_GET_LAPIC: {
3274                 r = -EINVAL;
3275                 if (!lapic_in_kernel(vcpu))
3276                         goto out;
3277                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3278
3279                 r = -ENOMEM;
3280                 if (!u.lapic)
3281                         goto out;
3282                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3283                 if (r)
3284                         goto out;
3285                 r = -EFAULT;
3286                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3287                         goto out;
3288                 r = 0;
3289                 break;
3290         }
3291         case KVM_SET_LAPIC: {
3292                 r = -EINVAL;
3293                 if (!lapic_in_kernel(vcpu))
3294                         goto out;
3295                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3296                 if (IS_ERR(u.lapic))
3297                         return PTR_ERR(u.lapic);
3298
3299                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3300                 break;
3301         }
3302         case KVM_INTERRUPT: {
3303                 struct kvm_interrupt irq;
3304
3305                 r = -EFAULT;
3306                 if (copy_from_user(&irq, argp, sizeof irq))
3307                         goto out;
3308                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3309                 break;
3310         }
3311         case KVM_NMI: {
3312                 r = kvm_vcpu_ioctl_nmi(vcpu);
3313                 break;
3314         }
3315         case KVM_SMI: {
3316                 r = kvm_vcpu_ioctl_smi(vcpu);
3317                 break;
3318         }
3319         case KVM_SET_CPUID: {
3320                 struct kvm_cpuid __user *cpuid_arg = argp;
3321                 struct kvm_cpuid cpuid;
3322
3323                 r = -EFAULT;
3324                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3325                         goto out;
3326                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3327                 break;
3328         }
3329         case KVM_SET_CPUID2: {
3330                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3331                 struct kvm_cpuid2 cpuid;
3332
3333                 r = -EFAULT;
3334                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3335                         goto out;
3336                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3337                                               cpuid_arg->entries);
3338                 break;
3339         }
3340         case KVM_GET_CPUID2: {
3341                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3342                 struct kvm_cpuid2 cpuid;
3343
3344                 r = -EFAULT;
3345                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3346                         goto out;
3347                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3348                                               cpuid_arg->entries);
3349                 if (r)
3350                         goto out;
3351                 r = -EFAULT;
3352                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3353                         goto out;
3354                 r = 0;
3355                 break;
3356         }
3357         case KVM_GET_MSRS:
3358                 r = msr_io(vcpu, argp, do_get_msr, 1);
3359                 break;
3360         case KVM_SET_MSRS:
3361                 r = msr_io(vcpu, argp, do_set_msr, 0);
3362                 break;
3363         case KVM_TPR_ACCESS_REPORTING: {
3364                 struct kvm_tpr_access_ctl tac;
3365
3366                 r = -EFAULT;
3367                 if (copy_from_user(&tac, argp, sizeof tac))
3368                         goto out;
3369                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3370                 if (r)
3371                         goto out;
3372                 r = -EFAULT;
3373                 if (copy_to_user(argp, &tac, sizeof tac))
3374                         goto out;
3375                 r = 0;
3376                 break;
3377         };
3378         case KVM_SET_VAPIC_ADDR: {
3379                 struct kvm_vapic_addr va;
3380
3381                 r = -EINVAL;
3382                 if (!lapic_in_kernel(vcpu))
3383                         goto out;
3384                 r = -EFAULT;
3385                 if (copy_from_user(&va, argp, sizeof va))
3386                         goto out;
3387                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3388                 break;
3389         }
3390         case KVM_X86_SETUP_MCE: {
3391                 u64 mcg_cap;
3392
3393                 r = -EFAULT;
3394                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3395                         goto out;
3396                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3397                 break;
3398         }
3399         case KVM_X86_SET_MCE: {
3400                 struct kvm_x86_mce mce;
3401
3402                 r = -EFAULT;
3403                 if (copy_from_user(&mce, argp, sizeof mce))
3404                         goto out;
3405                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3406                 break;
3407         }
3408         case KVM_GET_VCPU_EVENTS: {
3409                 struct kvm_vcpu_events events;
3410
3411                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3412
3413                 r = -EFAULT;
3414                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3415                         break;
3416                 r = 0;
3417                 break;
3418         }
3419         case KVM_SET_VCPU_EVENTS: {
3420                 struct kvm_vcpu_events events;
3421
3422                 r = -EFAULT;
3423                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3424                         break;
3425
3426                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3427                 break;
3428         }
3429         case KVM_GET_DEBUGREGS: {
3430                 struct kvm_debugregs dbgregs;
3431
3432                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3433
3434                 r = -EFAULT;
3435                 if (copy_to_user(argp, &dbgregs,
3436                                  sizeof(struct kvm_debugregs)))
3437                         break;
3438                 r = 0;
3439                 break;
3440         }
3441         case KVM_SET_DEBUGREGS: {
3442                 struct kvm_debugregs dbgregs;
3443
3444                 r = -EFAULT;
3445                 if (copy_from_user(&dbgregs, argp,
3446                                    sizeof(struct kvm_debugregs)))
3447                         break;
3448
3449                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3450                 break;
3451         }
3452         case KVM_GET_XSAVE: {
3453                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3454                 r = -ENOMEM;
3455                 if (!u.xsave)
3456                         break;
3457
3458                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3459
3460                 r = -EFAULT;
3461                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3462                         break;
3463                 r = 0;
3464                 break;
3465         }
3466         case KVM_SET_XSAVE: {
3467                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3468                 if (IS_ERR(u.xsave))
3469                         return PTR_ERR(u.xsave);
3470
3471                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3472                 break;
3473         }
3474         case KVM_GET_XCRS: {
3475                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3476                 r = -ENOMEM;
3477                 if (!u.xcrs)
3478                         break;
3479
3480                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3481
3482                 r = -EFAULT;
3483                 if (copy_to_user(argp, u.xcrs,
3484                                  sizeof(struct kvm_xcrs)))
3485                         break;
3486                 r = 0;
3487                 break;
3488         }
3489         case KVM_SET_XCRS: {
3490                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3491                 if (IS_ERR(u.xcrs))
3492                         return PTR_ERR(u.xcrs);
3493
3494                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3495                 break;
3496         }
3497         case KVM_SET_TSC_KHZ: {
3498                 u32 user_tsc_khz;
3499
3500                 r = -EINVAL;
3501                 user_tsc_khz = (u32)arg;
3502
3503                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3504                         goto out;
3505
3506                 if (user_tsc_khz == 0)
3507                         user_tsc_khz = tsc_khz;
3508
3509                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3510                         r = 0;
3511
3512                 goto out;
3513         }
3514         case KVM_GET_TSC_KHZ: {
3515                 r = vcpu->arch.virtual_tsc_khz;
3516                 goto out;
3517         }
3518         case KVM_KVMCLOCK_CTRL: {
3519                 r = kvm_set_guest_paused(vcpu);
3520                 goto out;
3521         }
3522         case KVM_ENABLE_CAP: {
3523                 struct kvm_enable_cap cap;
3524
3525                 r = -EFAULT;
3526                 if (copy_from_user(&cap, argp, sizeof(cap)))
3527                         goto out;
3528                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3529                 break;
3530         }
3531         default:
3532                 r = -EINVAL;
3533         }
3534 out:
3535         kfree(u.buffer);
3536         return r;
3537 }
3538
3539 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3540 {
3541         return VM_FAULT_SIGBUS;
3542 }
3543
3544 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3545 {
3546         int ret;
3547
3548         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3549                 return -EINVAL;
3550         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3551         return ret;
3552 }
3553
3554 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3555                                               u64 ident_addr)
3556 {
3557         kvm->arch.ept_identity_map_addr = ident_addr;
3558         return 0;
3559 }
3560
3561 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3562                                           u32 kvm_nr_mmu_pages)
3563 {
3564         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3565                 return -EINVAL;
3566
3567         mutex_lock(&kvm->slots_lock);
3568
3569         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3570         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3571
3572         mutex_unlock(&kvm->slots_lock);
3573         return 0;
3574 }
3575
3576 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3577 {
3578         return kvm->arch.n_max_mmu_pages;
3579 }
3580
3581 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3582 {
3583         int r;
3584
3585         r = 0;
3586         switch (chip->chip_id) {
3587         case KVM_IRQCHIP_PIC_MASTER:
3588                 memcpy(&chip->chip.pic,
3589                         &pic_irqchip(kvm)->pics[0],
3590                         sizeof(struct kvm_pic_state));
3591                 break;
3592         case KVM_IRQCHIP_PIC_SLAVE:
3593                 memcpy(&chip->chip.pic,
3594                         &pic_irqchip(kvm)->pics[1],
3595                         sizeof(struct kvm_pic_state));
3596                 break;
3597         case KVM_IRQCHIP_IOAPIC:
3598                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3599                 break;
3600         default:
3601                 r = -EINVAL;
3602                 break;
3603         }
3604         return r;
3605 }
3606
3607 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3608 {
3609         int r;
3610
3611         r = 0;
3612         switch (chip->chip_id) {
3613         case KVM_IRQCHIP_PIC_MASTER:
3614                 spin_lock(&pic_irqchip(kvm)->lock);
3615                 memcpy(&pic_irqchip(kvm)->pics[0],
3616                         &chip->chip.pic,
3617                         sizeof(struct kvm_pic_state));
3618                 spin_unlock(&pic_irqchip(kvm)->lock);
3619                 break;
3620         case KVM_IRQCHIP_PIC_SLAVE:
3621                 spin_lock(&pic_irqchip(kvm)->lock);
3622                 memcpy(&pic_irqchip(kvm)->pics[1],
3623                         &chip->chip.pic,
3624                         sizeof(struct kvm_pic_state));
3625                 spin_unlock(&pic_irqchip(kvm)->lock);
3626                 break;
3627         case KVM_IRQCHIP_IOAPIC:
3628                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3629                 break;
3630         default:
3631                 r = -EINVAL;
3632                 break;
3633         }
3634         kvm_pic_update_irq(pic_irqchip(kvm));
3635         return r;
3636 }
3637
3638 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3639 {
3640         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3641
3642         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3643
3644         mutex_lock(&kps->lock);
3645         memcpy(ps, &kps->channels, sizeof(*ps));
3646         mutex_unlock(&kps->lock);
3647         return 0;
3648 }
3649
3650 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3651 {
3652         int i;
3653         struct kvm_pit *pit = kvm->arch.vpit;
3654
3655         mutex_lock(&pit->pit_state.lock);
3656         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3657         for (i = 0; i < 3; i++)
3658                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3659         mutex_unlock(&pit->pit_state.lock);
3660         return 0;
3661 }
3662
3663 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3664 {
3665         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3666         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3667                 sizeof(ps->channels));
3668         ps->flags = kvm->arch.vpit->pit_state.flags;
3669         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3670         memset(&ps->reserved, 0, sizeof(ps->reserved));
3671         return 0;
3672 }
3673
3674 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3675 {
3676         int start = 0;
3677         int i;
3678         u32 prev_legacy, cur_legacy;
3679         struct kvm_pit *pit = kvm->arch.vpit;
3680
3681         mutex_lock(&pit->pit_state.lock);
3682         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3683         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3684         if (!prev_legacy && cur_legacy)
3685                 start = 1;
3686         memcpy(&pit->pit_state.channels, &ps->channels,
3687                sizeof(pit->pit_state.channels));
3688         pit->pit_state.flags = ps->flags;
3689         for (i = 0; i < 3; i++)
3690                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3691                                    start && i == 0);
3692         mutex_unlock(&pit->pit_state.lock);
3693         return 0;
3694 }
3695
3696 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3697                                  struct kvm_reinject_control *control)
3698 {
3699         struct kvm_pit *pit = kvm->arch.vpit;
3700
3701         if (!pit)
3702                 return -ENXIO;
3703
3704         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3705          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3706          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3707          */
3708         mutex_lock(&pit->pit_state.lock);
3709         kvm_pit_set_reinject(pit, control->pit_reinject);
3710         mutex_unlock(&pit->pit_state.lock);
3711
3712         return 0;
3713 }
3714
3715 /**
3716  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3717  * @kvm: kvm instance
3718  * @log: slot id and address to which we copy the log
3719  *
3720  * Steps 1-4 below provide general overview of dirty page logging. See
3721  * kvm_get_dirty_log_protect() function description for additional details.
3722  *
3723  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3724  * always flush the TLB (step 4) even if previous step failed  and the dirty
3725  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3726  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3727  * writes will be marked dirty for next log read.
3728  *
3729  *   1. Take a snapshot of the bit and clear it if needed.
3730  *   2. Write protect the corresponding page.
3731  *   3. Copy the snapshot to the userspace.
3732  *   4. Flush TLB's if needed.
3733  */
3734 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3735 {
3736         bool is_dirty = false;
3737         int r;
3738
3739         mutex_lock(&kvm->slots_lock);
3740
3741         /*
3742          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3743          */
3744         if (kvm_x86_ops->flush_log_dirty)
3745                 kvm_x86_ops->flush_log_dirty(kvm);
3746
3747         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3748
3749         /*
3750          * All the TLBs can be flushed out of mmu lock, see the comments in
3751          * kvm_mmu_slot_remove_write_access().
3752          */
3753         lockdep_assert_held(&kvm->slots_lock);
3754         if (is_dirty)
3755                 kvm_flush_remote_tlbs(kvm);
3756
3757         mutex_unlock(&kvm->slots_lock);
3758         return r;
3759 }
3760
3761 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3762                         bool line_status)
3763 {
3764         if (!irqchip_in_kernel(kvm))
3765                 return -ENXIO;
3766
3767         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3768                                         irq_event->irq, irq_event->level,
3769                                         line_status);
3770         return 0;
3771 }
3772
3773 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3774                                    struct kvm_enable_cap *cap)
3775 {
3776         int r;
3777
3778         if (cap->flags)
3779                 return -EINVAL;
3780
3781         switch (cap->cap) {
3782         case KVM_CAP_DISABLE_QUIRKS:
3783                 kvm->arch.disabled_quirks = cap->args[0];
3784                 r = 0;
3785                 break;
3786         case KVM_CAP_SPLIT_IRQCHIP: {
3787                 mutex_lock(&kvm->lock);
3788                 r = -EINVAL;
3789                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3790                         goto split_irqchip_unlock;
3791                 r = -EEXIST;
3792                 if (irqchip_in_kernel(kvm))
3793                         goto split_irqchip_unlock;
3794                 if (kvm->created_vcpus)
3795                         goto split_irqchip_unlock;
3796                 r = kvm_setup_empty_irq_routing(kvm);
3797                 if (r)
3798                         goto split_irqchip_unlock;
3799                 /* Pairs with irqchip_in_kernel. */
3800                 smp_wmb();
3801                 kvm->arch.irqchip_split = true;
3802                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3803                 r = 0;
3804 split_irqchip_unlock:
3805                 mutex_unlock(&kvm->lock);
3806                 break;
3807         }
3808         case KVM_CAP_X2APIC_API:
3809                 r = -EINVAL;
3810                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
3811                         break;
3812
3813                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
3814                         kvm->arch.x2apic_format = true;
3815                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
3816                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
3817
3818                 r = 0;
3819                 break;
3820         default:
3821                 r = -EINVAL;
3822                 break;
3823         }
3824         return r;
3825 }
3826
3827 long kvm_arch_vm_ioctl(struct file *filp,
3828                        unsigned int ioctl, unsigned long arg)
3829 {
3830         struct kvm *kvm = filp->private_data;
3831         void __user *argp = (void __user *)arg;
3832         int r = -ENOTTY;
3833         /*
3834          * This union makes it completely explicit to gcc-3.x
3835          * that these two variables' stack usage should be
3836          * combined, not added together.
3837          */
3838         union {
3839                 struct kvm_pit_state ps;
3840                 struct kvm_pit_state2 ps2;
3841                 struct kvm_pit_config pit_config;
3842         } u;
3843
3844         switch (ioctl) {
3845         case KVM_SET_TSS_ADDR:
3846                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3847                 break;
3848         case KVM_SET_IDENTITY_MAP_ADDR: {
3849                 u64 ident_addr;
3850
3851                 r = -EFAULT;
3852                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3853                         goto out;
3854                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3855                 break;
3856         }
3857         case KVM_SET_NR_MMU_PAGES:
3858                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3859                 break;
3860         case KVM_GET_NR_MMU_PAGES:
3861                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3862                 break;
3863         case KVM_CREATE_IRQCHIP: {
3864                 struct kvm_pic *vpic;
3865
3866                 mutex_lock(&kvm->lock);
3867                 r = -EEXIST;
3868                 if (kvm->arch.vpic)
3869                         goto create_irqchip_unlock;
3870                 r = -EINVAL;
3871                 if (kvm->created_vcpus)
3872                         goto create_irqchip_unlock;
3873                 r = -ENOMEM;
3874                 vpic = kvm_create_pic(kvm);
3875                 if (vpic) {
3876                         r = kvm_ioapic_init(kvm);
3877                         if (r) {
3878                                 mutex_lock(&kvm->slots_lock);
3879                                 kvm_destroy_pic(vpic);
3880                                 mutex_unlock(&kvm->slots_lock);
3881                                 goto create_irqchip_unlock;
3882                         }
3883                 } else
3884                         goto create_irqchip_unlock;
3885                 r = kvm_setup_default_irq_routing(kvm);
3886                 if (r) {
3887                         mutex_lock(&kvm->slots_lock);
3888                         mutex_lock(&kvm->irq_lock);
3889                         kvm_ioapic_destroy(kvm);
3890                         kvm_destroy_pic(vpic);
3891                         mutex_unlock(&kvm->irq_lock);
3892                         mutex_unlock(&kvm->slots_lock);
3893                         goto create_irqchip_unlock;
3894                 }
3895                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3896                 smp_wmb();
3897                 kvm->arch.vpic = vpic;
3898         create_irqchip_unlock:
3899                 mutex_unlock(&kvm->lock);
3900                 break;
3901         }
3902         case KVM_CREATE_PIT:
3903                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3904                 goto create_pit;
3905         case KVM_CREATE_PIT2:
3906                 r = -EFAULT;
3907                 if (copy_from_user(&u.pit_config, argp,
3908                                    sizeof(struct kvm_pit_config)))
3909                         goto out;
3910         create_pit:
3911                 mutex_lock(&kvm->lock);
3912                 r = -EEXIST;
3913                 if (kvm->arch.vpit)
3914                         goto create_pit_unlock;
3915                 r = -ENOMEM;
3916                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3917                 if (kvm->arch.vpit)
3918                         r = 0;
3919         create_pit_unlock:
3920                 mutex_unlock(&kvm->lock);
3921                 break;
3922         case KVM_GET_IRQCHIP: {
3923                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3924                 struct kvm_irqchip *chip;
3925
3926                 chip = memdup_user(argp, sizeof(*chip));
3927                 if (IS_ERR(chip)) {
3928                         r = PTR_ERR(chip);
3929                         goto out;
3930                 }
3931
3932                 r = -ENXIO;
3933                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3934                         goto get_irqchip_out;
3935                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3936                 if (r)
3937                         goto get_irqchip_out;
3938                 r = -EFAULT;
3939                 if (copy_to_user(argp, chip, sizeof *chip))
3940                         goto get_irqchip_out;
3941                 r = 0;
3942         get_irqchip_out:
3943                 kfree(chip);
3944                 break;
3945         }
3946         case KVM_SET_IRQCHIP: {
3947                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3948                 struct kvm_irqchip *chip;
3949
3950                 chip = memdup_user(argp, sizeof(*chip));
3951                 if (IS_ERR(chip)) {
3952                         r = PTR_ERR(chip);
3953                         goto out;
3954                 }
3955
3956                 r = -ENXIO;
3957                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3958                         goto set_irqchip_out;
3959                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3960                 if (r)
3961                         goto set_irqchip_out;
3962                 r = 0;
3963         set_irqchip_out:
3964                 kfree(chip);
3965                 break;
3966         }
3967         case KVM_GET_PIT: {
3968                 r = -EFAULT;
3969                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3970                         goto out;
3971                 r = -ENXIO;
3972                 if (!kvm->arch.vpit)
3973                         goto out;
3974                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3975                 if (r)
3976                         goto out;
3977                 r = -EFAULT;
3978                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3979                         goto out;
3980                 r = 0;
3981                 break;
3982         }
3983         case KVM_SET_PIT: {
3984                 r = -EFAULT;
3985                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3986                         goto out;
3987                 r = -ENXIO;
3988                 if (!kvm->arch.vpit)
3989                         goto out;
3990                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3991                 break;
3992         }
3993         case KVM_GET_PIT2: {
3994                 r = -ENXIO;
3995                 if (!kvm->arch.vpit)
3996                         goto out;
3997                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3998                 if (r)
3999                         goto out;
4000                 r = -EFAULT;
4001                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4002                         goto out;
4003                 r = 0;
4004                 break;
4005         }
4006         case KVM_SET_PIT2: {
4007                 r = -EFAULT;
4008                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4009                         goto out;
4010                 r = -ENXIO;
4011                 if (!kvm->arch.vpit)
4012                         goto out;
4013                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4014                 break;
4015         }
4016         case KVM_REINJECT_CONTROL: {
4017                 struct kvm_reinject_control control;
4018                 r =  -EFAULT;
4019                 if (copy_from_user(&control, argp, sizeof(control)))
4020                         goto out;
4021                 r = kvm_vm_ioctl_reinject(kvm, &control);
4022                 break;
4023         }
4024         case KVM_SET_BOOT_CPU_ID:
4025                 r = 0;
4026                 mutex_lock(&kvm->lock);
4027                 if (kvm->created_vcpus)
4028                         r = -EBUSY;
4029                 else
4030                         kvm->arch.bsp_vcpu_id = arg;
4031                 mutex_unlock(&kvm->lock);
4032                 break;
4033         case KVM_XEN_HVM_CONFIG: {
4034                 r = -EFAULT;
4035                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4036                                    sizeof(struct kvm_xen_hvm_config)))
4037                         goto out;
4038                 r = -EINVAL;
4039                 if (kvm->arch.xen_hvm_config.flags)
4040                         goto out;
4041                 r = 0;
4042                 break;
4043         }
4044         case KVM_SET_CLOCK: {
4045                 struct kvm_clock_data user_ns;
4046                 u64 now_ns;
4047                 s64 delta;
4048
4049                 r = -EFAULT;
4050                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4051                         goto out;
4052
4053                 r = -EINVAL;
4054                 if (user_ns.flags)
4055                         goto out;
4056
4057                 r = 0;
4058                 local_irq_disable();
4059                 now_ns = get_kernel_ns();
4060                 delta = user_ns.clock - now_ns;
4061                 local_irq_enable();
4062                 kvm->arch.kvmclock_offset = delta;
4063                 kvm_gen_update_masterclock(kvm);
4064                 break;
4065         }
4066         case KVM_GET_CLOCK: {
4067                 struct kvm_clock_data user_ns;
4068                 u64 now_ns;
4069
4070                 local_irq_disable();
4071                 now_ns = get_kernel_ns();
4072                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
4073                 local_irq_enable();
4074                 user_ns.flags = 0;
4075                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4076
4077                 r = -EFAULT;
4078                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4079                         goto out;
4080                 r = 0;
4081                 break;
4082         }
4083         case KVM_ENABLE_CAP: {
4084                 struct kvm_enable_cap cap;
4085
4086                 r = -EFAULT;
4087                 if (copy_from_user(&cap, argp, sizeof(cap)))
4088                         goto out;
4089                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4090                 break;
4091         }
4092         default:
4093                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4094         }
4095 out:
4096         return r;
4097 }
4098
4099 static void kvm_init_msr_list(void)
4100 {
4101         u32 dummy[2];
4102         unsigned i, j;
4103
4104         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4105                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4106                         continue;
4107
4108                 /*
4109                  * Even MSRs that are valid in the host may not be exposed
4110                  * to the guests in some cases.
4111                  */
4112                 switch (msrs_to_save[i]) {
4113                 case MSR_IA32_BNDCFGS:
4114                         if (!kvm_x86_ops->mpx_supported())
4115                                 continue;
4116                         break;
4117                 case MSR_TSC_AUX:
4118                         if (!kvm_x86_ops->rdtscp_supported())
4119                                 continue;
4120                         break;
4121                 default:
4122                         break;
4123                 }
4124
4125                 if (j < i)
4126                         msrs_to_save[j] = msrs_to_save[i];
4127                 j++;
4128         }
4129         num_msrs_to_save = j;
4130
4131         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4132                 switch (emulated_msrs[i]) {
4133                 case MSR_IA32_SMBASE:
4134                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4135                                 continue;
4136                         break;
4137                 default:
4138                         break;
4139                 }
4140
4141                 if (j < i)
4142                         emulated_msrs[j] = emulated_msrs[i];
4143                 j++;
4144         }
4145         num_emulated_msrs = j;
4146 }
4147
4148 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4149                            const void *v)
4150 {
4151         int handled = 0;
4152         int n;
4153
4154         do {
4155                 n = min(len, 8);
4156                 if (!(lapic_in_kernel(vcpu) &&
4157                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4158                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4159                         break;
4160                 handled += n;
4161                 addr += n;
4162                 len -= n;
4163                 v += n;
4164         } while (len);
4165
4166         return handled;
4167 }
4168
4169 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4170 {
4171         int handled = 0;
4172         int n;
4173
4174         do {
4175                 n = min(len, 8);
4176                 if (!(lapic_in_kernel(vcpu) &&
4177                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4178                                          addr, n, v))
4179                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4180                         break;
4181                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4182                 handled += n;
4183                 addr += n;
4184                 len -= n;
4185                 v += n;
4186         } while (len);
4187
4188         return handled;
4189 }
4190
4191 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4192                         struct kvm_segment *var, int seg)
4193 {
4194         kvm_x86_ops->set_segment(vcpu, var, seg);
4195 }
4196
4197 void kvm_get_segment(struct kvm_vcpu *vcpu,
4198                      struct kvm_segment *var, int seg)
4199 {
4200         kvm_x86_ops->get_segment(vcpu, var, seg);
4201 }
4202
4203 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4204                            struct x86_exception *exception)
4205 {
4206         gpa_t t_gpa;
4207
4208         BUG_ON(!mmu_is_nested(vcpu));
4209
4210         /* NPT walks are always user-walks */
4211         access |= PFERR_USER_MASK;
4212         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4213
4214         return t_gpa;
4215 }
4216
4217 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4218                               struct x86_exception *exception)
4219 {
4220         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4221         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4222 }
4223
4224  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4225                                 struct x86_exception *exception)
4226 {
4227         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4228         access |= PFERR_FETCH_MASK;
4229         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4230 }
4231
4232 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4233                                struct x86_exception *exception)
4234 {
4235         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4236         access |= PFERR_WRITE_MASK;
4237         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4238 }
4239
4240 /* uses this to access any guest's mapped memory without checking CPL */
4241 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4242                                 struct x86_exception *exception)
4243 {
4244         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4245 }
4246
4247 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4248                                       struct kvm_vcpu *vcpu, u32 access,
4249                                       struct x86_exception *exception)
4250 {
4251         void *data = val;
4252         int r = X86EMUL_CONTINUE;
4253
4254         while (bytes) {
4255                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4256                                                             exception);
4257                 unsigned offset = addr & (PAGE_SIZE-1);
4258                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4259                 int ret;
4260
4261                 if (gpa == UNMAPPED_GVA)
4262                         return X86EMUL_PROPAGATE_FAULT;
4263                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4264                                                offset, toread);
4265                 if (ret < 0) {
4266                         r = X86EMUL_IO_NEEDED;
4267                         goto out;
4268                 }
4269
4270                 bytes -= toread;
4271                 data += toread;
4272                 addr += toread;
4273         }
4274 out:
4275         return r;
4276 }
4277
4278 /* used for instruction fetching */
4279 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4280                                 gva_t addr, void *val, unsigned int bytes,
4281                                 struct x86_exception *exception)
4282 {
4283         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4284         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4285         unsigned offset;
4286         int ret;
4287
4288         /* Inline kvm_read_guest_virt_helper for speed.  */
4289         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4290                                                     exception);
4291         if (unlikely(gpa == UNMAPPED_GVA))
4292                 return X86EMUL_PROPAGATE_FAULT;
4293
4294         offset = addr & (PAGE_SIZE-1);
4295         if (WARN_ON(offset + bytes > PAGE_SIZE))
4296                 bytes = (unsigned)PAGE_SIZE - offset;
4297         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4298                                        offset, bytes);
4299         if (unlikely(ret < 0))
4300                 return X86EMUL_IO_NEEDED;
4301
4302         return X86EMUL_CONTINUE;
4303 }
4304
4305 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4306                                gva_t addr, void *val, unsigned int bytes,
4307                                struct x86_exception *exception)
4308 {
4309         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4310         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4311
4312         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4313                                           exception);
4314 }
4315 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4316
4317 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4318                                       gva_t addr, void *val, unsigned int bytes,
4319                                       struct x86_exception *exception)
4320 {
4321         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4322         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4323 }
4324
4325 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4326                 unsigned long addr, void *val, unsigned int bytes)
4327 {
4328         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4329         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4330
4331         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4332 }
4333
4334 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4335                                        gva_t addr, void *val,
4336                                        unsigned int bytes,
4337                                        struct x86_exception *exception)
4338 {
4339         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4340         void *data = val;
4341         int r = X86EMUL_CONTINUE;
4342
4343         while (bytes) {
4344                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4345                                                              PFERR_WRITE_MASK,
4346                                                              exception);
4347                 unsigned offset = addr & (PAGE_SIZE-1);
4348                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4349                 int ret;
4350
4351                 if (gpa == UNMAPPED_GVA)
4352                         return X86EMUL_PROPAGATE_FAULT;
4353                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4354                 if (ret < 0) {
4355                         r = X86EMUL_IO_NEEDED;
4356                         goto out;
4357                 }
4358
4359                 bytes -= towrite;
4360                 data += towrite;
4361                 addr += towrite;
4362         }
4363 out:
4364         return r;
4365 }
4366 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4367
4368 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4369                                 gpa_t *gpa, struct x86_exception *exception,
4370                                 bool write)
4371 {
4372         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4373                 | (write ? PFERR_WRITE_MASK : 0);
4374
4375         /*
4376          * currently PKRU is only applied to ept enabled guest so
4377          * there is no pkey in EPT page table for L1 guest or EPT
4378          * shadow page table for L2 guest.
4379          */
4380         if (vcpu_match_mmio_gva(vcpu, gva)
4381             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4382                                  vcpu->arch.access, 0, access)) {
4383                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4384                                         (gva & (PAGE_SIZE - 1));
4385                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4386                 return 1;
4387         }
4388
4389         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4390
4391         if (*gpa == UNMAPPED_GVA)
4392                 return -1;
4393
4394         /* For APIC access vmexit */
4395         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4396                 return 1;
4397
4398         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4399                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4400                 return 1;
4401         }
4402
4403         return 0;
4404 }
4405
4406 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4407                         const void *val, int bytes)
4408 {
4409         int ret;
4410
4411         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4412         if (ret < 0)
4413                 return 0;
4414         kvm_page_track_write(vcpu, gpa, val, bytes);
4415         return 1;
4416 }
4417
4418 struct read_write_emulator_ops {
4419         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4420                                   int bytes);
4421         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4422                                   void *val, int bytes);
4423         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4424                                int bytes, void *val);
4425         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4426                                     void *val, int bytes);
4427         bool write;
4428 };
4429
4430 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4431 {
4432         if (vcpu->mmio_read_completed) {
4433                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4434                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4435                 vcpu->mmio_read_completed = 0;
4436                 return 1;
4437         }
4438
4439         return 0;
4440 }
4441
4442 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4443                         void *val, int bytes)
4444 {
4445         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4446 }
4447
4448 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4449                          void *val, int bytes)
4450 {
4451         return emulator_write_phys(vcpu, gpa, val, bytes);
4452 }
4453
4454 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4455 {
4456         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4457         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4458 }
4459
4460 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4461                           void *val, int bytes)
4462 {
4463         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4464         return X86EMUL_IO_NEEDED;
4465 }
4466
4467 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4468                            void *val, int bytes)
4469 {
4470         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4471
4472         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4473         return X86EMUL_CONTINUE;
4474 }
4475
4476 static const struct read_write_emulator_ops read_emultor = {
4477         .read_write_prepare = read_prepare,
4478         .read_write_emulate = read_emulate,
4479         .read_write_mmio = vcpu_mmio_read,
4480         .read_write_exit_mmio = read_exit_mmio,
4481 };
4482
4483 static const struct read_write_emulator_ops write_emultor = {
4484         .read_write_emulate = write_emulate,
4485         .read_write_mmio = write_mmio,
4486         .read_write_exit_mmio = write_exit_mmio,
4487         .write = true,
4488 };
4489
4490 static int emulator_read_write_onepage(unsigned long addr, void *val,
4491                                        unsigned int bytes,
4492                                        struct x86_exception *exception,
4493                                        struct kvm_vcpu *vcpu,
4494                                        const struct read_write_emulator_ops *ops)
4495 {
4496         gpa_t gpa;
4497         int handled, ret;
4498         bool write = ops->write;
4499         struct kvm_mmio_fragment *frag;
4500
4501         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4502
4503         if (ret < 0)
4504                 return X86EMUL_PROPAGATE_FAULT;
4505
4506         /* For APIC access vmexit */
4507         if (ret)
4508                 goto mmio;
4509
4510         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4511                 return X86EMUL_CONTINUE;
4512
4513 mmio:
4514         /*
4515          * Is this MMIO handled locally?
4516          */
4517         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4518         if (handled == bytes)
4519                 return X86EMUL_CONTINUE;
4520
4521         gpa += handled;
4522         bytes -= handled;
4523         val += handled;
4524
4525         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4526         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4527         frag->gpa = gpa;
4528         frag->data = val;
4529         frag->len = bytes;
4530         return X86EMUL_CONTINUE;
4531 }
4532
4533 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4534                         unsigned long addr,
4535                         void *val, unsigned int bytes,
4536                         struct x86_exception *exception,
4537                         const struct read_write_emulator_ops *ops)
4538 {
4539         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4540         gpa_t gpa;
4541         int rc;
4542
4543         if (ops->read_write_prepare &&
4544                   ops->read_write_prepare(vcpu, val, bytes))
4545                 return X86EMUL_CONTINUE;
4546
4547         vcpu->mmio_nr_fragments = 0;
4548
4549         /* Crossing a page boundary? */
4550         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4551                 int now;
4552
4553                 now = -addr & ~PAGE_MASK;
4554                 rc = emulator_read_write_onepage(addr, val, now, exception,
4555                                                  vcpu, ops);
4556
4557                 if (rc != X86EMUL_CONTINUE)
4558                         return rc;
4559                 addr += now;
4560                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4561                         addr = (u32)addr;
4562                 val += now;
4563                 bytes -= now;
4564         }
4565
4566         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4567                                          vcpu, ops);
4568         if (rc != X86EMUL_CONTINUE)
4569                 return rc;
4570
4571         if (!vcpu->mmio_nr_fragments)
4572                 return rc;
4573
4574         gpa = vcpu->mmio_fragments[0].gpa;
4575
4576         vcpu->mmio_needed = 1;
4577         vcpu->mmio_cur_fragment = 0;
4578
4579         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4580         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4581         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4582         vcpu->run->mmio.phys_addr = gpa;
4583
4584         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4585 }
4586
4587 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4588                                   unsigned long addr,
4589                                   void *val,
4590                                   unsigned int bytes,
4591                                   struct x86_exception *exception)
4592 {
4593         return emulator_read_write(ctxt, addr, val, bytes,
4594                                    exception, &read_emultor);
4595 }
4596
4597 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4598                             unsigned long addr,
4599                             const void *val,
4600                             unsigned int bytes,
4601                             struct x86_exception *exception)
4602 {
4603         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4604                                    exception, &write_emultor);
4605 }
4606
4607 #define CMPXCHG_TYPE(t, ptr, old, new) \
4608         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4609
4610 #ifdef CONFIG_X86_64
4611 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4612 #else
4613 #  define CMPXCHG64(ptr, old, new) \
4614         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4615 #endif
4616
4617 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4618                                      unsigned long addr,
4619                                      const void *old,
4620                                      const void *new,
4621                                      unsigned int bytes,
4622                                      struct x86_exception *exception)
4623 {
4624         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4625         gpa_t gpa;
4626         struct page *page;
4627         char *kaddr;
4628         bool exchanged;
4629
4630         /* guests cmpxchg8b have to be emulated atomically */
4631         if (bytes > 8 || (bytes & (bytes - 1)))
4632                 goto emul_write;
4633
4634         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4635
4636         if (gpa == UNMAPPED_GVA ||
4637             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4638                 goto emul_write;
4639
4640         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4641                 goto emul_write;
4642
4643         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4644         if (is_error_page(page))
4645                 goto emul_write;
4646
4647         kaddr = kmap_atomic(page);
4648         kaddr += offset_in_page(gpa);
4649         switch (bytes) {
4650         case 1:
4651                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4652                 break;
4653         case 2:
4654                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4655                 break;
4656         case 4:
4657                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4658                 break;
4659         case 8:
4660                 exchanged = CMPXCHG64(kaddr, old, new);
4661                 break;
4662         default:
4663                 BUG();
4664         }
4665         kunmap_atomic(kaddr);
4666         kvm_release_page_dirty(page);
4667
4668         if (!exchanged)
4669                 return X86EMUL_CMPXCHG_FAILED;
4670
4671         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4672         kvm_page_track_write(vcpu, gpa, new, bytes);
4673
4674         return X86EMUL_CONTINUE;
4675
4676 emul_write:
4677         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4678
4679         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4680 }
4681
4682 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4683 {
4684         /* TODO: String I/O for in kernel device */
4685         int r;
4686
4687         if (vcpu->arch.pio.in)
4688                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4689                                     vcpu->arch.pio.size, pd);
4690         else
4691                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4692                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4693                                      pd);
4694         return r;
4695 }
4696
4697 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4698                                unsigned short port, void *val,
4699                                unsigned int count, bool in)
4700 {
4701         vcpu->arch.pio.port = port;
4702         vcpu->arch.pio.in = in;
4703         vcpu->arch.pio.count  = count;
4704         vcpu->arch.pio.size = size;
4705
4706         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4707                 vcpu->arch.pio.count = 0;
4708                 return 1;
4709         }
4710
4711         vcpu->run->exit_reason = KVM_EXIT_IO;
4712         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4713         vcpu->run->io.size = size;
4714         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4715         vcpu->run->io.count = count;
4716         vcpu->run->io.port = port;
4717
4718         return 0;
4719 }
4720
4721 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4722                                     int size, unsigned short port, void *val,
4723                                     unsigned int count)
4724 {
4725         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4726         int ret;
4727
4728         if (vcpu->arch.pio.count)
4729                 goto data_avail;
4730
4731         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4732         if (ret) {
4733 data_avail:
4734                 memcpy(val, vcpu->arch.pio_data, size * count);
4735                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4736                 vcpu->arch.pio.count = 0;
4737                 return 1;
4738         }
4739
4740         return 0;
4741 }
4742
4743 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4744                                      int size, unsigned short port,
4745                                      const void *val, unsigned int count)
4746 {
4747         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4748
4749         memcpy(vcpu->arch.pio_data, val, size * count);
4750         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4751         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4752 }
4753
4754 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4755 {
4756         return kvm_x86_ops->get_segment_base(vcpu, seg);
4757 }
4758
4759 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4760 {
4761         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4762 }
4763
4764 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4765 {
4766         if (!need_emulate_wbinvd(vcpu))
4767                 return X86EMUL_CONTINUE;
4768
4769         if (kvm_x86_ops->has_wbinvd_exit()) {
4770                 int cpu = get_cpu();
4771
4772                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4773                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4774                                 wbinvd_ipi, NULL, 1);
4775                 put_cpu();
4776                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4777         } else
4778                 wbinvd();
4779         return X86EMUL_CONTINUE;
4780 }
4781
4782 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4783 {
4784         kvm_x86_ops->skip_emulated_instruction(vcpu);
4785         return kvm_emulate_wbinvd_noskip(vcpu);
4786 }
4787 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4788
4789
4790
4791 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4792 {
4793         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4794 }
4795
4796 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4797                            unsigned long *dest)
4798 {
4799         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4800 }
4801
4802 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4803                            unsigned long value)
4804 {
4805
4806         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4807 }
4808
4809 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4810 {
4811         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4812 }
4813
4814 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4815 {
4816         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4817         unsigned long value;
4818
4819         switch (cr) {
4820         case 0:
4821                 value = kvm_read_cr0(vcpu);
4822                 break;
4823         case 2:
4824                 value = vcpu->arch.cr2;
4825                 break;
4826         case 3:
4827                 value = kvm_read_cr3(vcpu);
4828                 break;
4829         case 4:
4830                 value = kvm_read_cr4(vcpu);
4831                 break;
4832         case 8:
4833                 value = kvm_get_cr8(vcpu);
4834                 break;
4835         default:
4836                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4837                 return 0;
4838         }
4839
4840         return value;
4841 }
4842
4843 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4844 {
4845         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4846         int res = 0;
4847
4848         switch (cr) {
4849         case 0:
4850                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4851                 break;
4852         case 2:
4853                 vcpu->arch.cr2 = val;
4854                 break;
4855         case 3:
4856                 res = kvm_set_cr3(vcpu, val);
4857                 break;
4858         case 4:
4859                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4860                 break;
4861         case 8:
4862                 res = kvm_set_cr8(vcpu, val);
4863                 break;
4864         default:
4865                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4866                 res = -1;
4867         }
4868
4869         return res;
4870 }
4871
4872 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4873 {
4874         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4875 }
4876
4877 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4878 {
4879         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4880 }
4881
4882 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4883 {
4884         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4885 }
4886
4887 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4888 {
4889         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4890 }
4891
4892 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4893 {
4894         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4895 }
4896
4897 static unsigned long emulator_get_cached_segment_base(
4898         struct x86_emulate_ctxt *ctxt, int seg)
4899 {
4900         return get_segment_base(emul_to_vcpu(ctxt), seg);
4901 }
4902
4903 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4904                                  struct desc_struct *desc, u32 *base3,
4905                                  int seg)
4906 {
4907         struct kvm_segment var;
4908
4909         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4910         *selector = var.selector;
4911
4912         if (var.unusable) {
4913                 memset(desc, 0, sizeof(*desc));
4914                 return false;
4915         }
4916
4917         if (var.g)
4918                 var.limit >>= 12;
4919         set_desc_limit(desc, var.limit);
4920         set_desc_base(desc, (unsigned long)var.base);
4921 #ifdef CONFIG_X86_64
4922         if (base3)
4923                 *base3 = var.base >> 32;
4924 #endif
4925         desc->type = var.type;
4926         desc->s = var.s;
4927         desc->dpl = var.dpl;
4928         desc->p = var.present;
4929         desc->avl = var.avl;
4930         desc->l = var.l;
4931         desc->d = var.db;
4932         desc->g = var.g;
4933
4934         return true;
4935 }
4936
4937 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4938                                  struct desc_struct *desc, u32 base3,
4939                                  int seg)
4940 {
4941         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4942         struct kvm_segment var;
4943
4944         var.selector = selector;
4945         var.base = get_desc_base(desc);
4946 #ifdef CONFIG_X86_64
4947         var.base |= ((u64)base3) << 32;
4948 #endif
4949         var.limit = get_desc_limit(desc);
4950         if (desc->g)
4951                 var.limit = (var.limit << 12) | 0xfff;
4952         var.type = desc->type;
4953         var.dpl = desc->dpl;
4954         var.db = desc->d;
4955         var.s = desc->s;
4956         var.l = desc->l;
4957         var.g = desc->g;
4958         var.avl = desc->avl;
4959         var.present = desc->p;
4960         var.unusable = !var.present;
4961         var.padding = 0;
4962
4963         kvm_set_segment(vcpu, &var, seg);
4964         return;
4965 }
4966
4967 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4968                             u32 msr_index, u64 *pdata)
4969 {
4970         struct msr_data msr;
4971         int r;
4972
4973         msr.index = msr_index;
4974         msr.host_initiated = false;
4975         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4976         if (r)
4977                 return r;
4978
4979         *pdata = msr.data;
4980         return 0;
4981 }
4982
4983 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4984                             u32 msr_index, u64 data)
4985 {
4986         struct msr_data msr;
4987
4988         msr.data = data;
4989         msr.index = msr_index;
4990         msr.host_initiated = false;
4991         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4992 }
4993
4994 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4995 {
4996         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4997
4998         return vcpu->arch.smbase;
4999 }
5000
5001 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5002 {
5003         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5004
5005         vcpu->arch.smbase = smbase;
5006 }
5007
5008 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5009                               u32 pmc)
5010 {
5011         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5012 }
5013
5014 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5015                              u32 pmc, u64 *pdata)
5016 {
5017         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5018 }
5019
5020 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5021 {
5022         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5023 }
5024
5025 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5026 {
5027         preempt_disable();
5028         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5029         /*
5030          * CR0.TS may reference the host fpu state, not the guest fpu state,
5031          * so it may be clear at this point.
5032          */
5033         clts();
5034 }
5035
5036 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5037 {
5038         preempt_enable();
5039 }
5040
5041 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5042                               struct x86_instruction_info *info,
5043                               enum x86_intercept_stage stage)
5044 {
5045         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5046 }
5047
5048 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5049                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5050 {
5051         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5052 }
5053
5054 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5055 {
5056         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5057 }
5058
5059 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5060 {
5061         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5062 }
5063
5064 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5065 {
5066         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5067 }
5068
5069 static const struct x86_emulate_ops emulate_ops = {
5070         .read_gpr            = emulator_read_gpr,
5071         .write_gpr           = emulator_write_gpr,
5072         .read_std            = kvm_read_guest_virt_system,
5073         .write_std           = kvm_write_guest_virt_system,
5074         .read_phys           = kvm_read_guest_phys_system,
5075         .fetch               = kvm_fetch_guest_virt,
5076         .read_emulated       = emulator_read_emulated,
5077         .write_emulated      = emulator_write_emulated,
5078         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5079         .invlpg              = emulator_invlpg,
5080         .pio_in_emulated     = emulator_pio_in_emulated,
5081         .pio_out_emulated    = emulator_pio_out_emulated,
5082         .get_segment         = emulator_get_segment,
5083         .set_segment         = emulator_set_segment,
5084         .get_cached_segment_base = emulator_get_cached_segment_base,
5085         .get_gdt             = emulator_get_gdt,
5086         .get_idt             = emulator_get_idt,
5087         .set_gdt             = emulator_set_gdt,
5088         .set_idt             = emulator_set_idt,
5089         .get_cr              = emulator_get_cr,
5090         .set_cr              = emulator_set_cr,
5091         .cpl                 = emulator_get_cpl,
5092         .get_dr              = emulator_get_dr,
5093         .set_dr              = emulator_set_dr,
5094         .get_smbase          = emulator_get_smbase,
5095         .set_smbase          = emulator_set_smbase,
5096         .set_msr             = emulator_set_msr,
5097         .get_msr             = emulator_get_msr,
5098         .check_pmc           = emulator_check_pmc,
5099         .read_pmc            = emulator_read_pmc,
5100         .halt                = emulator_halt,
5101         .wbinvd              = emulator_wbinvd,
5102         .fix_hypercall       = emulator_fix_hypercall,
5103         .get_fpu             = emulator_get_fpu,
5104         .put_fpu             = emulator_put_fpu,
5105         .intercept           = emulator_intercept,
5106         .get_cpuid           = emulator_get_cpuid,
5107         .set_nmi_mask        = emulator_set_nmi_mask,
5108 };
5109
5110 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5111 {
5112         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5113         /*
5114          * an sti; sti; sequence only disable interrupts for the first
5115          * instruction. So, if the last instruction, be it emulated or
5116          * not, left the system with the INT_STI flag enabled, it
5117          * means that the last instruction is an sti. We should not
5118          * leave the flag on in this case. The same goes for mov ss
5119          */
5120         if (int_shadow & mask)
5121                 mask = 0;
5122         if (unlikely(int_shadow || mask)) {
5123                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5124                 if (!mask)
5125                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5126         }
5127 }
5128
5129 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5130 {
5131         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5132         if (ctxt->exception.vector == PF_VECTOR)
5133                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5134
5135         if (ctxt->exception.error_code_valid)
5136                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5137                                       ctxt->exception.error_code);
5138         else
5139                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5140         return false;
5141 }
5142
5143 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5144 {
5145         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5146         int cs_db, cs_l;
5147
5148         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5149
5150         ctxt->eflags = kvm_get_rflags(vcpu);
5151         ctxt->eip = kvm_rip_read(vcpu);
5152         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5153                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5154                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5155                      cs_db                              ? X86EMUL_MODE_PROT32 :
5156                                                           X86EMUL_MODE_PROT16;
5157         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5158         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5159         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5160         ctxt->emul_flags = vcpu->arch.hflags;
5161
5162         init_decode_cache(ctxt);
5163         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5164 }
5165
5166 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5167 {
5168         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5169         int ret;
5170
5171         init_emulate_ctxt(vcpu);
5172
5173         ctxt->op_bytes = 2;
5174         ctxt->ad_bytes = 2;
5175         ctxt->_eip = ctxt->eip + inc_eip;
5176         ret = emulate_int_real(ctxt, irq);
5177
5178         if (ret != X86EMUL_CONTINUE)
5179                 return EMULATE_FAIL;
5180
5181         ctxt->eip = ctxt->_eip;
5182         kvm_rip_write(vcpu, ctxt->eip);
5183         kvm_set_rflags(vcpu, ctxt->eflags);
5184
5185         if (irq == NMI_VECTOR)
5186                 vcpu->arch.nmi_pending = 0;
5187         else
5188                 vcpu->arch.interrupt.pending = false;
5189
5190         return EMULATE_DONE;
5191 }
5192 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5193
5194 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5195 {
5196         int r = EMULATE_DONE;
5197
5198         ++vcpu->stat.insn_emulation_fail;
5199         trace_kvm_emulate_insn_failed(vcpu);
5200         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5201                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5202                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5203                 vcpu->run->internal.ndata = 0;
5204                 r = EMULATE_FAIL;
5205         }
5206         kvm_queue_exception(vcpu, UD_VECTOR);
5207
5208         return r;
5209 }
5210
5211 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5212                                   bool write_fault_to_shadow_pgtable,
5213                                   int emulation_type)
5214 {
5215         gpa_t gpa = cr2;
5216         kvm_pfn_t pfn;
5217
5218         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5219                 return false;
5220
5221         if (!vcpu->arch.mmu.direct_map) {
5222                 /*
5223                  * Write permission should be allowed since only
5224                  * write access need to be emulated.
5225                  */
5226                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5227
5228                 /*
5229                  * If the mapping is invalid in guest, let cpu retry
5230                  * it to generate fault.
5231                  */
5232                 if (gpa == UNMAPPED_GVA)
5233                         return true;
5234         }
5235
5236         /*
5237          * Do not retry the unhandleable instruction if it faults on the
5238          * readonly host memory, otherwise it will goto a infinite loop:
5239          * retry instruction -> write #PF -> emulation fail -> retry
5240          * instruction -> ...
5241          */
5242         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5243
5244         /*
5245          * If the instruction failed on the error pfn, it can not be fixed,
5246          * report the error to userspace.
5247          */
5248         if (is_error_noslot_pfn(pfn))
5249                 return false;
5250
5251         kvm_release_pfn_clean(pfn);
5252
5253         /* The instructions are well-emulated on direct mmu. */
5254         if (vcpu->arch.mmu.direct_map) {
5255                 unsigned int indirect_shadow_pages;
5256
5257                 spin_lock(&vcpu->kvm->mmu_lock);
5258                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5259                 spin_unlock(&vcpu->kvm->mmu_lock);
5260
5261                 if (indirect_shadow_pages)
5262                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5263
5264                 return true;
5265         }
5266
5267         /*
5268          * if emulation was due to access to shadowed page table
5269          * and it failed try to unshadow page and re-enter the
5270          * guest to let CPU execute the instruction.
5271          */
5272         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5273
5274         /*
5275          * If the access faults on its page table, it can not
5276          * be fixed by unprotecting shadow page and it should
5277          * be reported to userspace.
5278          */
5279         return !write_fault_to_shadow_pgtable;
5280 }
5281
5282 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5283                               unsigned long cr2,  int emulation_type)
5284 {
5285         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5286         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5287
5288         last_retry_eip = vcpu->arch.last_retry_eip;
5289         last_retry_addr = vcpu->arch.last_retry_addr;
5290
5291         /*
5292          * If the emulation is caused by #PF and it is non-page_table
5293          * writing instruction, it means the VM-EXIT is caused by shadow
5294          * page protected, we can zap the shadow page and retry this
5295          * instruction directly.
5296          *
5297          * Note: if the guest uses a non-page-table modifying instruction
5298          * on the PDE that points to the instruction, then we will unmap
5299          * the instruction and go to an infinite loop. So, we cache the
5300          * last retried eip and the last fault address, if we meet the eip
5301          * and the address again, we can break out of the potential infinite
5302          * loop.
5303          */
5304         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5305
5306         if (!(emulation_type & EMULTYPE_RETRY))
5307                 return false;
5308
5309         if (x86_page_table_writing_insn(ctxt))
5310                 return false;
5311
5312         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5313                 return false;
5314
5315         vcpu->arch.last_retry_eip = ctxt->eip;
5316         vcpu->arch.last_retry_addr = cr2;
5317
5318         if (!vcpu->arch.mmu.direct_map)
5319                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5320
5321         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5322
5323         return true;
5324 }
5325
5326 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5327 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5328
5329 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5330 {
5331         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5332                 /* This is a good place to trace that we are exiting SMM.  */
5333                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5334
5335                 /* Process a latched INIT or SMI, if any.  */
5336                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5337         }
5338
5339         kvm_mmu_reset_context(vcpu);
5340 }
5341
5342 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5343 {
5344         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5345
5346         vcpu->arch.hflags = emul_flags;
5347
5348         if (changed & HF_SMM_MASK)
5349                 kvm_smm_changed(vcpu);
5350 }
5351
5352 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5353                                 unsigned long *db)
5354 {
5355         u32 dr6 = 0;
5356         int i;
5357         u32 enable, rwlen;
5358
5359         enable = dr7;
5360         rwlen = dr7 >> 16;
5361         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5362                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5363                         dr6 |= (1 << i);
5364         return dr6;
5365 }
5366
5367 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5368 {
5369         struct kvm_run *kvm_run = vcpu->run;
5370
5371         /*
5372          * rflags is the old, "raw" value of the flags.  The new value has
5373          * not been saved yet.
5374          *
5375          * This is correct even for TF set by the guest, because "the
5376          * processor will not generate this exception after the instruction
5377          * that sets the TF flag".
5378          */
5379         if (unlikely(rflags & X86_EFLAGS_TF)) {
5380                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5381                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5382                                                   DR6_RTM;
5383                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5384                         kvm_run->debug.arch.exception = DB_VECTOR;
5385                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5386                         *r = EMULATE_USER_EXIT;
5387                 } else {
5388                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5389                         /*
5390                          * "Certain debug exceptions may clear bit 0-3.  The
5391                          * remaining contents of the DR6 register are never
5392                          * cleared by the processor".
5393                          */
5394                         vcpu->arch.dr6 &= ~15;
5395                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5396                         kvm_queue_exception(vcpu, DB_VECTOR);
5397                 }
5398         }
5399 }
5400
5401 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5402 {
5403         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5404             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5405                 struct kvm_run *kvm_run = vcpu->run;
5406                 unsigned long eip = kvm_get_linear_rip(vcpu);
5407                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5408                                            vcpu->arch.guest_debug_dr7,
5409                                            vcpu->arch.eff_db);
5410
5411                 if (dr6 != 0) {
5412                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5413                         kvm_run->debug.arch.pc = eip;
5414                         kvm_run->debug.arch.exception = DB_VECTOR;
5415                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5416                         *r = EMULATE_USER_EXIT;
5417                         return true;
5418                 }
5419         }
5420
5421         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5422             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5423                 unsigned long eip = kvm_get_linear_rip(vcpu);
5424                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5425                                            vcpu->arch.dr7,
5426                                            vcpu->arch.db);
5427
5428                 if (dr6 != 0) {
5429                         vcpu->arch.dr6 &= ~15;
5430                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5431                         kvm_queue_exception(vcpu, DB_VECTOR);
5432                         *r = EMULATE_DONE;
5433                         return true;
5434                 }
5435         }
5436
5437         return false;
5438 }
5439
5440 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5441                             unsigned long cr2,
5442                             int emulation_type,
5443                             void *insn,
5444                             int insn_len)
5445 {
5446         int r;
5447         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5448         bool writeback = true;
5449         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5450
5451         /*
5452          * Clear write_fault_to_shadow_pgtable here to ensure it is
5453          * never reused.
5454          */
5455         vcpu->arch.write_fault_to_shadow_pgtable = false;
5456         kvm_clear_exception_queue(vcpu);
5457
5458         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5459                 init_emulate_ctxt(vcpu);
5460
5461                 /*
5462                  * We will reenter on the same instruction since
5463                  * we do not set complete_userspace_io.  This does not
5464                  * handle watchpoints yet, those would be handled in
5465                  * the emulate_ops.
5466                  */
5467                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5468                         return r;
5469
5470                 ctxt->interruptibility = 0;
5471                 ctxt->have_exception = false;
5472                 ctxt->exception.vector = -1;
5473                 ctxt->perm_ok = false;
5474
5475                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5476
5477                 r = x86_decode_insn(ctxt, insn, insn_len);
5478
5479                 trace_kvm_emulate_insn_start(vcpu);
5480                 ++vcpu->stat.insn_emulation;
5481                 if (r != EMULATION_OK)  {
5482                         if (emulation_type & EMULTYPE_TRAP_UD)
5483                                 return EMULATE_FAIL;
5484                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5485                                                 emulation_type))
5486                                 return EMULATE_DONE;
5487                         if (emulation_type & EMULTYPE_SKIP)
5488                                 return EMULATE_FAIL;
5489                         return handle_emulation_failure(vcpu);
5490                 }
5491         }
5492
5493         if (emulation_type & EMULTYPE_SKIP) {
5494                 kvm_rip_write(vcpu, ctxt->_eip);
5495                 if (ctxt->eflags & X86_EFLAGS_RF)
5496                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5497                 return EMULATE_DONE;
5498         }
5499
5500         if (retry_instruction(ctxt, cr2, emulation_type))
5501                 return EMULATE_DONE;
5502
5503         /* this is needed for vmware backdoor interface to work since it
5504            changes registers values  during IO operation */
5505         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5506                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5507                 emulator_invalidate_register_cache(ctxt);
5508         }
5509
5510 restart:
5511         r = x86_emulate_insn(ctxt);
5512
5513         if (r == EMULATION_INTERCEPTED)
5514                 return EMULATE_DONE;
5515
5516         if (r == EMULATION_FAILED) {
5517                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5518                                         emulation_type))
5519                         return EMULATE_DONE;
5520
5521                 return handle_emulation_failure(vcpu);
5522         }
5523
5524         if (ctxt->have_exception) {
5525                 r = EMULATE_DONE;
5526                 if (inject_emulated_exception(vcpu))
5527                         return r;
5528         } else if (vcpu->arch.pio.count) {
5529                 if (!vcpu->arch.pio.in) {
5530                         /* FIXME: return into emulator if single-stepping.  */
5531                         vcpu->arch.pio.count = 0;
5532                 } else {
5533                         writeback = false;
5534                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5535                 }
5536                 r = EMULATE_USER_EXIT;
5537         } else if (vcpu->mmio_needed) {
5538                 if (!vcpu->mmio_is_write)
5539                         writeback = false;
5540                 r = EMULATE_USER_EXIT;
5541                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5542         } else if (r == EMULATION_RESTART)
5543                 goto restart;
5544         else
5545                 r = EMULATE_DONE;
5546
5547         if (writeback) {
5548                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5549                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5550                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5551                 if (vcpu->arch.hflags != ctxt->emul_flags)
5552                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5553                 kvm_rip_write(vcpu, ctxt->eip);
5554                 if (r == EMULATE_DONE)
5555                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5556                 if (!ctxt->have_exception ||
5557                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5558                         __kvm_set_rflags(vcpu, ctxt->eflags);
5559
5560                 /*
5561                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5562                  * do nothing, and it will be requested again as soon as
5563                  * the shadow expires.  But we still need to check here,
5564                  * because POPF has no interrupt shadow.
5565                  */
5566                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5567                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5568         } else
5569                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5570
5571         return r;
5572 }
5573 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5574
5575 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5576 {
5577         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5578         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5579                                             size, port, &val, 1);
5580         /* do not return to emulator after return from userspace */
5581         vcpu->arch.pio.count = 0;
5582         return ret;
5583 }
5584 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5585
5586 static void tsc_bad(void *info)
5587 {
5588         __this_cpu_write(cpu_tsc_khz, 0);
5589 }
5590
5591 static void tsc_khz_changed(void *data)
5592 {
5593         struct cpufreq_freqs *freq = data;
5594         unsigned long khz = 0;
5595
5596         if (data)
5597                 khz = freq->new;
5598         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5599                 khz = cpufreq_quick_get(raw_smp_processor_id());
5600         if (!khz)
5601                 khz = tsc_khz;
5602         __this_cpu_write(cpu_tsc_khz, khz);
5603 }
5604
5605 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5606                                      void *data)
5607 {
5608         struct cpufreq_freqs *freq = data;
5609         struct kvm *kvm;
5610         struct kvm_vcpu *vcpu;
5611         int i, send_ipi = 0;
5612
5613         /*
5614          * We allow guests to temporarily run on slowing clocks,
5615          * provided we notify them after, or to run on accelerating
5616          * clocks, provided we notify them before.  Thus time never
5617          * goes backwards.
5618          *
5619          * However, we have a problem.  We can't atomically update
5620          * the frequency of a given CPU from this function; it is
5621          * merely a notifier, which can be called from any CPU.
5622          * Changing the TSC frequency at arbitrary points in time
5623          * requires a recomputation of local variables related to
5624          * the TSC for each VCPU.  We must flag these local variables
5625          * to be updated and be sure the update takes place with the
5626          * new frequency before any guests proceed.
5627          *
5628          * Unfortunately, the combination of hotplug CPU and frequency
5629          * change creates an intractable locking scenario; the order
5630          * of when these callouts happen is undefined with respect to
5631          * CPU hotplug, and they can race with each other.  As such,
5632          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5633          * undefined; you can actually have a CPU frequency change take
5634          * place in between the computation of X and the setting of the
5635          * variable.  To protect against this problem, all updates of
5636          * the per_cpu tsc_khz variable are done in an interrupt
5637          * protected IPI, and all callers wishing to update the value
5638          * must wait for a synchronous IPI to complete (which is trivial
5639          * if the caller is on the CPU already).  This establishes the
5640          * necessary total order on variable updates.
5641          *
5642          * Note that because a guest time update may take place
5643          * anytime after the setting of the VCPU's request bit, the
5644          * correct TSC value must be set before the request.  However,
5645          * to ensure the update actually makes it to any guest which
5646          * starts running in hardware virtualization between the set
5647          * and the acquisition of the spinlock, we must also ping the
5648          * CPU after setting the request bit.
5649          *
5650          */
5651
5652         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5653                 return 0;
5654         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5655                 return 0;
5656
5657         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5658
5659         spin_lock(&kvm_lock);
5660         list_for_each_entry(kvm, &vm_list, vm_list) {
5661                 kvm_for_each_vcpu(i, vcpu, kvm) {
5662                         if (vcpu->cpu != freq->cpu)
5663                                 continue;
5664                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5665                         if (vcpu->cpu != smp_processor_id())
5666                                 send_ipi = 1;
5667                 }
5668         }
5669         spin_unlock(&kvm_lock);
5670
5671         if (freq->old < freq->new && send_ipi) {
5672                 /*
5673                  * We upscale the frequency.  Must make the guest
5674                  * doesn't see old kvmclock values while running with
5675                  * the new frequency, otherwise we risk the guest sees
5676                  * time go backwards.
5677                  *
5678                  * In case we update the frequency for another cpu
5679                  * (which might be in guest context) send an interrupt
5680                  * to kick the cpu out of guest context.  Next time
5681                  * guest context is entered kvmclock will be updated,
5682                  * so the guest will not see stale values.
5683                  */
5684                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5685         }
5686         return 0;
5687 }
5688
5689 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5690         .notifier_call  = kvmclock_cpufreq_notifier
5691 };
5692
5693 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5694                                         unsigned long action, void *hcpu)
5695 {
5696         unsigned int cpu = (unsigned long)hcpu;
5697
5698         switch (action) {
5699                 case CPU_ONLINE:
5700                 case CPU_DOWN_FAILED:
5701                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5702                         break;
5703                 case CPU_DOWN_PREPARE:
5704                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5705                         break;
5706         }
5707         return NOTIFY_OK;
5708 }
5709
5710 static struct notifier_block kvmclock_cpu_notifier_block = {
5711         .notifier_call  = kvmclock_cpu_notifier,
5712         .priority = -INT_MAX
5713 };
5714
5715 static void kvm_timer_init(void)
5716 {
5717         int cpu;
5718
5719         max_tsc_khz = tsc_khz;
5720
5721         cpu_notifier_register_begin();
5722         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5723 #ifdef CONFIG_CPU_FREQ
5724                 struct cpufreq_policy policy;
5725                 memset(&policy, 0, sizeof(policy));
5726                 cpu = get_cpu();
5727                 cpufreq_get_policy(&policy, cpu);
5728                 if (policy.cpuinfo.max_freq)
5729                         max_tsc_khz = policy.cpuinfo.max_freq;
5730                 put_cpu();
5731 #endif
5732                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5733                                           CPUFREQ_TRANSITION_NOTIFIER);
5734         }
5735         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5736         for_each_online_cpu(cpu)
5737                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5738
5739         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5740         cpu_notifier_register_done();
5741
5742 }
5743
5744 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5745
5746 int kvm_is_in_guest(void)
5747 {
5748         return __this_cpu_read(current_vcpu) != NULL;
5749 }
5750
5751 static int kvm_is_user_mode(void)
5752 {
5753         int user_mode = 3;
5754
5755         if (__this_cpu_read(current_vcpu))
5756                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5757
5758         return user_mode != 0;
5759 }
5760
5761 static unsigned long kvm_get_guest_ip(void)
5762 {
5763         unsigned long ip = 0;
5764
5765         if (__this_cpu_read(current_vcpu))
5766                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5767
5768         return ip;
5769 }
5770
5771 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5772         .is_in_guest            = kvm_is_in_guest,
5773         .is_user_mode           = kvm_is_user_mode,
5774         .get_guest_ip           = kvm_get_guest_ip,
5775 };
5776
5777 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5778 {
5779         __this_cpu_write(current_vcpu, vcpu);
5780 }
5781 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5782
5783 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5784 {
5785         __this_cpu_write(current_vcpu, NULL);
5786 }
5787 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5788
5789 static void kvm_set_mmio_spte_mask(void)
5790 {
5791         u64 mask;
5792         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5793
5794         /*
5795          * Set the reserved bits and the present bit of an paging-structure
5796          * entry to generate page fault with PFER.RSV = 1.
5797          */
5798          /* Mask the reserved physical address bits. */
5799         mask = rsvd_bits(maxphyaddr, 51);
5800
5801         /* Bit 62 is always reserved for 32bit host. */
5802         mask |= 0x3ull << 62;
5803
5804         /* Set the present bit. */
5805         mask |= 1ull;
5806
5807 #ifdef CONFIG_X86_64
5808         /*
5809          * If reserved bit is not supported, clear the present bit to disable
5810          * mmio page fault.
5811          */
5812         if (maxphyaddr == 52)
5813                 mask &= ~1ull;
5814 #endif
5815
5816         kvm_mmu_set_mmio_spte_mask(mask);
5817 }
5818
5819 #ifdef CONFIG_X86_64
5820 static void pvclock_gtod_update_fn(struct work_struct *work)
5821 {
5822         struct kvm *kvm;
5823
5824         struct kvm_vcpu *vcpu;
5825         int i;
5826
5827         spin_lock(&kvm_lock);
5828         list_for_each_entry(kvm, &vm_list, vm_list)
5829                 kvm_for_each_vcpu(i, vcpu, kvm)
5830                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5831         atomic_set(&kvm_guest_has_master_clock, 0);
5832         spin_unlock(&kvm_lock);
5833 }
5834
5835 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5836
5837 /*
5838  * Notification about pvclock gtod data update.
5839  */
5840 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5841                                void *priv)
5842 {
5843         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5844         struct timekeeper *tk = priv;
5845
5846         update_pvclock_gtod(tk);
5847
5848         /* disable master clock if host does not trust, or does not
5849          * use, TSC clocksource
5850          */
5851         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5852             atomic_read(&kvm_guest_has_master_clock) != 0)
5853                 queue_work(system_long_wq, &pvclock_gtod_work);
5854
5855         return 0;
5856 }
5857
5858 static struct notifier_block pvclock_gtod_notifier = {
5859         .notifier_call = pvclock_gtod_notify,
5860 };
5861 #endif
5862
5863 int kvm_arch_init(void *opaque)
5864 {
5865         int r;
5866         struct kvm_x86_ops *ops = opaque;
5867
5868         if (kvm_x86_ops) {
5869                 printk(KERN_ERR "kvm: already loaded the other module\n");
5870                 r = -EEXIST;
5871                 goto out;
5872         }
5873
5874         if (!ops->cpu_has_kvm_support()) {
5875                 printk(KERN_ERR "kvm: no hardware support\n");
5876                 r = -EOPNOTSUPP;
5877                 goto out;
5878         }
5879         if (ops->disabled_by_bios()) {
5880                 printk(KERN_ERR "kvm: disabled by bios\n");
5881                 r = -EOPNOTSUPP;
5882                 goto out;
5883         }
5884
5885         r = -ENOMEM;
5886         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5887         if (!shared_msrs) {
5888                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5889                 goto out;
5890         }
5891
5892         r = kvm_mmu_module_init();
5893         if (r)
5894                 goto out_free_percpu;
5895
5896         kvm_set_mmio_spte_mask();
5897
5898         kvm_x86_ops = ops;
5899
5900         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5901                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
5902                         PT_PRESENT_MASK);
5903         kvm_timer_init();
5904
5905         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5906
5907         if (boot_cpu_has(X86_FEATURE_XSAVE))
5908                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5909
5910         kvm_lapic_init();
5911 #ifdef CONFIG_X86_64
5912         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5913 #endif
5914
5915         return 0;
5916
5917 out_free_percpu:
5918         free_percpu(shared_msrs);
5919 out:
5920         return r;
5921 }
5922
5923 void kvm_arch_exit(void)
5924 {
5925         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5926
5927         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5928                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5929                                             CPUFREQ_TRANSITION_NOTIFIER);
5930         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5931 #ifdef CONFIG_X86_64
5932         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5933 #endif
5934         kvm_x86_ops = NULL;
5935         kvm_mmu_module_exit();
5936         free_percpu(shared_msrs);
5937 }
5938
5939 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5940 {
5941         ++vcpu->stat.halt_exits;
5942         if (lapic_in_kernel(vcpu)) {
5943                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5944                 return 1;
5945         } else {
5946                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5947                 return 0;
5948         }
5949 }
5950 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5951
5952 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5953 {
5954         kvm_x86_ops->skip_emulated_instruction(vcpu);
5955         return kvm_vcpu_halt(vcpu);
5956 }
5957 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5958
5959 /*
5960  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5961  *
5962  * @apicid - apicid of vcpu to be kicked.
5963  */
5964 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5965 {
5966         struct kvm_lapic_irq lapic_irq;
5967
5968         lapic_irq.shorthand = 0;
5969         lapic_irq.dest_mode = 0;
5970         lapic_irq.dest_id = apicid;
5971         lapic_irq.msi_redir_hint = false;
5972
5973         lapic_irq.delivery_mode = APIC_DM_REMRD;
5974         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5975 }
5976
5977 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
5978 {
5979         vcpu->arch.apicv_active = false;
5980         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
5981 }
5982
5983 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5984 {
5985         unsigned long nr, a0, a1, a2, a3, ret;
5986         int op_64_bit, r = 1;
5987
5988         kvm_x86_ops->skip_emulated_instruction(vcpu);
5989
5990         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5991                 return kvm_hv_hypercall(vcpu);
5992
5993         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5994         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5995         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5996         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5997         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5998
5999         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6000
6001         op_64_bit = is_64_bit_mode(vcpu);
6002         if (!op_64_bit) {
6003                 nr &= 0xFFFFFFFF;
6004                 a0 &= 0xFFFFFFFF;
6005                 a1 &= 0xFFFFFFFF;
6006                 a2 &= 0xFFFFFFFF;
6007                 a3 &= 0xFFFFFFFF;
6008         }
6009
6010         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6011                 ret = -KVM_EPERM;
6012                 goto out;
6013         }
6014
6015         switch (nr) {
6016         case KVM_HC_VAPIC_POLL_IRQ:
6017                 ret = 0;
6018                 break;
6019         case KVM_HC_KICK_CPU:
6020                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6021                 ret = 0;
6022                 break;
6023         default:
6024                 ret = -KVM_ENOSYS;
6025                 break;
6026         }
6027 out:
6028         if (!op_64_bit)
6029                 ret = (u32)ret;
6030         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6031         ++vcpu->stat.hypercalls;
6032         return r;
6033 }
6034 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6035
6036 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6037 {
6038         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6039         char instruction[3];
6040         unsigned long rip = kvm_rip_read(vcpu);
6041
6042         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6043
6044         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
6045 }
6046
6047 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6048 {
6049         return vcpu->run->request_interrupt_window &&
6050                 likely(!pic_in_kernel(vcpu->kvm));
6051 }
6052
6053 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6054 {
6055         struct kvm_run *kvm_run = vcpu->run;
6056
6057         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6058         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6059         kvm_run->cr8 = kvm_get_cr8(vcpu);
6060         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6061         kvm_run->ready_for_interrupt_injection =
6062                 pic_in_kernel(vcpu->kvm) ||
6063                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6064 }
6065
6066 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6067 {
6068         int max_irr, tpr;
6069
6070         if (!kvm_x86_ops->update_cr8_intercept)
6071                 return;
6072
6073         if (!lapic_in_kernel(vcpu))
6074                 return;
6075
6076         if (vcpu->arch.apicv_active)
6077                 return;
6078
6079         if (!vcpu->arch.apic->vapic_addr)
6080                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6081         else
6082                 max_irr = -1;
6083
6084         if (max_irr != -1)
6085                 max_irr >>= 4;
6086
6087         tpr = kvm_lapic_get_cr8(vcpu);
6088
6089         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6090 }
6091
6092 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6093 {
6094         int r;
6095
6096         /* try to reinject previous events if any */
6097         if (vcpu->arch.exception.pending) {
6098                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6099                                         vcpu->arch.exception.has_error_code,
6100                                         vcpu->arch.exception.error_code);
6101
6102                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6103                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6104                                              X86_EFLAGS_RF);
6105
6106                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6107                     (vcpu->arch.dr7 & DR7_GD)) {
6108                         vcpu->arch.dr7 &= ~DR7_GD;
6109                         kvm_update_dr7(vcpu);
6110                 }
6111
6112                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6113                                           vcpu->arch.exception.has_error_code,
6114                                           vcpu->arch.exception.error_code,
6115                                           vcpu->arch.exception.reinject);
6116                 return 0;
6117         }
6118
6119         if (vcpu->arch.nmi_injected) {
6120                 kvm_x86_ops->set_nmi(vcpu);
6121                 return 0;
6122         }
6123
6124         if (vcpu->arch.interrupt.pending) {
6125                 kvm_x86_ops->set_irq(vcpu);
6126                 return 0;
6127         }
6128
6129         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6130                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6131                 if (r != 0)
6132                         return r;
6133         }
6134
6135         /* try to inject new event if pending */
6136         if (vcpu->arch.smi_pending && !is_smm(vcpu)) {
6137                 vcpu->arch.smi_pending = false;
6138                 enter_smm(vcpu);
6139         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6140                 --vcpu->arch.nmi_pending;
6141                 vcpu->arch.nmi_injected = true;
6142                 kvm_x86_ops->set_nmi(vcpu);
6143         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6144                 /*
6145                  * Because interrupts can be injected asynchronously, we are
6146                  * calling check_nested_events again here to avoid a race condition.
6147                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6148                  * proposal and current concerns.  Perhaps we should be setting
6149                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6150                  */
6151                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6152                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6153                         if (r != 0)
6154                                 return r;
6155                 }
6156                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6157                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6158                                             false);
6159                         kvm_x86_ops->set_irq(vcpu);
6160                 }
6161         }
6162
6163         return 0;
6164 }
6165
6166 static void process_nmi(struct kvm_vcpu *vcpu)
6167 {
6168         unsigned limit = 2;
6169
6170         /*
6171          * x86 is limited to one NMI running, and one NMI pending after it.
6172          * If an NMI is already in progress, limit further NMIs to just one.
6173          * Otherwise, allow two (and we'll inject the first one immediately).
6174          */
6175         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6176                 limit = 1;
6177
6178         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6179         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6180         kvm_make_request(KVM_REQ_EVENT, vcpu);
6181 }
6182
6183 #define put_smstate(type, buf, offset, val)                       \
6184         *(type *)((buf) + (offset) - 0x7e00) = val
6185
6186 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6187 {
6188         u32 flags = 0;
6189         flags |= seg->g       << 23;
6190         flags |= seg->db      << 22;
6191         flags |= seg->l       << 21;
6192         flags |= seg->avl     << 20;
6193         flags |= seg->present << 15;
6194         flags |= seg->dpl     << 13;
6195         flags |= seg->s       << 12;
6196         flags |= seg->type    << 8;
6197         return flags;
6198 }
6199
6200 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6201 {
6202         struct kvm_segment seg;
6203         int offset;
6204
6205         kvm_get_segment(vcpu, &seg, n);
6206         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6207
6208         if (n < 3)
6209                 offset = 0x7f84 + n * 12;
6210         else
6211                 offset = 0x7f2c + (n - 3) * 12;
6212
6213         put_smstate(u32, buf, offset + 8, seg.base);
6214         put_smstate(u32, buf, offset + 4, seg.limit);
6215         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6216 }
6217
6218 #ifdef CONFIG_X86_64
6219 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6220 {
6221         struct kvm_segment seg;
6222         int offset;
6223         u16 flags;
6224
6225         kvm_get_segment(vcpu, &seg, n);
6226         offset = 0x7e00 + n * 16;
6227
6228         flags = enter_smm_get_segment_flags(&seg) >> 8;
6229         put_smstate(u16, buf, offset, seg.selector);
6230         put_smstate(u16, buf, offset + 2, flags);
6231         put_smstate(u32, buf, offset + 4, seg.limit);
6232         put_smstate(u64, buf, offset + 8, seg.base);
6233 }
6234 #endif
6235
6236 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6237 {
6238         struct desc_ptr dt;
6239         struct kvm_segment seg;
6240         unsigned long val;
6241         int i;
6242
6243         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6244         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6245         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6246         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6247
6248         for (i = 0; i < 8; i++)
6249                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6250
6251         kvm_get_dr(vcpu, 6, &val);
6252         put_smstate(u32, buf, 0x7fcc, (u32)val);
6253         kvm_get_dr(vcpu, 7, &val);
6254         put_smstate(u32, buf, 0x7fc8, (u32)val);
6255
6256         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6257         put_smstate(u32, buf, 0x7fc4, seg.selector);
6258         put_smstate(u32, buf, 0x7f64, seg.base);
6259         put_smstate(u32, buf, 0x7f60, seg.limit);
6260         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6261
6262         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6263         put_smstate(u32, buf, 0x7fc0, seg.selector);
6264         put_smstate(u32, buf, 0x7f80, seg.base);
6265         put_smstate(u32, buf, 0x7f7c, seg.limit);
6266         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6267
6268         kvm_x86_ops->get_gdt(vcpu, &dt);
6269         put_smstate(u32, buf, 0x7f74, dt.address);
6270         put_smstate(u32, buf, 0x7f70, dt.size);
6271
6272         kvm_x86_ops->get_idt(vcpu, &dt);
6273         put_smstate(u32, buf, 0x7f58, dt.address);
6274         put_smstate(u32, buf, 0x7f54, dt.size);
6275
6276         for (i = 0; i < 6; i++)
6277                 enter_smm_save_seg_32(vcpu, buf, i);
6278
6279         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6280
6281         /* revision id */
6282         put_smstate(u32, buf, 0x7efc, 0x00020000);
6283         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6284 }
6285
6286 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6287 {
6288 #ifdef CONFIG_X86_64
6289         struct desc_ptr dt;
6290         struct kvm_segment seg;
6291         unsigned long val;
6292         int i;
6293
6294         for (i = 0; i < 16; i++)
6295                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6296
6297         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6298         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6299
6300         kvm_get_dr(vcpu, 6, &val);
6301         put_smstate(u64, buf, 0x7f68, val);
6302         kvm_get_dr(vcpu, 7, &val);
6303         put_smstate(u64, buf, 0x7f60, val);
6304
6305         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6306         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6307         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6308
6309         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6310
6311         /* revision id */
6312         put_smstate(u32, buf, 0x7efc, 0x00020064);
6313
6314         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6315
6316         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6317         put_smstate(u16, buf, 0x7e90, seg.selector);
6318         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6319         put_smstate(u32, buf, 0x7e94, seg.limit);
6320         put_smstate(u64, buf, 0x7e98, seg.base);
6321
6322         kvm_x86_ops->get_idt(vcpu, &dt);
6323         put_smstate(u32, buf, 0x7e84, dt.size);
6324         put_smstate(u64, buf, 0x7e88, dt.address);
6325
6326         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6327         put_smstate(u16, buf, 0x7e70, seg.selector);
6328         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6329         put_smstate(u32, buf, 0x7e74, seg.limit);
6330         put_smstate(u64, buf, 0x7e78, seg.base);
6331
6332         kvm_x86_ops->get_gdt(vcpu, &dt);
6333         put_smstate(u32, buf, 0x7e64, dt.size);
6334         put_smstate(u64, buf, 0x7e68, dt.address);
6335
6336         for (i = 0; i < 6; i++)
6337                 enter_smm_save_seg_64(vcpu, buf, i);
6338 #else
6339         WARN_ON_ONCE(1);
6340 #endif
6341 }
6342
6343 static void enter_smm(struct kvm_vcpu *vcpu)
6344 {
6345         struct kvm_segment cs, ds;
6346         struct desc_ptr dt;
6347         char buf[512];
6348         u32 cr0;
6349
6350         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6351         vcpu->arch.hflags |= HF_SMM_MASK;
6352         memset(buf, 0, 512);
6353         if (guest_cpuid_has_longmode(vcpu))
6354                 enter_smm_save_state_64(vcpu, buf);
6355         else
6356                 enter_smm_save_state_32(vcpu, buf);
6357
6358         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6359
6360         if (kvm_x86_ops->get_nmi_mask(vcpu))
6361                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6362         else
6363                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6364
6365         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6366         kvm_rip_write(vcpu, 0x8000);
6367
6368         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6369         kvm_x86_ops->set_cr0(vcpu, cr0);
6370         vcpu->arch.cr0 = cr0;
6371
6372         kvm_x86_ops->set_cr4(vcpu, 0);
6373
6374         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6375         dt.address = dt.size = 0;
6376         kvm_x86_ops->set_idt(vcpu, &dt);
6377
6378         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6379
6380         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6381         cs.base = vcpu->arch.smbase;
6382
6383         ds.selector = 0;
6384         ds.base = 0;
6385
6386         cs.limit    = ds.limit = 0xffffffff;
6387         cs.type     = ds.type = 0x3;
6388         cs.dpl      = ds.dpl = 0;
6389         cs.db       = ds.db = 0;
6390         cs.s        = ds.s = 1;
6391         cs.l        = ds.l = 0;
6392         cs.g        = ds.g = 1;
6393         cs.avl      = ds.avl = 0;
6394         cs.present  = ds.present = 1;
6395         cs.unusable = ds.unusable = 0;
6396         cs.padding  = ds.padding = 0;
6397
6398         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6399         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6400         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6401         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6402         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6403         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6404
6405         if (guest_cpuid_has_longmode(vcpu))
6406                 kvm_x86_ops->set_efer(vcpu, 0);
6407
6408         kvm_update_cpuid(vcpu);
6409         kvm_mmu_reset_context(vcpu);
6410 }
6411
6412 static void process_smi(struct kvm_vcpu *vcpu)
6413 {
6414         vcpu->arch.smi_pending = true;
6415         kvm_make_request(KVM_REQ_EVENT, vcpu);
6416 }
6417
6418 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6419 {
6420         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6421 }
6422
6423 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6424 {
6425         u64 eoi_exit_bitmap[4];
6426
6427         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6428                 return;
6429
6430         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6431
6432         if (irqchip_split(vcpu->kvm))
6433                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6434         else {
6435                 if (vcpu->arch.apicv_active)
6436                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6437                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6438         }
6439         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6440                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6441         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6442 }
6443
6444 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6445 {
6446         ++vcpu->stat.tlb_flush;
6447         kvm_x86_ops->tlb_flush(vcpu);
6448 }
6449
6450 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6451 {
6452         struct page *page = NULL;
6453
6454         if (!lapic_in_kernel(vcpu))
6455                 return;
6456
6457         if (!kvm_x86_ops->set_apic_access_page_addr)
6458                 return;
6459
6460         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6461         if (is_error_page(page))
6462                 return;
6463         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6464
6465         /*
6466          * Do not pin apic access page in memory, the MMU notifier
6467          * will call us again if it is migrated or swapped out.
6468          */
6469         put_page(page);
6470 }
6471 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6472
6473 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6474                                            unsigned long address)
6475 {
6476         /*
6477          * The physical address of apic access page is stored in the VMCS.
6478          * Update it when it becomes invalid.
6479          */
6480         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6481                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6482 }
6483
6484 /*
6485  * Returns 1 to let vcpu_run() continue the guest execution loop without
6486  * exiting to the userspace.  Otherwise, the value will be returned to the
6487  * userspace.
6488  */
6489 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6490 {
6491         int r;
6492         bool req_int_win =
6493                 dm_request_for_irq_injection(vcpu) &&
6494                 kvm_cpu_accept_dm_intr(vcpu);
6495
6496         bool req_immediate_exit = false;
6497
6498         if (vcpu->requests) {
6499                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6500                         kvm_mmu_unload(vcpu);
6501                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6502                         __kvm_migrate_timers(vcpu);
6503                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6504                         kvm_gen_update_masterclock(vcpu->kvm);
6505                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6506                         kvm_gen_kvmclock_update(vcpu);
6507                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6508                         r = kvm_guest_time_update(vcpu);
6509                         if (unlikely(r))
6510                                 goto out;
6511                 }
6512                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6513                         kvm_mmu_sync_roots(vcpu);
6514                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6515                         kvm_vcpu_flush_tlb(vcpu);
6516                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6517                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6518                         r = 0;
6519                         goto out;
6520                 }
6521                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6522                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6523                         r = 0;
6524                         goto out;
6525                 }
6526                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6527                         vcpu->fpu_active = 0;
6528                         kvm_x86_ops->fpu_deactivate(vcpu);
6529                 }
6530                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6531                         /* Page is swapped out. Do synthetic halt */
6532                         vcpu->arch.apf.halted = true;
6533                         r = 1;
6534                         goto out;
6535                 }
6536                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6537                         record_steal_time(vcpu);
6538                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6539                         process_smi(vcpu);
6540                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6541                         process_nmi(vcpu);
6542                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6543                         kvm_pmu_handle_event(vcpu);
6544                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6545                         kvm_pmu_deliver_pmi(vcpu);
6546                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6547                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6548                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6549                                      vcpu->arch.ioapic_handled_vectors)) {
6550                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6551                                 vcpu->run->eoi.vector =
6552                                                 vcpu->arch.pending_ioapic_eoi;
6553                                 r = 0;
6554                                 goto out;
6555                         }
6556                 }
6557                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6558                         vcpu_scan_ioapic(vcpu);
6559                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6560                         kvm_vcpu_reload_apic_access_page(vcpu);
6561                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6562                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6563                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6564                         r = 0;
6565                         goto out;
6566                 }
6567                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6568                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6569                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6570                         r = 0;
6571                         goto out;
6572                 }
6573                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6574                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6575                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6576                         r = 0;
6577                         goto out;
6578                 }
6579
6580                 /*
6581                  * KVM_REQ_HV_STIMER has to be processed after
6582                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6583                  * depend on the guest clock being up-to-date
6584                  */
6585                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6586                         kvm_hv_process_stimers(vcpu);
6587         }
6588
6589         /*
6590          * KVM_REQ_EVENT is not set when posted interrupts are set by
6591          * VT-d hardware, so we have to update RVI unconditionally.
6592          */
6593         if (kvm_lapic_enabled(vcpu)) {
6594                 /*
6595                  * Update architecture specific hints for APIC
6596                  * virtual interrupt delivery.
6597                  */
6598                 if (vcpu->arch.apicv_active)
6599                         kvm_x86_ops->hwapic_irr_update(vcpu,
6600                                 kvm_lapic_find_highest_irr(vcpu));
6601         }
6602
6603         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6604                 kvm_apic_accept_events(vcpu);
6605                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6606                         r = 1;
6607                         goto out;
6608                 }
6609
6610                 if (inject_pending_event(vcpu, req_int_win) != 0)
6611                         req_immediate_exit = true;
6612                 else {
6613                         /* Enable NMI/IRQ window open exits if needed.
6614                          *
6615                          * SMIs have two cases: 1) they can be nested, and
6616                          * then there is nothing to do here because RSM will
6617                          * cause a vmexit anyway; 2) or the SMI can be pending
6618                          * because inject_pending_event has completed the
6619                          * injection of an IRQ or NMI from the previous vmexit,
6620                          * and then we request an immediate exit to inject the SMI.
6621                          */
6622                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
6623                                 req_immediate_exit = true;
6624                         if (vcpu->arch.nmi_pending)
6625                                 kvm_x86_ops->enable_nmi_window(vcpu);
6626                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6627                                 kvm_x86_ops->enable_irq_window(vcpu);
6628                 }
6629
6630                 if (kvm_lapic_enabled(vcpu)) {
6631                         update_cr8_intercept(vcpu);
6632                         kvm_lapic_sync_to_vapic(vcpu);
6633                 }
6634         }
6635
6636         r = kvm_mmu_reload(vcpu);
6637         if (unlikely(r)) {
6638                 goto cancel_injection;
6639         }
6640
6641         preempt_disable();
6642
6643         kvm_x86_ops->prepare_guest_switch(vcpu);
6644         if (vcpu->fpu_active)
6645                 kvm_load_guest_fpu(vcpu);
6646         vcpu->mode = IN_GUEST_MODE;
6647
6648         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6649
6650         /*
6651          * We should set ->mode before check ->requests,
6652          * Please see the comment in kvm_make_all_cpus_request.
6653          * This also orders the write to mode from any reads
6654          * to the page tables done while the VCPU is running.
6655          * Please see the comment in kvm_flush_remote_tlbs.
6656          */
6657         smp_mb__after_srcu_read_unlock();
6658
6659         local_irq_disable();
6660
6661         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6662             || need_resched() || signal_pending(current)) {
6663                 vcpu->mode = OUTSIDE_GUEST_MODE;
6664                 smp_wmb();
6665                 local_irq_enable();
6666                 preempt_enable();
6667                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6668                 r = 1;
6669                 goto cancel_injection;
6670         }
6671
6672         kvm_load_guest_xcr0(vcpu);
6673
6674         if (req_immediate_exit) {
6675                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6676                 smp_send_reschedule(vcpu->cpu);
6677         }
6678
6679         trace_kvm_entry(vcpu->vcpu_id);
6680         wait_lapic_expire(vcpu);
6681         guest_enter_irqoff();
6682
6683         if (unlikely(vcpu->arch.switch_db_regs)) {
6684                 set_debugreg(0, 7);
6685                 set_debugreg(vcpu->arch.eff_db[0], 0);
6686                 set_debugreg(vcpu->arch.eff_db[1], 1);
6687                 set_debugreg(vcpu->arch.eff_db[2], 2);
6688                 set_debugreg(vcpu->arch.eff_db[3], 3);
6689                 set_debugreg(vcpu->arch.dr6, 6);
6690                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6691         }
6692
6693         kvm_x86_ops->run(vcpu);
6694
6695         /*
6696          * Do this here before restoring debug registers on the host.  And
6697          * since we do this before handling the vmexit, a DR access vmexit
6698          * can (a) read the correct value of the debug registers, (b) set
6699          * KVM_DEBUGREG_WONT_EXIT again.
6700          */
6701         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6702                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6703                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6704                 kvm_update_dr0123(vcpu);
6705                 kvm_update_dr6(vcpu);
6706                 kvm_update_dr7(vcpu);
6707                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6708         }
6709
6710         /*
6711          * If the guest has used debug registers, at least dr7
6712          * will be disabled while returning to the host.
6713          * If we don't have active breakpoints in the host, we don't
6714          * care about the messed up debug address registers. But if
6715          * we have some of them active, restore the old state.
6716          */
6717         if (hw_breakpoint_active())
6718                 hw_breakpoint_restore();
6719
6720         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6721
6722         vcpu->mode = OUTSIDE_GUEST_MODE;
6723         smp_wmb();
6724
6725         kvm_put_guest_xcr0(vcpu);
6726
6727         /* Interrupt is enabled by handle_external_intr() */
6728         kvm_x86_ops->handle_external_intr(vcpu);
6729
6730         ++vcpu->stat.exits;
6731
6732         guest_exit_irqoff();
6733
6734         local_irq_enable();
6735         preempt_enable();
6736
6737         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6738
6739         /*
6740          * Profile KVM exit RIPs:
6741          */
6742         if (unlikely(prof_on == KVM_PROFILING)) {
6743                 unsigned long rip = kvm_rip_read(vcpu);
6744                 profile_hit(KVM_PROFILING, (void *)rip);
6745         }
6746
6747         if (unlikely(vcpu->arch.tsc_always_catchup))
6748                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6749
6750         if (vcpu->arch.apic_attention)
6751                 kvm_lapic_sync_from_vapic(vcpu);
6752
6753         r = kvm_x86_ops->handle_exit(vcpu);
6754         return r;
6755
6756 cancel_injection:
6757         kvm_x86_ops->cancel_injection(vcpu);
6758         if (unlikely(vcpu->arch.apic_attention))
6759                 kvm_lapic_sync_from_vapic(vcpu);
6760 out:
6761         return r;
6762 }
6763
6764 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6765 {
6766         if (!kvm_arch_vcpu_runnable(vcpu) &&
6767             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6768                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6769                 kvm_vcpu_block(vcpu);
6770                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6771
6772                 if (kvm_x86_ops->post_block)
6773                         kvm_x86_ops->post_block(vcpu);
6774
6775                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6776                         return 1;
6777         }
6778
6779         kvm_apic_accept_events(vcpu);
6780         switch(vcpu->arch.mp_state) {
6781         case KVM_MP_STATE_HALTED:
6782                 vcpu->arch.pv.pv_unhalted = false;
6783                 vcpu->arch.mp_state =
6784                         KVM_MP_STATE_RUNNABLE;
6785         case KVM_MP_STATE_RUNNABLE:
6786                 vcpu->arch.apf.halted = false;
6787                 break;
6788         case KVM_MP_STATE_INIT_RECEIVED:
6789                 break;
6790         default:
6791                 return -EINTR;
6792                 break;
6793         }
6794         return 1;
6795 }
6796
6797 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6798 {
6799         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6800                 !vcpu->arch.apf.halted);
6801 }
6802
6803 static int vcpu_run(struct kvm_vcpu *vcpu)
6804 {
6805         int r;
6806         struct kvm *kvm = vcpu->kvm;
6807
6808         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6809
6810         for (;;) {
6811                 if (kvm_vcpu_running(vcpu)) {
6812                         r = vcpu_enter_guest(vcpu);
6813                 } else {
6814                         r = vcpu_block(kvm, vcpu);
6815                 }
6816
6817                 if (r <= 0)
6818                         break;
6819
6820                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6821                 if (kvm_cpu_has_pending_timer(vcpu))
6822                         kvm_inject_pending_timer_irqs(vcpu);
6823
6824                 if (dm_request_for_irq_injection(vcpu) &&
6825                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6826                         r = 0;
6827                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6828                         ++vcpu->stat.request_irq_exits;
6829                         break;
6830                 }
6831
6832                 kvm_check_async_pf_completion(vcpu);
6833
6834                 if (signal_pending(current)) {
6835                         r = -EINTR;
6836                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6837                         ++vcpu->stat.signal_exits;
6838                         break;
6839                 }
6840                 if (need_resched()) {
6841                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6842                         cond_resched();
6843                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6844                 }
6845         }
6846
6847         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6848
6849         return r;
6850 }
6851
6852 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6853 {
6854         int r;
6855         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6856         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6857         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6858         if (r != EMULATE_DONE)
6859                 return 0;
6860         return 1;
6861 }
6862
6863 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6864 {
6865         BUG_ON(!vcpu->arch.pio.count);
6866
6867         return complete_emulated_io(vcpu);
6868 }
6869
6870 /*
6871  * Implements the following, as a state machine:
6872  *
6873  * read:
6874  *   for each fragment
6875  *     for each mmio piece in the fragment
6876  *       write gpa, len
6877  *       exit
6878  *       copy data
6879  *   execute insn
6880  *
6881  * write:
6882  *   for each fragment
6883  *     for each mmio piece in the fragment
6884  *       write gpa, len
6885  *       copy data
6886  *       exit
6887  */
6888 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6889 {
6890         struct kvm_run *run = vcpu->run;
6891         struct kvm_mmio_fragment *frag;
6892         unsigned len;
6893
6894         BUG_ON(!vcpu->mmio_needed);
6895
6896         /* Complete previous fragment */
6897         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6898         len = min(8u, frag->len);
6899         if (!vcpu->mmio_is_write)
6900                 memcpy(frag->data, run->mmio.data, len);
6901
6902         if (frag->len <= 8) {
6903                 /* Switch to the next fragment. */
6904                 frag++;
6905                 vcpu->mmio_cur_fragment++;
6906         } else {
6907                 /* Go forward to the next mmio piece. */
6908                 frag->data += len;
6909                 frag->gpa += len;
6910                 frag->len -= len;
6911         }
6912
6913         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6914                 vcpu->mmio_needed = 0;
6915
6916                 /* FIXME: return into emulator if single-stepping.  */
6917                 if (vcpu->mmio_is_write)
6918                         return 1;
6919                 vcpu->mmio_read_completed = 1;
6920                 return complete_emulated_io(vcpu);
6921         }
6922
6923         run->exit_reason = KVM_EXIT_MMIO;
6924         run->mmio.phys_addr = frag->gpa;
6925         if (vcpu->mmio_is_write)
6926                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6927         run->mmio.len = min(8u, frag->len);
6928         run->mmio.is_write = vcpu->mmio_is_write;
6929         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6930         return 0;
6931 }
6932
6933
6934 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6935 {
6936         struct fpu *fpu = &current->thread.fpu;
6937         int r;
6938         sigset_t sigsaved;
6939
6940         fpu__activate_curr(fpu);
6941
6942         if (vcpu->sigset_active)
6943                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6944
6945         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6946                 kvm_vcpu_block(vcpu);
6947                 kvm_apic_accept_events(vcpu);
6948                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6949                 r = -EAGAIN;
6950                 goto out;
6951         }
6952
6953         /* re-sync apic's tpr */
6954         if (!lapic_in_kernel(vcpu)) {
6955                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6956                         r = -EINVAL;
6957                         goto out;
6958                 }
6959         }
6960
6961         if (unlikely(vcpu->arch.complete_userspace_io)) {
6962                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6963                 vcpu->arch.complete_userspace_io = NULL;
6964                 r = cui(vcpu);
6965                 if (r <= 0)
6966                         goto out;
6967         } else
6968                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6969
6970         r = vcpu_run(vcpu);
6971
6972 out:
6973         post_kvm_run_save(vcpu);
6974         if (vcpu->sigset_active)
6975                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6976
6977         return r;
6978 }
6979
6980 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6981 {
6982         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6983                 /*
6984                  * We are here if userspace calls get_regs() in the middle of
6985                  * instruction emulation. Registers state needs to be copied
6986                  * back from emulation context to vcpu. Userspace shouldn't do
6987                  * that usually, but some bad designed PV devices (vmware
6988                  * backdoor interface) need this to work
6989                  */
6990                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6991                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6992         }
6993         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6994         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6995         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6996         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6997         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6998         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6999         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7000         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7001 #ifdef CONFIG_X86_64
7002         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7003         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7004         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7005         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7006         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7007         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7008         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7009         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7010 #endif
7011
7012         regs->rip = kvm_rip_read(vcpu);
7013         regs->rflags = kvm_get_rflags(vcpu);
7014
7015         return 0;
7016 }
7017
7018 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7019 {
7020         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7021         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7022
7023         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7024         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7025         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7026         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7027         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7028         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7029         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7030         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7031 #ifdef CONFIG_X86_64
7032         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7033         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7034         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7035         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7036         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7037         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7038         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7039         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7040 #endif
7041
7042         kvm_rip_write(vcpu, regs->rip);
7043         kvm_set_rflags(vcpu, regs->rflags);
7044
7045         vcpu->arch.exception.pending = false;
7046
7047         kvm_make_request(KVM_REQ_EVENT, vcpu);
7048
7049         return 0;
7050 }
7051
7052 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7053 {
7054         struct kvm_segment cs;
7055
7056         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7057         *db = cs.db;
7058         *l = cs.l;
7059 }
7060 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7061
7062 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7063                                   struct kvm_sregs *sregs)
7064 {
7065         struct desc_ptr dt;
7066
7067         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7068         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7069         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7070         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7071         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7072         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7073
7074         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7075         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7076
7077         kvm_x86_ops->get_idt(vcpu, &dt);
7078         sregs->idt.limit = dt.size;
7079         sregs->idt.base = dt.address;
7080         kvm_x86_ops->get_gdt(vcpu, &dt);
7081         sregs->gdt.limit = dt.size;
7082         sregs->gdt.base = dt.address;
7083
7084         sregs->cr0 = kvm_read_cr0(vcpu);
7085         sregs->cr2 = vcpu->arch.cr2;
7086         sregs->cr3 = kvm_read_cr3(vcpu);
7087         sregs->cr4 = kvm_read_cr4(vcpu);
7088         sregs->cr8 = kvm_get_cr8(vcpu);
7089         sregs->efer = vcpu->arch.efer;
7090         sregs->apic_base = kvm_get_apic_base(vcpu);
7091
7092         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7093
7094         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7095                 set_bit(vcpu->arch.interrupt.nr,
7096                         (unsigned long *)sregs->interrupt_bitmap);
7097
7098         return 0;
7099 }
7100
7101 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7102                                     struct kvm_mp_state *mp_state)
7103 {
7104         kvm_apic_accept_events(vcpu);
7105         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7106                                         vcpu->arch.pv.pv_unhalted)
7107                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7108         else
7109                 mp_state->mp_state = vcpu->arch.mp_state;
7110
7111         return 0;
7112 }
7113
7114 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7115                                     struct kvm_mp_state *mp_state)
7116 {
7117         if (!lapic_in_kernel(vcpu) &&
7118             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7119                 return -EINVAL;
7120
7121         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7122                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7123                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7124         } else
7125                 vcpu->arch.mp_state = mp_state->mp_state;
7126         kvm_make_request(KVM_REQ_EVENT, vcpu);
7127         return 0;
7128 }
7129
7130 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7131                     int reason, bool has_error_code, u32 error_code)
7132 {
7133         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7134         int ret;
7135
7136         init_emulate_ctxt(vcpu);
7137
7138         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7139                                    has_error_code, error_code);
7140
7141         if (ret)
7142                 return EMULATE_FAIL;
7143
7144         kvm_rip_write(vcpu, ctxt->eip);
7145         kvm_set_rflags(vcpu, ctxt->eflags);
7146         kvm_make_request(KVM_REQ_EVENT, vcpu);
7147         return EMULATE_DONE;
7148 }
7149 EXPORT_SYMBOL_GPL(kvm_task_switch);
7150
7151 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7152                                   struct kvm_sregs *sregs)
7153 {
7154         struct msr_data apic_base_msr;
7155         int mmu_reset_needed = 0;
7156         int pending_vec, max_bits, idx;
7157         struct desc_ptr dt;
7158
7159         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7160                 return -EINVAL;
7161
7162         dt.size = sregs->idt.limit;
7163         dt.address = sregs->idt.base;
7164         kvm_x86_ops->set_idt(vcpu, &dt);
7165         dt.size = sregs->gdt.limit;
7166         dt.address = sregs->gdt.base;
7167         kvm_x86_ops->set_gdt(vcpu, &dt);
7168
7169         vcpu->arch.cr2 = sregs->cr2;
7170         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7171         vcpu->arch.cr3 = sregs->cr3;
7172         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7173
7174         kvm_set_cr8(vcpu, sregs->cr8);
7175
7176         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7177         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7178         apic_base_msr.data = sregs->apic_base;
7179         apic_base_msr.host_initiated = true;
7180         kvm_set_apic_base(vcpu, &apic_base_msr);
7181
7182         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7183         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7184         vcpu->arch.cr0 = sregs->cr0;
7185
7186         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7187         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7188         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7189                 kvm_update_cpuid(vcpu);
7190
7191         idx = srcu_read_lock(&vcpu->kvm->srcu);
7192         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7193                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7194                 mmu_reset_needed = 1;
7195         }
7196         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7197
7198         if (mmu_reset_needed)
7199                 kvm_mmu_reset_context(vcpu);
7200
7201         max_bits = KVM_NR_INTERRUPTS;
7202         pending_vec = find_first_bit(
7203                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7204         if (pending_vec < max_bits) {
7205                 kvm_queue_interrupt(vcpu, pending_vec, false);
7206                 pr_debug("Set back pending irq %d\n", pending_vec);
7207         }
7208
7209         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7210         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7211         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7212         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7213         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7214         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7215
7216         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7217         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7218
7219         update_cr8_intercept(vcpu);
7220
7221         /* Older userspace won't unhalt the vcpu on reset. */
7222         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7223             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7224             !is_protmode(vcpu))
7225                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7226
7227         kvm_make_request(KVM_REQ_EVENT, vcpu);
7228
7229         return 0;
7230 }
7231
7232 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7233                                         struct kvm_guest_debug *dbg)
7234 {
7235         unsigned long rflags;
7236         int i, r;
7237
7238         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7239                 r = -EBUSY;
7240                 if (vcpu->arch.exception.pending)
7241                         goto out;
7242                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7243                         kvm_queue_exception(vcpu, DB_VECTOR);
7244                 else
7245                         kvm_queue_exception(vcpu, BP_VECTOR);
7246         }
7247
7248         /*
7249          * Read rflags as long as potentially injected trace flags are still
7250          * filtered out.
7251          */
7252         rflags = kvm_get_rflags(vcpu);
7253
7254         vcpu->guest_debug = dbg->control;
7255         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7256                 vcpu->guest_debug = 0;
7257
7258         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7259                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7260                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7261                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7262         } else {
7263                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7264                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7265         }
7266         kvm_update_dr7(vcpu);
7267
7268         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7269                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7270                         get_segment_base(vcpu, VCPU_SREG_CS);
7271
7272         /*
7273          * Trigger an rflags update that will inject or remove the trace
7274          * flags.
7275          */
7276         kvm_set_rflags(vcpu, rflags);
7277
7278         kvm_x86_ops->update_bp_intercept(vcpu);
7279
7280         r = 0;
7281
7282 out:
7283
7284         return r;
7285 }
7286
7287 /*
7288  * Translate a guest virtual address to a guest physical address.
7289  */
7290 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7291                                     struct kvm_translation *tr)
7292 {
7293         unsigned long vaddr = tr->linear_address;
7294         gpa_t gpa;
7295         int idx;
7296
7297         idx = srcu_read_lock(&vcpu->kvm->srcu);
7298         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7299         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7300         tr->physical_address = gpa;
7301         tr->valid = gpa != UNMAPPED_GVA;
7302         tr->writeable = 1;
7303         tr->usermode = 0;
7304
7305         return 0;
7306 }
7307
7308 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7309 {
7310         struct fxregs_state *fxsave =
7311                         &vcpu->arch.guest_fpu.state.fxsave;
7312
7313         memcpy(fpu->fpr, fxsave->st_space, 128);
7314         fpu->fcw = fxsave->cwd;
7315         fpu->fsw = fxsave->swd;
7316         fpu->ftwx = fxsave->twd;
7317         fpu->last_opcode = fxsave->fop;
7318         fpu->last_ip = fxsave->rip;
7319         fpu->last_dp = fxsave->rdp;
7320         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7321
7322         return 0;
7323 }
7324
7325 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7326 {
7327         struct fxregs_state *fxsave =
7328                         &vcpu->arch.guest_fpu.state.fxsave;
7329
7330         memcpy(fxsave->st_space, fpu->fpr, 128);
7331         fxsave->cwd = fpu->fcw;
7332         fxsave->swd = fpu->fsw;
7333         fxsave->twd = fpu->ftwx;
7334         fxsave->fop = fpu->last_opcode;
7335         fxsave->rip = fpu->last_ip;
7336         fxsave->rdp = fpu->last_dp;
7337         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7338
7339         return 0;
7340 }
7341
7342 static void fx_init(struct kvm_vcpu *vcpu)
7343 {
7344         fpstate_init(&vcpu->arch.guest_fpu.state);
7345         if (boot_cpu_has(X86_FEATURE_XSAVES))
7346                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7347                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7348
7349         /*
7350          * Ensure guest xcr0 is valid for loading
7351          */
7352         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7353
7354         vcpu->arch.cr0 |= X86_CR0_ET;
7355 }
7356
7357 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7358 {
7359         if (vcpu->guest_fpu_loaded)
7360                 return;
7361
7362         /*
7363          * Restore all possible states in the guest,
7364          * and assume host would use all available bits.
7365          * Guest xcr0 would be loaded later.
7366          */
7367         vcpu->guest_fpu_loaded = 1;
7368         __kernel_fpu_begin();
7369         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7370         trace_kvm_fpu(1);
7371 }
7372
7373 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7374 {
7375         if (!vcpu->guest_fpu_loaded) {
7376                 vcpu->fpu_counter = 0;
7377                 return;
7378         }
7379
7380         vcpu->guest_fpu_loaded = 0;
7381         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7382         __kernel_fpu_end();
7383         ++vcpu->stat.fpu_reload;
7384         /*
7385          * If using eager FPU mode, or if the guest is a frequent user
7386          * of the FPU, just leave the FPU active for next time.
7387          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7388          * the FPU in bursts will revert to loading it on demand.
7389          */
7390         if (!use_eager_fpu()) {
7391                 if (++vcpu->fpu_counter < 5)
7392                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7393         }
7394         trace_kvm_fpu(0);
7395 }
7396
7397 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7398 {
7399         kvmclock_reset(vcpu);
7400
7401         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7402         kvm_x86_ops->vcpu_free(vcpu);
7403 }
7404
7405 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7406                                                 unsigned int id)
7407 {
7408         struct kvm_vcpu *vcpu;
7409
7410         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7411                 printk_once(KERN_WARNING
7412                 "kvm: SMP vm created on host with unstable TSC; "
7413                 "guest TSC will not be reliable\n");
7414
7415         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7416
7417         return vcpu;
7418 }
7419
7420 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7421 {
7422         int r;
7423
7424         kvm_vcpu_mtrr_init(vcpu);
7425         r = vcpu_load(vcpu);
7426         if (r)
7427                 return r;
7428         kvm_vcpu_reset(vcpu, false);
7429         kvm_mmu_setup(vcpu);
7430         vcpu_put(vcpu);
7431         return r;
7432 }
7433
7434 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7435 {
7436         struct msr_data msr;
7437         struct kvm *kvm = vcpu->kvm;
7438
7439         if (vcpu_load(vcpu))
7440                 return;
7441         msr.data = 0x0;
7442         msr.index = MSR_IA32_TSC;
7443         msr.host_initiated = true;
7444         kvm_write_tsc(vcpu, &msr);
7445         vcpu_put(vcpu);
7446
7447         if (!kvmclock_periodic_sync)
7448                 return;
7449
7450         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7451                                         KVMCLOCK_SYNC_PERIOD);
7452 }
7453
7454 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7455 {
7456         int r;
7457         vcpu->arch.apf.msr_val = 0;
7458
7459         r = vcpu_load(vcpu);
7460         BUG_ON(r);
7461         kvm_mmu_unload(vcpu);
7462         vcpu_put(vcpu);
7463
7464         kvm_x86_ops->vcpu_free(vcpu);
7465 }
7466
7467 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7468 {
7469         vcpu->arch.hflags = 0;
7470
7471         vcpu->arch.smi_pending = 0;
7472         atomic_set(&vcpu->arch.nmi_queued, 0);
7473         vcpu->arch.nmi_pending = 0;
7474         vcpu->arch.nmi_injected = false;
7475         kvm_clear_interrupt_queue(vcpu);
7476         kvm_clear_exception_queue(vcpu);
7477
7478         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7479         kvm_update_dr0123(vcpu);
7480         vcpu->arch.dr6 = DR6_INIT;
7481         kvm_update_dr6(vcpu);
7482         vcpu->arch.dr7 = DR7_FIXED_1;
7483         kvm_update_dr7(vcpu);
7484
7485         vcpu->arch.cr2 = 0;
7486
7487         kvm_make_request(KVM_REQ_EVENT, vcpu);
7488         vcpu->arch.apf.msr_val = 0;
7489         vcpu->arch.st.msr_val = 0;
7490
7491         kvmclock_reset(vcpu);
7492
7493         kvm_clear_async_pf_completion_queue(vcpu);
7494         kvm_async_pf_hash_reset(vcpu);
7495         vcpu->arch.apf.halted = false;
7496
7497         if (!init_event) {
7498                 kvm_pmu_reset(vcpu);
7499                 vcpu->arch.smbase = 0x30000;
7500         }
7501
7502         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7503         vcpu->arch.regs_avail = ~0;
7504         vcpu->arch.regs_dirty = ~0;
7505
7506         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7507 }
7508
7509 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7510 {
7511         struct kvm_segment cs;
7512
7513         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7514         cs.selector = vector << 8;
7515         cs.base = vector << 12;
7516         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7517         kvm_rip_write(vcpu, 0);
7518 }
7519
7520 int kvm_arch_hardware_enable(void)
7521 {
7522         struct kvm *kvm;
7523         struct kvm_vcpu *vcpu;
7524         int i;
7525         int ret;
7526         u64 local_tsc;
7527         u64 max_tsc = 0;
7528         bool stable, backwards_tsc = false;
7529
7530         kvm_shared_msr_cpu_online();
7531         ret = kvm_x86_ops->hardware_enable();
7532         if (ret != 0)
7533                 return ret;
7534
7535         local_tsc = rdtsc();
7536         stable = !check_tsc_unstable();
7537         list_for_each_entry(kvm, &vm_list, vm_list) {
7538                 kvm_for_each_vcpu(i, vcpu, kvm) {
7539                         if (!stable && vcpu->cpu == smp_processor_id())
7540                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7541                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7542                                 backwards_tsc = true;
7543                                 if (vcpu->arch.last_host_tsc > max_tsc)
7544                                         max_tsc = vcpu->arch.last_host_tsc;
7545                         }
7546                 }
7547         }
7548
7549         /*
7550          * Sometimes, even reliable TSCs go backwards.  This happens on
7551          * platforms that reset TSC during suspend or hibernate actions, but
7552          * maintain synchronization.  We must compensate.  Fortunately, we can
7553          * detect that condition here, which happens early in CPU bringup,
7554          * before any KVM threads can be running.  Unfortunately, we can't
7555          * bring the TSCs fully up to date with real time, as we aren't yet far
7556          * enough into CPU bringup that we know how much real time has actually
7557          * elapsed; our helper function, get_kernel_ns() will be using boot
7558          * variables that haven't been updated yet.
7559          *
7560          * So we simply find the maximum observed TSC above, then record the
7561          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7562          * the adjustment will be applied.  Note that we accumulate
7563          * adjustments, in case multiple suspend cycles happen before some VCPU
7564          * gets a chance to run again.  In the event that no KVM threads get a
7565          * chance to run, we will miss the entire elapsed period, as we'll have
7566          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7567          * loose cycle time.  This isn't too big a deal, since the loss will be
7568          * uniform across all VCPUs (not to mention the scenario is extremely
7569          * unlikely). It is possible that a second hibernate recovery happens
7570          * much faster than a first, causing the observed TSC here to be
7571          * smaller; this would require additional padding adjustment, which is
7572          * why we set last_host_tsc to the local tsc observed here.
7573          *
7574          * N.B. - this code below runs only on platforms with reliable TSC,
7575          * as that is the only way backwards_tsc is set above.  Also note
7576          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7577          * have the same delta_cyc adjustment applied if backwards_tsc
7578          * is detected.  Note further, this adjustment is only done once,
7579          * as we reset last_host_tsc on all VCPUs to stop this from being
7580          * called multiple times (one for each physical CPU bringup).
7581          *
7582          * Platforms with unreliable TSCs don't have to deal with this, they
7583          * will be compensated by the logic in vcpu_load, which sets the TSC to
7584          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7585          * guarantee that they stay in perfect synchronization.
7586          */
7587         if (backwards_tsc) {
7588                 u64 delta_cyc = max_tsc - local_tsc;
7589                 backwards_tsc_observed = true;
7590                 list_for_each_entry(kvm, &vm_list, vm_list) {
7591                         kvm_for_each_vcpu(i, vcpu, kvm) {
7592                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7593                                 vcpu->arch.last_host_tsc = local_tsc;
7594                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7595                         }
7596
7597                         /*
7598                          * We have to disable TSC offset matching.. if you were
7599                          * booting a VM while issuing an S4 host suspend....
7600                          * you may have some problem.  Solving this issue is
7601                          * left as an exercise to the reader.
7602                          */
7603                         kvm->arch.last_tsc_nsec = 0;
7604                         kvm->arch.last_tsc_write = 0;
7605                 }
7606
7607         }
7608         return 0;
7609 }
7610
7611 void kvm_arch_hardware_disable(void)
7612 {
7613         kvm_x86_ops->hardware_disable();
7614         drop_user_return_notifiers();
7615 }
7616
7617 int kvm_arch_hardware_setup(void)
7618 {
7619         int r;
7620
7621         r = kvm_x86_ops->hardware_setup();
7622         if (r != 0)
7623                 return r;
7624
7625         if (kvm_has_tsc_control) {
7626                 /*
7627                  * Make sure the user can only configure tsc_khz values that
7628                  * fit into a signed integer.
7629                  * A min value is not calculated needed because it will always
7630                  * be 1 on all machines.
7631                  */
7632                 u64 max = min(0x7fffffffULL,
7633                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7634                 kvm_max_guest_tsc_khz = max;
7635
7636                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7637         }
7638
7639         kvm_init_msr_list();
7640         return 0;
7641 }
7642
7643 void kvm_arch_hardware_unsetup(void)
7644 {
7645         kvm_x86_ops->hardware_unsetup();
7646 }
7647
7648 void kvm_arch_check_processor_compat(void *rtn)
7649 {
7650         kvm_x86_ops->check_processor_compatibility(rtn);
7651 }
7652
7653 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7654 {
7655         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7656 }
7657 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7658
7659 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7660 {
7661         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7662 }
7663
7664 struct static_key kvm_no_apic_vcpu __read_mostly;
7665 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7666
7667 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7668 {
7669         struct page *page;
7670         struct kvm *kvm;
7671         int r;
7672
7673         BUG_ON(vcpu->kvm == NULL);
7674         kvm = vcpu->kvm;
7675
7676         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7677         vcpu->arch.pv.pv_unhalted = false;
7678         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7679         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7680                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7681         else
7682                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7683
7684         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7685         if (!page) {
7686                 r = -ENOMEM;
7687                 goto fail;
7688         }
7689         vcpu->arch.pio_data = page_address(page);
7690
7691         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7692
7693         r = kvm_mmu_create(vcpu);
7694         if (r < 0)
7695                 goto fail_free_pio_data;
7696
7697         if (irqchip_in_kernel(kvm)) {
7698                 r = kvm_create_lapic(vcpu);
7699                 if (r < 0)
7700                         goto fail_mmu_destroy;
7701         } else
7702                 static_key_slow_inc(&kvm_no_apic_vcpu);
7703
7704         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7705                                        GFP_KERNEL);
7706         if (!vcpu->arch.mce_banks) {
7707                 r = -ENOMEM;
7708                 goto fail_free_lapic;
7709         }
7710         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7711
7712         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7713                 r = -ENOMEM;
7714                 goto fail_free_mce_banks;
7715         }
7716
7717         fx_init(vcpu);
7718
7719         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7720         vcpu->arch.pv_time_enabled = false;
7721
7722         vcpu->arch.guest_supported_xcr0 = 0;
7723         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7724
7725         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7726
7727         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7728
7729         kvm_async_pf_hash_reset(vcpu);
7730         kvm_pmu_init(vcpu);
7731
7732         vcpu->arch.pending_external_vector = -1;
7733
7734         kvm_hv_vcpu_init(vcpu);
7735
7736         return 0;
7737
7738 fail_free_mce_banks:
7739         kfree(vcpu->arch.mce_banks);
7740 fail_free_lapic:
7741         kvm_free_lapic(vcpu);
7742 fail_mmu_destroy:
7743         kvm_mmu_destroy(vcpu);
7744 fail_free_pio_data:
7745         free_page((unsigned long)vcpu->arch.pio_data);
7746 fail:
7747         return r;
7748 }
7749
7750 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7751 {
7752         int idx;
7753
7754         kvm_hv_vcpu_uninit(vcpu);
7755         kvm_pmu_destroy(vcpu);
7756         kfree(vcpu->arch.mce_banks);
7757         kvm_free_lapic(vcpu);
7758         idx = srcu_read_lock(&vcpu->kvm->srcu);
7759         kvm_mmu_destroy(vcpu);
7760         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7761         free_page((unsigned long)vcpu->arch.pio_data);
7762         if (!lapic_in_kernel(vcpu))
7763                 static_key_slow_dec(&kvm_no_apic_vcpu);
7764 }
7765
7766 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7767 {
7768         kvm_x86_ops->sched_in(vcpu, cpu);
7769 }
7770
7771 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7772 {
7773         if (type)
7774                 return -EINVAL;
7775
7776         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7777         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7778         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7779         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7780         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7781
7782         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7783         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7784         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7785         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7786                 &kvm->arch.irq_sources_bitmap);
7787
7788         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7789         mutex_init(&kvm->arch.apic_map_lock);
7790         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7791
7792         pvclock_update_vm_gtod_copy(kvm);
7793
7794         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7795         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7796
7797         kvm_page_track_init(kvm);
7798         kvm_mmu_init_vm(kvm);
7799
7800         if (kvm_x86_ops->vm_init)
7801                 return kvm_x86_ops->vm_init(kvm);
7802
7803         return 0;
7804 }
7805
7806 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7807 {
7808         int r;
7809         r = vcpu_load(vcpu);
7810         BUG_ON(r);
7811         kvm_mmu_unload(vcpu);
7812         vcpu_put(vcpu);
7813 }
7814
7815 static void kvm_free_vcpus(struct kvm *kvm)
7816 {
7817         unsigned int i;
7818         struct kvm_vcpu *vcpu;
7819
7820         /*
7821          * Unpin any mmu pages first.
7822          */
7823         kvm_for_each_vcpu(i, vcpu, kvm) {
7824                 kvm_clear_async_pf_completion_queue(vcpu);
7825                 kvm_unload_vcpu_mmu(vcpu);
7826         }
7827         kvm_for_each_vcpu(i, vcpu, kvm)
7828                 kvm_arch_vcpu_free(vcpu);
7829
7830         mutex_lock(&kvm->lock);
7831         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7832                 kvm->vcpus[i] = NULL;
7833
7834         atomic_set(&kvm->online_vcpus, 0);
7835         mutex_unlock(&kvm->lock);
7836 }
7837
7838 void kvm_arch_sync_events(struct kvm *kvm)
7839 {
7840         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7841         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7842         kvm_free_all_assigned_devices(kvm);
7843         kvm_free_pit(kvm);
7844 }
7845
7846 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7847 {
7848         int i, r;
7849         unsigned long hva;
7850         struct kvm_memslots *slots = kvm_memslots(kvm);
7851         struct kvm_memory_slot *slot, old;
7852
7853         /* Called with kvm->slots_lock held.  */
7854         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7855                 return -EINVAL;
7856
7857         slot = id_to_memslot(slots, id);
7858         if (size) {
7859                 if (slot->npages)
7860                         return -EEXIST;
7861
7862                 /*
7863                  * MAP_SHARED to prevent internal slot pages from being moved
7864                  * by fork()/COW.
7865                  */
7866                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7867                               MAP_SHARED | MAP_ANONYMOUS, 0);
7868                 if (IS_ERR((void *)hva))
7869                         return PTR_ERR((void *)hva);
7870         } else {
7871                 if (!slot->npages)
7872                         return 0;
7873
7874                 hva = 0;
7875         }
7876
7877         old = *slot;
7878         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7879                 struct kvm_userspace_memory_region m;
7880
7881                 m.slot = id | (i << 16);
7882                 m.flags = 0;
7883                 m.guest_phys_addr = gpa;
7884                 m.userspace_addr = hva;
7885                 m.memory_size = size;
7886                 r = __kvm_set_memory_region(kvm, &m);
7887                 if (r < 0)
7888                         return r;
7889         }
7890
7891         if (!size) {
7892                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7893                 WARN_ON(r < 0);
7894         }
7895
7896         return 0;
7897 }
7898 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7899
7900 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7901 {
7902         int r;
7903
7904         mutex_lock(&kvm->slots_lock);
7905         r = __x86_set_memory_region(kvm, id, gpa, size);
7906         mutex_unlock(&kvm->slots_lock);
7907
7908         return r;
7909 }
7910 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7911
7912 void kvm_arch_destroy_vm(struct kvm *kvm)
7913 {
7914         if (current->mm == kvm->mm) {
7915                 /*
7916                  * Free memory regions allocated on behalf of userspace,
7917                  * unless the the memory map has changed due to process exit
7918                  * or fd copying.
7919                  */
7920                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7921                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7922                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7923         }
7924         if (kvm_x86_ops->vm_destroy)
7925                 kvm_x86_ops->vm_destroy(kvm);
7926         kvm_iommu_unmap_guest(kvm);
7927         kfree(kvm->arch.vpic);
7928         kfree(kvm->arch.vioapic);
7929         kvm_free_vcpus(kvm);
7930         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7931         kvm_mmu_uninit_vm(kvm);
7932 }
7933
7934 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7935                            struct kvm_memory_slot *dont)
7936 {
7937         int i;
7938
7939         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7940                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7941                         kvfree(free->arch.rmap[i]);
7942                         free->arch.rmap[i] = NULL;
7943                 }
7944                 if (i == 0)
7945                         continue;
7946
7947                 if (!dont || free->arch.lpage_info[i - 1] !=
7948                              dont->arch.lpage_info[i - 1]) {
7949                         kvfree(free->arch.lpage_info[i - 1]);
7950                         free->arch.lpage_info[i - 1] = NULL;
7951                 }
7952         }
7953
7954         kvm_page_track_free_memslot(free, dont);
7955 }
7956
7957 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7958                             unsigned long npages)
7959 {
7960         int i;
7961
7962         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7963                 struct kvm_lpage_info *linfo;
7964                 unsigned long ugfn;
7965                 int lpages;
7966                 int level = i + 1;
7967
7968                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7969                                       slot->base_gfn, level) + 1;
7970
7971                 slot->arch.rmap[i] =
7972                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7973                 if (!slot->arch.rmap[i])
7974                         goto out_free;
7975                 if (i == 0)
7976                         continue;
7977
7978                 linfo = kvm_kvzalloc(lpages * sizeof(*linfo));
7979                 if (!linfo)
7980                         goto out_free;
7981
7982                 slot->arch.lpage_info[i - 1] = linfo;
7983
7984                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7985                         linfo[0].disallow_lpage = 1;
7986                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7987                         linfo[lpages - 1].disallow_lpage = 1;
7988                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7989                 /*
7990                  * If the gfn and userspace address are not aligned wrt each
7991                  * other, or if explicitly asked to, disable large page
7992                  * support for this slot
7993                  */
7994                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7995                     !kvm_largepages_enabled()) {
7996                         unsigned long j;
7997
7998                         for (j = 0; j < lpages; ++j)
7999                                 linfo[j].disallow_lpage = 1;
8000                 }
8001         }
8002
8003         if (kvm_page_track_create_memslot(slot, npages))
8004                 goto out_free;
8005
8006         return 0;
8007
8008 out_free:
8009         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8010                 kvfree(slot->arch.rmap[i]);
8011                 slot->arch.rmap[i] = NULL;
8012                 if (i == 0)
8013                         continue;
8014
8015                 kvfree(slot->arch.lpage_info[i - 1]);
8016                 slot->arch.lpage_info[i - 1] = NULL;
8017         }
8018         return -ENOMEM;
8019 }
8020
8021 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8022 {
8023         /*
8024          * memslots->generation has been incremented.
8025          * mmio generation may have reached its maximum value.
8026          */
8027         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8028 }
8029
8030 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8031                                 struct kvm_memory_slot *memslot,
8032                                 const struct kvm_userspace_memory_region *mem,
8033                                 enum kvm_mr_change change)
8034 {
8035         return 0;
8036 }
8037
8038 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8039                                      struct kvm_memory_slot *new)
8040 {
8041         /* Still write protect RO slot */
8042         if (new->flags & KVM_MEM_READONLY) {
8043                 kvm_mmu_slot_remove_write_access(kvm, new);
8044                 return;
8045         }
8046
8047         /*
8048          * Call kvm_x86_ops dirty logging hooks when they are valid.
8049          *
8050          * kvm_x86_ops->slot_disable_log_dirty is called when:
8051          *
8052          *  - KVM_MR_CREATE with dirty logging is disabled
8053          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8054          *
8055          * The reason is, in case of PML, we need to set D-bit for any slots
8056          * with dirty logging disabled in order to eliminate unnecessary GPA
8057          * logging in PML buffer (and potential PML buffer full VMEXT). This
8058          * guarantees leaving PML enabled during guest's lifetime won't have
8059          * any additonal overhead from PML when guest is running with dirty
8060          * logging disabled for memory slots.
8061          *
8062          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8063          * to dirty logging mode.
8064          *
8065          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8066          *
8067          * In case of write protect:
8068          *
8069          * Write protect all pages for dirty logging.
8070          *
8071          * All the sptes including the large sptes which point to this
8072          * slot are set to readonly. We can not create any new large
8073          * spte on this slot until the end of the logging.
8074          *
8075          * See the comments in fast_page_fault().
8076          */
8077         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8078                 if (kvm_x86_ops->slot_enable_log_dirty)
8079                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8080                 else
8081                         kvm_mmu_slot_remove_write_access(kvm, new);
8082         } else {
8083                 if (kvm_x86_ops->slot_disable_log_dirty)
8084                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8085         }
8086 }
8087
8088 void kvm_arch_commit_memory_region(struct kvm *kvm,
8089                                 const struct kvm_userspace_memory_region *mem,
8090                                 const struct kvm_memory_slot *old,
8091                                 const struct kvm_memory_slot *new,
8092                                 enum kvm_mr_change change)
8093 {
8094         int nr_mmu_pages = 0;
8095
8096         if (!kvm->arch.n_requested_mmu_pages)
8097                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8098
8099         if (nr_mmu_pages)
8100                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8101
8102         /*
8103          * Dirty logging tracks sptes in 4k granularity, meaning that large
8104          * sptes have to be split.  If live migration is successful, the guest
8105          * in the source machine will be destroyed and large sptes will be
8106          * created in the destination. However, if the guest continues to run
8107          * in the source machine (for example if live migration fails), small
8108          * sptes will remain around and cause bad performance.
8109          *
8110          * Scan sptes if dirty logging has been stopped, dropping those
8111          * which can be collapsed into a single large-page spte.  Later
8112          * page faults will create the large-page sptes.
8113          */
8114         if ((change != KVM_MR_DELETE) &&
8115                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8116                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8117                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8118
8119         /*
8120          * Set up write protection and/or dirty logging for the new slot.
8121          *
8122          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8123          * been zapped so no dirty logging staff is needed for old slot. For
8124          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8125          * new and it's also covered when dealing with the new slot.
8126          *
8127          * FIXME: const-ify all uses of struct kvm_memory_slot.
8128          */
8129         if (change != KVM_MR_DELETE)
8130                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8131 }
8132
8133 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8134 {
8135         kvm_mmu_invalidate_zap_all_pages(kvm);
8136 }
8137
8138 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8139                                    struct kvm_memory_slot *slot)
8140 {
8141         kvm_mmu_invalidate_zap_all_pages(kvm);
8142 }
8143
8144 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8145 {
8146         if (!list_empty_careful(&vcpu->async_pf.done))
8147                 return true;
8148
8149         if (kvm_apic_has_events(vcpu))
8150                 return true;
8151
8152         if (vcpu->arch.pv.pv_unhalted)
8153                 return true;
8154
8155         if (atomic_read(&vcpu->arch.nmi_queued))
8156                 return true;
8157
8158         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8159                 return true;
8160
8161         if (kvm_arch_interrupt_allowed(vcpu) &&
8162             kvm_cpu_has_interrupt(vcpu))
8163                 return true;
8164
8165         if (kvm_hv_has_stimer_pending(vcpu))
8166                 return true;
8167
8168         return false;
8169 }
8170
8171 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8172 {
8173         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8174                 kvm_x86_ops->check_nested_events(vcpu, false);
8175
8176         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8177 }
8178
8179 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8180 {
8181         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8182 }
8183
8184 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8185 {
8186         return kvm_x86_ops->interrupt_allowed(vcpu);
8187 }
8188
8189 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8190 {
8191         if (is_64_bit_mode(vcpu))
8192                 return kvm_rip_read(vcpu);
8193         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8194                      kvm_rip_read(vcpu));
8195 }
8196 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8197
8198 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8199 {
8200         return kvm_get_linear_rip(vcpu) == linear_rip;
8201 }
8202 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8203
8204 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8205 {
8206         unsigned long rflags;
8207
8208         rflags = kvm_x86_ops->get_rflags(vcpu);
8209         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8210                 rflags &= ~X86_EFLAGS_TF;
8211         return rflags;
8212 }
8213 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8214
8215 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8216 {
8217         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8218             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8219                 rflags |= X86_EFLAGS_TF;
8220         kvm_x86_ops->set_rflags(vcpu, rflags);
8221 }
8222
8223 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8224 {
8225         __kvm_set_rflags(vcpu, rflags);
8226         kvm_make_request(KVM_REQ_EVENT, vcpu);
8227 }
8228 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8229
8230 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8231 {
8232         int r;
8233
8234         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8235               work->wakeup_all)
8236                 return;
8237
8238         r = kvm_mmu_reload(vcpu);
8239         if (unlikely(r))
8240                 return;
8241
8242         if (!vcpu->arch.mmu.direct_map &&
8243               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8244                 return;
8245
8246         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8247 }
8248
8249 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8250 {
8251         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8252 }
8253
8254 static inline u32 kvm_async_pf_next_probe(u32 key)
8255 {
8256         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8257 }
8258
8259 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8260 {
8261         u32 key = kvm_async_pf_hash_fn(gfn);
8262
8263         while (vcpu->arch.apf.gfns[key] != ~0)
8264                 key = kvm_async_pf_next_probe(key);
8265
8266         vcpu->arch.apf.gfns[key] = gfn;
8267 }
8268
8269 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8270 {
8271         int i;
8272         u32 key = kvm_async_pf_hash_fn(gfn);
8273
8274         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8275                      (vcpu->arch.apf.gfns[key] != gfn &&
8276                       vcpu->arch.apf.gfns[key] != ~0); i++)
8277                 key = kvm_async_pf_next_probe(key);
8278
8279         return key;
8280 }
8281
8282 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8283 {
8284         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8285 }
8286
8287 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8288 {
8289         u32 i, j, k;
8290
8291         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8292         while (true) {
8293                 vcpu->arch.apf.gfns[i] = ~0;
8294                 do {
8295                         j = kvm_async_pf_next_probe(j);
8296                         if (vcpu->arch.apf.gfns[j] == ~0)
8297                                 return;
8298                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8299                         /*
8300                          * k lies cyclically in ]i,j]
8301                          * |    i.k.j |
8302                          * |....j i.k.| or  |.k..j i...|
8303                          */
8304                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8305                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8306                 i = j;
8307         }
8308 }
8309
8310 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8311 {
8312
8313         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8314                                       sizeof(val));
8315 }
8316
8317 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8318                                      struct kvm_async_pf *work)
8319 {
8320         struct x86_exception fault;
8321
8322         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8323         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8324
8325         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8326             (vcpu->arch.apf.send_user_only &&
8327              kvm_x86_ops->get_cpl(vcpu) == 0))
8328                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8329         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8330                 fault.vector = PF_VECTOR;
8331                 fault.error_code_valid = true;
8332                 fault.error_code = 0;
8333                 fault.nested_page_fault = false;
8334                 fault.address = work->arch.token;
8335                 kvm_inject_page_fault(vcpu, &fault);
8336         }
8337 }
8338
8339 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8340                                  struct kvm_async_pf *work)
8341 {
8342         struct x86_exception fault;
8343
8344         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8345         if (work->wakeup_all)
8346                 work->arch.token = ~0; /* broadcast wakeup */
8347         else
8348                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8349
8350         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8351             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8352                 fault.vector = PF_VECTOR;
8353                 fault.error_code_valid = true;
8354                 fault.error_code = 0;
8355                 fault.nested_page_fault = false;
8356                 fault.address = work->arch.token;
8357                 kvm_inject_page_fault(vcpu, &fault);
8358         }
8359         vcpu->arch.apf.halted = false;
8360         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8361 }
8362
8363 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8364 {
8365         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8366                 return true;
8367         else
8368                 return !kvm_event_needs_reinjection(vcpu) &&
8369                         kvm_x86_ops->interrupt_allowed(vcpu);
8370 }
8371
8372 void kvm_arch_start_assignment(struct kvm *kvm)
8373 {
8374         atomic_inc(&kvm->arch.assigned_device_count);
8375 }
8376 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8377
8378 void kvm_arch_end_assignment(struct kvm *kvm)
8379 {
8380         atomic_dec(&kvm->arch.assigned_device_count);
8381 }
8382 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8383
8384 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8385 {
8386         return atomic_read(&kvm->arch.assigned_device_count);
8387 }
8388 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8389
8390 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8391 {
8392         atomic_inc(&kvm->arch.noncoherent_dma_count);
8393 }
8394 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8395
8396 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8397 {
8398         atomic_dec(&kvm->arch.noncoherent_dma_count);
8399 }
8400 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8401
8402 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8403 {
8404         return atomic_read(&kvm->arch.noncoherent_dma_count);
8405 }
8406 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8407
8408 bool kvm_arch_has_irq_bypass(void)
8409 {
8410         return kvm_x86_ops->update_pi_irte != NULL;
8411 }
8412
8413 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8414                                       struct irq_bypass_producer *prod)
8415 {
8416         struct kvm_kernel_irqfd *irqfd =
8417                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8418
8419         irqfd->producer = prod;
8420
8421         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8422                                            prod->irq, irqfd->gsi, 1);
8423 }
8424
8425 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8426                                       struct irq_bypass_producer *prod)
8427 {
8428         int ret;
8429         struct kvm_kernel_irqfd *irqfd =
8430                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8431
8432         WARN_ON(irqfd->producer != prod);
8433         irqfd->producer = NULL;
8434
8435         /*
8436          * When producer of consumer is unregistered, we change back to
8437          * remapped mode, so we can re-use the current implementation
8438          * when the irq is masked/disabled or the consumer side (KVM
8439          * int this case doesn't want to receive the interrupts.
8440         */
8441         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8442         if (ret)
8443                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8444                        " fails: %d\n", irqfd->consumer.token, ret);
8445 }
8446
8447 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8448                                    uint32_t guest_irq, bool set)
8449 {
8450         if (!kvm_x86_ops->update_pi_irte)
8451                 return -EINVAL;
8452
8453         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8454 }
8455
8456 bool kvm_vector_hashing_enabled(void)
8457 {
8458         return vector_hashing;
8459 }
8460 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8461
8462 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8463 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8464 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8465 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8466 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8467 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8468 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8469 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8470 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8471 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8472 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8473 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8474 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8475 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8476 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8477 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8478 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
8479 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
8480 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);