arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <trace/events/kvm.h>
  52
  53 #define CREATE_TRACE_POINTS
  54 #include "trace.h"
  55
  56 #include <asm/debugreg.h>
  57 #include <asm/msr.h>
  58 #include <asm/desc.h>
  59 #include <asm/mtrr.h>
  60 #include <asm/mce.h>
  61 #include <asm/i387.h>
  62 #include <asm/fpu-internal.h> /* Ugh! */
  63 #include <asm/xcr.h>
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66
  67 #define MAX_IO_MSRS 256
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  70
  71 #define emul_to_vcpu(ctxt) \
  72         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  73
  74 /* EFER defaults:
  75  * - enable syscall per default because its emulated by KVM
  76  * - enable LME and LMA per default on 64 bit KVM
  77  */
  78 #ifdef CONFIG_X86_64
  79 static
  80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  81 #else
  82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  83 #endif
  84
  85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  87
  88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  89 static void process_nmi(struct kvm_vcpu *vcpu);
  90 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  91
  92 struct kvm_x86_ops *kvm_x86_ops;
  93 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  94
  95 static bool ignore_msrs = 0;
  96 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  97
  98 unsigned int min_timer_period_us = 500;
  99 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 100
 101 bool kvm_has_tsc_control;
 102 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 103 u32  kvm_max_guest_tsc_khz;
 104 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 105
 106 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 107 static u32 tsc_tolerance_ppm = 250;
 108 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 109
 110 static bool backwards_tsc_observed = false;
 111
 112 #define KVM_NR_SHARED_MSRS 16
 113
 114 struct kvm_shared_msrs_global {
 115         int nr;
 116         u32 msrs[KVM_NR_SHARED_MSRS];
 117 };
 118
 119 struct kvm_shared_msrs {
 120         struct user_return_notifier urn;
 121         bool registered;
 122         struct kvm_shared_msr_values {
 123                 u64 host;
 124                 u64 curr;
 125         } values[KVM_NR_SHARED_MSRS];
 126 };
 127
 128 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 129 static struct kvm_shared_msrs __percpu *shared_msrs;
 130
 131 struct kvm_stats_debugfs_item debugfs_entries[] = {
 132         { "pf_fixed", VCPU_STAT(pf_fixed) },
 133         { "pf_guest", VCPU_STAT(pf_guest) },
 134         { "tlb_flush", VCPU_STAT(tlb_flush) },
 135         { "invlpg", VCPU_STAT(invlpg) },
 136         { "exits", VCPU_STAT(exits) },
 137         { "io_exits", VCPU_STAT(io_exits) },
 138         { "mmio_exits", VCPU_STAT(mmio_exits) },
 139         { "signal_exits", VCPU_STAT(signal_exits) },
 140         { "irq_window", VCPU_STAT(irq_window_exits) },
 141         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 142         { "halt_exits", VCPU_STAT(halt_exits) },
 143         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 144         { "hypercalls", VCPU_STAT(hypercalls) },
 145         { "request_irq", VCPU_STAT(request_irq_exits) },
 146         { "irq_exits", VCPU_STAT(irq_exits) },
 147         { "host_state_reload", VCPU_STAT(host_state_reload) },
 148         { "efer_reload", VCPU_STAT(efer_reload) },
 149         { "fpu_reload", VCPU_STAT(fpu_reload) },
 150         { "insn_emulation", VCPU_STAT(insn_emulation) },
 151         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 152         { "irq_injections", VCPU_STAT(irq_injections) },
 153         { "nmi_injections", VCPU_STAT(nmi_injections) },
 154         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 155         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 156         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 157         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 158         { "mmu_flooded", VM_STAT(mmu_flooded) },
 159         { "mmu_recycled", VM_STAT(mmu_recycled) },
 160         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 161         { "mmu_unsync", VM_STAT(mmu_unsync) },
 162         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 163         { "largepages", VM_STAT(lpages) },
 164         { NULL }
 165 };
 166
 167 u64 __read_mostly host_xcr0;
 168
 169 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 170
 171 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 172 {
 173         int i;
 174         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 175                 vcpu->arch.apf.gfns[i] = ~0;
 176 }
 177
 178 static void kvm_on_user_return(struct user_return_notifier *urn)
 179 {
 180         unsigned slot;
 181         struct kvm_shared_msrs *locals
 182                 = container_of(urn, struct kvm_shared_msrs, urn);
 183         struct kvm_shared_msr_values *values;
 184
 185         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 186                 values = &locals->values[slot];
 187                 if (values->host != values->curr) {
 188                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 189                         values->curr = values->host;
 190                 }
 191         }
 192         locals->registered = false;
 193         user_return_notifier_unregister(urn);
 194 }
 195
 196 static void shared_msr_update(unsigned slot, u32 msr)
 197 {
 198         u64 value;
 199         unsigned int cpu = smp_processor_id();
 200         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 201
 202         /* only read, and nobody should modify it at this time,
 203          * so don't need lock */
 204         if (slot >= shared_msrs_global.nr) {
 205                 printk(KERN_ERR "kvm: invalid MSR slot!");
 206                 return;
 207         }
 208         rdmsrl_safe(msr, &value);
 209         smsr->values[slot].host = value;
 210         smsr->values[slot].curr = value;
 211 }
 212
 213 void kvm_define_shared_msr(unsigned slot, u32 msr)
 214 {
 215         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 216         if (slot >= shared_msrs_global.nr)
 217                 shared_msrs_global.nr = slot + 1;
 218         shared_msrs_global.msrs[slot] = msr;
 219         /* we need ensured the shared_msr_global have been updated */
 220         smp_wmb();
 221 }
 222 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 223
 224 static void kvm_shared_msr_cpu_online(void)
 225 {
 226         unsigned i;
 227
 228         for (i = 0; i < shared_msrs_global.nr; ++i)
 229                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 230 }
 231
 232 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 233 {
 234         unsigned int cpu = smp_processor_id();
 235         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 236
 237         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 238                 return;
 239         smsr->values[slot].curr = value;
 240         wrmsrl(shared_msrs_global.msrs[slot], value);
 241         if (!smsr->registered) {
 242                 smsr->urn.on_user_return = kvm_on_user_return;
 243                 user_return_notifier_register(&smsr->urn);
 244                 smsr->registered = true;
 245         }
 246 }
 247 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 248
 249 static void drop_user_return_notifiers(void *ignore)
 250 {
 251         unsigned int cpu = smp_processor_id();
 252         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 253
 254         if (smsr->registered)
 255                 kvm_on_user_return(&smsr->urn);
 256 }
 257
 258 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 259 {
 260         return vcpu->arch.apic_base;
 261 }
 262 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 263
 264 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 265 {
 266         u64 old_state = vcpu->arch.apic_base &
 267                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 268         u64 new_state = msr_info->data &
 269                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 270         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 271                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 272
 273         if (!msr_info->host_initiated &&
 274             ((msr_info->data & reserved_bits) != 0 ||
 275              new_state == X2APIC_ENABLE ||
 276              (new_state == MSR_IA32_APICBASE_ENABLE &&
 277               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 278              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 279               old_state == 0)))
 280                 return 1;
 281
 282         kvm_lapic_set_base(vcpu, msr_info->data);
 283         return 0;
 284 }
 285 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 286
 287 asmlinkage __visible void kvm_spurious_fault(void)
 288 {
 289         /* Fault while not rebooting.  We want the trace. */
 290         BUG();
 291 }
 292 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 293
 294 #define EXCPT_BENIGN            0
 295 #define EXCPT_CONTRIBUTORY      1
 296 #define EXCPT_PF                2
 297
 298 static int exception_class(int vector)
 299 {
 300         switch (vector) {
 301         case PF_VECTOR:
 302                 return EXCPT_PF;
 303         case DE_VECTOR:
 304         case TS_VECTOR:
 305         case NP_VECTOR:
 306         case SS_VECTOR:
 307         case GP_VECTOR:
 308                 return EXCPT_CONTRIBUTORY;
 309         default:
 310                 break;
 311         }
 312         return EXCPT_BENIGN;
 313 }
 314
 315 #define EXCPT_FAULT             0
 316 #define EXCPT_TRAP              1
 317 #define EXCPT_ABORT             2
 318 #define EXCPT_INTERRUPT         3
 319
 320 static int exception_type(int vector)
 321 {
 322         unsigned int mask;
 323
 324         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 325                 return EXCPT_INTERRUPT;
 326
 327         mask = 1 << vector;
 328
 329         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 330         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 331                 return EXCPT_TRAP;
 332
 333         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 334                 return EXCPT_ABORT;
 335
 336         /* Reserved exceptions will result in fault */
 337         return EXCPT_FAULT;
 338 }
 339
 340 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 341                 unsigned nr, bool has_error, u32 error_code,
 342                 bool reinject)
 343 {
 344         u32 prev_nr;
 345         int class1, class2;
 346
 347         kvm_make_request(KVM_REQ_EVENT, vcpu);
 348
 349         if (!vcpu->arch.exception.pending) {
 350         queue:
 351                 vcpu->arch.exception.pending = true;
 352                 vcpu->arch.exception.has_error_code = has_error;
 353                 vcpu->arch.exception.nr = nr;
 354                 vcpu->arch.exception.error_code = error_code;
 355                 vcpu->arch.exception.reinject = reinject;
 356                 return;
 357         }
 358
 359         /* to check exception */
 360         prev_nr = vcpu->arch.exception.nr;
 361         if (prev_nr == DF_VECTOR) {
 362                 /* triple fault -> shutdown */
 363                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 364                 return;
 365         }
 366         class1 = exception_class(prev_nr);
 367         class2 = exception_class(nr);
 368         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 369                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 370                 /* generate double fault per SDM Table 5-5 */
 371                 vcpu->arch.exception.pending = true;
 372                 vcpu->arch.exception.has_error_code = true;
 373                 vcpu->arch.exception.nr = DF_VECTOR;
 374                 vcpu->arch.exception.error_code = 0;
 375         } else
 376                 /* replace previous exception with a new one in a hope
 377                    that instruction re-execution will regenerate lost
 378                    exception */
 379                 goto queue;
 380 }
 381
 382 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 383 {
 384         kvm_multiple_exception(vcpu, nr, false, 0, false);
 385 }
 386 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 387
 388 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 389 {
 390         kvm_multiple_exception(vcpu, nr, false, 0, true);
 391 }
 392 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 393
 394 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 395 {
 396         if (err)
 397                 kvm_inject_gp(vcpu, 0);
 398         else
 399                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 400 }
 401 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 402
 403 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 404 {
 405         ++vcpu->stat.pf_guest;
 406         vcpu->arch.cr2 = fault->address;
 407         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 408 }
 409 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 410
 411 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 412 {
 413         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 414                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 415         else
 416                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 417 }
 418
 419 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 420 {
 421         atomic_inc(&vcpu->arch.nmi_queued);
 422         kvm_make_request(KVM_REQ_NMI, vcpu);
 423 }
 424 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 425
 426 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 427 {
 428         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 429 }
 430 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 431
 432 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 433 {
 434         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 435 }
 436 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 437
 438 /*
 439  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 440  * a #GP and return false.
 441  */
 442 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 443 {
 444         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 445                 return true;
 446         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 447         return false;
 448 }
 449 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 450
 451 /*
 452  * This function will be used to read from the physical memory of the currently
 453  * running guest. The difference to kvm_read_guest_page is that this function
 454  * can read from guest physical or from the guest's guest physical memory.
 455  */
 456 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 457                             gfn_t ngfn, void *data, int offset, int len,
 458                             u32 access)
 459 {
 460         gfn_t real_gfn;
 461         gpa_t ngpa;
 462
 463         ngpa     = gfn_to_gpa(ngfn);
 464         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 465         if (real_gfn == UNMAPPED_GVA)
 466                 return -EFAULT;
 467
 468         real_gfn = gpa_to_gfn(real_gfn);
 469
 470         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 471 }
 472 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 473
 474 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 475                                void *data, int offset, int len, u32 access)
 476 {
 477         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 478                                        data, offset, len, access);
 479 }
 480
 481 /*
 482  * Load the pae pdptrs.  Return true is they are all valid.
 483  */
 484 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 485 {
 486         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 487         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 488         int i;
 489         int ret;
 490         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 491
 492         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 493                                       offset * sizeof(u64), sizeof(pdpte),
 494                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 495         if (ret < 0) {
 496                 ret = 0;
 497                 goto out;
 498         }
 499         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 500                 if (is_present_gpte(pdpte[i]) &&
 501                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 502                         ret = 0;
 503                         goto out;
 504                 }
 505         }
 506         ret = 1;
 507
 508         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 509         __set_bit(VCPU_EXREG_PDPTR,
 510                   (unsigned long *)&vcpu->arch.regs_avail);
 511         __set_bit(VCPU_EXREG_PDPTR,
 512                   (unsigned long *)&vcpu->arch.regs_dirty);
 513 out:
 514
 515         return ret;
 516 }
 517 EXPORT_SYMBOL_GPL(load_pdptrs);
 518
 519 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 520 {
 521         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 522         bool changed = true;
 523         int offset;
 524         gfn_t gfn;
 525         int r;
 526
 527         if (is_long_mode(vcpu) || !is_pae(vcpu))
 528                 return false;
 529
 530         if (!test_bit(VCPU_EXREG_PDPTR,
 531                       (unsigned long *)&vcpu->arch.regs_avail))
 532                 return true;
 533
 534         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 535         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 536         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 537                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 538         if (r < 0)
 539                 goto out;
 540         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 541 out:
 542
 543         return changed;
 544 }
 545
 546 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 547 {
 548         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 549         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 550                                     X86_CR0_CD | X86_CR0_NW;
 551
 552         cr0 |= X86_CR0_ET;
 553
 554 #ifdef CONFIG_X86_64
 555         if (cr0 & 0xffffffff00000000UL)
 556                 return 1;
 557 #endif
 558
 559         cr0 &= ~CR0_RESERVED_BITS;
 560
 561         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 562                 return 1;
 563
 564         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 565                 return 1;
 566
 567         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 568 #ifdef CONFIG_X86_64
 569                 if ((vcpu->arch.efer & EFER_LME)) {
 570                         int cs_db, cs_l;
 571
 572                         if (!is_pae(vcpu))
 573                                 return 1;
 574                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 575                         if (cs_l)
 576                                 return 1;
 577                 } else
 578 #endif
 579                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 580                                                  kvm_read_cr3(vcpu)))
 581                         return 1;
 582         }
 583
 584         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 585                 return 1;
 586
 587         kvm_x86_ops->set_cr0(vcpu, cr0);
 588
 589         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 590                 kvm_clear_async_pf_completion_queue(vcpu);
 591                 kvm_async_pf_hash_reset(vcpu);
 592         }
 593
 594         if ((cr0 ^ old_cr0) & update_bits)
 595                 kvm_mmu_reset_context(vcpu);
 596         return 0;
 597 }
 598 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 599
 600 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 601 {
 602         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 603 }
 604 EXPORT_SYMBOL_GPL(kvm_lmsw);
 605
 606 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 607 {
 608         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 609                         !vcpu->guest_xcr0_loaded) {
 610                 /* kvm_set_xcr() also depends on this */
 611                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 612                 vcpu->guest_xcr0_loaded = 1;
 613         }
 614 }
 615
 616 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 617 {
 618         if (vcpu->guest_xcr0_loaded) {
 619                 if (vcpu->arch.xcr0 != host_xcr0)
 620                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 621                 vcpu->guest_xcr0_loaded = 0;
 622         }
 623 }
 624
 625 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 626 {
 627         u64 xcr0 = xcr;
 628         u64 old_xcr0 = vcpu->arch.xcr0;
 629         u64 valid_bits;
 630
 631         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 632         if (index != XCR_XFEATURE_ENABLED_MASK)
 633                 return 1;
 634         if (!(xcr0 & XSTATE_FP))
 635                 return 1;
 636         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 637                 return 1;
 638
 639         /*
 640          * Do not allow the guest to set bits that we do not support
 641          * saving.  However, xcr0 bit 0 is always set, even if the
 642          * emulated CPU does not support XSAVE (see fx_init).
 643          */
 644         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 645         if (xcr0 & ~valid_bits)
 646                 return 1;
 647
 648         if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
 649                 return 1;
 650
 651         kvm_put_guest_xcr0(vcpu);
 652         vcpu->arch.xcr0 = xcr0;
 653
 654         if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
 655                 kvm_update_cpuid(vcpu);
 656         return 0;
 657 }
 658
 659 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 660 {
 661         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 662             __kvm_set_xcr(vcpu, index, xcr)) {
 663                 kvm_inject_gp(vcpu, 0);
 664                 return 1;
 665         }
 666         return 0;
 667 }
 668 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 669
 670 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 671 {
 672         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 673         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 674                                    X86_CR4_PAE | X86_CR4_SMEP;
 675         if (cr4 & CR4_RESERVED_BITS)
 676                 return 1;
 677
 678         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 679                 return 1;
 680
 681         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 682                 return 1;
 683
 684         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 685                 return 1;
 686
 687         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 688                 return 1;
 689
 690         if (is_long_mode(vcpu)) {
 691                 if (!(cr4 & X86_CR4_PAE))
 692                         return 1;
 693         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 694                    && ((cr4 ^ old_cr4) & pdptr_bits)
 695                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 696                                    kvm_read_cr3(vcpu)))
 697                 return 1;
 698
 699         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 700                 if (!guest_cpuid_has_pcid(vcpu))
 701                         return 1;
 702
 703                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 704                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 705                         return 1;
 706         }
 707
 708         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 709                 return 1;
 710
 711         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 712             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 713                 kvm_mmu_reset_context(vcpu);
 714
 715         if ((cr4 ^ old_cr4) & X86_CR4_SMAP)
 716                 update_permission_bitmask(vcpu, vcpu->arch.walk_mmu, false);
 717
 718         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 719                 kvm_update_cpuid(vcpu);
 720
 721         return 0;
 722 }
 723 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 724
 725 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 726 {
 727         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 728                 kvm_mmu_sync_roots(vcpu);
 729                 kvm_mmu_flush_tlb(vcpu);
 730                 return 0;
 731         }
 732
 733         if (is_long_mode(vcpu)) {
 734                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 735                         return 1;
 736         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 737                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 738                 return 1;
 739
 740         vcpu->arch.cr3 = cr3;
 741         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 742         kvm_mmu_new_cr3(vcpu);
 743         return 0;
 744 }
 745 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 746
 747 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 748 {
 749         if (cr8 & CR8_RESERVED_BITS)
 750                 return 1;
 751         if (irqchip_in_kernel(vcpu->kvm))
 752                 kvm_lapic_set_tpr(vcpu, cr8);
 753         else
 754                 vcpu->arch.cr8 = cr8;
 755         return 0;
 756 }
 757 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 758
 759 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 760 {
 761         if (irqchip_in_kernel(vcpu->kvm))
 762                 return kvm_lapic_get_cr8(vcpu);
 763         else
 764                 return vcpu->arch.cr8;
 765 }
 766 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 767
 768 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 769 {
 770         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 771                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 772 }
 773
 774 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 775 {
 776         unsigned long dr7;
 777
 778         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 779                 dr7 = vcpu->arch.guest_debug_dr7;
 780         else
 781                 dr7 = vcpu->arch.dr7;
 782         kvm_x86_ops->set_dr7(vcpu, dr7);
 783         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 784         if (dr7 & DR7_BP_EN_MASK)
 785                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 786 }
 787
 788 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 789 {
 790         u64 fixed = DR6_FIXED_1;
 791
 792         if (!guest_cpuid_has_rtm(vcpu))
 793                 fixed |= DR6_RTM;
 794         return fixed;
 795 }
 796
 797 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 798 {
 799         switch (dr) {
 800         case 0 ... 3:
 801                 vcpu->arch.db[dr] = val;
 802                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 803                         vcpu->arch.eff_db[dr] = val;
 804                 break;
 805         case 4:
 806                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 807                         return 1; /* #UD */
 808                 /* fall through */
 809         case 6:
 810                 if (val & 0xffffffff00000000ULL)
 811                         return -1; /* #GP */
 812                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 813                 kvm_update_dr6(vcpu);
 814                 break;
 815         case 5:
 816                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 817                         return 1; /* #UD */
 818                 /* fall through */
 819         default: /* 7 */
 820                 if (val & 0xffffffff00000000ULL)
 821                         return -1; /* #GP */
 822                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 823                 kvm_update_dr7(vcpu);
 824                 break;
 825         }
 826
 827         return 0;
 828 }
 829
 830 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 831 {
 832         int res;
 833
 834         res = __kvm_set_dr(vcpu, dr, val);
 835         if (res > 0)
 836                 kvm_queue_exception(vcpu, UD_VECTOR);
 837         else if (res < 0)
 838                 kvm_inject_gp(vcpu, 0);
 839
 840         return res;
 841 }
 842 EXPORT_SYMBOL_GPL(kvm_set_dr);
 843
 844 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 845 {
 846         switch (dr) {
 847         case 0 ... 3:
 848                 *val = vcpu->arch.db[dr];
 849                 break;
 850         case 4:
 851                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 852                         return 1;
 853                 /* fall through */
 854         case 6:
 855                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 856                         *val = vcpu->arch.dr6;
 857                 else
 858                         *val = kvm_x86_ops->get_dr6(vcpu);
 859                 break;
 860         case 5:
 861                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 862                         return 1;
 863                 /* fall through */
 864         default: /* 7 */
 865                 *val = vcpu->arch.dr7;
 866                 break;
 867         }
 868
 869         return 0;
 870 }
 871
 872 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 873 {
 874         if (_kvm_get_dr(vcpu, dr, val)) {
 875                 kvm_queue_exception(vcpu, UD_VECTOR);
 876                 return 1;
 877         }
 878         return 0;
 879 }
 880 EXPORT_SYMBOL_GPL(kvm_get_dr);
 881
 882 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 883 {
 884         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 885         u64 data;
 886         int err;
 887
 888         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 889         if (err)
 890                 return err;
 891         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 892         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 893         return err;
 894 }
 895 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 896
 897 /*
 898  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 899  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 900  *
 901  * This list is modified at module load time to reflect the
 902  * capabilities of the host cpu. This capabilities test skips MSRs that are
 903  * kvm-specific. Those are put in the beginning of the list.
 904  */
 905
 906 #define KVM_SAVE_MSRS_BEGIN     12
 907 static u32 msrs_to_save[] = {
 908         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 909         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 910         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 911         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 912         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 913         MSR_KVM_PV_EOI_EN,
 914         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 915         MSR_STAR,
 916 #ifdef CONFIG_X86_64
 917         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 918 #endif
 919         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 920         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 921 };
 922
 923 static unsigned num_msrs_to_save;
 924
 925 static const u32 emulated_msrs[] = {
 926         MSR_IA32_TSC_ADJUST,
 927         MSR_IA32_TSCDEADLINE,
 928         MSR_IA32_MISC_ENABLE,
 929         MSR_IA32_MCG_STATUS,
 930         MSR_IA32_MCG_CTL,
 931 };
 932
 933 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 934 {
 935         if (efer & efer_reserved_bits)
 936                 return false;
 937
 938         if (efer & EFER_FFXSR) {
 939                 struct kvm_cpuid_entry2 *feat;
 940
 941                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 942                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 943                         return false;
 944         }
 945
 946         if (efer & EFER_SVME) {
 947                 struct kvm_cpuid_entry2 *feat;
 948
 949                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 950                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 951                         return false;
 952         }
 953
 954         return true;
 955 }
 956 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 957
 958 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 959 {
 960         u64 old_efer = vcpu->arch.efer;
 961
 962         if (!kvm_valid_efer(vcpu, efer))
 963                 return 1;
 964
 965         if (is_paging(vcpu)
 966             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 967                 return 1;
 968
 969         efer &= ~EFER_LMA;
 970         efer |= vcpu->arch.efer & EFER_LMA;
 971
 972         kvm_x86_ops->set_efer(vcpu, efer);
 973
 974         /* Update reserved bits */
 975         if ((efer ^ old_efer) & EFER_NX)
 976                 kvm_mmu_reset_context(vcpu);
 977
 978         return 0;
 979 }
 980
 981 void kvm_enable_efer_bits(u64 mask)
 982 {
 983        efer_reserved_bits &= ~mask;
 984 }
 985 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 986
 987
 988 /*
 989  * Writes msr value into into the appropriate "register".
 990  * Returns 0 on success, non-0 otherwise.
 991  * Assumes vcpu_load() was already called.
 992  */
 993 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 994 {
 995         return kvm_x86_ops->set_msr(vcpu, msr);
 996 }
 997
 998 /*
 999  * Adapt set_msr() to msr_io()'s calling convention
1000  */
1001 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1002 {
1003         struct msr_data msr;
1004
1005         msr.data = *data;
1006         msr.index = index;
1007         msr.host_initiated = true;
1008         return kvm_set_msr(vcpu, &msr);
1009 }
1010
1011 #ifdef CONFIG_X86_64
1012 struct pvclock_gtod_data {
1013         seqcount_t      seq;
1014
1015         struct { /* extract of a clocksource struct */
1016                 int vclock_mode;
1017                 cycle_t cycle_last;
1018                 cycle_t mask;
1019                 u32     mult;
1020                 u32     shift;
1021         } clock;
1022
1023         /* open coded 'struct timespec' */
1024         u64             monotonic_time_snsec;
1025         time_t          monotonic_time_sec;
1026 };
1027
1028 static struct pvclock_gtod_data pvclock_gtod_data;
1029
1030 static void update_pvclock_gtod(struct timekeeper *tk)
1031 {
1032         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1033
1034         write_seqcount_begin(&vdata->seq);
1035
1036         /* copy pvclock gtod data */
1037         vdata->clock.vclock_mode        = tk->clock->archdata.vclock_mode;
1038         vdata->clock.cycle_last         = tk->clock->cycle_last;
1039         vdata->clock.mask               = tk->clock->mask;
1040         vdata->clock.mult               = tk->mult;
1041         vdata->clock.shift              = tk->shift;
1042
1043         vdata->monotonic_time_sec       = tk->xtime_sec
1044                                         + tk->wall_to_monotonic.tv_sec;
1045         vdata->monotonic_time_snsec     = tk->xtime_nsec
1046                                         + (tk->wall_to_monotonic.tv_nsec
1047                                                 << tk->shift);
1048         while (vdata->monotonic_time_snsec >=
1049                                         (((u64)NSEC_PER_SEC) << tk->shift)) {
1050                 vdata->monotonic_time_snsec -=
1051                                         ((u64)NSEC_PER_SEC) << tk->shift;
1052                 vdata->monotonic_time_sec++;
1053         }
1054
1055         write_seqcount_end(&vdata->seq);
1056 }
1057 #endif
1058
1059
1060 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1061 {
1062         int version;
1063         int r;
1064         struct pvclock_wall_clock wc;
1065         struct timespec boot;
1066
1067         if (!wall_clock)
1068                 return;
1069
1070         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1071         if (r)
1072                 return;
1073
1074         if (version & 1)
1075                 ++version;  /* first time write, random junk */
1076
1077         ++version;
1078
1079         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1080
1081         /*
1082          * The guest calculates current wall clock time by adding
1083          * system time (updated by kvm_guest_time_update below) to the
1084          * wall clock specified here.  guest system time equals host
1085          * system time for us, thus we must fill in host boot time here.
1086          */
1087         getboottime(&boot);
1088
1089         if (kvm->arch.kvmclock_offset) {
1090                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1091                 boot = timespec_sub(boot, ts);
1092         }
1093         wc.sec = boot.tv_sec;
1094         wc.nsec = boot.tv_nsec;
1095         wc.version = version;
1096
1097         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1098
1099         version++;
1100         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1101 }
1102
1103 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1104 {
1105         uint32_t quotient, remainder;
1106
1107         /* Don't try to replace with do_div(), this one calculates
1108          * "(dividend << 32) / divisor" */
1109         __asm__ ( "divl %4"
1110                   : "=a" (quotient), "=d" (remainder)
1111                   : "0" (0), "1" (dividend), "r" (divisor) );
1112         return quotient;
1113 }
1114
1115 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1116                                s8 *pshift, u32 *pmultiplier)
1117 {
1118         uint64_t scaled64;
1119         int32_t  shift = 0;
1120         uint64_t tps64;
1121         uint32_t tps32;
1122
1123         tps64 = base_khz * 1000LL;
1124         scaled64 = scaled_khz * 1000LL;
1125         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1126                 tps64 >>= 1;
1127                 shift--;
1128         }
1129
1130         tps32 = (uint32_t)tps64;
1131         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1132                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1133                         scaled64 >>= 1;
1134                 else
1135                         tps32 <<= 1;
1136                 shift++;
1137         }
1138
1139         *pshift = shift;
1140         *pmultiplier = div_frac(scaled64, tps32);
1141
1142         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1143                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1144 }
1145
1146 static inline u64 get_kernel_ns(void)
1147 {
1148         struct timespec ts;
1149
1150         ktime_get_ts(&ts);
1151         monotonic_to_bootbased(&ts);
1152         return timespec_to_ns(&ts);
1153 }
1154
1155 #ifdef CONFIG_X86_64
1156 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1157 #endif
1158
1159 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1160 unsigned long max_tsc_khz;
1161
1162 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1163 {
1164         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1165                                    vcpu->arch.virtual_tsc_shift);
1166 }
1167
1168 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1169 {
1170         u64 v = (u64)khz * (1000000 + ppm);
1171         do_div(v, 1000000);
1172         return v;
1173 }
1174
1175 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1176 {
1177         u32 thresh_lo, thresh_hi;
1178         int use_scaling = 0;
1179
1180         /* tsc_khz can be zero if TSC calibration fails */
1181         if (this_tsc_khz == 0)
1182                 return;
1183
1184         /* Compute a scale to convert nanoseconds in TSC cycles */
1185         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1186                            &vcpu->arch.virtual_tsc_shift,
1187                            &vcpu->arch.virtual_tsc_mult);
1188         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1189
1190         /*
1191          * Compute the variation in TSC rate which is acceptable
1192          * within the range of tolerance and decide if the
1193          * rate being applied is within that bounds of the hardware
1194          * rate.  If so, no scaling or compensation need be done.
1195          */
1196         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1197         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1198         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1199                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1200                 use_scaling = 1;
1201         }
1202         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1203 }
1204
1205 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1206 {
1207         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1208                                       vcpu->arch.virtual_tsc_mult,
1209                                       vcpu->arch.virtual_tsc_shift);
1210         tsc += vcpu->arch.this_tsc_write;
1211         return tsc;
1212 }
1213
1214 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1215 {
1216 #ifdef CONFIG_X86_64
1217         bool vcpus_matched;
1218         bool do_request = false;
1219         struct kvm_arch *ka = &vcpu->kvm->arch;
1220         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1221
1222         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1223                          atomic_read(&vcpu->kvm->online_vcpus));
1224
1225         if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1226                 if (!ka->use_master_clock)
1227                         do_request = 1;
1228
1229         if (!vcpus_matched && ka->use_master_clock)
1230                         do_request = 1;
1231
1232         if (do_request)
1233                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1234
1235         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1236                             atomic_read(&vcpu->kvm->online_vcpus),
1237                             ka->use_master_clock, gtod->clock.vclock_mode);
1238 #endif
1239 }
1240
1241 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1242 {
1243         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1244         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1245 }
1246
1247 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1248 {
1249         struct kvm *kvm = vcpu->kvm;
1250         u64 offset, ns, elapsed;
1251         unsigned long flags;
1252         s64 usdiff;
1253         bool matched;
1254         bool already_matched;
1255         u64 data = msr->data;
1256
1257         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1258         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1259         ns = get_kernel_ns();
1260         elapsed = ns - kvm->arch.last_tsc_nsec;
1261
1262         if (vcpu->arch.virtual_tsc_khz) {
1263                 int faulted = 0;
1264
1265                 /* n.b - signed multiplication and division required */
1266                 usdiff = data - kvm->arch.last_tsc_write;
1267 #ifdef CONFIG_X86_64
1268                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1269 #else
1270                 /* do_div() only does unsigned */
1271                 asm("1: idivl %[divisor]\n"
1272                     "2: xor %%edx, %%edx\n"
1273                     "   movl $0, %[faulted]\n"
1274                     "3:\n"
1275                     ".section .fixup,\"ax\"\n"
1276                     "4: movl $1, %[faulted]\n"
1277                     "   jmp  3b\n"
1278                     ".previous\n"
1279
1280                 _ASM_EXTABLE(1b, 4b)
1281
1282                 : "=A"(usdiff), [faulted] "=r" (faulted)
1283                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1284
1285 #endif
1286                 do_div(elapsed, 1000);
1287                 usdiff -= elapsed;
1288                 if (usdiff < 0)
1289                         usdiff = -usdiff;
1290
1291                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1292                 if (faulted)
1293                         usdiff = USEC_PER_SEC;
1294         } else
1295                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1296
1297         /*
1298          * Special case: TSC write with a small delta (1 second) of virtual
1299          * cycle time against real time is interpreted as an attempt to
1300          * synchronize the CPU.
1301          *
1302          * For a reliable TSC, we can match TSC offsets, and for an unstable
1303          * TSC, we add elapsed time in this computation.  We could let the
1304          * compensation code attempt to catch up if we fall behind, but
1305          * it's better to try to match offsets from the beginning.
1306          */
1307         if (usdiff < USEC_PER_SEC &&
1308             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1309                 if (!check_tsc_unstable()) {
1310                         offset = kvm->arch.cur_tsc_offset;
1311                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1312                 } else {
1313                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1314                         data += delta;
1315                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1316                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1317                 }
1318                 matched = true;
1319                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1320         } else {
1321                 /*
1322                  * We split periods of matched TSC writes into generations.
1323                  * For each generation, we track the original measured
1324                  * nanosecond time, offset, and write, so if TSCs are in
1325                  * sync, we can match exact offset, and if not, we can match
1326                  * exact software computation in compute_guest_tsc()
1327                  *
1328                  * These values are tracked in kvm->arch.cur_xxx variables.
1329                  */
1330                 kvm->arch.cur_tsc_generation++;
1331                 kvm->arch.cur_tsc_nsec = ns;
1332                 kvm->arch.cur_tsc_write = data;
1333                 kvm->arch.cur_tsc_offset = offset;
1334                 matched = false;
1335                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1336                          kvm->arch.cur_tsc_generation, data);
1337         }
1338
1339         /*
1340          * We also track th most recent recorded KHZ, write and time to
1341          * allow the matching interval to be extended at each write.
1342          */
1343         kvm->arch.last_tsc_nsec = ns;
1344         kvm->arch.last_tsc_write = data;
1345         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1346
1347         vcpu->arch.last_guest_tsc = data;
1348
1349         /* Keep track of which generation this VCPU has synchronized to */
1350         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1351         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1352         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1353
1354         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1355                 update_ia32_tsc_adjust_msr(vcpu, offset);
1356         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1357         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1358
1359         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1360         if (!matched) {
1361                 kvm->arch.nr_vcpus_matched_tsc = 0;
1362         } else if (!already_matched) {
1363                 kvm->arch.nr_vcpus_matched_tsc++;
1364         }
1365
1366         kvm_track_tsc_matching(vcpu);
1367         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1368 }
1369
1370 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1371
1372 #ifdef CONFIG_X86_64
1373
1374 static cycle_t read_tsc(void)
1375 {
1376         cycle_t ret;
1377         u64 last;
1378
1379         /*
1380          * Empirically, a fence (of type that depends on the CPU)
1381          * before rdtsc is enough to ensure that rdtsc is ordered
1382          * with respect to loads.  The various CPU manuals are unclear
1383          * as to whether rdtsc can be reordered with later loads,
1384          * but no one has ever seen it happen.
1385          */
1386         rdtsc_barrier();
1387         ret = (cycle_t)vget_cycles();
1388
1389         last = pvclock_gtod_data.clock.cycle_last;
1390
1391         if (likely(ret >= last))
1392                 return ret;
1393
1394         /*
1395          * GCC likes to generate cmov here, but this branch is extremely
1396          * predictable (it's just a funciton of time and the likely is
1397          * very likely) and there's a data dependence, so force GCC
1398          * to generate a branch instead.  I don't barrier() because
1399          * we don't actually need a barrier, and if this function
1400          * ever gets inlined it will generate worse code.
1401          */
1402         asm volatile ("");
1403         return last;
1404 }
1405
1406 static inline u64 vgettsc(cycle_t *cycle_now)
1407 {
1408         long v;
1409         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1410
1411         *cycle_now = read_tsc();
1412
1413         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1414         return v * gtod->clock.mult;
1415 }
1416
1417 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1418 {
1419         unsigned long seq;
1420         u64 ns;
1421         int mode;
1422         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1423
1424         ts->tv_nsec = 0;
1425         do {
1426                 seq = read_seqcount_begin(&gtod->seq);
1427                 mode = gtod->clock.vclock_mode;
1428                 ts->tv_sec = gtod->monotonic_time_sec;
1429                 ns = gtod->monotonic_time_snsec;
1430                 ns += vgettsc(cycle_now);
1431                 ns >>= gtod->clock.shift;
1432         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1433         timespec_add_ns(ts, ns);
1434
1435         return mode;
1436 }
1437
1438 /* returns true if host is using tsc clocksource */
1439 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1440 {
1441         struct timespec ts;
1442
1443         /* checked again under seqlock below */
1444         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1445                 return false;
1446
1447         if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1448                 return false;
1449
1450         monotonic_to_bootbased(&ts);
1451         *kernel_ns = timespec_to_ns(&ts);
1452
1453         return true;
1454 }
1455 #endif
1456
1457 /*
1458  *
1459  * Assuming a stable TSC across physical CPUS, and a stable TSC
1460  * across virtual CPUs, the following condition is possible.
1461  * Each numbered line represents an event visible to both
1462  * CPUs at the next numbered event.
1463  *
1464  * "timespecX" represents host monotonic time. "tscX" represents
1465  * RDTSC value.
1466  *
1467  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1468  *
1469  * 1.  read timespec0,tsc0
1470  * 2.                                   | timespec1 = timespec0 + N
1471  *                                      | tsc1 = tsc0 + M
1472  * 3. transition to guest               | transition to guest
1473  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1474  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1475  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1476  *
1477  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1478  *
1479  *      - ret0 < ret1
1480  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1481  *              ...
1482  *      - 0 < N - M => M < N
1483  *
1484  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1485  * always the case (the difference between two distinct xtime instances
1486  * might be smaller then the difference between corresponding TSC reads,
1487  * when updating guest vcpus pvclock areas).
1488  *
1489  * To avoid that problem, do not allow visibility of distinct
1490  * system_timestamp/tsc_timestamp values simultaneously: use a master
1491  * copy of host monotonic time values. Update that master copy
1492  * in lockstep.
1493  *
1494  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1495  *
1496  */
1497
1498 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1499 {
1500 #ifdef CONFIG_X86_64
1501         struct kvm_arch *ka = &kvm->arch;
1502         int vclock_mode;
1503         bool host_tsc_clocksource, vcpus_matched;
1504
1505         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1506                         atomic_read(&kvm->online_vcpus));
1507
1508         /*
1509          * If the host uses TSC clock, then passthrough TSC as stable
1510          * to the guest.
1511          */
1512         host_tsc_clocksource = kvm_get_time_and_clockread(
1513                                         &ka->master_kernel_ns,
1514                                         &ka->master_cycle_now);
1515
1516         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1517                                 && !backwards_tsc_observed;
1518
1519         if (ka->use_master_clock)
1520                 atomic_set(&kvm_guest_has_master_clock, 1);
1521
1522         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1523         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1524                                         vcpus_matched);
1525 #endif
1526 }
1527
1528 static void kvm_gen_update_masterclock(struct kvm *kvm)
1529 {
1530 #ifdef CONFIG_X86_64
1531         int i;
1532         struct kvm_vcpu *vcpu;
1533         struct kvm_arch *ka = &kvm->arch;
1534
1535         spin_lock(&ka->pvclock_gtod_sync_lock);
1536         kvm_make_mclock_inprogress_request(kvm);
1537         /* no guest entries from this point */
1538         pvclock_update_vm_gtod_copy(kvm);
1539
1540         kvm_for_each_vcpu(i, vcpu, kvm)
1541                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1542
1543         /* guest entries allowed */
1544         kvm_for_each_vcpu(i, vcpu, kvm)
1545                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1546
1547         spin_unlock(&ka->pvclock_gtod_sync_lock);
1548 #endif
1549 }
1550
1551 static int kvm_guest_time_update(struct kvm_vcpu *v)
1552 {
1553         unsigned long flags, this_tsc_khz;
1554         struct kvm_vcpu_arch *vcpu = &v->arch;
1555         struct kvm_arch *ka = &v->kvm->arch;
1556         s64 kernel_ns;
1557         u64 tsc_timestamp, host_tsc;
1558         struct pvclock_vcpu_time_info guest_hv_clock;
1559         u8 pvclock_flags;
1560         bool use_master_clock;
1561
1562         kernel_ns = 0;
1563         host_tsc = 0;
1564
1565         /*
1566          * If the host uses TSC clock, then passthrough TSC as stable
1567          * to the guest.
1568          */
1569         spin_lock(&ka->pvclock_gtod_sync_lock);
1570         use_master_clock = ka->use_master_clock;
1571         if (use_master_clock) {
1572                 host_tsc = ka->master_cycle_now;
1573                 kernel_ns = ka->master_kernel_ns;
1574         }
1575         spin_unlock(&ka->pvclock_gtod_sync_lock);
1576
1577         /* Keep irq disabled to prevent changes to the clock */
1578         local_irq_save(flags);
1579         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1580         if (unlikely(this_tsc_khz == 0)) {
1581                 local_irq_restore(flags);
1582                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1583                 return 1;
1584         }
1585         if (!use_master_clock) {
1586                 host_tsc = native_read_tsc();
1587                 kernel_ns = get_kernel_ns();
1588         }
1589
1590         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1591
1592         /*
1593          * We may have to catch up the TSC to match elapsed wall clock
1594          * time for two reasons, even if kvmclock is used.
1595          *   1) CPU could have been running below the maximum TSC rate
1596          *   2) Broken TSC compensation resets the base at each VCPU
1597          *      entry to avoid unknown leaps of TSC even when running
1598          *      again on the same CPU.  This may cause apparent elapsed
1599          *      time to disappear, and the guest to stand still or run
1600          *      very slowly.
1601          */
1602         if (vcpu->tsc_catchup) {
1603                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1604                 if (tsc > tsc_timestamp) {
1605                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1606                         tsc_timestamp = tsc;
1607                 }
1608         }
1609
1610         local_irq_restore(flags);
1611
1612         if (!vcpu->pv_time_enabled)
1613                 return 0;
1614
1615         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1616                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1617                                    &vcpu->hv_clock.tsc_shift,
1618                                    &vcpu->hv_clock.tsc_to_system_mul);
1619                 vcpu->hw_tsc_khz = this_tsc_khz;
1620         }
1621
1622         /* With all the info we got, fill in the values */
1623         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1624         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1625         vcpu->last_guest_tsc = tsc_timestamp;
1626
1627         /*
1628          * The interface expects us to write an even number signaling that the
1629          * update is finished. Since the guest won't see the intermediate
1630          * state, we just increase by 2 at the end.
1631          */
1632         vcpu->hv_clock.version += 2;
1633
1634         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1635                 &guest_hv_clock, sizeof(guest_hv_clock))))
1636                 return 0;
1637
1638         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1639         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1640
1641         if (vcpu->pvclock_set_guest_stopped_request) {
1642                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1643                 vcpu->pvclock_set_guest_stopped_request = false;
1644         }
1645
1646         /* If the host uses TSC clocksource, then it is stable */
1647         if (use_master_clock)
1648                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1649
1650         vcpu->hv_clock.flags = pvclock_flags;
1651
1652         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1653                                 &vcpu->hv_clock,
1654                                 sizeof(vcpu->hv_clock));
1655         return 0;
1656 }
1657
1658 /*
1659  * kvmclock updates which are isolated to a given vcpu, such as
1660  * vcpu->cpu migration, should not allow system_timestamp from
1661  * the rest of the vcpus to remain static. Otherwise ntp frequency
1662  * correction applies to one vcpu's system_timestamp but not
1663  * the others.
1664  *
1665  * So in those cases, request a kvmclock update for all vcpus.
1666  * We need to rate-limit these requests though, as they can
1667  * considerably slow guests that have a large number of vcpus.
1668  * The time for a remote vcpu to update its kvmclock is bound
1669  * by the delay we use to rate-limit the updates.
1670  */
1671
1672 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1673
1674 static void kvmclock_update_fn(struct work_struct *work)
1675 {
1676         int i;
1677         struct delayed_work *dwork = to_delayed_work(work);
1678         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1679                                            kvmclock_update_work);
1680         struct kvm *kvm = container_of(ka, struct kvm, arch);
1681         struct kvm_vcpu *vcpu;
1682
1683         kvm_for_each_vcpu(i, vcpu, kvm) {
1684                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1685                 kvm_vcpu_kick(vcpu);
1686         }
1687 }
1688
1689 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1690 {
1691         struct kvm *kvm = v->kvm;
1692
1693         set_bit(KVM_REQ_CLOCK_UPDATE, &v->requests);
1694         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1695                                         KVMCLOCK_UPDATE_DELAY);
1696 }
1697
1698 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1699
1700 static void kvmclock_sync_fn(struct work_struct *work)
1701 {
1702         struct delayed_work *dwork = to_delayed_work(work);
1703         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1704                                            kvmclock_sync_work);
1705         struct kvm *kvm = container_of(ka, struct kvm, arch);
1706
1707         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1708         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1709                                         KVMCLOCK_SYNC_PERIOD);
1710 }
1711
1712 static bool msr_mtrr_valid(unsigned msr)
1713 {
1714         switch (msr) {
1715         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1716         case MSR_MTRRfix64K_00000:
1717         case MSR_MTRRfix16K_80000:
1718         case MSR_MTRRfix16K_A0000:
1719         case MSR_MTRRfix4K_C0000:
1720         case MSR_MTRRfix4K_C8000:
1721         case MSR_MTRRfix4K_D0000:
1722         case MSR_MTRRfix4K_D8000:
1723         case MSR_MTRRfix4K_E0000:
1724         case MSR_MTRRfix4K_E8000:
1725         case MSR_MTRRfix4K_F0000:
1726         case MSR_MTRRfix4K_F8000:
1727         case MSR_MTRRdefType:
1728         case MSR_IA32_CR_PAT:
1729                 return true;
1730         case 0x2f8:
1731                 return true;
1732         }
1733         return false;
1734 }
1735
1736 static bool valid_pat_type(unsigned t)
1737 {
1738         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1739 }
1740
1741 static bool valid_mtrr_type(unsigned t)
1742 {
1743         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1744 }
1745
1746 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1747 {
1748         int i;
1749
1750         if (!msr_mtrr_valid(msr))
1751                 return false;
1752
1753         if (msr == MSR_IA32_CR_PAT) {
1754                 for (i = 0; i < 8; i++)
1755                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1756                                 return false;
1757                 return true;
1758         } else if (msr == MSR_MTRRdefType) {
1759                 if (data & ~0xcff)
1760                         return false;
1761                 return valid_mtrr_type(data & 0xff);
1762         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1763                 for (i = 0; i < 8 ; i++)
1764                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1765                                 return false;
1766                 return true;
1767         }
1768
1769         /* variable MTRRs */
1770         return valid_mtrr_type(data & 0xff);
1771 }
1772
1773 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1774 {
1775         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1776
1777         if (!mtrr_valid(vcpu, msr, data))
1778                 return 1;
1779
1780         if (msr == MSR_MTRRdefType) {
1781                 vcpu->arch.mtrr_state.def_type = data;
1782                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1783         } else if (msr == MSR_MTRRfix64K_00000)
1784                 p[0] = data;
1785         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1786                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1787         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1788                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1789         else if (msr == MSR_IA32_CR_PAT)
1790                 vcpu->arch.pat = data;
1791         else {  /* Variable MTRRs */
1792                 int idx, is_mtrr_mask;
1793                 u64 *pt;
1794
1795                 idx = (msr - 0x200) / 2;
1796                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1797                 if (!is_mtrr_mask)
1798                         pt =
1799                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1800                 else
1801                         pt =
1802                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1803                 *pt = data;
1804         }
1805
1806         kvm_mmu_reset_context(vcpu);
1807         return 0;
1808 }
1809
1810 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1811 {
1812         u64 mcg_cap = vcpu->arch.mcg_cap;
1813         unsigned bank_num = mcg_cap & 0xff;
1814
1815         switch (msr) {
1816         case MSR_IA32_MCG_STATUS:
1817                 vcpu->arch.mcg_status = data;
1818                 break;
1819         case MSR_IA32_MCG_CTL:
1820                 if (!(mcg_cap & MCG_CTL_P))
1821                         return 1;
1822                 if (data != 0 && data != ~(u64)0)
1823                         return -1;
1824                 vcpu->arch.mcg_ctl = data;
1825                 break;
1826         default:
1827                 if (msr >= MSR_IA32_MC0_CTL &&
1828                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1829                         u32 offset = msr - MSR_IA32_MC0_CTL;
1830                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1831                          * some Linux kernels though clear bit 10 in bank 4 to
1832                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1833                          * this to avoid an uncatched #GP in the guest
1834                          */
1835                         if ((offset & 0x3) == 0 &&
1836                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1837                                 return -1;
1838                         vcpu->arch.mce_banks[offset] = data;
1839                         break;
1840                 }
1841                 return 1;
1842         }
1843         return 0;
1844 }
1845
1846 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1847 {
1848         struct kvm *kvm = vcpu->kvm;
1849         int lm = is_long_mode(vcpu);
1850         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1851                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1852         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1853                 : kvm->arch.xen_hvm_config.blob_size_32;
1854         u32 page_num = data & ~PAGE_MASK;
1855         u64 page_addr = data & PAGE_MASK;
1856         u8 *page;
1857         int r;
1858
1859         r = -E2BIG;
1860         if (page_num >= blob_size)
1861                 goto out;
1862         r = -ENOMEM;
1863         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1864         if (IS_ERR(page)) {
1865                 r = PTR_ERR(page);
1866                 goto out;
1867         }
1868         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1869                 goto out_free;
1870         r = 0;
1871 out_free:
1872         kfree(page);
1873 out:
1874         return r;
1875 }
1876
1877 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1878 {
1879         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1880 }
1881
1882 static bool kvm_hv_msr_partition_wide(u32 msr)
1883 {
1884         bool r = false;
1885         switch (msr) {
1886         case HV_X64_MSR_GUEST_OS_ID:
1887         case HV_X64_MSR_HYPERCALL:
1888         case HV_X64_MSR_REFERENCE_TSC:
1889         case HV_X64_MSR_TIME_REF_COUNT:
1890                 r = true;
1891                 break;
1892         }
1893
1894         return r;
1895 }
1896
1897 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1898 {
1899         struct kvm *kvm = vcpu->kvm;
1900
1901         switch (msr) {
1902         case HV_X64_MSR_GUEST_OS_ID:
1903                 kvm->arch.hv_guest_os_id = data;
1904                 /* setting guest os id to zero disables hypercall page */
1905                 if (!kvm->arch.hv_guest_os_id)
1906                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1907                 break;
1908         case HV_X64_MSR_HYPERCALL: {
1909                 u64 gfn;
1910                 unsigned long addr;
1911                 u8 instructions[4];
1912
1913                 /* if guest os id is not set hypercall should remain disabled */
1914                 if (!kvm->arch.hv_guest_os_id)
1915                         break;
1916                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1917                         kvm->arch.hv_hypercall = data;
1918                         break;
1919                 }
1920                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1921                 addr = gfn_to_hva(kvm, gfn);
1922                 if (kvm_is_error_hva(addr))
1923                         return 1;
1924                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1925                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1926                 if (__copy_to_user((void __user *)addr, instructions, 4))
1927                         return 1;
1928                 kvm->arch.hv_hypercall = data;
1929                 mark_page_dirty(kvm, gfn);
1930                 break;
1931         }
1932         case HV_X64_MSR_REFERENCE_TSC: {
1933                 u64 gfn;
1934                 HV_REFERENCE_TSC_PAGE tsc_ref;
1935                 memset(&tsc_ref, 0, sizeof(tsc_ref));
1936                 kvm->arch.hv_tsc_page = data;
1937                 if (!(data & HV_X64_MSR_TSC_REFERENCE_ENABLE))
1938                         break;
1939                 gfn = data >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
1940                 if (kvm_write_guest(kvm, gfn << HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT,
1941                         &tsc_ref, sizeof(tsc_ref)))
1942                         return 1;
1943                 mark_page_dirty(kvm, gfn);
1944                 break;
1945         }
1946         default:
1947                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1948                             "data 0x%llx\n", msr, data);
1949                 return 1;
1950         }
1951         return 0;
1952 }
1953
1954 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1955 {
1956         switch (msr) {
1957         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1958                 u64 gfn;
1959                 unsigned long addr;
1960
1961                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1962                         vcpu->arch.hv_vapic = data;
1963                         if (kvm_lapic_enable_pv_eoi(vcpu, 0))
1964                                 return 1;
1965                         break;
1966                 }
1967                 gfn = data >> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT;
1968                 addr = gfn_to_hva(vcpu->kvm, gfn);
1969                 if (kvm_is_error_hva(addr))
1970                         return 1;
1971                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1972                         return 1;
1973                 vcpu->arch.hv_vapic = data;
1974                 mark_page_dirty(vcpu->kvm, gfn);
1975                 if (kvm_lapic_enable_pv_eoi(vcpu, gfn_to_gpa(gfn) | KVM_MSR_ENABLED))
1976                         return 1;
1977                 break;
1978         }
1979         case HV_X64_MSR_EOI:
1980                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1981         case HV_X64_MSR_ICR:
1982                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1983         case HV_X64_MSR_TPR:
1984                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1985         default:
1986                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1987                             "data 0x%llx\n", msr, data);
1988                 return 1;
1989         }
1990
1991         return 0;
1992 }
1993
1994 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1995 {
1996         gpa_t gpa = data & ~0x3f;
1997
1998         /* Bits 2:5 are reserved, Should be zero */
1999         if (data & 0x3c)
2000                 return 1;
2001
2002         vcpu->arch.apf.msr_val = data;
2003
2004         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2005                 kvm_clear_async_pf_completion_queue(vcpu);
2006                 kvm_async_pf_hash_reset(vcpu);
2007                 return 0;
2008         }
2009
2010         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2011                                         sizeof(u32)))
2012                 return 1;
2013
2014         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2015         kvm_async_pf_wakeup_all(vcpu);
2016         return 0;
2017 }
2018
2019 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2020 {
2021         vcpu->arch.pv_time_enabled = false;
2022 }
2023
2024 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
2025 {
2026         u64 delta;
2027
2028         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2029                 return;
2030
2031         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2032         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2033         vcpu->arch.st.accum_steal = delta;
2034 }
2035
2036 static void record_steal_time(struct kvm_vcpu *vcpu)
2037 {
2038         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2039                 return;
2040
2041         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2042                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2043                 return;
2044
2045         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2046         vcpu->arch.st.steal.version += 2;
2047         vcpu->arch.st.accum_steal = 0;
2048
2049         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2050                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2051 }
2052
2053 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2054 {
2055         bool pr = false;
2056         u32 msr = msr_info->index;
2057         u64 data = msr_info->data;
2058
2059         switch (msr) {
2060         case MSR_AMD64_NB_CFG:
2061         case MSR_IA32_UCODE_REV:
2062         case MSR_IA32_UCODE_WRITE:
2063         case MSR_VM_HSAVE_PA:
2064         case MSR_AMD64_PATCH_LOADER:
2065         case MSR_AMD64_BU_CFG2:
2066                 break;
2067
2068         case MSR_EFER:
2069                 return set_efer(vcpu, data);
2070         case MSR_K7_HWCR:
2071                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2072                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2073                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2074                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2075                 if (data != 0) {
2076                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2077                                     data);
2078                         return 1;
2079                 }
2080                 break;
2081         case MSR_FAM10H_MMIO_CONF_BASE:
2082                 if (data != 0) {
2083                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2084                                     "0x%llx\n", data);
2085                         return 1;
2086                 }
2087                 break;
2088         case MSR_IA32_DEBUGCTLMSR:
2089                 if (!data) {
2090                         /* We support the non-activated case already */
2091                         break;
2092                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2093                         /* Values other than LBR and BTF are vendor-specific,
2094                            thus reserved and should throw a #GP */
2095                         return 1;
2096                 }
2097                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2098                             __func__, data);
2099                 break;
2100         case 0x200 ... 0x2ff:
2101                 return set_msr_mtrr(vcpu, msr, data);
2102         case MSR_IA32_APICBASE:
2103                 return kvm_set_apic_base(vcpu, msr_info);
2104         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2105                 return kvm_x2apic_msr_write(vcpu, msr, data);
2106         case MSR_IA32_TSCDEADLINE:
2107                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2108                 break;
2109         case MSR_IA32_TSC_ADJUST:
2110                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2111                         if (!msr_info->host_initiated) {
2112                                 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2113                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
2114                         }
2115                         vcpu->arch.ia32_tsc_adjust_msr = data;
2116                 }
2117                 break;
2118         case MSR_IA32_MISC_ENABLE:
2119                 vcpu->arch.ia32_misc_enable_msr = data;
2120                 break;
2121         case MSR_KVM_WALL_CLOCK_NEW:
2122         case MSR_KVM_WALL_CLOCK:
2123                 vcpu->kvm->arch.wall_clock = data;
2124                 kvm_write_wall_clock(vcpu->kvm, data);
2125                 break;
2126         case MSR_KVM_SYSTEM_TIME_NEW:
2127         case MSR_KVM_SYSTEM_TIME: {
2128                 u64 gpa_offset;
2129                 kvmclock_reset(vcpu);
2130
2131                 vcpu->arch.time = data;
2132                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2133
2134                 /* we verify if the enable bit is set... */
2135                 if (!(data & 1))
2136                         break;
2137
2138                 gpa_offset = data & ~(PAGE_MASK | 1);
2139
2140                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2141                      &vcpu->arch.pv_time, data & ~1ULL,
2142                      sizeof(struct pvclock_vcpu_time_info)))
2143                         vcpu->arch.pv_time_enabled = false;
2144                 else
2145                         vcpu->arch.pv_time_enabled = true;
2146
2147                 break;
2148         }
2149         case MSR_KVM_ASYNC_PF_EN:
2150                 if (kvm_pv_enable_async_pf(vcpu, data))
2151                         return 1;
2152                 break;
2153         case MSR_KVM_STEAL_TIME:
2154
2155                 if (unlikely(!sched_info_on()))
2156                         return 1;
2157
2158                 if (data & KVM_STEAL_RESERVED_MASK)
2159                         return 1;
2160
2161                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2162                                                 data & KVM_STEAL_VALID_BITS,
2163                                                 sizeof(struct kvm_steal_time)))
2164                         return 1;
2165
2166                 vcpu->arch.st.msr_val = data;
2167
2168                 if (!(data & KVM_MSR_ENABLED))
2169                         break;
2170
2171                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2172
2173                 preempt_disable();
2174                 accumulate_steal_time(vcpu);
2175                 preempt_enable();
2176
2177                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2178
2179                 break;
2180         case MSR_KVM_PV_EOI_EN:
2181                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2182                         return 1;
2183                 break;
2184
2185         case MSR_IA32_MCG_CTL:
2186         case MSR_IA32_MCG_STATUS:
2187         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2188                 return set_msr_mce(vcpu, msr, data);
2189
2190         /* Performance counters are not protected by a CPUID bit,
2191          * so we should check all of them in the generic path for the sake of
2192          * cross vendor migration.
2193          * Writing a zero into the event select MSRs disables them,
2194          * which we perfectly emulate ;-). Any other value should be at least
2195          * reported, some guests depend on them.
2196          */
2197         case MSR_K7_EVNTSEL0:
2198         case MSR_K7_EVNTSEL1:
2199         case MSR_K7_EVNTSEL2:
2200         case MSR_K7_EVNTSEL3:
2201                 if (data != 0)
2202                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2203                                     "0x%x data 0x%llx\n", msr, data);
2204                 break;
2205         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2206          * so we ignore writes to make it happy.
2207          */
2208         case MSR_K7_PERFCTR0:
2209         case MSR_K7_PERFCTR1:
2210         case MSR_K7_PERFCTR2:
2211         case MSR_K7_PERFCTR3:
2212                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2213                             "0x%x data 0x%llx\n", msr, data);
2214                 break;
2215         case MSR_P6_PERFCTR0:
2216         case MSR_P6_PERFCTR1:
2217                 pr = true;
2218         case MSR_P6_EVNTSEL0:
2219         case MSR_P6_EVNTSEL1:
2220                 if (kvm_pmu_msr(vcpu, msr))
2221                         return kvm_pmu_set_msr(vcpu, msr_info);
2222
2223                 if (pr || data != 0)
2224                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2225                                     "0x%x data 0x%llx\n", msr, data);
2226                 break;
2227         case MSR_K7_CLK_CTL:
2228                 /*
2229                  * Ignore all writes to this no longer documented MSR.
2230                  * Writes are only relevant for old K7 processors,
2231                  * all pre-dating SVM, but a recommended workaround from
2232                  * AMD for these chips. It is possible to specify the
2233                  * affected processor models on the command line, hence
2234                  * the need to ignore the workaround.
2235                  */
2236                 break;
2237         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2238                 if (kvm_hv_msr_partition_wide(msr)) {
2239                         int r;
2240                         mutex_lock(&vcpu->kvm->lock);
2241                         r = set_msr_hyperv_pw(vcpu, msr, data);
2242                         mutex_unlock(&vcpu->kvm->lock);
2243                         return r;
2244                 } else
2245                         return set_msr_hyperv(vcpu, msr, data);
2246                 break;
2247         case MSR_IA32_BBL_CR_CTL3:
2248                 /* Drop writes to this legacy MSR -- see rdmsr
2249                  * counterpart for further detail.
2250                  */
2251                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2252                 break;
2253         case MSR_AMD64_OSVW_ID_LENGTH:
2254                 if (!guest_cpuid_has_osvw(vcpu))
2255                         return 1;
2256                 vcpu->arch.osvw.length = data;
2257                 break;
2258         case MSR_AMD64_OSVW_STATUS:
2259                 if (!guest_cpuid_has_osvw(vcpu))
2260                         return 1;
2261                 vcpu->arch.osvw.status = data;
2262                 break;
2263         default:
2264                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2265                         return xen_hvm_config(vcpu, data);
2266                 if (kvm_pmu_msr(vcpu, msr))
2267                         return kvm_pmu_set_msr(vcpu, msr_info);
2268                 if (!ignore_msrs) {
2269                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2270                                     msr, data);
2271                         return 1;
2272                 } else {
2273                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2274                                     msr, data);
2275                         break;
2276                 }
2277         }
2278         return 0;
2279 }
2280 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2281
2282
2283 /*
2284  * Reads an msr value (of 'msr_index') into 'pdata'.
2285  * Returns 0 on success, non-0 otherwise.
2286  * Assumes vcpu_load() was already called.
2287  */
2288 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2289 {
2290         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2291 }
2292
2293 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2294 {
2295         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2296
2297         if (!msr_mtrr_valid(msr))
2298                 return 1;
2299
2300         if (msr == MSR_MTRRdefType)
2301                 *pdata = vcpu->arch.mtrr_state.def_type +
2302                          (vcpu->arch.mtrr_state.enabled << 10);
2303         else if (msr == MSR_MTRRfix64K_00000)
2304                 *pdata = p[0];
2305         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2306                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2307         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2308                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2309         else if (msr == MSR_IA32_CR_PAT)
2310                 *pdata = vcpu->arch.pat;
2311         else {  /* Variable MTRRs */
2312                 int idx, is_mtrr_mask;
2313                 u64 *pt;
2314
2315                 idx = (msr - 0x200) / 2;
2316                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2317                 if (!is_mtrr_mask)
2318                         pt =
2319                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2320                 else
2321                         pt =
2322                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2323                 *pdata = *pt;
2324         }
2325
2326         return 0;
2327 }
2328
2329 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2330 {
2331         u64 data;
2332         u64 mcg_cap = vcpu->arch.mcg_cap;
2333         unsigned bank_num = mcg_cap & 0xff;
2334
2335         switch (msr) {
2336         case MSR_IA32_P5_MC_ADDR:
2337         case MSR_IA32_P5_MC_TYPE:
2338                 data = 0;
2339                 break;
2340         case MSR_IA32_MCG_CAP:
2341                 data = vcpu->arch.mcg_cap;
2342                 break;
2343         case MSR_IA32_MCG_CTL:
2344                 if (!(mcg_cap & MCG_CTL_P))
2345                         return 1;
2346                 data = vcpu->arch.mcg_ctl;
2347                 break;
2348         case MSR_IA32_MCG_STATUS:
2349                 data = vcpu->arch.mcg_status;
2350                 break;
2351         default:
2352                 if (msr >= MSR_IA32_MC0_CTL &&
2353                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2354                         u32 offset = msr - MSR_IA32_MC0_CTL;
2355                         data = vcpu->arch.mce_banks[offset];
2356                         break;
2357                 }
2358                 return 1;
2359         }
2360         *pdata = data;
2361         return 0;
2362 }
2363
2364 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2365 {
2366         u64 data = 0;
2367         struct kvm *kvm = vcpu->kvm;
2368
2369         switch (msr) {
2370         case HV_X64_MSR_GUEST_OS_ID:
2371                 data = kvm->arch.hv_guest_os_id;
2372                 break;
2373         case HV_X64_MSR_HYPERCALL:
2374                 data = kvm->arch.hv_hypercall;
2375                 break;
2376         case HV_X64_MSR_TIME_REF_COUNT: {
2377                 data =
2378                      div_u64(get_kernel_ns() + kvm->arch.kvmclock_offset, 100);
2379                 break;
2380         }
2381         case HV_X64_MSR_REFERENCE_TSC:
2382                 data = kvm->arch.hv_tsc_page;
2383                 break;
2384         default:
2385                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2386                 return 1;
2387         }
2388
2389         *pdata = data;
2390         return 0;
2391 }
2392
2393 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2394 {
2395         u64 data = 0;
2396
2397         switch (msr) {
2398         case HV_X64_MSR_VP_INDEX: {
2399                 int r;
2400                 struct kvm_vcpu *v;
2401                 kvm_for_each_vcpu(r, v, vcpu->kvm) {
2402                         if (v == vcpu) {
2403                                 data = r;
2404                                 break;
2405                         }
2406                 }
2407                 break;
2408         }
2409         case HV_X64_MSR_EOI:
2410                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2411         case HV_X64_MSR_ICR:
2412                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2413         case HV_X64_MSR_TPR:
2414                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2415         case HV_X64_MSR_APIC_ASSIST_PAGE:
2416                 data = vcpu->arch.hv_vapic;
2417                 break;
2418         default:
2419                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2420                 return 1;
2421         }
2422         *pdata = data;
2423         return 0;
2424 }
2425
2426 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2427 {
2428         u64 data;
2429
2430         switch (msr) {
2431         case MSR_IA32_PLATFORM_ID:
2432         case MSR_IA32_EBL_CR_POWERON:
2433         case MSR_IA32_DEBUGCTLMSR:
2434         case MSR_IA32_LASTBRANCHFROMIP:
2435         case MSR_IA32_LASTBRANCHTOIP:
2436         case MSR_IA32_LASTINTFROMIP:
2437         case MSR_IA32_LASTINTTOIP:
2438         case MSR_K8_SYSCFG:
2439         case MSR_K7_HWCR:
2440         case MSR_VM_HSAVE_PA:
2441         case MSR_K7_EVNTSEL0:
2442         case MSR_K7_PERFCTR0:
2443         case MSR_K8_INT_PENDING_MSG:
2444         case MSR_AMD64_NB_CFG:
2445         case MSR_FAM10H_MMIO_CONF_BASE:
2446         case MSR_AMD64_BU_CFG2:
2447                 data = 0;
2448                 break;
2449         case MSR_P6_PERFCTR0:
2450         case MSR_P6_PERFCTR1:
2451         case MSR_P6_EVNTSEL0:
2452         case MSR_P6_EVNTSEL1:
2453                 if (kvm_pmu_msr(vcpu, msr))
2454                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2455                 data = 0;
2456                 break;
2457         case MSR_IA32_UCODE_REV:
2458                 data = 0x100000000ULL;
2459                 break;
2460         case MSR_MTRRcap:
2461                 data = 0x500 | KVM_NR_VAR_MTRR;
2462                 break;
2463         case 0x200 ... 0x2ff:
2464                 return get_msr_mtrr(vcpu, msr, pdata);
2465         case 0xcd: /* fsb frequency */
2466                 data = 3;
2467                 break;
2468                 /*
2469                  * MSR_EBC_FREQUENCY_ID
2470                  * Conservative value valid for even the basic CPU models.
2471                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2472                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2473                  * and 266MHz for model 3, or 4. Set Core Clock
2474                  * Frequency to System Bus Frequency Ratio to 1 (bits
2475                  * 31:24) even though these are only valid for CPU
2476                  * models > 2, however guests may end up dividing or
2477                  * multiplying by zero otherwise.
2478                  */
2479         case MSR_EBC_FREQUENCY_ID:
2480                 data = 1 << 24;
2481                 break;
2482         case MSR_IA32_APICBASE:
2483                 data = kvm_get_apic_base(vcpu);
2484                 break;
2485         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2486                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2487                 break;
2488         case MSR_IA32_TSCDEADLINE:
2489                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2490                 break;
2491         case MSR_IA32_TSC_ADJUST:
2492                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2493                 break;
2494         case MSR_IA32_MISC_ENABLE:
2495                 data = vcpu->arch.ia32_misc_enable_msr;
2496                 break;
2497         case MSR_IA32_PERF_STATUS:
2498                 /* TSC increment by tick */
2499                 data = 1000ULL;
2500                 /* CPU multiplier */
2501                 data |= (((uint64_t)4ULL) << 40);
2502                 break;
2503         case MSR_EFER:
2504                 data = vcpu->arch.efer;
2505                 break;
2506         case MSR_KVM_WALL_CLOCK:
2507         case MSR_KVM_WALL_CLOCK_NEW:
2508                 data = vcpu->kvm->arch.wall_clock;
2509                 break;
2510         case MSR_KVM_SYSTEM_TIME:
2511         case MSR_KVM_SYSTEM_TIME_NEW:
2512                 data = vcpu->arch.time;
2513                 break;
2514         case MSR_KVM_ASYNC_PF_EN:
2515                 data = vcpu->arch.apf.msr_val;
2516                 break;
2517         case MSR_KVM_STEAL_TIME:
2518                 data = vcpu->arch.st.msr_val;
2519                 break;
2520         case MSR_KVM_PV_EOI_EN:
2521                 data = vcpu->arch.pv_eoi.msr_val;
2522                 break;
2523         case MSR_IA32_P5_MC_ADDR:
2524         case MSR_IA32_P5_MC_TYPE:
2525         case MSR_IA32_MCG_CAP:
2526         case MSR_IA32_MCG_CTL:
2527         case MSR_IA32_MCG_STATUS:
2528         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2529                 return get_msr_mce(vcpu, msr, pdata);
2530         case MSR_K7_CLK_CTL:
2531                 /*
2532                  * Provide expected ramp-up count for K7. All other
2533                  * are set to zero, indicating minimum divisors for
2534                  * every field.
2535                  *
2536                  * This prevents guest kernels on AMD host with CPU
2537                  * type 6, model 8 and higher from exploding due to
2538                  * the rdmsr failing.
2539                  */
2540                 data = 0x20000000;
2541                 break;
2542         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2543                 if (kvm_hv_msr_partition_wide(msr)) {
2544                         int r;
2545                         mutex_lock(&vcpu->kvm->lock);
2546                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2547                         mutex_unlock(&vcpu->kvm->lock);
2548                         return r;
2549                 } else
2550                         return get_msr_hyperv(vcpu, msr, pdata);
2551                 break;
2552         case MSR_IA32_BBL_CR_CTL3:
2553                 /* This legacy MSR exists but isn't fully documented in current
2554                  * silicon.  It is however accessed by winxp in very narrow
2555                  * scenarios where it sets bit #19, itself documented as
2556                  * a "reserved" bit.  Best effort attempt to source coherent
2557                  * read data here should the balance of the register be
2558                  * interpreted by the guest:
2559                  *
2560                  * L2 cache control register 3: 64GB range, 256KB size,
2561                  * enabled, latency 0x1, configured
2562                  */
2563                 data = 0xbe702111;
2564                 break;
2565         case MSR_AMD64_OSVW_ID_LENGTH:
2566                 if (!guest_cpuid_has_osvw(vcpu))
2567                         return 1;
2568                 data = vcpu->arch.osvw.length;
2569                 break;
2570         case MSR_AMD64_OSVW_STATUS:
2571                 if (!guest_cpuid_has_osvw(vcpu))
2572                         return 1;
2573                 data = vcpu->arch.osvw.status;
2574                 break;
2575         default:
2576                 if (kvm_pmu_msr(vcpu, msr))
2577                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2578                 if (!ignore_msrs) {
2579                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2580                         return 1;
2581                 } else {
2582                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2583                         data = 0;
2584                 }
2585                 break;
2586         }
2587         *pdata = data;
2588         return 0;
2589 }
2590 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2591
2592 /*
2593  * Read or write a bunch of msrs. All parameters are kernel addresses.
2594  *
2595  * @return number of msrs set successfully.
2596  */
2597 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2598                     struct kvm_msr_entry *entries,
2599                     int (*do_msr)(struct kvm_vcpu *vcpu,
2600                                   unsigned index, u64 *data))
2601 {
2602         int i, idx;
2603
2604         idx = srcu_read_lock(&vcpu->kvm->srcu);
2605         for (i = 0; i < msrs->nmsrs; ++i)
2606                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2607                         break;
2608         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2609
2610         return i;
2611 }
2612
2613 /*
2614  * Read or write a bunch of msrs. Parameters are user addresses.
2615  *
2616  * @return number of msrs set successfully.
2617  */
2618 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2619                   int (*do_msr)(struct kvm_vcpu *vcpu,
2620                                 unsigned index, u64 *data),
2621                   int writeback)
2622 {
2623         struct kvm_msrs msrs;
2624         struct kvm_msr_entry *entries;
2625         int r, n;
2626         unsigned size;
2627
2628         r = -EFAULT;
2629         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2630                 goto out;
2631
2632         r = -E2BIG;
2633         if (msrs.nmsrs >= MAX_IO_MSRS)
2634                 goto out;
2635
2636         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2637         entries = memdup_user(user_msrs->entries, size);
2638         if (IS_ERR(entries)) {
2639                 r = PTR_ERR(entries);
2640                 goto out;
2641         }
2642
2643         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2644         if (r < 0)
2645                 goto out_free;
2646
2647         r = -EFAULT;
2648         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2649                 goto out_free;
2650
2651         r = n;
2652
2653 out_free:
2654         kfree(entries);
2655 out:
2656         return r;
2657 }
2658
2659 int kvm_dev_ioctl_check_extension(long ext)
2660 {
2661         int r;
2662
2663         switch (ext) {
2664         case KVM_CAP_IRQCHIP:
2665         case KVM_CAP_HLT:
2666         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2667         case KVM_CAP_SET_TSS_ADDR:
2668         case KVM_CAP_EXT_CPUID:
2669         case KVM_CAP_EXT_EMUL_CPUID:
2670         case KVM_CAP_CLOCKSOURCE:
2671         case KVM_CAP_PIT:
2672         case KVM_CAP_NOP_IO_DELAY:
2673         case KVM_CAP_MP_STATE:
2674         case KVM_CAP_SYNC_MMU:
2675         case KVM_CAP_USER_NMI:
2676         case KVM_CAP_REINJECT_CONTROL:
2677         case KVM_CAP_IRQ_INJECT_STATUS:
2678         case KVM_CAP_IRQFD:
2679         case KVM_CAP_IOEVENTFD:
2680         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2681         case KVM_CAP_PIT2:
2682         case KVM_CAP_PIT_STATE2:
2683         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2684         case KVM_CAP_XEN_HVM:
2685         case KVM_CAP_ADJUST_CLOCK:
2686         case KVM_CAP_VCPU_EVENTS:
2687         case KVM_CAP_HYPERV:
2688         case KVM_CAP_HYPERV_VAPIC:
2689         case KVM_CAP_HYPERV_SPIN:
2690         case KVM_CAP_PCI_SEGMENT:
2691         case KVM_CAP_DEBUGREGS:
2692         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2693         case KVM_CAP_XSAVE:
2694         case KVM_CAP_ASYNC_PF:
2695         case KVM_CAP_GET_TSC_KHZ:
2696         case KVM_CAP_KVMCLOCK_CTRL:
2697         case KVM_CAP_READONLY_MEM:
2698         case KVM_CAP_HYPERV_TIME:
2699         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2700 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2701         case KVM_CAP_ASSIGN_DEV_IRQ:
2702         case KVM_CAP_PCI_2_3:
2703 #endif
2704                 r = 1;
2705                 break;
2706         case KVM_CAP_COALESCED_MMIO:
2707                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2708                 break;
2709         case KVM_CAP_VAPIC:
2710                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2711                 break;
2712         case KVM_CAP_NR_VCPUS:
2713                 r = KVM_SOFT_MAX_VCPUS;
2714                 break;
2715         case KVM_CAP_MAX_VCPUS:
2716                 r = KVM_MAX_VCPUS;
2717                 break;
2718         case KVM_CAP_NR_MEMSLOTS:
2719                 r = KVM_USER_MEM_SLOTS;
2720                 break;
2721         case KVM_CAP_PV_MMU:    /* obsolete */
2722                 r = 0;
2723                 break;
2724 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2725         case KVM_CAP_IOMMU:
2726                 r = iommu_present(&pci_bus_type);
2727                 break;
2728 #endif
2729         case KVM_CAP_MCE:
2730                 r = KVM_MAX_MCE_BANKS;
2731                 break;
2732         case KVM_CAP_XCRS:
2733                 r = cpu_has_xsave;
2734                 break;
2735         case KVM_CAP_TSC_CONTROL:
2736                 r = kvm_has_tsc_control;
2737                 break;
2738         case KVM_CAP_TSC_DEADLINE_TIMER:
2739                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2740                 break;
2741         default:
2742                 r = 0;
2743                 break;
2744         }
2745         return r;
2746
2747 }
2748
2749 long kvm_arch_dev_ioctl(struct file *filp,
2750                         unsigned int ioctl, unsigned long arg)
2751 {
2752         void __user *argp = (void __user *)arg;
2753         long r;
2754
2755         switch (ioctl) {
2756         case KVM_GET_MSR_INDEX_LIST: {
2757                 struct kvm_msr_list __user *user_msr_list = argp;
2758                 struct kvm_msr_list msr_list;
2759                 unsigned n;
2760
2761                 r = -EFAULT;
2762                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2763                         goto out;
2764                 n = msr_list.nmsrs;
2765                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2766                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2767                         goto out;
2768                 r = -E2BIG;
2769                 if (n < msr_list.nmsrs)
2770                         goto out;
2771                 r = -EFAULT;
2772                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2773                                  num_msrs_to_save * sizeof(u32)))
2774                         goto out;
2775                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2776                                  &emulated_msrs,
2777                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2778                         goto out;
2779                 r = 0;
2780                 break;
2781         }
2782         case KVM_GET_SUPPORTED_CPUID:
2783         case KVM_GET_EMULATED_CPUID: {
2784                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2785                 struct kvm_cpuid2 cpuid;
2786
2787                 r = -EFAULT;
2788                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2789                         goto out;
2790
2791                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2792                                             ioctl);
2793                 if (r)
2794                         goto out;
2795
2796                 r = -EFAULT;
2797                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2798                         goto out;
2799                 r = 0;
2800                 break;
2801         }
2802         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2803                 u64 mce_cap;
2804
2805                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2806                 r = -EFAULT;
2807                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2808                         goto out;
2809                 r = 0;
2810                 break;
2811         }
2812         default:
2813                 r = -EINVAL;
2814         }
2815 out:
2816         return r;
2817 }
2818
2819 static void wbinvd_ipi(void *garbage)
2820 {
2821         wbinvd();
2822 }
2823
2824 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2825 {
2826         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2827 }
2828
2829 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2830 {
2831         /* Address WBINVD may be executed by guest */
2832         if (need_emulate_wbinvd(vcpu)) {
2833                 if (kvm_x86_ops->has_wbinvd_exit())
2834                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2835                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2836                         smp_call_function_single(vcpu->cpu,
2837                                         wbinvd_ipi, NULL, 1);
2838         }
2839
2840         kvm_x86_ops->vcpu_load(vcpu, cpu);
2841
2842         /* Apply any externally detected TSC adjustments (due to suspend) */
2843         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2844                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2845                 vcpu->arch.tsc_offset_adjustment = 0;
2846                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2847         }
2848
2849         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2850                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2851                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2852                 if (tsc_delta < 0)
2853                         mark_tsc_unstable("KVM discovered backwards TSC");
2854                 if (check_tsc_unstable()) {
2855                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2856                                                 vcpu->arch.last_guest_tsc);
2857                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2858                         vcpu->arch.tsc_catchup = 1;
2859                 }
2860                 /*
2861                  * On a host with synchronized TSC, there is no need to update
2862                  * kvmclock on vcpu->cpu migration
2863                  */
2864                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2865                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2866                 if (vcpu->cpu != cpu)
2867                         kvm_migrate_timers(vcpu);
2868                 vcpu->cpu = cpu;
2869         }
2870
2871         accumulate_steal_time(vcpu);
2872         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2873 }
2874
2875 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2876 {
2877         kvm_x86_ops->vcpu_put(vcpu);
2878         kvm_put_guest_fpu(vcpu);
2879         vcpu->arch.last_host_tsc = native_read_tsc();
2880 }
2881
2882 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2883                                     struct kvm_lapic_state *s)
2884 {
2885         kvm_x86_ops->sync_pir_to_irr(vcpu);
2886         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2887
2888         return 0;
2889 }
2890
2891 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2892                                     struct kvm_lapic_state *s)
2893 {
2894         kvm_apic_post_state_restore(vcpu, s);
2895         update_cr8_intercept(vcpu);
2896
2897         return 0;
2898 }
2899
2900 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2901                                     struct kvm_interrupt *irq)
2902 {
2903         if (irq->irq >= KVM_NR_INTERRUPTS)
2904                 return -EINVAL;
2905         if (irqchip_in_kernel(vcpu->kvm))
2906                 return -ENXIO;
2907
2908         kvm_queue_interrupt(vcpu, irq->irq, false);
2909         kvm_make_request(KVM_REQ_EVENT, vcpu);
2910
2911         return 0;
2912 }
2913
2914 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2915 {
2916         kvm_inject_nmi(vcpu);
2917
2918         return 0;
2919 }
2920
2921 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2922                                            struct kvm_tpr_access_ctl *tac)
2923 {
2924         if (tac->flags)
2925                 return -EINVAL;
2926         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2927         return 0;
2928 }
2929
2930 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2931                                         u64 mcg_cap)
2932 {
2933         int r;
2934         unsigned bank_num = mcg_cap & 0xff, bank;
2935
2936         r = -EINVAL;
2937         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2938                 goto out;
2939         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2940                 goto out;
2941         r = 0;
2942         vcpu->arch.mcg_cap = mcg_cap;
2943         /* Init IA32_MCG_CTL to all 1s */
2944         if (mcg_cap & MCG_CTL_P)
2945                 vcpu->arch.mcg_ctl = ~(u64)0;
2946         /* Init IA32_MCi_CTL to all 1s */
2947         for (bank = 0; bank < bank_num; bank++)
2948                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2949 out:
2950         return r;
2951 }
2952
2953 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2954                                       struct kvm_x86_mce *mce)
2955 {
2956         u64 mcg_cap = vcpu->arch.mcg_cap;
2957         unsigned bank_num = mcg_cap & 0xff;
2958         u64 *banks = vcpu->arch.mce_banks;
2959
2960         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2961                 return -EINVAL;
2962         /*
2963          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2964          * reporting is disabled
2965          */
2966         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2967             vcpu->arch.mcg_ctl != ~(u64)0)
2968                 return 0;
2969         banks += 4 * mce->bank;
2970         /*
2971          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2972          * reporting is disabled for the bank
2973          */
2974         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2975                 return 0;
2976         if (mce->status & MCI_STATUS_UC) {
2977                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2978                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2979                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2980                         return 0;
2981                 }
2982                 if (banks[1] & MCI_STATUS_VAL)
2983                         mce->status |= MCI_STATUS_OVER;
2984                 banks[2] = mce->addr;
2985                 banks[3] = mce->misc;
2986                 vcpu->arch.mcg_status = mce->mcg_status;
2987                 banks[1] = mce->status;
2988                 kvm_queue_exception(vcpu, MC_VECTOR);
2989         } else if (!(banks[1] & MCI_STATUS_VAL)
2990                    || !(banks[1] & MCI_STATUS_UC)) {
2991                 if (banks[1] & MCI_STATUS_VAL)
2992                         mce->status |= MCI_STATUS_OVER;
2993                 banks[2] = mce->addr;
2994                 banks[3] = mce->misc;
2995                 banks[1] = mce->status;
2996         } else
2997                 banks[1] |= MCI_STATUS_OVER;
2998         return 0;
2999 }
3000
3001 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3002                                                struct kvm_vcpu_events *events)
3003 {
3004         process_nmi(vcpu);
3005         events->exception.injected =
3006                 vcpu->arch.exception.pending &&
3007                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3008         events->exception.nr = vcpu->arch.exception.nr;
3009         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3010         events->exception.pad = 0;
3011         events->exception.error_code = vcpu->arch.exception.error_code;
3012
3013         events->interrupt.injected =
3014                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3015         events->interrupt.nr = vcpu->arch.interrupt.nr;
3016         events->interrupt.soft = 0;
3017         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3018
3019         events->nmi.injected = vcpu->arch.nmi_injected;
3020         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3021         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3022         events->nmi.pad = 0;
3023
3024         events->sipi_vector = 0; /* never valid when reporting to user space */
3025
3026         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3027                          | KVM_VCPUEVENT_VALID_SHADOW);
3028         memset(&events->reserved, 0, sizeof(events->reserved));
3029 }
3030
3031 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3032                                               struct kvm_vcpu_events *events)
3033 {
3034         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3035                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3036                               | KVM_VCPUEVENT_VALID_SHADOW))
3037                 return -EINVAL;
3038
3039         process_nmi(vcpu);
3040         vcpu->arch.exception.pending = events->exception.injected;
3041         vcpu->arch.exception.nr = events->exception.nr;
3042         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3043         vcpu->arch.exception.error_code = events->exception.error_code;
3044
3045         vcpu->arch.interrupt.pending = events->interrupt.injected;
3046         vcpu->arch.interrupt.nr = events->interrupt.nr;
3047         vcpu->arch.interrupt.soft = events->interrupt.soft;
3048         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3049                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3050                                                   events->interrupt.shadow);
3051
3052         vcpu->arch.nmi_injected = events->nmi.injected;
3053         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3054                 vcpu->arch.nmi_pending = events->nmi.pending;
3055         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3056
3057         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3058             kvm_vcpu_has_lapic(vcpu))
3059                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3060
3061         kvm_make_request(KVM_REQ_EVENT, vcpu);
3062
3063         return 0;
3064 }
3065
3066 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3067                                              struct kvm_debugregs *dbgregs)
3068 {
3069         unsigned long val;
3070
3071         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3072         _kvm_get_dr(vcpu, 6, &val);
3073         dbgregs->dr6 = val;
3074         dbgregs->dr7 = vcpu->arch.dr7;
3075         dbgregs->flags = 0;
3076         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3077 }
3078
3079 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3080                                             struct kvm_debugregs *dbgregs)
3081 {
3082         if (dbgregs->flags)
3083                 return -EINVAL;
3084
3085         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3086         vcpu->arch.dr6 = dbgregs->dr6;
3087         kvm_update_dr6(vcpu);
3088         vcpu->arch.dr7 = dbgregs->dr7;
3089         kvm_update_dr7(vcpu);
3090
3091         return 0;
3092 }
3093
3094 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3095                                          struct kvm_xsave *guest_xsave)
3096 {
3097         if (cpu_has_xsave) {
3098                 memcpy(guest_xsave->region,
3099                         &vcpu->arch.guest_fpu.state->xsave,
3100                         vcpu->arch.guest_xstate_size);
3101                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] &=
3102                         vcpu->arch.guest_supported_xcr0 | XSTATE_FPSSE;
3103         } else {
3104                 memcpy(guest_xsave->region,
3105                         &vcpu->arch.guest_fpu.state->fxsave,
3106                         sizeof(struct i387_fxsave_struct));
3107                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3108                         XSTATE_FPSSE;
3109         }
3110 }
3111
3112 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3113                                         struct kvm_xsave *guest_xsave)
3114 {
3115         u64 xstate_bv =
3116                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3117
3118         if (cpu_has_xsave) {
3119                 /*
3120                  * Here we allow setting states that are not present in
3121                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3122                  * with old userspace.
3123                  */
3124                 if (xstate_bv & ~kvm_supported_xcr0())
3125                         return -EINVAL;
3126                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
3127                         guest_xsave->region, vcpu->arch.guest_xstate_size);
3128         } else {
3129                 if (xstate_bv & ~XSTATE_FPSSE)
3130                         return -EINVAL;
3131                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
3132                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
3133         }
3134         return 0;
3135 }
3136
3137 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3138                                         struct kvm_xcrs *guest_xcrs)
3139 {
3140         if (!cpu_has_xsave) {
3141                 guest_xcrs->nr_xcrs = 0;
3142                 return;
3143         }
3144
3145         guest_xcrs->nr_xcrs = 1;
3146         guest_xcrs->flags = 0;
3147         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3148         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3149 }
3150
3151 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3152                                        struct kvm_xcrs *guest_xcrs)
3153 {
3154         int i, r = 0;
3155
3156         if (!cpu_has_xsave)
3157                 return -EINVAL;
3158
3159         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3160                 return -EINVAL;
3161
3162         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3163                 /* Only support XCR0 currently */
3164                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3165                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3166                                 guest_xcrs->xcrs[i].value);
3167                         break;
3168                 }
3169         if (r)
3170                 r = -EINVAL;
3171         return r;
3172 }
3173
3174 /*
3175  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3176  * stopped by the hypervisor.  This function will be called from the host only.
3177  * EINVAL is returned when the host attempts to set the flag for a guest that
3178  * does not support pv clocks.
3179  */
3180 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3181 {
3182         if (!vcpu->arch.pv_time_enabled)
3183                 return -EINVAL;
3184         vcpu->arch.pvclock_set_guest_stopped_request = true;
3185         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3186         return 0;
3187 }
3188
3189 long kvm_arch_vcpu_ioctl(struct file *filp,
3190                          unsigned int ioctl, unsigned long arg)
3191 {
3192         struct kvm_vcpu *vcpu = filp->private_data;
3193         void __user *argp = (void __user *)arg;
3194         int r;
3195         union {
3196                 struct kvm_lapic_state *lapic;
3197                 struct kvm_xsave *xsave;
3198                 struct kvm_xcrs *xcrs;
3199                 void *buffer;
3200         } u;
3201
3202         u.buffer = NULL;
3203         switch (ioctl) {
3204         case KVM_GET_LAPIC: {
3205                 r = -EINVAL;
3206                 if (!vcpu->arch.apic)
3207                         goto out;
3208                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3209
3210                 r = -ENOMEM;
3211                 if (!u.lapic)
3212                         goto out;
3213                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3214                 if (r)
3215                         goto out;
3216                 r = -EFAULT;
3217                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3218                         goto out;
3219                 r = 0;
3220                 break;
3221         }
3222         case KVM_SET_LAPIC: {
3223                 r = -EINVAL;
3224                 if (!vcpu->arch.apic)
3225                         goto out;
3226                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3227                 if (IS_ERR(u.lapic))
3228                         return PTR_ERR(u.lapic);
3229
3230                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3231                 break;
3232         }
3233         case KVM_INTERRUPT: {
3234                 struct kvm_interrupt irq;
3235
3236                 r = -EFAULT;
3237                 if (copy_from_user(&irq, argp, sizeof irq))
3238                         goto out;
3239                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3240                 break;
3241         }
3242         case KVM_NMI: {
3243                 r = kvm_vcpu_ioctl_nmi(vcpu);
3244                 break;
3245         }
3246         case KVM_SET_CPUID: {
3247                 struct kvm_cpuid __user *cpuid_arg = argp;
3248                 struct kvm_cpuid cpuid;
3249
3250                 r = -EFAULT;
3251                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3252                         goto out;
3253                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3254                 break;
3255         }
3256         case KVM_SET_CPUID2: {
3257                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3258                 struct kvm_cpuid2 cpuid;
3259
3260                 r = -EFAULT;
3261                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3262                         goto out;
3263                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3264                                               cpuid_arg->entries);
3265                 break;
3266         }
3267         case KVM_GET_CPUID2: {
3268                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3269                 struct kvm_cpuid2 cpuid;
3270
3271                 r = -EFAULT;
3272                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3273                         goto out;
3274                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3275                                               cpuid_arg->entries);
3276                 if (r)
3277                         goto out;
3278                 r = -EFAULT;
3279                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3280                         goto out;
3281                 r = 0;
3282                 break;
3283         }
3284         case KVM_GET_MSRS:
3285                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3286                 break;
3287         case KVM_SET_MSRS:
3288                 r = msr_io(vcpu, argp, do_set_msr, 0);
3289                 break;
3290         case KVM_TPR_ACCESS_REPORTING: {
3291                 struct kvm_tpr_access_ctl tac;
3292
3293                 r = -EFAULT;
3294                 if (copy_from_user(&tac, argp, sizeof tac))
3295                         goto out;
3296                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3297                 if (r)
3298                         goto out;
3299                 r = -EFAULT;
3300                 if (copy_to_user(argp, &tac, sizeof tac))
3301                         goto out;
3302                 r = 0;
3303                 break;
3304         };
3305         case KVM_SET_VAPIC_ADDR: {
3306                 struct kvm_vapic_addr va;
3307
3308                 r = -EINVAL;
3309                 if (!irqchip_in_kernel(vcpu->kvm))
3310                         goto out;
3311                 r = -EFAULT;
3312                 if (copy_from_user(&va, argp, sizeof va))
3313                         goto out;
3314                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3315                 break;
3316         }
3317         case KVM_X86_SETUP_MCE: {
3318                 u64 mcg_cap;
3319
3320                 r = -EFAULT;
3321                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3322                         goto out;
3323                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3324                 break;
3325         }
3326         case KVM_X86_SET_MCE: {
3327                 struct kvm_x86_mce mce;
3328
3329                 r = -EFAULT;
3330                 if (copy_from_user(&mce, argp, sizeof mce))
3331                         goto out;
3332                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3333                 break;
3334         }
3335         case KVM_GET_VCPU_EVENTS: {
3336                 struct kvm_vcpu_events events;
3337
3338                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3339
3340                 r = -EFAULT;
3341                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3342                         break;
3343                 r = 0;
3344                 break;
3345         }
3346         case KVM_SET_VCPU_EVENTS: {
3347                 struct kvm_vcpu_events events;
3348
3349                 r = -EFAULT;
3350                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3351                         break;
3352
3353                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3354                 break;
3355         }
3356         case KVM_GET_DEBUGREGS: {
3357                 struct kvm_debugregs dbgregs;
3358
3359                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3360
3361                 r = -EFAULT;
3362                 if (copy_to_user(argp, &dbgregs,
3363                                  sizeof(struct kvm_debugregs)))
3364                         break;
3365                 r = 0;
3366                 break;
3367         }
3368         case KVM_SET_DEBUGREGS: {
3369                 struct kvm_debugregs dbgregs;
3370
3371                 r = -EFAULT;
3372                 if (copy_from_user(&dbgregs, argp,
3373                                    sizeof(struct kvm_debugregs)))
3374                         break;
3375
3376                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3377                 break;
3378         }
3379         case KVM_GET_XSAVE: {
3380                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3381                 r = -ENOMEM;
3382                 if (!u.xsave)
3383                         break;
3384
3385                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3386
3387                 r = -EFAULT;
3388                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3389                         break;
3390                 r = 0;
3391                 break;
3392         }
3393         case KVM_SET_XSAVE: {
3394                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3395                 if (IS_ERR(u.xsave))
3396                         return PTR_ERR(u.xsave);
3397
3398                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3399                 break;
3400         }
3401         case KVM_GET_XCRS: {
3402                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3403                 r = -ENOMEM;
3404                 if (!u.xcrs)
3405                         break;
3406
3407                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3408
3409                 r = -EFAULT;
3410                 if (copy_to_user(argp, u.xcrs,
3411                                  sizeof(struct kvm_xcrs)))
3412                         break;
3413                 r = 0;
3414                 break;
3415         }
3416         case KVM_SET_XCRS: {
3417                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3418                 if (IS_ERR(u.xcrs))
3419                         return PTR_ERR(u.xcrs);
3420
3421                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3422                 break;
3423         }
3424         case KVM_SET_TSC_KHZ: {
3425                 u32 user_tsc_khz;
3426
3427                 r = -EINVAL;
3428                 user_tsc_khz = (u32)arg;
3429
3430                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3431                         goto out;
3432
3433                 if (user_tsc_khz == 0)
3434                         user_tsc_khz = tsc_khz;
3435
3436                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3437
3438                 r = 0;
3439                 goto out;
3440         }
3441         case KVM_GET_TSC_KHZ: {
3442                 r = vcpu->arch.virtual_tsc_khz;
3443                 goto out;
3444         }
3445         case KVM_KVMCLOCK_CTRL: {
3446                 r = kvm_set_guest_paused(vcpu);
3447                 goto out;
3448         }
3449         default:
3450                 r = -EINVAL;
3451         }
3452 out:
3453         kfree(u.buffer);
3454         return r;
3455 }
3456
3457 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3458 {
3459         return VM_FAULT_SIGBUS;
3460 }
3461
3462 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3463 {
3464         int ret;
3465
3466         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3467                 return -EINVAL;
3468         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3469         return ret;
3470 }
3471
3472 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3473                                               u64 ident_addr)
3474 {
3475         kvm->arch.ept_identity_map_addr = ident_addr;
3476         return 0;
3477 }
3478
3479 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3480                                           u32 kvm_nr_mmu_pages)
3481 {
3482         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3483                 return -EINVAL;
3484
3485         mutex_lock(&kvm->slots_lock);
3486
3487         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3488         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3489
3490         mutex_unlock(&kvm->slots_lock);
3491         return 0;
3492 }
3493
3494 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3495 {
3496         return kvm->arch.n_max_mmu_pages;
3497 }
3498
3499 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3500 {
3501         int r;
3502
3503         r = 0;
3504         switch (chip->chip_id) {
3505         case KVM_IRQCHIP_PIC_MASTER:
3506                 memcpy(&chip->chip.pic,
3507                         &pic_irqchip(kvm)->pics[0],
3508                         sizeof(struct kvm_pic_state));
3509                 break;
3510         case KVM_IRQCHIP_PIC_SLAVE:
3511                 memcpy(&chip->chip.pic,
3512                         &pic_irqchip(kvm)->pics[1],
3513                         sizeof(struct kvm_pic_state));
3514                 break;
3515         case KVM_IRQCHIP_IOAPIC:
3516                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3517                 break;
3518         default:
3519                 r = -EINVAL;
3520                 break;
3521         }
3522         return r;
3523 }
3524
3525 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3526 {
3527         int r;
3528
3529         r = 0;
3530         switch (chip->chip_id) {
3531         case KVM_IRQCHIP_PIC_MASTER:
3532                 spin_lock(&pic_irqchip(kvm)->lock);
3533                 memcpy(&pic_irqchip(kvm)->pics[0],
3534                         &chip->chip.pic,
3535                         sizeof(struct kvm_pic_state));
3536                 spin_unlock(&pic_irqchip(kvm)->lock);
3537                 break;
3538         case KVM_IRQCHIP_PIC_SLAVE:
3539                 spin_lock(&pic_irqchip(kvm)->lock);
3540                 memcpy(&pic_irqchip(kvm)->pics[1],
3541                         &chip->chip.pic,
3542                         sizeof(struct kvm_pic_state));
3543                 spin_unlock(&pic_irqchip(kvm)->lock);
3544                 break;
3545         case KVM_IRQCHIP_IOAPIC:
3546                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3547                 break;
3548         default:
3549                 r = -EINVAL;
3550                 break;
3551         }
3552         kvm_pic_update_irq(pic_irqchip(kvm));
3553         return r;
3554 }
3555
3556 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3557 {
3558         int r = 0;
3559
3560         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3561         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3562         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3563         return r;
3564 }
3565
3566 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3567 {
3568         int r = 0;
3569
3570         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3571         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3572         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3573         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3574         return r;
3575 }
3576
3577 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3578 {
3579         int r = 0;
3580
3581         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3582         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3583                 sizeof(ps->channels));
3584         ps->flags = kvm->arch.vpit->pit_state.flags;
3585         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3586         memset(&ps->reserved, 0, sizeof(ps->reserved));
3587         return r;
3588 }
3589
3590 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3591 {
3592         int r = 0, start = 0;
3593         u32 prev_legacy, cur_legacy;
3594         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3595         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3596         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3597         if (!prev_legacy && cur_legacy)
3598                 start = 1;
3599         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3600                sizeof(kvm->arch.vpit->pit_state.channels));
3601         kvm->arch.vpit->pit_state.flags = ps->flags;
3602         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3603         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3604         return r;
3605 }
3606
3607 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3608                                  struct kvm_reinject_control *control)
3609 {
3610         if (!kvm->arch.vpit)
3611                 return -ENXIO;
3612         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3613         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3614         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3615         return 0;
3616 }
3617
3618 /**
3619  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3620  * @kvm: kvm instance
3621  * @log: slot id and address to which we copy the log
3622  *
3623  * We need to keep it in mind that VCPU threads can write to the bitmap
3624  * concurrently.  So, to avoid losing data, we keep the following order for
3625  * each bit:
3626  *
3627  *   1. Take a snapshot of the bit and clear it if needed.
3628  *   2. Write protect the corresponding page.
3629  *   3. Flush TLB's if needed.
3630  *   4. Copy the snapshot to the userspace.
3631  *
3632  * Between 2 and 3, the guest may write to the page using the remaining TLB
3633  * entry.  This is not a problem because the page will be reported dirty at
3634  * step 4 using the snapshot taken before and step 3 ensures that successive
3635  * writes will be logged for the next call.
3636  */
3637 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3638 {
3639         int r;
3640         struct kvm_memory_slot *memslot;
3641         unsigned long n, i;
3642         unsigned long *dirty_bitmap;
3643         unsigned long *dirty_bitmap_buffer;
3644         bool is_dirty = false;
3645
3646         mutex_lock(&kvm->slots_lock);
3647
3648         r = -EINVAL;
3649         if (log->slot >= KVM_USER_MEM_SLOTS)
3650                 goto out;
3651
3652         memslot = id_to_memslot(kvm->memslots, log->slot);
3653
3654         dirty_bitmap = memslot->dirty_bitmap;
3655         r = -ENOENT;
3656         if (!dirty_bitmap)
3657                 goto out;
3658
3659         n = kvm_dirty_bitmap_bytes(memslot);
3660
3661         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3662         memset(dirty_bitmap_buffer, 0, n);
3663
3664         spin_lock(&kvm->mmu_lock);
3665
3666         for (i = 0; i < n / sizeof(long); i++) {
3667                 unsigned long mask;
3668                 gfn_t offset;
3669
3670                 if (!dirty_bitmap[i])
3671                         continue;
3672
3673                 is_dirty = true;
3674
3675                 mask = xchg(&dirty_bitmap[i], 0);
3676                 dirty_bitmap_buffer[i] = mask;
3677
3678                 offset = i * BITS_PER_LONG;
3679                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3680         }
3681
3682         spin_unlock(&kvm->mmu_lock);
3683
3684         /* See the comments in kvm_mmu_slot_remove_write_access(). */
3685         lockdep_assert_held(&kvm->slots_lock);
3686
3687         /*
3688          * All the TLBs can be flushed out of mmu lock, see the comments in
3689          * kvm_mmu_slot_remove_write_access().
3690          */
3691         if (is_dirty)
3692                 kvm_flush_remote_tlbs(kvm);
3693
3694         r = -EFAULT;
3695         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3696                 goto out;
3697
3698         r = 0;
3699 out:
3700         mutex_unlock(&kvm->slots_lock);
3701         return r;
3702 }
3703
3704 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3705                         bool line_status)
3706 {
3707         if (!irqchip_in_kernel(kvm))
3708                 return -ENXIO;
3709
3710         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3711                                         irq_event->irq, irq_event->level,
3712                                         line_status);
3713         return 0;
3714 }
3715
3716 long kvm_arch_vm_ioctl(struct file *filp,
3717                        unsigned int ioctl, unsigned long arg)
3718 {
3719         struct kvm *kvm = filp->private_data;
3720         void __user *argp = (void __user *)arg;
3721         int r = -ENOTTY;
3722         /*
3723          * This union makes it completely explicit to gcc-3.x
3724          * that these two variables' stack usage should be
3725          * combined, not added together.
3726          */
3727         union {
3728                 struct kvm_pit_state ps;
3729                 struct kvm_pit_state2 ps2;
3730                 struct kvm_pit_config pit_config;
3731         } u;
3732
3733         switch (ioctl) {
3734         case KVM_SET_TSS_ADDR:
3735                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3736                 break;
3737         case KVM_SET_IDENTITY_MAP_ADDR: {
3738                 u64 ident_addr;
3739
3740                 r = -EFAULT;
3741                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3742                         goto out;
3743                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3744                 break;
3745         }
3746         case KVM_SET_NR_MMU_PAGES:
3747                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3748                 break;
3749         case KVM_GET_NR_MMU_PAGES:
3750                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3751                 break;
3752         case KVM_CREATE_IRQCHIP: {
3753                 struct kvm_pic *vpic;
3754
3755                 mutex_lock(&kvm->lock);
3756                 r = -EEXIST;
3757                 if (kvm->arch.vpic)
3758                         goto create_irqchip_unlock;
3759                 r = -EINVAL;
3760                 if (atomic_read(&kvm->online_vcpus))
3761                         goto create_irqchip_unlock;
3762                 r = -ENOMEM;
3763                 vpic = kvm_create_pic(kvm);
3764                 if (vpic) {
3765                         r = kvm_ioapic_init(kvm);
3766                         if (r) {
3767                                 mutex_lock(&kvm->slots_lock);
3768                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3769                                                           &vpic->dev_master);
3770                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3771                                                           &vpic->dev_slave);
3772                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3773                                                           &vpic->dev_eclr);
3774                                 mutex_unlock(&kvm->slots_lock);
3775                                 kfree(vpic);
3776                                 goto create_irqchip_unlock;
3777                         }
3778                 } else
3779                         goto create_irqchip_unlock;
3780                 smp_wmb();
3781                 kvm->arch.vpic = vpic;
3782                 smp_wmb();
3783                 r = kvm_setup_default_irq_routing(kvm);
3784                 if (r) {
3785                         mutex_lock(&kvm->slots_lock);
3786                         mutex_lock(&kvm->irq_lock);
3787                         kvm_ioapic_destroy(kvm);
3788                         kvm_destroy_pic(kvm);
3789                         mutex_unlock(&kvm->irq_lock);
3790                         mutex_unlock(&kvm->slots_lock);
3791                 }
3792         create_irqchip_unlock:
3793                 mutex_unlock(&kvm->lock);
3794                 break;
3795         }
3796         case KVM_CREATE_PIT:
3797                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3798                 goto create_pit;
3799         case KVM_CREATE_PIT2:
3800                 r = -EFAULT;
3801                 if (copy_from_user(&u.pit_config, argp,
3802                                    sizeof(struct kvm_pit_config)))
3803                         goto out;
3804         create_pit:
3805                 mutex_lock(&kvm->slots_lock);
3806                 r = -EEXIST;
3807                 if (kvm->arch.vpit)
3808                         goto create_pit_unlock;
3809                 r = -ENOMEM;
3810                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3811                 if (kvm->arch.vpit)
3812                         r = 0;
3813         create_pit_unlock:
3814                 mutex_unlock(&kvm->slots_lock);
3815                 break;
3816         case KVM_GET_IRQCHIP: {
3817                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3818                 struct kvm_irqchip *chip;
3819
3820                 chip = memdup_user(argp, sizeof(*chip));
3821                 if (IS_ERR(chip)) {
3822                         r = PTR_ERR(chip);
3823                         goto out;
3824                 }
3825
3826                 r = -ENXIO;
3827                 if (!irqchip_in_kernel(kvm))
3828                         goto get_irqchip_out;
3829                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3830                 if (r)
3831                         goto get_irqchip_out;
3832                 r = -EFAULT;
3833                 if (copy_to_user(argp, chip, sizeof *chip))
3834                         goto get_irqchip_out;
3835                 r = 0;
3836         get_irqchip_out:
3837                 kfree(chip);
3838                 break;
3839         }
3840         case KVM_SET_IRQCHIP: {
3841                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3842                 struct kvm_irqchip *chip;
3843
3844                 chip = memdup_user(argp, sizeof(*chip));
3845                 if (IS_ERR(chip)) {
3846                         r = PTR_ERR(chip);
3847                         goto out;
3848                 }
3849
3850                 r = -ENXIO;
3851                 if (!irqchip_in_kernel(kvm))
3852                         goto set_irqchip_out;
3853                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3854                 if (r)
3855                         goto set_irqchip_out;
3856                 r = 0;
3857         set_irqchip_out:
3858                 kfree(chip);
3859                 break;
3860         }
3861         case KVM_GET_PIT: {
3862                 r = -EFAULT;
3863                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3864                         goto out;
3865                 r = -ENXIO;
3866                 if (!kvm->arch.vpit)
3867                         goto out;
3868                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3869                 if (r)
3870                         goto out;
3871                 r = -EFAULT;
3872                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3873                         goto out;
3874                 r = 0;
3875                 break;
3876         }
3877         case KVM_SET_PIT: {
3878                 r = -EFAULT;
3879                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3880                         goto out;
3881                 r = -ENXIO;
3882                 if (!kvm->arch.vpit)
3883                         goto out;
3884                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3885                 break;
3886         }
3887         case KVM_GET_PIT2: {
3888                 r = -ENXIO;
3889                 if (!kvm->arch.vpit)
3890                         goto out;
3891                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3892                 if (r)
3893                         goto out;
3894                 r = -EFAULT;
3895                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3896                         goto out;
3897                 r = 0;
3898                 break;
3899         }
3900         case KVM_SET_PIT2: {
3901                 r = -EFAULT;
3902                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3903                         goto out;
3904                 r = -ENXIO;
3905                 if (!kvm->arch.vpit)
3906                         goto out;
3907                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3908                 break;
3909         }
3910         case KVM_REINJECT_CONTROL: {
3911                 struct kvm_reinject_control control;
3912                 r =  -EFAULT;
3913                 if (copy_from_user(&control, argp, sizeof(control)))
3914                         goto out;
3915                 r = kvm_vm_ioctl_reinject(kvm, &control);
3916                 break;
3917         }
3918         case KVM_XEN_HVM_CONFIG: {
3919                 r = -EFAULT;
3920                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3921                                    sizeof(struct kvm_xen_hvm_config)))
3922                         goto out;
3923                 r = -EINVAL;
3924                 if (kvm->arch.xen_hvm_config.flags)
3925                         goto out;
3926                 r = 0;
3927                 break;
3928         }
3929         case KVM_SET_CLOCK: {
3930                 struct kvm_clock_data user_ns;
3931                 u64 now_ns;
3932                 s64 delta;
3933
3934                 r = -EFAULT;
3935                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3936                         goto out;
3937
3938                 r = -EINVAL;
3939                 if (user_ns.flags)
3940                         goto out;
3941
3942                 r = 0;
3943                 local_irq_disable();
3944                 now_ns = get_kernel_ns();
3945                 delta = user_ns.clock - now_ns;
3946                 local_irq_enable();
3947                 kvm->arch.kvmclock_offset = delta;
3948                 kvm_gen_update_masterclock(kvm);
3949                 break;
3950         }
3951         case KVM_GET_CLOCK: {
3952                 struct kvm_clock_data user_ns;
3953                 u64 now_ns;
3954
3955                 local_irq_disable();
3956                 now_ns = get_kernel_ns();
3957                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3958                 local_irq_enable();
3959                 user_ns.flags = 0;
3960                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3961
3962                 r = -EFAULT;
3963                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3964                         goto out;
3965                 r = 0;
3966                 break;
3967         }
3968
3969         default:
3970                 ;
3971         }
3972 out:
3973         return r;
3974 }
3975
3976 static void kvm_init_msr_list(void)
3977 {
3978         u32 dummy[2];
3979         unsigned i, j;
3980
3981         /* skip the first msrs in the list. KVM-specific */
3982         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3983                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3984                         continue;
3985
3986                 /*
3987                  * Even MSRs that are valid in the host may not be exposed
3988                  * to the guests in some cases.  We could work around this
3989                  * in VMX with the generic MSR save/load machinery, but it
3990                  * is not really worthwhile since it will really only
3991                  * happen with nested virtualization.
3992                  */
3993                 switch (msrs_to_save[i]) {
3994                 case MSR_IA32_BNDCFGS:
3995                         if (!kvm_x86_ops->mpx_supported())
3996                                 continue;
3997                         break;
3998                 default:
3999                         break;
4000                 }
4001
4002                 if (j < i)
4003                         msrs_to_save[j] = msrs_to_save[i];
4004                 j++;
4005         }
4006         num_msrs_to_save = j;
4007 }
4008
4009 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4010                            const void *v)
4011 {
4012         int handled = 0;
4013         int n;
4014
4015         do {
4016                 n = min(len, 8);
4017                 if (!(vcpu->arch.apic &&
4018                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
4019                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
4020                         break;
4021                 handled += n;
4022                 addr += n;
4023                 len -= n;
4024                 v += n;
4025         } while (len);
4026
4027         return handled;
4028 }
4029
4030 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4031 {
4032         int handled = 0;
4033         int n;
4034
4035         do {
4036                 n = min(len, 8);
4037                 if (!(vcpu->arch.apic &&
4038                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
4039                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
4040                         break;
4041                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4042                 handled += n;
4043                 addr += n;
4044                 len -= n;
4045                 v += n;
4046         } while (len);
4047
4048         return handled;
4049 }
4050
4051 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4052                         struct kvm_segment *var, int seg)
4053 {
4054         kvm_x86_ops->set_segment(vcpu, var, seg);
4055 }
4056
4057 void kvm_get_segment(struct kvm_vcpu *vcpu,
4058                      struct kvm_segment *var, int seg)
4059 {
4060         kvm_x86_ops->get_segment(vcpu, var, seg);
4061 }
4062
4063 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
4064 {
4065         gpa_t t_gpa;
4066         struct x86_exception exception;
4067
4068         BUG_ON(!mmu_is_nested(vcpu));
4069
4070         /* NPT walks are always user-walks */
4071         access |= PFERR_USER_MASK;
4072         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
4073
4074         return t_gpa;
4075 }
4076
4077 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4078                               struct x86_exception *exception)
4079 {
4080         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4081         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4082 }
4083
4084  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4085                                 struct x86_exception *exception)
4086 {
4087         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4088         access |= PFERR_FETCH_MASK;
4089         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4090 }
4091
4092 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4093                                struct x86_exception *exception)
4094 {
4095         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4096         access |= PFERR_WRITE_MASK;
4097         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4098 }
4099
4100 /* uses this to access any guest's mapped memory without checking CPL */
4101 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4102                                 struct x86_exception *exception)
4103 {
4104         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4105 }
4106
4107 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4108                                       struct kvm_vcpu *vcpu, u32 access,
4109                                       struct x86_exception *exception)
4110 {
4111         void *data = val;
4112         int r = X86EMUL_CONTINUE;
4113
4114         while (bytes) {
4115                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4116                                                             exception);
4117                 unsigned offset = addr & (PAGE_SIZE-1);
4118                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4119                 int ret;
4120
4121                 if (gpa == UNMAPPED_GVA)
4122                         return X86EMUL_PROPAGATE_FAULT;
4123                 ret = kvm_read_guest_page(vcpu->kvm, gpa >> PAGE_SHIFT, data,
4124                                           offset, toread);
4125                 if (ret < 0) {
4126                         r = X86EMUL_IO_NEEDED;
4127                         goto out;
4128                 }
4129
4130                 bytes -= toread;
4131                 data += toread;
4132                 addr += toread;
4133         }
4134 out:
4135         return r;
4136 }
4137
4138 /* used for instruction fetching */
4139 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4140                                 gva_t addr, void *val, unsigned int bytes,
4141                                 struct x86_exception *exception)
4142 {
4143         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4144         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4145         unsigned offset;
4146         int ret;
4147
4148         /* Inline kvm_read_guest_virt_helper for speed.  */
4149         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4150                                                     exception);
4151         if (unlikely(gpa == UNMAPPED_GVA))
4152                 return X86EMUL_PROPAGATE_FAULT;
4153
4154         offset = addr & (PAGE_SIZE-1);
4155         if (WARN_ON(offset + bytes > PAGE_SIZE))
4156                 bytes = (unsigned)PAGE_SIZE - offset;
4157         ret = kvm_read_guest_page(vcpu->kvm, gpa >> PAGE_SHIFT, val,
4158                                   offset, bytes);
4159         if (unlikely(ret < 0))
4160                 return X86EMUL_IO_NEEDED;
4161
4162         return X86EMUL_CONTINUE;
4163 }
4164
4165 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4166                                gva_t addr, void *val, unsigned int bytes,
4167                                struct x86_exception *exception)
4168 {
4169         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4170         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4171
4172         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4173                                           exception);
4174 }
4175 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4176
4177 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4178                                       gva_t addr, void *val, unsigned int bytes,
4179                                       struct x86_exception *exception)
4180 {
4181         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4182         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4183 }
4184
4185 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4186                                        gva_t addr, void *val,
4187                                        unsigned int bytes,
4188                                        struct x86_exception *exception)
4189 {
4190         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4191         void *data = val;
4192         int r = X86EMUL_CONTINUE;
4193
4194         while (bytes) {
4195                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4196                                                              PFERR_WRITE_MASK,
4197                                                              exception);
4198                 unsigned offset = addr & (PAGE_SIZE-1);
4199                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4200                 int ret;
4201
4202                 if (gpa == UNMAPPED_GVA)
4203                         return X86EMUL_PROPAGATE_FAULT;
4204                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4205                 if (ret < 0) {
4206                         r = X86EMUL_IO_NEEDED;
4207                         goto out;
4208                 }
4209
4210                 bytes -= towrite;
4211                 data += towrite;
4212                 addr += towrite;
4213         }
4214 out:
4215         return r;
4216 }
4217 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4218
4219 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4220                                 gpa_t *gpa, struct x86_exception *exception,
4221                                 bool write)
4222 {
4223         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4224                 | (write ? PFERR_WRITE_MASK : 0);
4225
4226         if (vcpu_match_mmio_gva(vcpu, gva)
4227             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4228                                  vcpu->arch.access, access)) {
4229                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4230                                         (gva & (PAGE_SIZE - 1));
4231                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4232                 return 1;
4233         }
4234
4235         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4236
4237         if (*gpa == UNMAPPED_GVA)
4238                 return -1;
4239
4240         /* For APIC access vmexit */
4241         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4242                 return 1;
4243
4244         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4245                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4246                 return 1;
4247         }
4248
4249         return 0;
4250 }
4251
4252 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4253                         const void *val, int bytes)
4254 {
4255         int ret;
4256
4257         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4258         if (ret < 0)
4259                 return 0;
4260         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4261         return 1;
4262 }
4263
4264 struct read_write_emulator_ops {
4265         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4266                                   int bytes);
4267         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4268                                   void *val, int bytes);
4269         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4270                                int bytes, void *val);
4271         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4272                                     void *val, int bytes);
4273         bool write;
4274 };
4275
4276 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4277 {
4278         if (vcpu->mmio_read_completed) {
4279                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4280                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4281                 vcpu->mmio_read_completed = 0;
4282                 return 1;
4283         }
4284
4285         return 0;
4286 }
4287
4288 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4289                         void *val, int bytes)
4290 {
4291         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4292 }
4293
4294 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4295                          void *val, int bytes)
4296 {
4297         return emulator_write_phys(vcpu, gpa, val, bytes);
4298 }
4299
4300 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4301 {
4302         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4303         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4304 }
4305
4306 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4307                           void *val, int bytes)
4308 {
4309         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4310         return X86EMUL_IO_NEEDED;
4311 }
4312
4313 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4314                            void *val, int bytes)
4315 {
4316         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4317
4318         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4319         return X86EMUL_CONTINUE;
4320 }
4321
4322 static const struct read_write_emulator_ops read_emultor = {
4323         .read_write_prepare = read_prepare,
4324         .read_write_emulate = read_emulate,
4325         .read_write_mmio = vcpu_mmio_read,
4326         .read_write_exit_mmio = read_exit_mmio,
4327 };
4328
4329 static const struct read_write_emulator_ops write_emultor = {
4330         .read_write_emulate = write_emulate,
4331         .read_write_mmio = write_mmio,
4332         .read_write_exit_mmio = write_exit_mmio,
4333         .write = true,
4334 };
4335
4336 static int emulator_read_write_onepage(unsigned long addr, void *val,
4337                                        unsigned int bytes,
4338                                        struct x86_exception *exception,
4339                                        struct kvm_vcpu *vcpu,
4340                                        const struct read_write_emulator_ops *ops)
4341 {
4342         gpa_t gpa;
4343         int handled, ret;
4344         bool write = ops->write;
4345         struct kvm_mmio_fragment *frag;
4346
4347         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4348
4349         if (ret < 0)
4350                 return X86EMUL_PROPAGATE_FAULT;
4351
4352         /* For APIC access vmexit */
4353         if (ret)
4354                 goto mmio;
4355
4356         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4357                 return X86EMUL_CONTINUE;
4358
4359 mmio:
4360         /*
4361          * Is this MMIO handled locally?
4362          */
4363         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4364         if (handled == bytes)
4365                 return X86EMUL_CONTINUE;
4366
4367         gpa += handled;
4368         bytes -= handled;
4369         val += handled;
4370
4371         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4372         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4373         frag->gpa = gpa;
4374         frag->data = val;
4375         frag->len = bytes;
4376         return X86EMUL_CONTINUE;
4377 }
4378
4379 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4380                         void *val, unsigned int bytes,
4381                         struct x86_exception *exception,
4382                         const struct read_write_emulator_ops *ops)
4383 {
4384         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4385         gpa_t gpa;
4386         int rc;
4387
4388         if (ops->read_write_prepare &&
4389                   ops->read_write_prepare(vcpu, val, bytes))
4390                 return X86EMUL_CONTINUE;
4391
4392         vcpu->mmio_nr_fragments = 0;
4393
4394         /* Crossing a page boundary? */
4395         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4396                 int now;
4397
4398                 now = -addr & ~PAGE_MASK;
4399                 rc = emulator_read_write_onepage(addr, val, now, exception,
4400                                                  vcpu, ops);
4401
4402                 if (rc != X86EMUL_CONTINUE)
4403                         return rc;
4404                 addr += now;
4405                 val += now;
4406                 bytes -= now;
4407         }
4408
4409         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4410                                          vcpu, ops);
4411         if (rc != X86EMUL_CONTINUE)
4412                 return rc;
4413
4414         if (!vcpu->mmio_nr_fragments)
4415                 return rc;
4416
4417         gpa = vcpu->mmio_fragments[0].gpa;
4418
4419         vcpu->mmio_needed = 1;
4420         vcpu->mmio_cur_fragment = 0;
4421
4422         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4423         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4424         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4425         vcpu->run->mmio.phys_addr = gpa;
4426
4427         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4428 }
4429
4430 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4431                                   unsigned long addr,
4432                                   void *val,
4433                                   unsigned int bytes,
4434                                   struct x86_exception *exception)
4435 {
4436         return emulator_read_write(ctxt, addr, val, bytes,
4437                                    exception, &read_emultor);
4438 }
4439
4440 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4441                             unsigned long addr,
4442                             const void *val,
4443                             unsigned int bytes,
4444                             struct x86_exception *exception)
4445 {
4446         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4447                                    exception, &write_emultor);
4448 }
4449
4450 #define CMPXCHG_TYPE(t, ptr, old, new) \
4451         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4452
4453 #ifdef CONFIG_X86_64
4454 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4455 #else
4456 #  define CMPXCHG64(ptr, old, new) \
4457         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4458 #endif
4459
4460 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4461                                      unsigned long addr,
4462                                      const void *old,
4463                                      const void *new,
4464                                      unsigned int bytes,
4465                                      struct x86_exception *exception)
4466 {
4467         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4468         gpa_t gpa;
4469         struct page *page;
4470         char *kaddr;
4471         bool exchanged;
4472
4473         /* guests cmpxchg8b have to be emulated atomically */
4474         if (bytes > 8 || (bytes & (bytes - 1)))
4475                 goto emul_write;
4476
4477         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4478
4479         if (gpa == UNMAPPED_GVA ||
4480             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4481                 goto emul_write;
4482
4483         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4484                 goto emul_write;
4485
4486         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4487         if (is_error_page(page))
4488                 goto emul_write;
4489
4490         kaddr = kmap_atomic(page);
4491         kaddr += offset_in_page(gpa);
4492         switch (bytes) {
4493         case 1:
4494                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4495                 break;
4496         case 2:
4497                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4498                 break;
4499         case 4:
4500                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4501                 break;
4502         case 8:
4503                 exchanged = CMPXCHG64(kaddr, old, new);
4504                 break;
4505         default:
4506                 BUG();
4507         }
4508         kunmap_atomic(kaddr);
4509         kvm_release_page_dirty(page);
4510
4511         if (!exchanged)
4512                 return X86EMUL_CMPXCHG_FAILED;
4513
4514         mark_page_dirty(vcpu->kvm, gpa >> PAGE_SHIFT);
4515         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4516
4517         return X86EMUL_CONTINUE;
4518
4519 emul_write:
4520         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4521
4522         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4523 }
4524
4525 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4526 {
4527         /* TODO: String I/O for in kernel device */
4528         int r;
4529
4530         if (vcpu->arch.pio.in)
4531                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4532                                     vcpu->arch.pio.size, pd);
4533         else
4534                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4535                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4536                                      pd);
4537         return r;
4538 }
4539
4540 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4541                                unsigned short port, void *val,
4542                                unsigned int count, bool in)
4543 {
4544         vcpu->arch.pio.port = port;
4545         vcpu->arch.pio.in = in;
4546         vcpu->arch.pio.count  = count;
4547         vcpu->arch.pio.size = size;
4548
4549         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4550                 vcpu->arch.pio.count = 0;
4551                 return 1;
4552         }
4553
4554         vcpu->run->exit_reason = KVM_EXIT_IO;
4555         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4556         vcpu->run->io.size = size;
4557         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4558         vcpu->run->io.count = count;
4559         vcpu->run->io.port = port;
4560
4561         return 0;
4562 }
4563
4564 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4565                                     int size, unsigned short port, void *val,
4566                                     unsigned int count)
4567 {
4568         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4569         int ret;
4570
4571         if (vcpu->arch.pio.count)
4572                 goto data_avail;
4573
4574         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4575         if (ret) {
4576 data_avail:
4577                 memcpy(val, vcpu->arch.pio_data, size * count);
4578                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4579                 vcpu->arch.pio.count = 0;
4580                 return 1;
4581         }
4582
4583         return 0;
4584 }
4585
4586 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4587                                      int size, unsigned short port,
4588                                      const void *val, unsigned int count)
4589 {
4590         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4591
4592         memcpy(vcpu->arch.pio_data, val, size * count);
4593         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4594         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4595 }
4596
4597 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4598 {
4599         return kvm_x86_ops->get_segment_base(vcpu, seg);
4600 }
4601
4602 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4603 {
4604         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4605 }
4606
4607 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4608 {
4609         if (!need_emulate_wbinvd(vcpu))
4610                 return X86EMUL_CONTINUE;
4611
4612         if (kvm_x86_ops->has_wbinvd_exit()) {
4613                 int cpu = get_cpu();
4614
4615                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4616                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4617                                 wbinvd_ipi, NULL, 1);
4618                 put_cpu();
4619                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4620         } else
4621                 wbinvd();
4622         return X86EMUL_CONTINUE;
4623 }
4624 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4625
4626 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4627 {
4628         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4629 }
4630
4631 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4632 {
4633         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4634 }
4635
4636 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4637 {
4638
4639         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4640 }
4641
4642 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4643 {
4644         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4645 }
4646
4647 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4648 {
4649         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4650         unsigned long value;
4651
4652         switch (cr) {
4653         case 0:
4654                 value = kvm_read_cr0(vcpu);
4655                 break;
4656         case 2:
4657                 value = vcpu->arch.cr2;
4658                 break;
4659         case 3:
4660                 value = kvm_read_cr3(vcpu);
4661                 break;
4662         case 4:
4663                 value = kvm_read_cr4(vcpu);
4664                 break;
4665         case 8:
4666                 value = kvm_get_cr8(vcpu);
4667                 break;
4668         default:
4669                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4670                 return 0;
4671         }
4672
4673         return value;
4674 }
4675
4676 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4677 {
4678         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4679         int res = 0;
4680
4681         switch (cr) {
4682         case 0:
4683                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4684                 break;
4685         case 2:
4686                 vcpu->arch.cr2 = val;
4687                 break;
4688         case 3:
4689                 res = kvm_set_cr3(vcpu, val);
4690                 break;
4691         case 4:
4692                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4693                 break;
4694         case 8:
4695                 res = kvm_set_cr8(vcpu, val);
4696                 break;
4697         default:
4698                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4699                 res = -1;
4700         }
4701
4702         return res;
4703 }
4704
4705 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4706 {
4707         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4708 }
4709
4710 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4711 {
4712         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4713 }
4714
4715 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4716 {
4717         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4718 }
4719
4720 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4721 {
4722         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4723 }
4724
4725 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4726 {
4727         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4728 }
4729
4730 static unsigned long emulator_get_cached_segment_base(
4731         struct x86_emulate_ctxt *ctxt, int seg)
4732 {
4733         return get_segment_base(emul_to_vcpu(ctxt), seg);
4734 }
4735
4736 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4737                                  struct desc_struct *desc, u32 *base3,
4738                                  int seg)
4739 {
4740         struct kvm_segment var;
4741
4742         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4743         *selector = var.selector;
4744
4745         if (var.unusable) {
4746                 memset(desc, 0, sizeof(*desc));
4747                 return false;
4748         }
4749
4750         if (var.g)
4751                 var.limit >>= 12;
4752         set_desc_limit(desc, var.limit);
4753         set_desc_base(desc, (unsigned long)var.base);
4754 #ifdef CONFIG_X86_64
4755         if (base3)
4756                 *base3 = var.base >> 32;
4757 #endif
4758         desc->type = var.type;
4759         desc->s = var.s;
4760         desc->dpl = var.dpl;
4761         desc->p = var.present;
4762         desc->avl = var.avl;
4763         desc->l = var.l;
4764         desc->d = var.db;
4765         desc->g = var.g;
4766
4767         return true;
4768 }
4769
4770 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4771                                  struct desc_struct *desc, u32 base3,
4772                                  int seg)
4773 {
4774         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4775         struct kvm_segment var;
4776
4777         var.selector = selector;
4778         var.base = get_desc_base(desc);
4779 #ifdef CONFIG_X86_64
4780         var.base |= ((u64)base3) << 32;
4781 #endif
4782         var.limit = get_desc_limit(desc);
4783         if (desc->g)
4784                 var.limit = (var.limit << 12) | 0xfff;
4785         var.type = desc->type;
4786         var.dpl = desc->dpl;
4787         var.db = desc->d;
4788         var.s = desc->s;
4789         var.l = desc->l;
4790         var.g = desc->g;
4791         var.avl = desc->avl;
4792         var.present = desc->p;
4793         var.unusable = !var.present;
4794         var.padding = 0;
4795
4796         kvm_set_segment(vcpu, &var, seg);
4797         return;
4798 }
4799
4800 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4801                             u32 msr_index, u64 *pdata)
4802 {
4803         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4804 }
4805
4806 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4807                             u32 msr_index, u64 data)
4808 {
4809         struct msr_data msr;
4810
4811         msr.data = data;
4812         msr.index = msr_index;
4813         msr.host_initiated = false;
4814         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4815 }
4816
4817 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4818                               u32 pmc)
4819 {
4820         return kvm_pmu_check_pmc(emul_to_vcpu(ctxt), pmc);
4821 }
4822
4823 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4824                              u32 pmc, u64 *pdata)
4825 {
4826         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4827 }
4828
4829 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4830 {
4831         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4832 }
4833
4834 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4835 {
4836         preempt_disable();
4837         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4838         /*
4839          * CR0.TS may reference the host fpu state, not the guest fpu state,
4840          * so it may be clear at this point.
4841          */
4842         clts();
4843 }
4844
4845 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4846 {
4847         preempt_enable();
4848 }
4849
4850 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4851                               struct x86_instruction_info *info,
4852                               enum x86_intercept_stage stage)
4853 {
4854         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4855 }
4856
4857 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4858                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4859 {
4860         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4861 }
4862
4863 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4864 {
4865         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4866 }
4867
4868 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4869 {
4870         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4871 }
4872
4873 static const struct x86_emulate_ops emulate_ops = {
4874         .read_gpr            = emulator_read_gpr,
4875         .write_gpr           = emulator_write_gpr,
4876         .read_std            = kvm_read_guest_virt_system,
4877         .write_std           = kvm_write_guest_virt_system,
4878         .fetch               = kvm_fetch_guest_virt,
4879         .read_emulated       = emulator_read_emulated,
4880         .write_emulated      = emulator_write_emulated,
4881         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4882         .invlpg              = emulator_invlpg,
4883         .pio_in_emulated     = emulator_pio_in_emulated,
4884         .pio_out_emulated    = emulator_pio_out_emulated,
4885         .get_segment         = emulator_get_segment,
4886         .set_segment         = emulator_set_segment,
4887         .get_cached_segment_base = emulator_get_cached_segment_base,
4888         .get_gdt             = emulator_get_gdt,
4889         .get_idt             = emulator_get_idt,
4890         .set_gdt             = emulator_set_gdt,
4891         .set_idt             = emulator_set_idt,
4892         .get_cr              = emulator_get_cr,
4893         .set_cr              = emulator_set_cr,
4894         .cpl                 = emulator_get_cpl,
4895         .get_dr              = emulator_get_dr,
4896         .set_dr              = emulator_set_dr,
4897         .set_msr             = emulator_set_msr,
4898         .get_msr             = emulator_get_msr,
4899         .check_pmc           = emulator_check_pmc,
4900         .read_pmc            = emulator_read_pmc,
4901         .halt                = emulator_halt,
4902         .wbinvd              = emulator_wbinvd,
4903         .fix_hypercall       = emulator_fix_hypercall,
4904         .get_fpu             = emulator_get_fpu,
4905         .put_fpu             = emulator_put_fpu,
4906         .intercept           = emulator_intercept,
4907         .get_cpuid           = emulator_get_cpuid,
4908 };
4909
4910 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4911 {
4912         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
4913         /*
4914          * an sti; sti; sequence only disable interrupts for the first
4915          * instruction. So, if the last instruction, be it emulated or
4916          * not, left the system with the INT_STI flag enabled, it
4917          * means that the last instruction is an sti. We should not
4918          * leave the flag on in this case. The same goes for mov ss
4919          */
4920         if (int_shadow & mask)
4921                 mask = 0;
4922         if (unlikely(int_shadow || mask)) {
4923                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4924                 if (!mask)
4925                         kvm_make_request(KVM_REQ_EVENT, vcpu);
4926         }
4927 }
4928
4929 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4930 {
4931         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4932         if (ctxt->exception.vector == PF_VECTOR)
4933                 kvm_propagate_fault(vcpu, &ctxt->exception);
4934         else if (ctxt->exception.error_code_valid)
4935                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4936                                       ctxt->exception.error_code);
4937         else
4938                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4939 }
4940
4941 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4942 {
4943         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4944         int cs_db, cs_l;
4945
4946         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4947
4948         ctxt->eflags = kvm_get_rflags(vcpu);
4949         ctxt->eip = kvm_rip_read(vcpu);
4950         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4951                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4952                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
4953                      cs_db                              ? X86EMUL_MODE_PROT32 :
4954                                                           X86EMUL_MODE_PROT16;
4955         ctxt->guest_mode = is_guest_mode(vcpu);
4956
4957         init_decode_cache(ctxt);
4958         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4959 }
4960
4961 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4962 {
4963         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4964         int ret;
4965
4966         init_emulate_ctxt(vcpu);
4967
4968         ctxt->op_bytes = 2;
4969         ctxt->ad_bytes = 2;
4970         ctxt->_eip = ctxt->eip + inc_eip;
4971         ret = emulate_int_real(ctxt, irq);
4972
4973         if (ret != X86EMUL_CONTINUE)
4974                 return EMULATE_FAIL;
4975
4976         ctxt->eip = ctxt->_eip;
4977         kvm_rip_write(vcpu, ctxt->eip);
4978         kvm_set_rflags(vcpu, ctxt->eflags);
4979
4980         if (irq == NMI_VECTOR)
4981                 vcpu->arch.nmi_pending = 0;
4982         else
4983                 vcpu->arch.interrupt.pending = false;
4984
4985         return EMULATE_DONE;
4986 }
4987 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4988
4989 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4990 {
4991         int r = EMULATE_DONE;
4992
4993         ++vcpu->stat.insn_emulation_fail;
4994         trace_kvm_emulate_insn_failed(vcpu);
4995         if (!is_guest_mode(vcpu)) {
4996                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4997                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4998                 vcpu->run->internal.ndata = 0;
4999                 r = EMULATE_FAIL;
5000         }
5001         kvm_queue_exception(vcpu, UD_VECTOR);
5002
5003         return r;
5004 }
5005
5006 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5007                                   bool write_fault_to_shadow_pgtable,
5008                                   int emulation_type)
5009 {
5010         gpa_t gpa = cr2;
5011         pfn_t pfn;
5012
5013         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5014                 return false;
5015
5016         if (!vcpu->arch.mmu.direct_map) {
5017                 /*
5018                  * Write permission should be allowed since only
5019                  * write access need to be emulated.
5020                  */
5021                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5022
5023                 /*
5024                  * If the mapping is invalid in guest, let cpu retry
5025                  * it to generate fault.
5026                  */
5027                 if (gpa == UNMAPPED_GVA)
5028                         return true;
5029         }
5030
5031         /*
5032          * Do not retry the unhandleable instruction if it faults on the
5033          * readonly host memory, otherwise it will goto a infinite loop:
5034          * retry instruction -> write #PF -> emulation fail -> retry
5035          * instruction -> ...
5036          */
5037         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5038
5039         /*
5040          * If the instruction failed on the error pfn, it can not be fixed,
5041          * report the error to userspace.
5042          */
5043         if (is_error_noslot_pfn(pfn))
5044                 return false;
5045
5046         kvm_release_pfn_clean(pfn);
5047
5048         /* The instructions are well-emulated on direct mmu. */
5049         if (vcpu->arch.mmu.direct_map) {
5050                 unsigned int indirect_shadow_pages;
5051
5052                 spin_lock(&vcpu->kvm->mmu_lock);
5053                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5054                 spin_unlock(&vcpu->kvm->mmu_lock);
5055
5056                 if (indirect_shadow_pages)
5057                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5058
5059                 return true;
5060         }
5061
5062         /*
5063          * if emulation was due to access to shadowed page table
5064          * and it failed try to unshadow page and re-enter the
5065          * guest to let CPU execute the instruction.
5066          */
5067         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5068
5069         /*
5070          * If the access faults on its page table, it can not
5071          * be fixed by unprotecting shadow page and it should
5072          * be reported to userspace.
5073          */
5074         return !write_fault_to_shadow_pgtable;
5075 }
5076
5077 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5078                               unsigned long cr2,  int emulation_type)
5079 {
5080         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5081         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5082
5083         last_retry_eip = vcpu->arch.last_retry_eip;
5084         last_retry_addr = vcpu->arch.last_retry_addr;
5085
5086         /*
5087          * If the emulation is caused by #PF and it is non-page_table
5088          * writing instruction, it means the VM-EXIT is caused by shadow
5089          * page protected, we can zap the shadow page and retry this
5090          * instruction directly.
5091          *
5092          * Note: if the guest uses a non-page-table modifying instruction
5093          * on the PDE that points to the instruction, then we will unmap
5094          * the instruction and go to an infinite loop. So, we cache the
5095          * last retried eip and the last fault address, if we meet the eip
5096          * and the address again, we can break out of the potential infinite
5097          * loop.
5098          */
5099         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5100
5101         if (!(emulation_type & EMULTYPE_RETRY))
5102                 return false;
5103
5104         if (x86_page_table_writing_insn(ctxt))
5105                 return false;
5106
5107         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5108                 return false;
5109
5110         vcpu->arch.last_retry_eip = ctxt->eip;
5111         vcpu->arch.last_retry_addr = cr2;
5112
5113         if (!vcpu->arch.mmu.direct_map)
5114                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5115
5116         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5117
5118         return true;
5119 }
5120
5121 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5122 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5123
5124 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5125                                 unsigned long *db)
5126 {
5127         u32 dr6 = 0;
5128         int i;
5129         u32 enable, rwlen;
5130
5131         enable = dr7;
5132         rwlen = dr7 >> 16;
5133         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5134                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5135                         dr6 |= (1 << i);
5136         return dr6;
5137 }
5138
5139 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5140 {
5141         struct kvm_run *kvm_run = vcpu->run;
5142
5143         /*
5144          * rflags is the old, "raw" value of the flags.  The new value has
5145          * not been saved yet.
5146          *
5147          * This is correct even for TF set by the guest, because "the
5148          * processor will not generate this exception after the instruction
5149          * that sets the TF flag".
5150          */
5151         if (unlikely(rflags & X86_EFLAGS_TF)) {
5152                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5153                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5154                                                   DR6_RTM;
5155                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5156                         kvm_run->debug.arch.exception = DB_VECTOR;
5157                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5158                         *r = EMULATE_USER_EXIT;
5159                 } else {
5160                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5161                         /*
5162                          * "Certain debug exceptions may clear bit 0-3.  The
5163                          * remaining contents of the DR6 register are never
5164                          * cleared by the processor".
5165                          */
5166                         vcpu->arch.dr6 &= ~15;
5167                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5168                         kvm_queue_exception(vcpu, DB_VECTOR);
5169                 }
5170         }
5171 }
5172
5173 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5174 {
5175         struct kvm_run *kvm_run = vcpu->run;
5176         unsigned long eip = vcpu->arch.emulate_ctxt.eip;
5177         u32 dr6 = 0;
5178
5179         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5180             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5181                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5182                                            vcpu->arch.guest_debug_dr7,
5183                                            vcpu->arch.eff_db);
5184
5185                 if (dr6 != 0) {
5186                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5187                         kvm_run->debug.arch.pc = kvm_rip_read(vcpu) +
5188                                 get_segment_base(vcpu, VCPU_SREG_CS);
5189
5190                         kvm_run->debug.arch.exception = DB_VECTOR;
5191                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5192                         *r = EMULATE_USER_EXIT;
5193                         return true;
5194                 }
5195         }
5196
5197         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5198             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5199                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5200                                            vcpu->arch.dr7,
5201                                            vcpu->arch.db);
5202
5203                 if (dr6 != 0) {
5204                         vcpu->arch.dr6 &= ~15;
5205                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5206                         kvm_queue_exception(vcpu, DB_VECTOR);
5207                         *r = EMULATE_DONE;
5208                         return true;
5209                 }
5210         }
5211
5212         return false;
5213 }
5214
5215 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5216                             unsigned long cr2,
5217                             int emulation_type,
5218                             void *insn,
5219                             int insn_len)
5220 {
5221         int r;
5222         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5223         bool writeback = true;
5224         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5225
5226         /*
5227          * Clear write_fault_to_shadow_pgtable here to ensure it is
5228          * never reused.
5229          */
5230         vcpu->arch.write_fault_to_shadow_pgtable = false;
5231         kvm_clear_exception_queue(vcpu);
5232
5233         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5234                 init_emulate_ctxt(vcpu);
5235
5236                 /*
5237                  * We will reenter on the same instruction since
5238                  * we do not set complete_userspace_io.  This does not
5239                  * handle watchpoints yet, those would be handled in
5240                  * the emulate_ops.
5241                  */
5242                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5243                         return r;
5244
5245                 ctxt->interruptibility = 0;
5246                 ctxt->have_exception = false;
5247                 ctxt->perm_ok = false;
5248
5249                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5250
5251                 r = x86_decode_insn(ctxt, insn, insn_len);
5252
5253                 trace_kvm_emulate_insn_start(vcpu);
5254                 ++vcpu->stat.insn_emulation;
5255                 if (r != EMULATION_OK)  {
5256                         if (emulation_type & EMULTYPE_TRAP_UD)
5257                                 return EMULATE_FAIL;
5258                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5259                                                 emulation_type))
5260                                 return EMULATE_DONE;
5261                         if (emulation_type & EMULTYPE_SKIP)
5262                                 return EMULATE_FAIL;
5263                         return handle_emulation_failure(vcpu);
5264                 }
5265         }
5266
5267         if (emulation_type & EMULTYPE_SKIP) {
5268                 kvm_rip_write(vcpu, ctxt->_eip);
5269                 if (ctxt->eflags & X86_EFLAGS_RF)
5270                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5271                 return EMULATE_DONE;
5272         }
5273
5274         if (retry_instruction(ctxt, cr2, emulation_type))
5275                 return EMULATE_DONE;
5276
5277         /* this is needed for vmware backdoor interface to work since it
5278            changes registers values  during IO operation */
5279         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5280                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5281                 emulator_invalidate_register_cache(ctxt);
5282         }
5283
5284 restart:
5285         r = x86_emulate_insn(ctxt);
5286
5287         if (r == EMULATION_INTERCEPTED)
5288                 return EMULATE_DONE;
5289
5290         if (r == EMULATION_FAILED) {
5291                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5292                                         emulation_type))
5293                         return EMULATE_DONE;
5294
5295                 return handle_emulation_failure(vcpu);
5296         }
5297
5298         if (ctxt->have_exception) {
5299                 inject_emulated_exception(vcpu);
5300                 r = EMULATE_DONE;
5301         } else if (vcpu->arch.pio.count) {
5302                 if (!vcpu->arch.pio.in) {
5303                         /* FIXME: return into emulator if single-stepping.  */
5304                         vcpu->arch.pio.count = 0;
5305                 } else {
5306                         writeback = false;
5307                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5308                 }
5309                 r = EMULATE_USER_EXIT;
5310         } else if (vcpu->mmio_needed) {
5311                 if (!vcpu->mmio_is_write)
5312                         writeback = false;
5313                 r = EMULATE_USER_EXIT;
5314                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5315         } else if (r == EMULATION_RESTART)
5316                 goto restart;
5317         else
5318                 r = EMULATE_DONE;
5319
5320         if (writeback) {
5321                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5322                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5323                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5324                 kvm_rip_write(vcpu, ctxt->eip);
5325                 if (r == EMULATE_DONE)
5326                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5327                 __kvm_set_rflags(vcpu, ctxt->eflags);
5328
5329                 /*
5330                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5331                  * do nothing, and it will be requested again as soon as
5332                  * the shadow expires.  But we still need to check here,
5333                  * because POPF has no interrupt shadow.
5334                  */
5335                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5336                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5337         } else
5338                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5339
5340         return r;
5341 }
5342 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5343
5344 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5345 {
5346         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5347         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5348                                             size, port, &val, 1);
5349         /* do not return to emulator after return from userspace */
5350         vcpu->arch.pio.count = 0;
5351         return ret;
5352 }
5353 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5354
5355 static void tsc_bad(void *info)
5356 {
5357         __this_cpu_write(cpu_tsc_khz, 0);
5358 }
5359
5360 static void tsc_khz_changed(void *data)
5361 {
5362         struct cpufreq_freqs *freq = data;
5363         unsigned long khz = 0;
5364
5365         if (data)
5366                 khz = freq->new;
5367         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5368                 khz = cpufreq_quick_get(raw_smp_processor_id());
5369         if (!khz)
5370                 khz = tsc_khz;
5371         __this_cpu_write(cpu_tsc_khz, khz);
5372 }
5373
5374 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5375                                      void *data)
5376 {
5377         struct cpufreq_freqs *freq = data;
5378         struct kvm *kvm;
5379         struct kvm_vcpu *vcpu;
5380         int i, send_ipi = 0;
5381
5382         /*
5383          * We allow guests to temporarily run on slowing clocks,
5384          * provided we notify them after, or to run on accelerating
5385          * clocks, provided we notify them before.  Thus time never
5386          * goes backwards.
5387          *
5388          * However, we have a problem.  We can't atomically update
5389          * the frequency of a given CPU from this function; it is
5390          * merely a notifier, which can be called from any CPU.
5391          * Changing the TSC frequency at arbitrary points in time
5392          * requires a recomputation of local variables related to
5393          * the TSC for each VCPU.  We must flag these local variables
5394          * to be updated and be sure the update takes place with the
5395          * new frequency before any guests proceed.
5396          *
5397          * Unfortunately, the combination of hotplug CPU and frequency
5398          * change creates an intractable locking scenario; the order
5399          * of when these callouts happen is undefined with respect to
5400          * CPU hotplug, and they can race with each other.  As such,
5401          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5402          * undefined; you can actually have a CPU frequency change take
5403          * place in between the computation of X and the setting of the
5404          * variable.  To protect against this problem, all updates of
5405          * the per_cpu tsc_khz variable are done in an interrupt
5406          * protected IPI, and all callers wishing to update the value
5407          * must wait for a synchronous IPI to complete (which is trivial
5408          * if the caller is on the CPU already).  This establishes the
5409          * necessary total order on variable updates.
5410          *
5411          * Note that because a guest time update may take place
5412          * anytime after the setting of the VCPU's request bit, the
5413          * correct TSC value must be set before the request.  However,
5414          * to ensure the update actually makes it to any guest which
5415          * starts running in hardware virtualization between the set
5416          * and the acquisition of the spinlock, we must also ping the
5417          * CPU after setting the request bit.
5418          *
5419          */
5420
5421         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5422                 return 0;
5423         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5424                 return 0;
5425
5426         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5427
5428         spin_lock(&kvm_lock);
5429         list_for_each_entry(kvm, &vm_list, vm_list) {
5430                 kvm_for_each_vcpu(i, vcpu, kvm) {
5431                         if (vcpu->cpu != freq->cpu)
5432                                 continue;
5433                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5434                         if (vcpu->cpu != smp_processor_id())
5435                                 send_ipi = 1;
5436                 }
5437         }
5438         spin_unlock(&kvm_lock);
5439
5440         if (freq->old < freq->new && send_ipi) {
5441                 /*
5442                  * We upscale the frequency.  Must make the guest
5443                  * doesn't see old kvmclock values while running with
5444                  * the new frequency, otherwise we risk the guest sees
5445                  * time go backwards.
5446                  *
5447                  * In case we update the frequency for another cpu
5448                  * (which might be in guest context) send an interrupt
5449                  * to kick the cpu out of guest context.  Next time
5450                  * guest context is entered kvmclock will be updated,
5451                  * so the guest will not see stale values.
5452                  */
5453                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5454         }
5455         return 0;
5456 }
5457
5458 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5459         .notifier_call  = kvmclock_cpufreq_notifier
5460 };
5461
5462 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5463                                         unsigned long action, void *hcpu)
5464 {
5465         unsigned int cpu = (unsigned long)hcpu;
5466
5467         switch (action) {
5468                 case CPU_ONLINE:
5469                 case CPU_DOWN_FAILED:
5470                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5471                         break;
5472                 case CPU_DOWN_PREPARE:
5473                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5474                         break;
5475         }
5476         return NOTIFY_OK;
5477 }
5478
5479 static struct notifier_block kvmclock_cpu_notifier_block = {
5480         .notifier_call  = kvmclock_cpu_notifier,
5481         .priority = -INT_MAX
5482 };
5483
5484 static void kvm_timer_init(void)
5485 {
5486         int cpu;
5487
5488         max_tsc_khz = tsc_khz;
5489
5490         cpu_notifier_register_begin();
5491         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5492 #ifdef CONFIG_CPU_FREQ
5493                 struct cpufreq_policy policy;
5494                 memset(&policy, 0, sizeof(policy));
5495                 cpu = get_cpu();
5496                 cpufreq_get_policy(&policy, cpu);
5497                 if (policy.cpuinfo.max_freq)
5498                         max_tsc_khz = policy.cpuinfo.max_freq;
5499                 put_cpu();
5500 #endif
5501                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5502                                           CPUFREQ_TRANSITION_NOTIFIER);
5503         }
5504         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5505         for_each_online_cpu(cpu)
5506                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5507
5508         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5509         cpu_notifier_register_done();
5510
5511 }
5512
5513 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5514
5515 int kvm_is_in_guest(void)
5516 {
5517         return __this_cpu_read(current_vcpu) != NULL;
5518 }
5519
5520 static int kvm_is_user_mode(void)
5521 {
5522         int user_mode = 3;
5523
5524         if (__this_cpu_read(current_vcpu))
5525                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5526
5527         return user_mode != 0;
5528 }
5529
5530 static unsigned long kvm_get_guest_ip(void)
5531 {
5532         unsigned long ip = 0;
5533
5534         if (__this_cpu_read(current_vcpu))
5535                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5536
5537         return ip;
5538 }
5539
5540 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5541         .is_in_guest            = kvm_is_in_guest,
5542         .is_user_mode           = kvm_is_user_mode,
5543         .get_guest_ip           = kvm_get_guest_ip,
5544 };
5545
5546 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5547 {
5548         __this_cpu_write(current_vcpu, vcpu);
5549 }
5550 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5551
5552 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5553 {
5554         __this_cpu_write(current_vcpu, NULL);
5555 }
5556 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5557
5558 static void kvm_set_mmio_spte_mask(void)
5559 {
5560         u64 mask;
5561         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5562
5563         /*
5564          * Set the reserved bits and the present bit of an paging-structure
5565          * entry to generate page fault with PFER.RSV = 1.
5566          */
5567          /* Mask the reserved physical address bits. */
5568         mask = ((1ull << (51 - maxphyaddr + 1)) - 1) << maxphyaddr;
5569
5570         /* Bit 62 is always reserved for 32bit host. */
5571         mask |= 0x3ull << 62;
5572
5573         /* Set the present bit. */
5574         mask |= 1ull;
5575
5576 #ifdef CONFIG_X86_64
5577         /*
5578          * If reserved bit is not supported, clear the present bit to disable
5579          * mmio page fault.
5580          */
5581         if (maxphyaddr == 52)
5582                 mask &= ~1ull;
5583 #endif
5584
5585         kvm_mmu_set_mmio_spte_mask(mask);
5586 }
5587
5588 #ifdef CONFIG_X86_64
5589 static void pvclock_gtod_update_fn(struct work_struct *work)
5590 {
5591         struct kvm *kvm;
5592
5593         struct kvm_vcpu *vcpu;
5594         int i;
5595
5596         spin_lock(&kvm_lock);
5597         list_for_each_entry(kvm, &vm_list, vm_list)
5598                 kvm_for_each_vcpu(i, vcpu, kvm)
5599                         set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5600         atomic_set(&kvm_guest_has_master_clock, 0);
5601         spin_unlock(&kvm_lock);
5602 }
5603
5604 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5605
5606 /*
5607  * Notification about pvclock gtod data update.
5608  */
5609 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5610                                void *priv)
5611 {
5612         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5613         struct timekeeper *tk = priv;
5614
5615         update_pvclock_gtod(tk);
5616
5617         /* disable master clock if host does not trust, or does not
5618          * use, TSC clocksource
5619          */
5620         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5621             atomic_read(&kvm_guest_has_master_clock) != 0)
5622                 queue_work(system_long_wq, &pvclock_gtod_work);
5623
5624         return 0;
5625 }
5626
5627 static struct notifier_block pvclock_gtod_notifier = {
5628         .notifier_call = pvclock_gtod_notify,
5629 };
5630 #endif
5631
5632 int kvm_arch_init(void *opaque)
5633 {
5634         int r;
5635         struct kvm_x86_ops *ops = opaque;
5636
5637         if (kvm_x86_ops) {
5638                 printk(KERN_ERR "kvm: already loaded the other module\n");
5639                 r = -EEXIST;
5640                 goto out;
5641         }
5642
5643         if (!ops->cpu_has_kvm_support()) {
5644                 printk(KERN_ERR "kvm: no hardware support\n");
5645                 r = -EOPNOTSUPP;
5646                 goto out;
5647         }
5648         if (ops->disabled_by_bios()) {
5649                 printk(KERN_ERR "kvm: disabled by bios\n");
5650                 r = -EOPNOTSUPP;
5651                 goto out;
5652         }
5653
5654         r = -ENOMEM;
5655         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5656         if (!shared_msrs) {
5657                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5658                 goto out;
5659         }
5660
5661         r = kvm_mmu_module_init();
5662         if (r)
5663                 goto out_free_percpu;
5664
5665         kvm_set_mmio_spte_mask();
5666
5667         kvm_x86_ops = ops;
5668         kvm_init_msr_list();
5669
5670         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5671                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5672
5673         kvm_timer_init();
5674
5675         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5676
5677         if (cpu_has_xsave)
5678                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5679
5680         kvm_lapic_init();
5681 #ifdef CONFIG_X86_64
5682         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5683 #endif
5684
5685         return 0;
5686
5687 out_free_percpu:
5688         free_percpu(shared_msrs);
5689 out:
5690         return r;
5691 }
5692
5693 void kvm_arch_exit(void)
5694 {
5695         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5696
5697         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5698                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5699                                             CPUFREQ_TRANSITION_NOTIFIER);
5700         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5701 #ifdef CONFIG_X86_64
5702         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5703 #endif
5704         kvm_x86_ops = NULL;
5705         kvm_mmu_module_exit();
5706         free_percpu(shared_msrs);
5707 }
5708
5709 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5710 {
5711         ++vcpu->stat.halt_exits;
5712         if (irqchip_in_kernel(vcpu->kvm)) {
5713                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5714                 return 1;
5715         } else {
5716                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5717                 return 0;
5718         }
5719 }
5720 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5721
5722 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5723 {
5724         u64 param, ingpa, outgpa, ret;
5725         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5726         bool fast, longmode;
5727
5728         /*
5729          * hypercall generates UD from non zero cpl and real mode
5730          * per HYPER-V spec
5731          */
5732         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5733                 kvm_queue_exception(vcpu, UD_VECTOR);
5734                 return 0;
5735         }
5736
5737         longmode = is_64_bit_mode(vcpu);
5738
5739         if (!longmode) {
5740                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5741                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5742                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5743                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5744                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5745                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5746         }
5747 #ifdef CONFIG_X86_64
5748         else {
5749                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5750                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5751                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5752         }
5753 #endif
5754
5755         code = param & 0xffff;
5756         fast = (param >> 16) & 0x1;
5757         rep_cnt = (param >> 32) & 0xfff;
5758         rep_idx = (param >> 48) & 0xfff;
5759
5760         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5761
5762         switch (code) {
5763         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5764                 kvm_vcpu_on_spin(vcpu);
5765                 break;
5766         default:
5767                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5768                 break;
5769         }
5770
5771         ret = res | (((u64)rep_done & 0xfff) << 32);
5772         if (longmode) {
5773                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5774         } else {
5775                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5776                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5777         }
5778
5779         return 1;
5780 }
5781
5782 /*
5783  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5784  *
5785  * @apicid - apicid of vcpu to be kicked.
5786  */
5787 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5788 {
5789         struct kvm_lapic_irq lapic_irq;
5790
5791         lapic_irq.shorthand = 0;
5792         lapic_irq.dest_mode = 0;
5793         lapic_irq.dest_id = apicid;
5794
5795         lapic_irq.delivery_mode = APIC_DM_REMRD;
5796         kvm_irq_delivery_to_apic(kvm, 0, &lapic_irq, NULL);
5797 }
5798
5799 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5800 {
5801         unsigned long nr, a0, a1, a2, a3, ret;
5802         int op_64_bit, r = 1;
5803
5804         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5805                 return kvm_hv_hypercall(vcpu);
5806
5807         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5808         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5809         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5810         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5811         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5812
5813         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5814
5815         op_64_bit = is_64_bit_mode(vcpu);
5816         if (!op_64_bit) {
5817                 nr &= 0xFFFFFFFF;
5818                 a0 &= 0xFFFFFFFF;
5819                 a1 &= 0xFFFFFFFF;
5820                 a2 &= 0xFFFFFFFF;
5821                 a3 &= 0xFFFFFFFF;
5822         }
5823
5824         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5825                 ret = -KVM_EPERM;
5826                 goto out;
5827         }
5828
5829         switch (nr) {
5830         case KVM_HC_VAPIC_POLL_IRQ:
5831                 ret = 0;
5832                 break;
5833         case KVM_HC_KICK_CPU:
5834                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5835                 ret = 0;
5836                 break;
5837         default:
5838                 ret = -KVM_ENOSYS;
5839                 break;
5840         }
5841 out:
5842         if (!op_64_bit)
5843                 ret = (u32)ret;
5844         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5845         ++vcpu->stat.hypercalls;
5846         return r;
5847 }
5848 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5849
5850 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5851 {
5852         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5853         char instruction[3];
5854         unsigned long rip = kvm_rip_read(vcpu);
5855
5856         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5857
5858         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5859 }
5860
5861 /*
5862  * Check if userspace requested an interrupt window, and that the
5863  * interrupt window is open.
5864  *
5865  * No need to exit to userspace if we already have an interrupt queued.
5866  */
5867 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5868 {
5869         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5870                 vcpu->run->request_interrupt_window &&
5871                 kvm_arch_interrupt_allowed(vcpu));
5872 }
5873
5874 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5875 {
5876         struct kvm_run *kvm_run = vcpu->run;
5877
5878         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5879         kvm_run->cr8 = kvm_get_cr8(vcpu);
5880         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5881         if (irqchip_in_kernel(vcpu->kvm))
5882                 kvm_run->ready_for_interrupt_injection = 1;
5883         else
5884                 kvm_run->ready_for_interrupt_injection =
5885                         kvm_arch_interrupt_allowed(vcpu) &&
5886                         !kvm_cpu_has_interrupt(vcpu) &&
5887                         !kvm_event_needs_reinjection(vcpu);
5888 }
5889
5890 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5891 {
5892         int max_irr, tpr;
5893
5894         if (!kvm_x86_ops->update_cr8_intercept)
5895                 return;
5896
5897         if (!vcpu->arch.apic)
5898                 return;
5899
5900         if (!vcpu->arch.apic->vapic_addr)
5901                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5902         else
5903                 max_irr = -1;
5904
5905         if (max_irr != -1)
5906                 max_irr >>= 4;
5907
5908         tpr = kvm_lapic_get_cr8(vcpu);
5909
5910         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5911 }
5912
5913 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5914 {
5915         int r;
5916
5917         /* try to reinject previous events if any */
5918         if (vcpu->arch.exception.pending) {
5919                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5920                                         vcpu->arch.exception.has_error_code,
5921                                         vcpu->arch.exception.error_code);
5922
5923                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
5924                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
5925                                              X86_EFLAGS_RF);
5926
5927                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5928                                           vcpu->arch.exception.has_error_code,
5929                                           vcpu->arch.exception.error_code,
5930                                           vcpu->arch.exception.reinject);
5931                 return 0;
5932         }
5933
5934         if (vcpu->arch.nmi_injected) {
5935                 kvm_x86_ops->set_nmi(vcpu);
5936                 return 0;
5937         }
5938
5939         if (vcpu->arch.interrupt.pending) {
5940                 kvm_x86_ops->set_irq(vcpu);
5941                 return 0;
5942         }
5943
5944         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5945                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5946                 if (r != 0)
5947                         return r;
5948         }
5949
5950         /* try to inject new event if pending */
5951         if (vcpu->arch.nmi_pending) {
5952                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5953                         --vcpu->arch.nmi_pending;
5954                         vcpu->arch.nmi_injected = true;
5955                         kvm_x86_ops->set_nmi(vcpu);
5956                 }
5957         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5958                 /*
5959                  * Because interrupts can be injected asynchronously, we are
5960                  * calling check_nested_events again here to avoid a race condition.
5961                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
5962                  * proposal and current concerns.  Perhaps we should be setting
5963                  * KVM_REQ_EVENT only on certain events and not unconditionally?
5964                  */
5965                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5966                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5967                         if (r != 0)
5968                                 return r;
5969                 }
5970                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5971                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5972                                             false);
5973                         kvm_x86_ops->set_irq(vcpu);
5974                 }
5975         }
5976         return 0;
5977 }
5978
5979 static void process_nmi(struct kvm_vcpu *vcpu)
5980 {
5981         unsigned limit = 2;
5982
5983         /*
5984          * x86 is limited to one NMI running, and one NMI pending after it.
5985          * If an NMI is already in progress, limit further NMIs to just one.
5986          * Otherwise, allow two (and we'll inject the first one immediately).
5987          */
5988         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5989                 limit = 1;
5990
5991         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5992         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5993         kvm_make_request(KVM_REQ_EVENT, vcpu);
5994 }
5995
5996 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
5997 {
5998         u64 eoi_exit_bitmap[4];
5999         u32 tmr[8];
6000
6001         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6002                 return;
6003
6004         memset(eoi_exit_bitmap, 0, 32);
6005         memset(tmr, 0, 32);
6006
6007         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
6008         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6009         kvm_apic_update_tmr(vcpu, tmr);
6010 }
6011
6012 /*
6013  * Returns 1 to let __vcpu_run() continue the guest execution loop without
6014  * exiting to the userspace.  Otherwise, the value will be returned to the
6015  * userspace.
6016  */
6017 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6018 {
6019         int r;
6020         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
6021                 vcpu->run->request_interrupt_window;
6022         bool req_immediate_exit = false;
6023
6024         if (vcpu->requests) {
6025                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6026                         kvm_mmu_unload(vcpu);
6027                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6028                         __kvm_migrate_timers(vcpu);
6029                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6030                         kvm_gen_update_masterclock(vcpu->kvm);
6031                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6032                         kvm_gen_kvmclock_update(vcpu);
6033                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6034                         r = kvm_guest_time_update(vcpu);
6035                         if (unlikely(r))
6036                                 goto out;
6037                 }
6038                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6039                         kvm_mmu_sync_roots(vcpu);
6040                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6041                         kvm_x86_ops->tlb_flush(vcpu);
6042                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6043                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6044                         r = 0;
6045                         goto out;
6046                 }
6047                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6048                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6049                         r = 0;
6050                         goto out;
6051                 }
6052                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6053                         vcpu->fpu_active = 0;
6054                         kvm_x86_ops->fpu_deactivate(vcpu);
6055                 }
6056                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6057                         /* Page is swapped out. Do synthetic halt */
6058                         vcpu->arch.apf.halted = true;
6059                         r = 1;
6060                         goto out;
6061                 }
6062                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6063                         record_steal_time(vcpu);
6064                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6065                         process_nmi(vcpu);
6066                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6067                         kvm_handle_pmu_event(vcpu);
6068                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6069                         kvm_deliver_pmi(vcpu);
6070                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6071                         vcpu_scan_ioapic(vcpu);
6072         }
6073
6074         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6075                 kvm_apic_accept_events(vcpu);
6076                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6077                         r = 1;
6078                         goto out;
6079                 }
6080
6081                 if (inject_pending_event(vcpu, req_int_win) != 0)
6082                         req_immediate_exit = true;
6083                 /* enable NMI/IRQ window open exits if needed */
6084                 else if (vcpu->arch.nmi_pending)
6085                         kvm_x86_ops->enable_nmi_window(vcpu);
6086                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6087                         kvm_x86_ops->enable_irq_window(vcpu);
6088
6089                 if (kvm_lapic_enabled(vcpu)) {
6090                         /*
6091                          * Update architecture specific hints for APIC
6092                          * virtual interrupt delivery.
6093                          */
6094                         if (kvm_x86_ops->hwapic_irr_update)
6095                                 kvm_x86_ops->hwapic_irr_update(vcpu,
6096                                         kvm_lapic_find_highest_irr(vcpu));
6097                         update_cr8_intercept(vcpu);
6098                         kvm_lapic_sync_to_vapic(vcpu);
6099                 }
6100         }
6101
6102         r = kvm_mmu_reload(vcpu);
6103         if (unlikely(r)) {
6104                 goto cancel_injection;
6105         }
6106
6107         preempt_disable();
6108
6109         kvm_x86_ops->prepare_guest_switch(vcpu);
6110         if (vcpu->fpu_active)
6111                 kvm_load_guest_fpu(vcpu);
6112         kvm_load_guest_xcr0(vcpu);
6113
6114         vcpu->mode = IN_GUEST_MODE;
6115
6116         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6117
6118         /* We should set ->mode before check ->requests,
6119          * see the comment in make_all_cpus_request.
6120          */
6121         smp_mb__after_srcu_read_unlock();
6122
6123         local_irq_disable();
6124
6125         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6126             || need_resched() || signal_pending(current)) {
6127                 vcpu->mode = OUTSIDE_GUEST_MODE;
6128                 smp_wmb();
6129                 local_irq_enable();
6130                 preempt_enable();
6131                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6132                 r = 1;
6133                 goto cancel_injection;
6134         }
6135
6136         if (req_immediate_exit)
6137                 smp_send_reschedule(vcpu->cpu);
6138
6139         kvm_guest_enter();
6140
6141         if (unlikely(vcpu->arch.switch_db_regs)) {
6142                 set_debugreg(0, 7);
6143                 set_debugreg(vcpu->arch.eff_db[0], 0);
6144                 set_debugreg(vcpu->arch.eff_db[1], 1);
6145                 set_debugreg(vcpu->arch.eff_db[2], 2);
6146                 set_debugreg(vcpu->arch.eff_db[3], 3);
6147                 set_debugreg(vcpu->arch.dr6, 6);
6148         }
6149
6150         trace_kvm_entry(vcpu->vcpu_id);
6151         kvm_x86_ops->run(vcpu);
6152
6153         /*
6154          * Do this here before restoring debug registers on the host.  And
6155          * since we do this before handling the vmexit, a DR access vmexit
6156          * can (a) read the correct value of the debug registers, (b) set
6157          * KVM_DEBUGREG_WONT_EXIT again.
6158          */
6159         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6160                 int i;
6161
6162                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6163                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6164                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6165                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6166         }
6167
6168         /*
6169          * If the guest has used debug registers, at least dr7
6170          * will be disabled while returning to the host.
6171          * If we don't have active breakpoints in the host, we don't
6172          * care about the messed up debug address registers. But if
6173          * we have some of them active, restore the old state.
6174          */
6175         if (hw_breakpoint_active())
6176                 hw_breakpoint_restore();
6177
6178         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6179                                                            native_read_tsc());
6180
6181         vcpu->mode = OUTSIDE_GUEST_MODE;
6182         smp_wmb();
6183
6184         /* Interrupt is enabled by handle_external_intr() */
6185         kvm_x86_ops->handle_external_intr(vcpu);
6186
6187         ++vcpu->stat.exits;
6188
6189         /*
6190          * We must have an instruction between local_irq_enable() and
6191          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6192          * the interrupt shadow.  The stat.exits increment will do nicely.
6193          * But we need to prevent reordering, hence this barrier():
6194          */
6195         barrier();
6196
6197         kvm_guest_exit();
6198
6199         preempt_enable();
6200
6201         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6202
6203         /*
6204          * Profile KVM exit RIPs:
6205          */
6206         if (unlikely(prof_on == KVM_PROFILING)) {
6207                 unsigned long rip = kvm_rip_read(vcpu);
6208                 profile_hit(KVM_PROFILING, (void *)rip);
6209         }
6210
6211         if (unlikely(vcpu->arch.tsc_always_catchup))
6212                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6213
6214         if (vcpu->arch.apic_attention)
6215                 kvm_lapic_sync_from_vapic(vcpu);
6216
6217         r = kvm_x86_ops->handle_exit(vcpu);
6218         return r;
6219
6220 cancel_injection:
6221         kvm_x86_ops->cancel_injection(vcpu);
6222         if (unlikely(vcpu->arch.apic_attention))
6223                 kvm_lapic_sync_from_vapic(vcpu);
6224 out:
6225         return r;
6226 }
6227
6228
6229 static int __vcpu_run(struct kvm_vcpu *vcpu)
6230 {
6231         int r;
6232         struct kvm *kvm = vcpu->kvm;
6233
6234         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6235
6236         r = 1;
6237         while (r > 0) {
6238                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6239                     !vcpu->arch.apf.halted)
6240                         r = vcpu_enter_guest(vcpu);
6241                 else {
6242                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6243                         kvm_vcpu_block(vcpu);
6244                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6245                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
6246                                 kvm_apic_accept_events(vcpu);
6247                                 switch(vcpu->arch.mp_state) {
6248                                 case KVM_MP_STATE_HALTED:
6249                                         vcpu->arch.pv.pv_unhalted = false;
6250                                         vcpu->arch.mp_state =
6251                                                 KVM_MP_STATE_RUNNABLE;
6252                                 case KVM_MP_STATE_RUNNABLE:
6253                                         vcpu->arch.apf.halted = false;
6254                                         break;
6255                                 case KVM_MP_STATE_INIT_RECEIVED:
6256                                         break;
6257                                 default:
6258                                         r = -EINTR;
6259                                         break;
6260                                 }
6261                         }
6262                 }
6263
6264                 if (r <= 0)
6265                         break;
6266
6267                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6268                 if (kvm_cpu_has_pending_timer(vcpu))
6269                         kvm_inject_pending_timer_irqs(vcpu);
6270
6271                 if (dm_request_for_irq_injection(vcpu)) {
6272                         r = -EINTR;
6273                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6274                         ++vcpu->stat.request_irq_exits;
6275                 }
6276
6277                 kvm_check_async_pf_completion(vcpu);
6278
6279                 if (signal_pending(current)) {
6280                         r = -EINTR;
6281                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6282                         ++vcpu->stat.signal_exits;
6283                 }
6284                 if (need_resched()) {
6285                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6286                         cond_resched();
6287                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6288                 }
6289         }
6290
6291         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6292
6293         return r;
6294 }
6295
6296 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6297 {
6298         int r;
6299         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6300         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6301         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6302         if (r != EMULATE_DONE)
6303                 return 0;
6304         return 1;
6305 }
6306
6307 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6308 {
6309         BUG_ON(!vcpu->arch.pio.count);
6310
6311         return complete_emulated_io(vcpu);
6312 }
6313
6314 /*
6315  * Implements the following, as a state machine:
6316  *
6317  * read:
6318  *   for each fragment
6319  *     for each mmio piece in the fragment
6320  *       write gpa, len
6321  *       exit
6322  *       copy data
6323  *   execute insn
6324  *
6325  * write:
6326  *   for each fragment
6327  *     for each mmio piece in the fragment
6328  *       write gpa, len
6329  *       copy data
6330  *       exit
6331  */
6332 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6333 {
6334         struct kvm_run *run = vcpu->run;
6335         struct kvm_mmio_fragment *frag;
6336         unsigned len;
6337
6338         BUG_ON(!vcpu->mmio_needed);
6339
6340         /* Complete previous fragment */
6341         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6342         len = min(8u, frag->len);
6343         if (!vcpu->mmio_is_write)
6344                 memcpy(frag->data, run->mmio.data, len);
6345
6346         if (frag->len <= 8) {
6347                 /* Switch to the next fragment. */
6348                 frag++;
6349                 vcpu->mmio_cur_fragment++;
6350         } else {
6351                 /* Go forward to the next mmio piece. */
6352                 frag->data += len;
6353                 frag->gpa += len;
6354                 frag->len -= len;
6355         }
6356
6357         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6358                 vcpu->mmio_needed = 0;
6359
6360                 /* FIXME: return into emulator if single-stepping.  */
6361                 if (vcpu->mmio_is_write)
6362                         return 1;
6363                 vcpu->mmio_read_completed = 1;
6364                 return complete_emulated_io(vcpu);
6365         }
6366
6367         run->exit_reason = KVM_EXIT_MMIO;
6368         run->mmio.phys_addr = frag->gpa;
6369         if (vcpu->mmio_is_write)
6370                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6371         run->mmio.len = min(8u, frag->len);
6372         run->mmio.is_write = vcpu->mmio_is_write;
6373         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6374         return 0;
6375 }
6376
6377
6378 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6379 {
6380         int r;
6381         sigset_t sigsaved;
6382
6383         if (!tsk_used_math(current) && init_fpu(current))
6384                 return -ENOMEM;
6385
6386         if (vcpu->sigset_active)
6387                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6388
6389         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6390                 kvm_vcpu_block(vcpu);
6391                 kvm_apic_accept_events(vcpu);
6392                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6393                 r = -EAGAIN;
6394                 goto out;
6395         }
6396
6397         /* re-sync apic's tpr */
6398         if (!irqchip_in_kernel(vcpu->kvm)) {
6399                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6400                         r = -EINVAL;
6401                         goto out;
6402                 }
6403         }
6404
6405         if (unlikely(vcpu->arch.complete_userspace_io)) {
6406                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6407                 vcpu->arch.complete_userspace_io = NULL;
6408                 r = cui(vcpu);
6409                 if (r <= 0)
6410                         goto out;
6411         } else
6412                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6413
6414         r = __vcpu_run(vcpu);
6415
6416 out:
6417         post_kvm_run_save(vcpu);
6418         if (vcpu->sigset_active)
6419                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6420
6421         return r;
6422 }
6423
6424 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6425 {
6426         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6427                 /*
6428                  * We are here if userspace calls get_regs() in the middle of
6429                  * instruction emulation. Registers state needs to be copied
6430                  * back from emulation context to vcpu. Userspace shouldn't do
6431                  * that usually, but some bad designed PV devices (vmware
6432                  * backdoor interface) need this to work
6433                  */
6434                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6435                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6436         }
6437         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6438         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6439         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6440         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6441         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6442         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6443         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6444         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6445 #ifdef CONFIG_X86_64
6446         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6447         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6448         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6449         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6450         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6451         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6452         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6453         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6454 #endif
6455
6456         regs->rip = kvm_rip_read(vcpu);
6457         regs->rflags = kvm_get_rflags(vcpu);
6458
6459         return 0;
6460 }
6461
6462 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6463 {
6464         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6465         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6466
6467         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6468         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6469         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6470         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6471         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6472         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6473         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6474         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6475 #ifdef CONFIG_X86_64
6476         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6477         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6478         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6479         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6480         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6481         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6482         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6483         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6484 #endif
6485
6486         kvm_rip_write(vcpu, regs->rip);
6487         kvm_set_rflags(vcpu, regs->rflags);
6488
6489         vcpu->arch.exception.pending = false;
6490
6491         kvm_make_request(KVM_REQ_EVENT, vcpu);
6492
6493         return 0;
6494 }
6495
6496 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6497 {
6498         struct kvm_segment cs;
6499
6500         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6501         *db = cs.db;
6502         *l = cs.l;
6503 }
6504 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6505
6506 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6507                                   struct kvm_sregs *sregs)
6508 {
6509         struct desc_ptr dt;
6510
6511         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6512         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6513         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6514         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6515         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6516         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6517
6518         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6519         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6520
6521         kvm_x86_ops->get_idt(vcpu, &dt);
6522         sregs->idt.limit = dt.size;
6523         sregs->idt.base = dt.address;
6524         kvm_x86_ops->get_gdt(vcpu, &dt);
6525         sregs->gdt.limit = dt.size;
6526         sregs->gdt.base = dt.address;
6527
6528         sregs->cr0 = kvm_read_cr0(vcpu);
6529         sregs->cr2 = vcpu->arch.cr2;
6530         sregs->cr3 = kvm_read_cr3(vcpu);
6531         sregs->cr4 = kvm_read_cr4(vcpu);
6532         sregs->cr8 = kvm_get_cr8(vcpu);
6533         sregs->efer = vcpu->arch.efer;
6534         sregs->apic_base = kvm_get_apic_base(vcpu);
6535
6536         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6537
6538         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6539                 set_bit(vcpu->arch.interrupt.nr,
6540                         (unsigned long *)sregs->interrupt_bitmap);
6541
6542         return 0;
6543 }
6544
6545 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6546                                     struct kvm_mp_state *mp_state)
6547 {
6548         kvm_apic_accept_events(vcpu);
6549         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6550                                         vcpu->arch.pv.pv_unhalted)
6551                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6552         else
6553                 mp_state->mp_state = vcpu->arch.mp_state;
6554
6555         return 0;
6556 }
6557
6558 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6559                                     struct kvm_mp_state *mp_state)
6560 {
6561         if (!kvm_vcpu_has_lapic(vcpu) &&
6562             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6563                 return -EINVAL;
6564
6565         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6566                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6567                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6568         } else
6569                 vcpu->arch.mp_state = mp_state->mp_state;
6570         kvm_make_request(KVM_REQ_EVENT, vcpu);
6571         return 0;
6572 }
6573
6574 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6575                     int reason, bool has_error_code, u32 error_code)
6576 {
6577         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6578         int ret;
6579
6580         init_emulate_ctxt(vcpu);
6581
6582         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6583                                    has_error_code, error_code);
6584
6585         if (ret)
6586                 return EMULATE_FAIL;
6587
6588         kvm_rip_write(vcpu, ctxt->eip);
6589         kvm_set_rflags(vcpu, ctxt->eflags);
6590         kvm_make_request(KVM_REQ_EVENT, vcpu);
6591         return EMULATE_DONE;
6592 }
6593 EXPORT_SYMBOL_GPL(kvm_task_switch);
6594
6595 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6596                                   struct kvm_sregs *sregs)
6597 {
6598         struct msr_data apic_base_msr;
6599         int mmu_reset_needed = 0;
6600         int pending_vec, max_bits, idx;
6601         struct desc_ptr dt;
6602
6603         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6604                 return -EINVAL;
6605
6606         dt.size = sregs->idt.limit;
6607         dt.address = sregs->idt.base;
6608         kvm_x86_ops->set_idt(vcpu, &dt);
6609         dt.size = sregs->gdt.limit;
6610         dt.address = sregs->gdt.base;
6611         kvm_x86_ops->set_gdt(vcpu, &dt);
6612
6613         vcpu->arch.cr2 = sregs->cr2;
6614         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6615         vcpu->arch.cr3 = sregs->cr3;
6616         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6617
6618         kvm_set_cr8(vcpu, sregs->cr8);
6619
6620         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6621         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6622         apic_base_msr.data = sregs->apic_base;
6623         apic_base_msr.host_initiated = true;
6624         kvm_set_apic_base(vcpu, &apic_base_msr);
6625
6626         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6627         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6628         vcpu->arch.cr0 = sregs->cr0;
6629
6630         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6631         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6632         if (sregs->cr4 & X86_CR4_OSXSAVE)
6633                 kvm_update_cpuid(vcpu);
6634
6635         idx = srcu_read_lock(&vcpu->kvm->srcu);
6636         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6637                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6638                 mmu_reset_needed = 1;
6639         }
6640         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6641
6642         if (mmu_reset_needed)
6643                 kvm_mmu_reset_context(vcpu);
6644
6645         max_bits = KVM_NR_INTERRUPTS;
6646         pending_vec = find_first_bit(
6647                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6648         if (pending_vec < max_bits) {
6649                 kvm_queue_interrupt(vcpu, pending_vec, false);
6650                 pr_debug("Set back pending irq %d\n", pending_vec);
6651         }
6652
6653         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6654         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6655         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6656         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6657         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6658         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6659
6660         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6661         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6662
6663         update_cr8_intercept(vcpu);
6664
6665         /* Older userspace won't unhalt the vcpu on reset. */
6666         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6667             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6668             !is_protmode(vcpu))
6669                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6670
6671         kvm_make_request(KVM_REQ_EVENT, vcpu);
6672
6673         return 0;
6674 }
6675
6676 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6677                                         struct kvm_guest_debug *dbg)
6678 {
6679         unsigned long rflags;
6680         int i, r;
6681
6682         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6683                 r = -EBUSY;
6684                 if (vcpu->arch.exception.pending)
6685                         goto out;
6686                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6687                         kvm_queue_exception(vcpu, DB_VECTOR);
6688                 else
6689                         kvm_queue_exception(vcpu, BP_VECTOR);
6690         }
6691
6692         /*
6693          * Read rflags as long as potentially injected trace flags are still
6694          * filtered out.
6695          */
6696         rflags = kvm_get_rflags(vcpu);
6697
6698         vcpu->guest_debug = dbg->control;
6699         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6700                 vcpu->guest_debug = 0;
6701
6702         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6703                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6704                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6705                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6706         } else {
6707                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6708                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6709         }
6710         kvm_update_dr7(vcpu);
6711
6712         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6713                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6714                         get_segment_base(vcpu, VCPU_SREG_CS);
6715
6716         /*
6717          * Trigger an rflags update that will inject or remove the trace
6718          * flags.
6719          */
6720         kvm_set_rflags(vcpu, rflags);
6721
6722         kvm_x86_ops->update_db_bp_intercept(vcpu);
6723
6724         r = 0;
6725
6726 out:
6727
6728         return r;
6729 }
6730
6731 /*
6732  * Translate a guest virtual address to a guest physical address.
6733  */
6734 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6735                                     struct kvm_translation *tr)
6736 {
6737         unsigned long vaddr = tr->linear_address;
6738         gpa_t gpa;
6739         int idx;
6740
6741         idx = srcu_read_lock(&vcpu->kvm->srcu);
6742         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6743         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6744         tr->physical_address = gpa;
6745         tr->valid = gpa != UNMAPPED_GVA;
6746         tr->writeable = 1;
6747         tr->usermode = 0;
6748
6749         return 0;
6750 }
6751
6752 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6753 {
6754         struct i387_fxsave_struct *fxsave =
6755                         &vcpu->arch.guest_fpu.state->fxsave;
6756
6757         memcpy(fpu->fpr, fxsave->st_space, 128);
6758         fpu->fcw = fxsave->cwd;
6759         fpu->fsw = fxsave->swd;
6760         fpu->ftwx = fxsave->twd;
6761         fpu->last_opcode = fxsave->fop;
6762         fpu->last_ip = fxsave->rip;
6763         fpu->last_dp = fxsave->rdp;
6764         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6765
6766         return 0;
6767 }
6768
6769 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6770 {
6771         struct i387_fxsave_struct *fxsave =
6772                         &vcpu->arch.guest_fpu.state->fxsave;
6773
6774         memcpy(fxsave->st_space, fpu->fpr, 128);
6775         fxsave->cwd = fpu->fcw;
6776         fxsave->swd = fpu->fsw;
6777         fxsave->twd = fpu->ftwx;
6778         fxsave->fop = fpu->last_opcode;
6779         fxsave->rip = fpu->last_ip;
6780         fxsave->rdp = fpu->last_dp;
6781         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6782
6783         return 0;
6784 }
6785
6786 int fx_init(struct kvm_vcpu *vcpu)
6787 {
6788         int err;
6789
6790         err = fpu_alloc(&vcpu->arch.guest_fpu);
6791         if (err)
6792                 return err;
6793
6794         fpu_finit(&vcpu->arch.guest_fpu);
6795
6796         /*
6797          * Ensure guest xcr0 is valid for loading
6798          */
6799         vcpu->arch.xcr0 = XSTATE_FP;
6800
6801         vcpu->arch.cr0 |= X86_CR0_ET;
6802
6803         return 0;
6804 }
6805 EXPORT_SYMBOL_GPL(fx_init);
6806
6807 static void fx_free(struct kvm_vcpu *vcpu)
6808 {
6809         fpu_free(&vcpu->arch.guest_fpu);
6810 }
6811
6812 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6813 {
6814         if (vcpu->guest_fpu_loaded)
6815                 return;
6816
6817         /*
6818          * Restore all possible states in the guest,
6819          * and assume host would use all available bits.
6820          * Guest xcr0 would be loaded later.
6821          */
6822         kvm_put_guest_xcr0(vcpu);
6823         vcpu->guest_fpu_loaded = 1;
6824         __kernel_fpu_begin();
6825         fpu_restore_checking(&vcpu->arch.guest_fpu);
6826         trace_kvm_fpu(1);
6827 }
6828
6829 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6830 {
6831         kvm_put_guest_xcr0(vcpu);
6832
6833         if (!vcpu->guest_fpu_loaded)
6834                 return;
6835
6836         vcpu->guest_fpu_loaded = 0;
6837         fpu_save_init(&vcpu->arch.guest_fpu);
6838         __kernel_fpu_end();
6839         ++vcpu->stat.fpu_reload;
6840         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6841         trace_kvm_fpu(0);
6842 }
6843
6844 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6845 {
6846         kvmclock_reset(vcpu);
6847
6848         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6849         fx_free(vcpu);
6850         kvm_x86_ops->vcpu_free(vcpu);
6851 }
6852
6853 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6854                                                 unsigned int id)
6855 {
6856         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6857                 printk_once(KERN_WARNING
6858                 "kvm: SMP vm created on host with unstable TSC; "
6859                 "guest TSC will not be reliable\n");
6860         return kvm_x86_ops->vcpu_create(kvm, id);
6861 }
6862
6863 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6864 {
6865         int r;
6866
6867         vcpu->arch.mtrr_state.have_fixed = 1;
6868         r = vcpu_load(vcpu);
6869         if (r)
6870                 return r;
6871         kvm_vcpu_reset(vcpu);
6872         kvm_mmu_setup(vcpu);
6873         vcpu_put(vcpu);
6874
6875         return r;
6876 }
6877
6878 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6879 {
6880         int r;
6881         struct msr_data msr;
6882         struct kvm *kvm = vcpu->kvm;
6883
6884         r = vcpu_load(vcpu);
6885         if (r)
6886                 return r;
6887         msr.data = 0x0;
6888         msr.index = MSR_IA32_TSC;
6889         msr.host_initiated = true;
6890         kvm_write_tsc(vcpu, &msr);
6891         vcpu_put(vcpu);
6892
6893         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
6894                                         KVMCLOCK_SYNC_PERIOD);
6895
6896         return r;
6897 }
6898
6899 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6900 {
6901         int r;
6902         vcpu->arch.apf.msr_val = 0;
6903
6904         r = vcpu_load(vcpu);
6905         BUG_ON(r);
6906         kvm_mmu_unload(vcpu);
6907         vcpu_put(vcpu);
6908
6909         fx_free(vcpu);
6910         kvm_x86_ops->vcpu_free(vcpu);
6911 }
6912
6913 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6914 {
6915         atomic_set(&vcpu->arch.nmi_queued, 0);
6916         vcpu->arch.nmi_pending = 0;
6917         vcpu->arch.nmi_injected = false;
6918         kvm_clear_interrupt_queue(vcpu);
6919         kvm_clear_exception_queue(vcpu);
6920
6921         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6922         vcpu->arch.dr6 = DR6_INIT;
6923         kvm_update_dr6(vcpu);
6924         vcpu->arch.dr7 = DR7_FIXED_1;
6925         kvm_update_dr7(vcpu);
6926
6927         kvm_make_request(KVM_REQ_EVENT, vcpu);
6928         vcpu->arch.apf.msr_val = 0;
6929         vcpu->arch.st.msr_val = 0;
6930
6931         kvmclock_reset(vcpu);
6932
6933         kvm_clear_async_pf_completion_queue(vcpu);
6934         kvm_async_pf_hash_reset(vcpu);
6935         vcpu->arch.apf.halted = false;
6936
6937         kvm_pmu_reset(vcpu);
6938
6939         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6940         vcpu->arch.regs_avail = ~0;
6941         vcpu->arch.regs_dirty = ~0;
6942
6943         kvm_x86_ops->vcpu_reset(vcpu);
6944 }
6945
6946 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector)
6947 {
6948         struct kvm_segment cs;
6949
6950         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6951         cs.selector = vector << 8;
6952         cs.base = vector << 12;
6953         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6954         kvm_rip_write(vcpu, 0);
6955 }
6956
6957 int kvm_arch_hardware_enable(void *garbage)
6958 {
6959         struct kvm *kvm;
6960         struct kvm_vcpu *vcpu;
6961         int i;
6962         int ret;
6963         u64 local_tsc;
6964         u64 max_tsc = 0;
6965         bool stable, backwards_tsc = false;
6966
6967         kvm_shared_msr_cpu_online();
6968         ret = kvm_x86_ops->hardware_enable(garbage);
6969         if (ret != 0)
6970                 return ret;
6971
6972         local_tsc = native_read_tsc();
6973         stable = !check_tsc_unstable();
6974         list_for_each_entry(kvm, &vm_list, vm_list) {
6975                 kvm_for_each_vcpu(i, vcpu, kvm) {
6976                         if (!stable && vcpu->cpu == smp_processor_id())
6977                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6978                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6979                                 backwards_tsc = true;
6980                                 if (vcpu->arch.last_host_tsc > max_tsc)
6981                                         max_tsc = vcpu->arch.last_host_tsc;
6982                         }
6983                 }
6984         }
6985
6986         /*
6987          * Sometimes, even reliable TSCs go backwards.  This happens on
6988          * platforms that reset TSC during suspend or hibernate actions, but
6989          * maintain synchronization.  We must compensate.  Fortunately, we can
6990          * detect that condition here, which happens early in CPU bringup,
6991          * before any KVM threads can be running.  Unfortunately, we can't
6992          * bring the TSCs fully up to date with real time, as we aren't yet far
6993          * enough into CPU bringup that we know how much real time has actually
6994          * elapsed; our helper function, get_kernel_ns() will be using boot
6995          * variables that haven't been updated yet.
6996          *
6997          * So we simply find the maximum observed TSC above, then record the
6998          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6999          * the adjustment will be applied.  Note that we accumulate
7000          * adjustments, in case multiple suspend cycles happen before some VCPU
7001          * gets a chance to run again.  In the event that no KVM threads get a
7002          * chance to run, we will miss the entire elapsed period, as we'll have
7003          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7004          * loose cycle time.  This isn't too big a deal, since the loss will be
7005          * uniform across all VCPUs (not to mention the scenario is extremely
7006          * unlikely). It is possible that a second hibernate recovery happens
7007          * much faster than a first, causing the observed TSC here to be
7008          * smaller; this would require additional padding adjustment, which is
7009          * why we set last_host_tsc to the local tsc observed here.
7010          *
7011          * N.B. - this code below runs only on platforms with reliable TSC,
7012          * as that is the only way backwards_tsc is set above.  Also note
7013          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7014          * have the same delta_cyc adjustment applied if backwards_tsc
7015          * is detected.  Note further, this adjustment is only done once,
7016          * as we reset last_host_tsc on all VCPUs to stop this from being
7017          * called multiple times (one for each physical CPU bringup).
7018          *
7019          * Platforms with unreliable TSCs don't have to deal with this, they
7020          * will be compensated by the logic in vcpu_load, which sets the TSC to
7021          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7022          * guarantee that they stay in perfect synchronization.
7023          */
7024         if (backwards_tsc) {
7025                 u64 delta_cyc = max_tsc - local_tsc;
7026                 backwards_tsc_observed = true;
7027                 list_for_each_entry(kvm, &vm_list, vm_list) {
7028                         kvm_for_each_vcpu(i, vcpu, kvm) {
7029                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7030                                 vcpu->arch.last_host_tsc = local_tsc;
7031                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
7032                                         &vcpu->requests);
7033                         }
7034
7035                         /*
7036                          * We have to disable TSC offset matching.. if you were
7037                          * booting a VM while issuing an S4 host suspend....
7038                          * you may have some problem.  Solving this issue is
7039                          * left as an exercise to the reader.
7040                          */
7041                         kvm->arch.last_tsc_nsec = 0;
7042                         kvm->arch.last_tsc_write = 0;
7043                 }
7044
7045         }
7046         return 0;
7047 }
7048
7049 void kvm_arch_hardware_disable(void *garbage)
7050 {
7051         kvm_x86_ops->hardware_disable(garbage);
7052         drop_user_return_notifiers(garbage);
7053 }
7054
7055 int kvm_arch_hardware_setup(void)
7056 {
7057         return kvm_x86_ops->hardware_setup();
7058 }
7059
7060 void kvm_arch_hardware_unsetup(void)
7061 {
7062         kvm_x86_ops->hardware_unsetup();
7063 }
7064
7065 void kvm_arch_check_processor_compat(void *rtn)
7066 {
7067         kvm_x86_ops->check_processor_compatibility(rtn);
7068 }
7069
7070 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7071 {
7072         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
7073 }
7074
7075 struct static_key kvm_no_apic_vcpu __read_mostly;
7076
7077 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7078 {
7079         struct page *page;
7080         struct kvm *kvm;
7081         int r;
7082
7083         BUG_ON(vcpu->kvm == NULL);
7084         kvm = vcpu->kvm;
7085
7086         vcpu->arch.pv.pv_unhalted = false;
7087         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7088         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
7089                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7090         else
7091                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7092
7093         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7094         if (!page) {
7095                 r = -ENOMEM;
7096                 goto fail;
7097         }
7098         vcpu->arch.pio_data = page_address(page);
7099
7100         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7101
7102         r = kvm_mmu_create(vcpu);
7103         if (r < 0)
7104                 goto fail_free_pio_data;
7105
7106         if (irqchip_in_kernel(kvm)) {
7107                 r = kvm_create_lapic(vcpu);
7108                 if (r < 0)
7109                         goto fail_mmu_destroy;
7110         } else
7111                 static_key_slow_inc(&kvm_no_apic_vcpu);
7112
7113         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7114                                        GFP_KERNEL);
7115         if (!vcpu->arch.mce_banks) {
7116                 r = -ENOMEM;
7117                 goto fail_free_lapic;
7118         }
7119         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7120
7121         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7122                 r = -ENOMEM;
7123                 goto fail_free_mce_banks;
7124         }
7125
7126         r = fx_init(vcpu);
7127         if (r)
7128                 goto fail_free_wbinvd_dirty_mask;
7129
7130         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7131         vcpu->arch.pv_time_enabled = false;
7132
7133         vcpu->arch.guest_supported_xcr0 = 0;
7134         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7135
7136         kvm_async_pf_hash_reset(vcpu);
7137         kvm_pmu_init(vcpu);
7138
7139         return 0;
7140 fail_free_wbinvd_dirty_mask:
7141         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7142 fail_free_mce_banks:
7143         kfree(vcpu->arch.mce_banks);
7144 fail_free_lapic:
7145         kvm_free_lapic(vcpu);
7146 fail_mmu_destroy:
7147         kvm_mmu_destroy(vcpu);
7148 fail_free_pio_data:
7149         free_page((unsigned long)vcpu->arch.pio_data);
7150 fail:
7151         return r;
7152 }
7153
7154 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7155 {
7156         int idx;
7157
7158         kvm_pmu_destroy(vcpu);
7159         kfree(vcpu->arch.mce_banks);
7160         kvm_free_lapic(vcpu);
7161         idx = srcu_read_lock(&vcpu->kvm->srcu);
7162         kvm_mmu_destroy(vcpu);
7163         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7164         free_page((unsigned long)vcpu->arch.pio_data);
7165         if (!irqchip_in_kernel(vcpu->kvm))
7166                 static_key_slow_dec(&kvm_no_apic_vcpu);
7167 }
7168
7169 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7170 {
7171         if (type)
7172                 return -EINVAL;
7173
7174         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7175         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7176         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7177         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7178
7179         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7180         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7181         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7182         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7183                 &kvm->arch.irq_sources_bitmap);
7184
7185         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7186         mutex_init(&kvm->arch.apic_map_lock);
7187         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7188
7189         pvclock_update_vm_gtod_copy(kvm);
7190
7191         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7192         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7193
7194         return 0;
7195 }
7196
7197 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7198 {
7199         int r;
7200         r = vcpu_load(vcpu);
7201         BUG_ON(r);
7202         kvm_mmu_unload(vcpu);
7203         vcpu_put(vcpu);
7204 }
7205
7206 static void kvm_free_vcpus(struct kvm *kvm)
7207 {
7208         unsigned int i;
7209         struct kvm_vcpu *vcpu;
7210
7211         /*
7212          * Unpin any mmu pages first.
7213          */
7214         kvm_for_each_vcpu(i, vcpu, kvm) {
7215                 kvm_clear_async_pf_completion_queue(vcpu);
7216                 kvm_unload_vcpu_mmu(vcpu);
7217         }
7218         kvm_for_each_vcpu(i, vcpu, kvm)
7219                 kvm_arch_vcpu_free(vcpu);
7220
7221         mutex_lock(&kvm->lock);
7222         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7223                 kvm->vcpus[i] = NULL;
7224
7225         atomic_set(&kvm->online_vcpus, 0);
7226         mutex_unlock(&kvm->lock);
7227 }
7228
7229 void kvm_arch_sync_events(struct kvm *kvm)
7230 {
7231         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7232         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7233         kvm_free_all_assigned_devices(kvm);
7234         kvm_free_pit(kvm);
7235 }
7236
7237 void kvm_arch_destroy_vm(struct kvm *kvm)
7238 {
7239         if (current->mm == kvm->mm) {
7240                 /*
7241                  * Free memory regions allocated on behalf of userspace,
7242                  * unless the the memory map has changed due to process exit
7243                  * or fd copying.
7244                  */
7245                 struct kvm_userspace_memory_region mem;
7246                 memset(&mem, 0, sizeof(mem));
7247                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
7248                 kvm_set_memory_region(kvm, &mem);
7249
7250                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
7251                 kvm_set_memory_region(kvm, &mem);
7252
7253                 mem.slot = TSS_PRIVATE_MEMSLOT;
7254                 kvm_set_memory_region(kvm, &mem);
7255         }
7256         kvm_iommu_unmap_guest(kvm);
7257         kfree(kvm->arch.vpic);
7258         kfree(kvm->arch.vioapic);
7259         kvm_free_vcpus(kvm);
7260         if (kvm->arch.apic_access_page)
7261                 put_page(kvm->arch.apic_access_page);
7262         if (kvm->arch.ept_identity_pagetable)
7263                 put_page(kvm->arch.ept_identity_pagetable);
7264         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7265 }
7266
7267 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7268                            struct kvm_memory_slot *dont)
7269 {
7270         int i;
7271
7272         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7273                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7274                         kvm_kvfree(free->arch.rmap[i]);
7275                         free->arch.rmap[i] = NULL;
7276                 }
7277                 if (i == 0)
7278                         continue;
7279
7280                 if (!dont || free->arch.lpage_info[i - 1] !=
7281                              dont->arch.lpage_info[i - 1]) {
7282                         kvm_kvfree(free->arch.lpage_info[i - 1]);
7283                         free->arch.lpage_info[i - 1] = NULL;
7284                 }
7285         }
7286 }
7287
7288 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7289                             unsigned long npages)
7290 {
7291         int i;
7292
7293         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7294                 unsigned long ugfn;
7295                 int lpages;
7296                 int level = i + 1;
7297
7298                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7299                                       slot->base_gfn, level) + 1;
7300
7301                 slot->arch.rmap[i] =
7302                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7303                 if (!slot->arch.rmap[i])
7304                         goto out_free;
7305                 if (i == 0)
7306                         continue;
7307
7308                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7309                                         sizeof(*slot->arch.lpage_info[i - 1]));
7310                 if (!slot->arch.lpage_info[i - 1])
7311                         goto out_free;
7312
7313                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7314                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7315                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7316                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7317                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7318                 /*
7319                  * If the gfn and userspace address are not aligned wrt each
7320                  * other, or if explicitly asked to, disable large page
7321                  * support for this slot
7322                  */
7323                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7324                     !kvm_largepages_enabled()) {
7325                         unsigned long j;
7326
7327                         for (j = 0; j < lpages; ++j)
7328                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7329                 }
7330         }
7331
7332         return 0;
7333
7334 out_free:
7335         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7336                 kvm_kvfree(slot->arch.rmap[i]);
7337                 slot->arch.rmap[i] = NULL;
7338                 if (i == 0)
7339                         continue;
7340
7341                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
7342                 slot->arch.lpage_info[i - 1] = NULL;
7343         }
7344         return -ENOMEM;
7345 }
7346
7347 void kvm_arch_memslots_updated(struct kvm *kvm)
7348 {
7349         /*
7350          * memslots->generation has been incremented.
7351          * mmio generation may have reached its maximum value.
7352          */
7353         kvm_mmu_invalidate_mmio_sptes(kvm);
7354 }
7355
7356 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7357                                 struct kvm_memory_slot *memslot,
7358                                 struct kvm_userspace_memory_region *mem,
7359                                 enum kvm_mr_change change)
7360 {
7361         /*
7362          * Only private memory slots need to be mapped here since
7363          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7364          */
7365         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7366                 unsigned long userspace_addr;
7367
7368                 /*
7369                  * MAP_SHARED to prevent internal slot pages from being moved
7370                  * by fork()/COW.
7371                  */
7372                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7373                                          PROT_READ | PROT_WRITE,
7374                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7375
7376                 if (IS_ERR((void *)userspace_addr))
7377                         return PTR_ERR((void *)userspace_addr);
7378
7379                 memslot->userspace_addr = userspace_addr;
7380         }
7381
7382         return 0;
7383 }
7384
7385 void kvm_arch_commit_memory_region(struct kvm *kvm,
7386                                 struct kvm_userspace_memory_region *mem,
7387                                 const struct kvm_memory_slot *old,
7388                                 enum kvm_mr_change change)
7389 {
7390
7391         int nr_mmu_pages = 0;
7392
7393         if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
7394                 int ret;
7395
7396                 ret = vm_munmap(old->userspace_addr,
7397                                 old->npages * PAGE_SIZE);
7398                 if (ret < 0)
7399                         printk(KERN_WARNING
7400                                "kvm_vm_ioctl_set_memory_region: "
7401                                "failed to munmap memory\n");
7402         }
7403
7404         if (!kvm->arch.n_requested_mmu_pages)
7405                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7406
7407         if (nr_mmu_pages)
7408                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7409         /*
7410          * Write protect all pages for dirty logging.
7411          *
7412          * All the sptes including the large sptes which point to this
7413          * slot are set to readonly. We can not create any new large
7414          * spte on this slot until the end of the logging.
7415          *
7416          * See the comments in fast_page_fault().
7417          */
7418         if ((change != KVM_MR_DELETE) && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
7419                 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
7420 }
7421
7422 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7423 {
7424         kvm_mmu_invalidate_zap_all_pages(kvm);
7425 }
7426
7427 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7428                                    struct kvm_memory_slot *slot)
7429 {
7430         kvm_mmu_invalidate_zap_all_pages(kvm);
7431 }
7432
7433 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7434 {
7435         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7436                 kvm_x86_ops->check_nested_events(vcpu, false);
7437
7438         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7439                 !vcpu->arch.apf.halted)
7440                 || !list_empty_careful(&vcpu->async_pf.done)
7441                 || kvm_apic_has_events(vcpu)
7442                 || vcpu->arch.pv.pv_unhalted
7443                 || atomic_read(&vcpu->arch.nmi_queued) ||
7444                 (kvm_arch_interrupt_allowed(vcpu) &&
7445                  kvm_cpu_has_interrupt(vcpu));
7446 }
7447
7448 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7449 {
7450         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7451 }
7452
7453 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7454 {
7455         return kvm_x86_ops->interrupt_allowed(vcpu);
7456 }
7457
7458 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7459 {
7460         unsigned long current_rip = kvm_rip_read(vcpu) +
7461                 get_segment_base(vcpu, VCPU_SREG_CS);
7462
7463         return current_rip == linear_rip;
7464 }
7465 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7466
7467 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7468 {
7469         unsigned long rflags;
7470
7471         rflags = kvm_x86_ops->get_rflags(vcpu);
7472         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7473                 rflags &= ~X86_EFLAGS_TF;
7474         return rflags;
7475 }
7476 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7477
7478 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7479 {
7480         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7481             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7482                 rflags |= X86_EFLAGS_TF;
7483         kvm_x86_ops->set_rflags(vcpu, rflags);
7484 }
7485
7486 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7487 {
7488         __kvm_set_rflags(vcpu, rflags);
7489         kvm_make_request(KVM_REQ_EVENT, vcpu);
7490 }
7491 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7492
7493 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7494 {
7495         int r;
7496
7497         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7498               work->wakeup_all)
7499                 return;
7500
7501         r = kvm_mmu_reload(vcpu);
7502         if (unlikely(r))
7503                 return;
7504
7505         if (!vcpu->arch.mmu.direct_map &&
7506               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7507                 return;
7508
7509         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7510 }
7511
7512 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7513 {
7514         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7515 }
7516
7517 static inline u32 kvm_async_pf_next_probe(u32 key)
7518 {
7519         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7520 }
7521
7522 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7523 {
7524         u32 key = kvm_async_pf_hash_fn(gfn);
7525
7526         while (vcpu->arch.apf.gfns[key] != ~0)
7527                 key = kvm_async_pf_next_probe(key);
7528
7529         vcpu->arch.apf.gfns[key] = gfn;
7530 }
7531
7532 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7533 {
7534         int i;
7535         u32 key = kvm_async_pf_hash_fn(gfn);
7536
7537         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7538                      (vcpu->arch.apf.gfns[key] != gfn &&
7539                       vcpu->arch.apf.gfns[key] != ~0); i++)
7540                 key = kvm_async_pf_next_probe(key);
7541
7542         return key;
7543 }
7544
7545 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7546 {
7547         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7548 }
7549
7550 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7551 {
7552         u32 i, j, k;
7553
7554         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7555         while (true) {
7556                 vcpu->arch.apf.gfns[i] = ~0;
7557                 do {
7558                         j = kvm_async_pf_next_probe(j);
7559                         if (vcpu->arch.apf.gfns[j] == ~0)
7560                                 return;
7561                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7562                         /*
7563                          * k lies cyclically in ]i,j]
7564                          * |    i.k.j |
7565                          * |....j i.k.| or  |.k..j i...|
7566                          */
7567                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7568                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7569                 i = j;
7570         }
7571 }
7572
7573 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7574 {
7575
7576         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7577                                       sizeof(val));
7578 }
7579
7580 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7581                                      struct kvm_async_pf *work)
7582 {
7583         struct x86_exception fault;
7584
7585         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7586         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7587
7588         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7589             (vcpu->arch.apf.send_user_only &&
7590              kvm_x86_ops->get_cpl(vcpu) == 0))
7591                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7592         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7593                 fault.vector = PF_VECTOR;
7594                 fault.error_code_valid = true;
7595                 fault.error_code = 0;
7596                 fault.nested_page_fault = false;
7597                 fault.address = work->arch.token;
7598                 kvm_inject_page_fault(vcpu, &fault);
7599         }
7600 }
7601
7602 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7603                                  struct kvm_async_pf *work)
7604 {
7605         struct x86_exception fault;
7606
7607         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7608         if (work->wakeup_all)
7609                 work->arch.token = ~0; /* broadcast wakeup */
7610         else
7611                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7612
7613         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7614             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7615                 fault.vector = PF_VECTOR;
7616                 fault.error_code_valid = true;
7617                 fault.error_code = 0;
7618                 fault.nested_page_fault = false;
7619                 fault.address = work->arch.token;
7620                 kvm_inject_page_fault(vcpu, &fault);
7621         }
7622         vcpu->arch.apf.halted = false;
7623         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7624 }
7625
7626 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7627 {
7628         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7629                 return true;
7630         else
7631                 return !kvm_event_needs_reinjection(vcpu) &&
7632                         kvm_x86_ops->interrupt_allowed(vcpu);
7633 }
7634
7635 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
7636 {
7637         atomic_inc(&kvm->arch.noncoherent_dma_count);
7638 }
7639 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
7640
7641 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
7642 {
7643         atomic_dec(&kvm->arch.noncoherent_dma_count);
7644 }
7645 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
7646
7647 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
7648 {
7649         return atomic_read(&kvm->arch.noncoherent_dma_count);
7650 }
7651 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
7652
7653 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7654 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7655 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7656 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7657 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7658 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7659 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7660 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7661 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7662 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7663 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7664 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
7665 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);