2 * ChromeOS EC multi-function device (SPI)
4 * Copyright (C) 2012 Google, Inc
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/delay.h>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/mfd/cros_ec.h>
20 #include <linux/mfd/cros_ec_commands.h>
22 #include <linux/platform_device.h>
23 #include <linux/slab.h>
24 #include <linux/spi/spi.h>
27 /* The header byte, which follows the preamble */
28 #define EC_MSG_HEADER 0xec
31 * Number of EC preamble bytes we read at a time. Since it takes
32 * about 400-500us for the EC to respond there is not a lot of
33 * point in tuning this. If the EC could respond faster then
34 * we could increase this so that might expect the preamble and
35 * message to occur in a single transaction. However, the maximum
36 * SPI transfer size is 256 bytes, so at 5MHz we need a response
37 * time of perhaps <320us (200 bytes / 1600 bits).
39 #define EC_MSG_PREAMBLE_COUNT 32
42 * Allow for a long time for the EC to respond. We support i2c
43 * tunneling and support fairly long messages for the tunnel (249
44 * bytes long at the moment). If we're talking to a 100 kHz device
45 * on the other end and need to transfer ~256 bytes, then we need:
46 * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms
48 * We'll wait 4 times that to handle clock stretching and other
51 * It's pretty unlikely that we'll really see a 249 byte tunnel in
52 * anything other than testing. If this was more common we might
53 * consider having slow commands like this require a GET_STATUS
54 * wait loop. The 'flash write' command would be another candidate
55 * for this, clocking in at 2-3ms.
57 #define EC_MSG_DEADLINE_MS 100
60 * Time between raising the SPI chip select (for the end of a
61 * transaction) and dropping it again (for the next transaction).
62 * If we go too fast, the EC will miss the transaction. We know that we
63 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
66 #define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
69 * The EC is unresponsive for a time after a reboot command. Add a
70 * simple delay to make sure that the bus stays locked.
72 #define EC_REBOOT_DELAY_MS 50
75 * struct cros_ec_spi - information about a SPI-connected EC
77 * @spi: SPI device we are connected to
78 * @last_transfer_ns: time that we last finished a transfer, or 0 if there
80 * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that
81 * is sent when we want to turn off CS at the end of a transaction.
82 * @lock: mutex to ensure only one user of cros_ec_cmd_xfer_spi at a time
85 struct spi_device *spi;
87 unsigned int end_of_msg_delay;
91 static void debug_packet(struct device *dev, const char *name, u8 *ptr,
97 dev_dbg(dev, "%s: ", name);
98 for (i = 0; i < len; i++)
99 pr_cont(" %02x", ptr[i]);
106 * cros_ec_spi_receive_response - Receive a response from the EC.
108 * This function has two phases: reading the preamble bytes (since if we read
109 * data from the EC before it is ready to send, we just get preamble) and
110 * reading the actual message.
112 * The received data is placed into ec_dev->din.
114 * @ec_dev: ChromeOS EC device
115 * @need_len: Number of message bytes we need to read
117 static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev,
120 struct cros_ec_spi *ec_spi = ec_dev->priv;
121 struct spi_transfer trans;
122 struct spi_message msg;
125 unsigned long deadline;
128 /* Receive data until we see the header byte */
129 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
131 unsigned long start_jiffies = jiffies;
133 memset(&trans, 0, sizeof(trans));
135 trans.rx_buf = ptr = ec_dev->din;
136 trans.len = EC_MSG_PREAMBLE_COUNT;
138 spi_message_init(&msg);
139 spi_message_add_tail(&trans, &msg);
140 ret = spi_sync(ec_spi->spi, &msg);
142 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
146 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
147 if (*ptr == EC_MSG_HEADER) {
148 dev_dbg(ec_dev->dev, "msg found at %zd\n",
157 * Use the time at the start of the loop as a timeout. This
158 * gives us one last shot at getting the transfer and is useful
159 * in case we got context switched out for a while.
161 if (time_after(start_jiffies, deadline)) {
162 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
168 * ptr now points to the header byte. Copy any valid data to the
169 * start of our buffer
172 BUG_ON(todo < 0 || todo > ec_dev->din_size);
173 todo = min(todo, need_len);
174 memmove(ec_dev->din, ptr, todo);
175 ptr = ec_dev->din + todo;
176 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
180 /* Receive data until we have it all */
181 while (need_len > 0) {
183 * We can't support transfers larger than the SPI FIFO size
184 * unless we have DMA. We don't have DMA on the ISP SPI ports
185 * for Exynos. We need a way of asking SPI driver for
186 * maximum-supported transfer size.
188 todo = min(need_len, 256);
189 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
190 todo, need_len, ptr - ec_dev->din);
192 memset(&trans, 0, sizeof(trans));
196 spi_message_init(&msg);
197 spi_message_add_tail(&trans, &msg);
199 /* send command to EC and read answer */
200 BUG_ON((u8 *)trans.rx_buf - ec_dev->din + todo >
202 ret = spi_sync(ec_spi->spi, &msg);
204 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
208 debug_packet(ec_dev->dev, "interim", ptr, todo);
213 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
219 * cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply
221 * @ec_dev: ChromeOS EC device
222 * @ec_msg: Message to transfer
224 static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
225 struct cros_ec_command *ec_msg)
227 struct cros_ec_spi *ec_spi = ec_dev->priv;
228 struct spi_transfer trans;
229 struct spi_message msg;
233 int ret = 0, final_ret;
236 * We have the shared ec_dev buffer plus we do lots of separate spi_sync
237 * calls, so we need to make sure only one person is using this at a
240 mutex_lock(&ec_spi->lock);
242 len = cros_ec_prepare_tx(ec_dev, ec_msg);
243 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
245 /* If it's too soon to do another transaction, wait */
246 if (ec_spi->last_transfer_ns) {
247 unsigned long delay; /* The delay completed so far */
249 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
250 if (delay < EC_SPI_RECOVERY_TIME_NS)
251 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
254 /* Transmit phase - send our message */
255 debug_packet(ec_dev->dev, "out", ec_dev->dout, len);
256 memset(&trans, 0, sizeof(trans));
257 trans.tx_buf = ec_dev->dout;
260 spi_message_init(&msg);
261 spi_message_add_tail(&trans, &msg);
262 ret = spi_sync(ec_spi->spi, &msg);
264 /* Get the response */
266 ret = cros_ec_spi_receive_response(ec_dev,
267 ec_msg->insize + EC_MSG_TX_PROTO_BYTES);
269 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
273 * Turn off CS, possibly adding a delay to ensure the rising edge
274 * doesn't come too soon after the end of the data.
276 spi_message_init(&msg);
277 memset(&trans, 0, sizeof(trans));
278 trans.delay_usecs = ec_spi->end_of_msg_delay;
279 spi_message_add_tail(&trans, &msg);
281 final_ret = spi_sync(ec_spi->spi, &msg);
282 ec_spi->last_transfer_ns = ktime_get_ns();
286 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
292 /* check response error code */
293 ec_msg->result = ptr[0];
294 ret = cros_ec_check_result(ec_dev, ec_msg);
299 sum = ptr[0] + ptr[1];
300 if (len > ec_msg->insize) {
301 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
302 len, ec_msg->insize);
307 /* copy response packet payload and compute checksum */
308 for (i = 0; i < len; i++) {
311 ec_msg->indata[i] = ptr[i + 2];
315 debug_packet(ec_dev->dev, "in", ptr, len + 3);
317 if (sum != ptr[len + 2]) {
319 "bad packet checksum, expected %02x, got %02x\n",
327 if (ec_msg->command == EC_CMD_REBOOT_EC)
328 msleep(EC_REBOOT_DELAY_MS);
330 mutex_unlock(&ec_spi->lock);
334 static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev)
336 struct device_node *np = dev->of_node;
340 ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val);
342 ec_spi->end_of_msg_delay = val;
345 static int cros_ec_spi_probe(struct spi_device *spi)
347 struct device *dev = &spi->dev;
348 struct cros_ec_device *ec_dev;
349 struct cros_ec_spi *ec_spi;
352 spi->bits_per_word = 8;
353 spi->mode = SPI_MODE_0;
354 err = spi_setup(spi);
358 ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL);
362 mutex_init(&ec_spi->lock);
363 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
367 /* Check for any DT properties */
368 cros_ec_spi_dt_probe(ec_spi, dev);
370 spi_set_drvdata(spi, ec_dev);
372 ec_dev->priv = ec_spi;
373 ec_dev->irq = spi->irq;
374 ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi;
375 ec_dev->ec_name = ec_spi->spi->modalias;
376 ec_dev->phys_name = dev_name(&ec_spi->spi->dev);
377 ec_dev->parent = &ec_spi->spi->dev;
378 ec_dev->din_size = EC_MSG_BYTES + EC_MSG_PREAMBLE_COUNT;
379 ec_dev->dout_size = EC_MSG_BYTES;
381 err = cros_ec_register(ec_dev);
383 dev_err(dev, "cannot register EC\n");
387 device_init_wakeup(&spi->dev, true);
392 static int cros_ec_spi_remove(struct spi_device *spi)
394 struct cros_ec_device *ec_dev;
396 ec_dev = spi_get_drvdata(spi);
397 cros_ec_remove(ec_dev);
402 #ifdef CONFIG_PM_SLEEP
403 static int cros_ec_spi_suspend(struct device *dev)
405 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
407 return cros_ec_suspend(ec_dev);
410 static int cros_ec_spi_resume(struct device *dev)
412 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
414 return cros_ec_resume(ec_dev);
418 static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
421 static const struct spi_device_id cros_ec_spi_id[] = {
422 { "cros-ec-spi", 0 },
425 MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
427 static struct spi_driver cros_ec_driver_spi = {
429 .name = "cros-ec-spi",
430 .owner = THIS_MODULE,
431 .pm = &cros_ec_spi_pm_ops,
433 .probe = cros_ec_spi_probe,
434 .remove = cros_ec_spi_remove,
435 .id_table = cros_ec_spi_id,
438 module_spi_driver(cros_ec_driver_spi);
440 MODULE_LICENSE("GPL v2");
441 MODULE_DESCRIPTION("ChromeOS EC multi function device (SPI)");