Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM 64-bit DT updates from Arnd Bergmann:
 "The 64-bit DT changes are surprisingly small this time, we only add
  two SoC platforms: the ZTE ZX296718 Set-top-box SoC and the SocioNext
  UniPhier LD11 TV SoC, each with their reference boards.

  There are three new machines added for existing SoC platforms:

   - The Marvell Armada 8040 development board is an impressive
     quad-core Cortex-A72 machine with three 10gbit ethernet interfaces

   - Qualcomms DragonBoard 820c single-board computer is their current
     high-end phone platform in the 96boards form factor

   - Rockchip: Tronsmart Orion r86 set-top-box is a popular mid-range
     Android box based on the 8-core rk3368 SoC"

* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (91 commits)
  arm64: dts: berlin4ct: Add L2 cache topology
  arm64: dts: berlin4ct: enable all wdt nodes unconditionally
  arm64: dts: berlin4ct: switch to Cortex-A53 specific pmu nodes
  arm64: dts: Add ZTE ZX296718 SoC dts and Makefile
  arm64: dts: apm: Add DT node for APM X-Gene 2 CPU clocks
  arm64: dts: apm: Add X-Gene SoC hwmon to device tree
  arm64: dts: apm: Fix interrupt polarity for X-Gene PCIe legacy interrupts
  arm64: dts: apm: Add APM X-Gene v2 SoC PMU DTS entries
  arm64: dts: apm: Add APM X-Gene SoC PMU DTS entries
  arm64: dts: marvell: enable MSI for PCIe on Armada 7K/8K
  arm64: dts: ls2080a: Add 'dma-coherent' for ls2080a PCI nodes
  arm64: dts: rockchip: add Type-C phy for RK3399
  arm64: dts: rockchip: enable the gmac for rk3399 evb board
  arm64: dts: rockchip: add the gmac needed node for rk3399
  arm64: dts: rockchip: support the pmu node for rk3399
  arm64: dts: rockchip: change all interrupts cells to 4 on rk3399 SoCs
  arm64: dts: rockchip: add the tcpc for rk3399 power domain
  arm64: dts: rockchip: add efuse0 device node for rk3399
  arm64: dts: rockchip: configure PCIe support for rk3399-evb
  arm64: dts: rockchip: add the PCIe controller support for RK3399
  ...

diff --combined Documentation/devicetree/bindings/arm/rockchip.txt
index a4f59b5,41efeec..55f388f
--- 1/Documentation/devicetree/bindings/arm/rockchip.txt
--- 2/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@@ -31,10 -31,6 +31,10 @@@ Rockchip platforms device tree binding
      or
        - compatible = "firefly,firefly-rk3288-beta", "rockchip,rk3288";
  
 +- Firefly Firefly-RK3288 Reload board:
 +    Required root node properties:
 +      - compatible = "firefly,firefly-rk3288-reload", "rockchip,rk3288";
 +
  - ChipSPARK PopMetal-RK3288 board:
      Required root node properties:
        - compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
@@@ -114,10 -110,10 +114,14 @@@
  - Rockchip RK3229 Evaluation board:
       - compatible = "rockchip,rk3229-evb", "rockchip,rk3229";
  
 +- Rockchip RK3288 Fennec board:
 +    Required root node properties:
 +     - compatible = "rockchip,rk3288-fennec", "rockchip,rk3288";
 +
  - Rockchip RK3399 evb:
      Required root node properties:
        - compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
+ 
+ - Tronsmart Orion R68 Meta
+     Required root node properties:
+       - compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";

diff --combined arch/arm64/Kconfig.platforms
index 16248af,7c5a036..cfbdf02
--- 1/arch/arm64/Kconfig.platforms
--- 2/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@@ -3,8 -3,6 +3,8 @@@ menu "Platform selection
  config ARCH_SUNXI
        bool "Allwinner sunxi 64-bit SoC Family"
        select GENERIC_IRQ_CHIP
 +      select PINCTRL
 +      select PINCTRL_SUN50I_A64
        help
          This enables support for Allwinner sunxi based SoCs like the A64.
  
@@@ -17,8 -15,8 +17,8 @@@ config ARCH_ALPIN
  
  config ARCH_BCM2835
        bool "Broadcom BCM2835 family"
 -      select ARCH_REQUIRE_GPIOLIB
        select CLKSRC_OF
 +      select GPIOLIB
        select PINCTRL
        select PINCTRL_BCM2835
        select ARM_AMBA
@@@ -31,26 -29,19 +31,26 @@@
  config ARCH_BCM_IPROC
        bool "Broadcom iProc SoC Family"
        select COMMON_CLK_IPROC
 +      select GPIOLIB
        select PINCTRL
 -      select ARCH_REQUIRE_GPIOLIB
        help
          This enables support for Broadcom iProc based SoCs
  
  config ARCH_BERLIN
        bool "Marvell Berlin SoC Family"
 -      select ARCH_REQUIRE_GPIOLIB
        select DW_APB_ICTL
 +      select GPIOLIB
        select PINCTRL
        help
          This enables support for Marvell Berlin SoC Family
  
 +config ARCH_BRCMSTB
 +      bool "Broadcom Set-Top-Box SoCs"
 +      select BRCMSTB_L2_IRQ
 +      select GENERIC_IRQ_CHIP
 +      help
 +        This enables support for Broadcom's ARMv8 Set Top Box SoCs
 +
  config ARCH_EXYNOS
        bool "ARMv8 based Samsung Exynos SoC family"
        select COMMON_CLK_SAMSUNG
@@@ -64,7 -55,6 +64,7 @@@
  
  config ARCH_LAYERSCAPE
        bool "ARMv8 based Freescale Layerscape SoC family"
 +      select EDAC_SUPPORT
        help
          This enables support for the Freescale Layerscape SoC family.
  
@@@ -77,7 -67,6 +77,7 @@@ config ARCH_HIS
        bool "Hisilicon SoC Family"
        select ARM_TIMER_SP804
        select HISILICON_IRQ_MBIGEN if PCI
 +      select PINCTRL
        help
          This enables support for Hisilicon ARMv8 SoC family
  
@@@ -104,7 -93,6 +104,7 @@@ config ARCH_MVEB
        select ARMADA_CP110_SYSCON
        select ARMADA_37XX_CLK
        select MVEBU_ODMI
 +      select MVEBU_PIC
        help
          This enables support for Marvell EBU familly, including:
           - Armada 3700 SoC Family
@@@ -120,7 -108,7 +120,7 @@@ config ARCH_QCO
  config ARCH_ROCKCHIP
        bool "Rockchip Platforms"
        select ARCH_HAS_RESET_CONTROLLER
 -      select ARCH_REQUIRE_GPIOLIB
 +      select GPIOLIB
        select PINCTRL
        select PINCTRL_ROCKCHIP
        select ROCKCHIP_TIMER
@@@ -166,12 -154,15 +166,14 @@@ config ARCH_STRATIX1
  config ARCH_TEGRA
        bool "NVIDIA Tegra SoC Family"
        select ARCH_HAS_RESET_CONTROLLER
 -      select ARCH_REQUIRE_GPIOLIB
        select CLKDEV_LOOKUP
        select CLKSRC_MMIO
        select CLKSRC_OF
        select GENERIC_CLOCKEVENTS
 -      select HAVE_CLK
 +      select GPIOLIB
        select PINCTRL
+       select PM
+       select PM_GENERIC_DOMAINS
        select RESET_CONTROLLER
        help
          This enables support for the NVIDIA Tegra SoC family.
@@@ -194,8 -185,8 +196,8 @@@ config ARCH_UNIPHIE
  
  config ARCH_VEXPRESS
        bool "ARMv8 software model (Versatile Express)"
 -      select ARCH_REQUIRE_GPIOLIB
        select COMMON_CLK_VERSATILE
 +      select GPIOLIB
        select PM
        select PM_GENERIC_DOMAINS
        select POWER_RESET_VEXPRESS
@@@ -215,11 -206,6 +217,11 @@@ config ARCH_XGEN
        help
          This enables support for AppliedMicro X-Gene SOC Family
  
 +config ARCH_ZX
 +      bool "ZTE ZX SoC Family"
 +      help
 +        This enables support for ZTE ZX SoC Family
 +
  config ARCH_ZYNQMP
        bool "Xilinx ZynqMP Family"
        help

diff --combined arch/arm64/boot/dts/apm/apm-storm.dtsi
index 31ea70a,954ea6a..63be8e5
--- 1/arch/arm64/boot/dts/apm/apm-storm.dtsi
--- 2/arch/arm64/boot/dts/apm/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi
@@@ -553,6 -553,64 +553,64 @@@
                        };
                };
  
+               pmu: pmu@78810000 {
+                       compatible = "apm,xgene-pmu-v2";
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       ranges;
+                       regmap-csw = <&csw>;
+                       regmap-mcba = <&mcba>;
+                       regmap-mcbb = <&mcbb>;
+                       reg = <0x0 0x78810000 0x0 0x1000>;
+                       interrupts = <0x0 0x22 0x4>;
+ 
+                       pmul3c@7e610000 {
+                               compatible = "apm,xgene-pmu-l3c";
+                               reg = <0x0 0x7e610000 0x0 0x1000>;
+                       };
+ 
+                       pmuiob@7e940000 {
+                               compatible = "apm,xgene-pmu-iob";
+                               reg = <0x0 0x7e940000 0x0 0x1000>;
+                       };
+ 
+                       pmucmcb@7e710000 {
+                               compatible = "apm,xgene-pmu-mcb";
+                               reg = <0x0 0x7e710000 0x0 0x1000>;
+                               enable-bit-index = <0>;
+                       };
+ 
+                       pmucmcb@7e730000 {
+                               compatible = "apm,xgene-pmu-mcb";
+                               reg = <0x0 0x7e730000 0x0 0x1000>;
+                               enable-bit-index = <1>;
+                       };
+ 
+                       pmucmc@7e810000 {
+                               compatible = "apm,xgene-pmu-mc";
+                               reg = <0x0 0x7e810000 0x0 0x1000>;
+                               enable-bit-index = <0>;
+                       };
+ 
+                       pmucmc@7e850000 {
+                               compatible = "apm,xgene-pmu-mc";
+                               reg = <0x0 0x7e850000 0x0 0x1000>;
+                               enable-bit-index = <1>;
+                       };
+ 
+                       pmucmc@7e890000 {
+                               compatible = "apm,xgene-pmu-mc";
+                               reg = <0x0 0x7e890000 0x0 0x1000>;
+                               enable-bit-index = <2>;
+                       };
+ 
+                       pmucmc@7e8d0000 {
+                               compatible = "apm,xgene-pmu-mc";
+                               reg = <0x0 0x7e8d0000 0x0 0x1000>;
+                               enable-bit-index = <3>;
+                       };
+               };
+ 
                pcie0: pcie@1f2b0000 {
                        status = "disabled";
                        device_type = "pci";
@@@ -569,10 -627,10 +627,10 @@@
                        dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
                                      0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
                        interrupt-map-mask = <0x0 0x0 0x0 0x7>;
-                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1
-                                        0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1
-                                        0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1
-                                        0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>;
+                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x4
+                                        0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x4
+                                        0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x4
+                                        0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x4>;
                        dma-coherent;
                        clocks = <&pcie0clk 0>;
                        msi-parent = <&msi>;
@@@ -594,10 -652,10 +652,10 @@@
                        dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
                                      0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
                        interrupt-map-mask = <0x0 0x0 0x0 0x7>;
-                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc8 0x1
-                                        0x0 0x0 0x0 0x2 &gic 0x0 0xc9 0x1
-                                        0x0 0x0 0x0 0x3 &gic 0x0 0xca 0x1
-                                        0x0 0x0 0x0 0x4 &gic 0x0 0xcb 0x1>;
+                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc8 0x4
+                                        0x0 0x0 0x0 0x2 &gic 0x0 0xc9 0x4
+                                        0x0 0x0 0x0 0x3 &gic 0x0 0xca 0x4
+                                        0x0 0x0 0x0 0x4 &gic 0x0 0xcb 0x4>;
                        dma-coherent;
                        clocks = <&pcie1clk 0>;
                        msi-parent = <&msi>;
@@@ -619,10 -677,10 +677,10 @@@
                        dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
                                      0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
                        interrupt-map-mask = <0x0 0x0 0x0 0x7>;
-                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xce 0x1
-                                        0x0 0x0 0x0 0x2 &gic 0x0 0xcf 0x1
-                                        0x0 0x0 0x0 0x3 &gic 0x0 0xd0 0x1
-                                        0x0 0x0 0x0 0x4 &gic 0x0 0xd1 0x1>;
+                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xce 0x4
+                                        0x0 0x0 0x0 0x2 &gic 0x0 0xcf 0x4
+                                        0x0 0x0 0x0 0x3 &gic 0x0 0xd0 0x4
+                                        0x0 0x0 0x0 0x4 &gic 0x0 0xd1 0x4>;
                        dma-coherent;
                        clocks = <&pcie2clk 0>;
                        msi-parent = <&msi>;
@@@ -644,10 -702,10 +702,10 @@@
                        dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
                                      0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
                        interrupt-map-mask = <0x0 0x0 0x0 0x7>;
-                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xd4 0x1
-                                        0x0 0x0 0x0 0x2 &gic 0x0 0xd5 0x1
-                                        0x0 0x0 0x0 0x3 &gic 0x0 0xd6 0x1
-                                        0x0 0x0 0x0 0x4 &gic 0x0 0xd7 0x1>;
+                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xd4 0x4
+                                        0x0 0x0 0x0 0x2 &gic 0x0 0xd5 0x4
+                                        0x0 0x0 0x0 0x3 &gic 0x0 0xd6 0x4
+                                        0x0 0x0 0x0 0x4 &gic 0x0 0xd7 0x4>;
                        dma-coherent;
                        clocks = <&pcie3clk 0>;
                        msi-parent = <&msi>;
@@@ -669,10 -727,10 +727,10 @@@
                        dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
                                      0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
                        interrupt-map-mask = <0x0 0x0 0x0 0x7>;
-                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xda 0x1
-                                        0x0 0x0 0x0 0x2 &gic 0x0 0xdb 0x1
-                                        0x0 0x0 0x0 0x3 &gic 0x0 0xdc 0x1
-                                        0x0 0x0 0x0 0x4 &gic 0x0 0xdd 0x1>;
+                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xda 0x4
+                                        0x0 0x0 0x0 0x2 &gic 0x0 0xdb 0x4
+                                        0x0 0x0 0x0 0x3 &gic 0x0 0xdc 0x4
+                                        0x0 0x0 0x0 0x4 &gic 0x0 0xdd 0x4>;
                        dma-coherent;
                        clocks = <&pcie4clk 0>;
                        msi-parent = <&msi>;
@@@ -697,6 -755,11 +755,11 @@@
                        mboxes = <&mailbox 0>;
                };
  
+               hwmonslimpro {
+                       compatible = "apm,xgene-slimpro-hwmon";
+                       mboxes = <&mailbox 7>;
+               };
+ 
                serial0: serial@1c020000 {
                        status = "disabled";
                        device_type = "serial";
@@@ -923,7 -986,7 +986,7 @@@
                        /* mac address will be overwritten by the bootloader */
                        local-mac-address = [00 00 00 00 00 00];
                        phy-connection-type = "rgmii";
 -                      phy-handle = <&menet0phy>,<&menetphy>;
 +                      phy-handle = <&menetphy>,<&menet0phy>;
                        mdio {
                                compatible = "apm,xgene-mdio";
                                #address-cells = <1>;

diff --combined arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 4f44d11,6a5eeea..0fcb214
--- 1/arch/arm64/boot/dts/rockchip/rk3368.dtsi
--- 2/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@@ -45,6 -45,7 +45,7 @@@
  #include <dt-bindings/interrupt-controller/irq.h>
  #include <dt-bindings/interrupt-controller/arm-gic.h>
  #include <dt-bindings/pinctrl/rockchip.h>
+ #include <dt-bindings/soc/rockchip,boot-mode.h>
  #include <dt-bindings/thermal/thermal.h>
  
  / {
@@@ -270,8 -271,6 +271,8 @@@
                #io-channel-cells = <1>;
                clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
                clock-names = "saradc", "apb_pclk";
 +              resets = <&cru SRST_SARADC>;
 +              reset-names = "saradc-apb";
                status = "disabled";
        };
  
@@@ -641,6 -640,15 +642,15 @@@
                        compatible = "rockchip,rk3368-pmu-io-voltage-domain";
                        status = "disabled";
                };
+ 
+               reboot-mode {
+                       compatible = "syscon-reboot-mode";
+                       offset = <0x200>;
+                       mode-normal = <BOOT_NORMAL>;
+                       mode-recovery = <BOOT_RECOVERY>;
+                       mode-bootloader = <BOOT_FASTBOOT>;
+                       mode-loader = <BOOT_BL_DOWNLOAD>;
+               };
        };
  
        cru: clock-controller@ff760000 {