This enables support for the High Speed SPI controller present on
newer Broadcom BCM63XX SoCs.
+++++config SPI_BCM_QSPI
+++++ tristate "Broadcom BSPI and MSPI controller support"
+++++ depends on ARCH_BRCMSTB || ARCH_BCM || ARCH_BCM_IPROC || COMPILE_TEST
+++++ default ARCH_BCM_IPROC
+++++ help
+++++ Enables support for the Broadcom SPI flash and MSPI controller.
+++++ Select this option for any one of BRCMSTB, iProc NSP and NS2 SoCs
+++++ based platforms. This driver works for both SPI master for spi-nor
+++++ flash device as well as MSPI device.
+++++
config SPI_BITBANG
tristate "Utilities for Bitbanging SPI masters"
help
This enables using the Freescale i.MX SPI controllers in master
mode.
+++ ++config SPI_JCORE
+++ ++ tristate "J-Core SPI Master"
+++ ++ depends on OF && (SUPERH || COMPILE_TEST)
+++ ++ help
+++ ++ This enables support for the SPI master controller in the J-Core
+++ ++ synthesizable, open source SoC.
+++ ++
config SPI_LM70_LLP
tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)"
depends on PARPORT
* @flags: other constraints relevant to this driver
* @max_transfer_size: function that returns the max transfer size for
* a &spi_device; may be %NULL, so the default %SIZE_MAX will be used.
+ ++++ * @max_message_size: function that returns the max message size for
+ ++++ * a &spi_device; may be %NULL, so the default %SIZE_MAX will be used.
* @io_mutex: mutex for physical bus access
* @bus_lock_spinlock: spinlock for SPI bus locking
* @bus_lock_mutex: mutex for exclusion of multiple callers
#define SPI_MASTER_MUST_TX BIT(4) /* requires tx */
/*
- ---- * on some hardware transfer size may be constrained
+ ++++ * on some hardware transfer / message size may be constrained
* the limit may depend on device transfer settings
*/
size_t (*max_transfer_size)(struct spi_device *spi);
+ ++++ size_t (*max_message_size)(struct spi_device *spi);
/* I/O mutex */
struct mutex io_mutex;
struct spi_message *message);
static inline size_t
- ----spi_max_transfer_size(struct spi_device *spi)
+ ++++spi_max_message_size(struct spi_device *spi)
{
struct spi_master *master = spi->master;
- ---- if (!master->max_transfer_size)
+ ++++ if (!master->max_message_size)
return SIZE_MAX;
- ---- return master->max_transfer_size(spi);
+ ++++ return master->max_message_size(spi);
+ ++++}
+ ++++
+ ++++static inline size_t
+ ++++spi_max_transfer_size(struct spi_device *spi)
+ ++++{
+ ++++ struct spi_master *master = spi->master;
+ ++++ size_t tr_max = SIZE_MAX;
+ ++++ size_t msg_max = spi_max_message_size(spi);
+ ++++
+ ++++ if (master->max_transfer_size)
+ ++++ tr_max = master->max_transfer_size(spi);
+ ++++
+ ++++ /* transfer size limit must not be greater than messsage size limit */
+ ++++ return min(tr_max, msg_max);
}
/*---------------------------------------------------------------------------*/
extern int spi_bus_lock(struct spi_master *master);
extern int spi_bus_unlock(struct spi_master *master);
+++++/**
+++++ * spi_sync_transfer - synchronous SPI data transfer
+++++ * @spi: device with which data will be exchanged
+++++ * @xfers: An array of spi_transfers
+++++ * @num_xfers: Number of items in the xfer array
+++++ * Context: can sleep
+++++ *
+++++ * Does a synchronous SPI data transfer of the given spi_transfer array.
+++++ *
+++++ * For more specific semantics see spi_sync().
+++++ *
+++++ * Return: Return: zero on success, else a negative error code.
+++++ */
+++++static inline int
+++++spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers,
+++++ unsigned int num_xfers)
+++++{
+++++ struct spi_message msg;
+++++
+++++ spi_message_init_with_transfers(&msg, xfers, num_xfers);
+++++
+++++ return spi_sync(spi, &msg);
+++++}
+++++
/**
* spi_write - SPI synchronous write
* @spi: device to which data will be written
.tx_buf = buf,
.len = len,
};
----- struct spi_message m;
----- spi_message_init(&m);
----- spi_message_add_tail(&t, &m);
----- return spi_sync(spi, &m);
+++++ return spi_sync_transfer(spi, &t, 1);
}
/**
.rx_buf = buf,
.len = len,
};
----- struct spi_message m;
----
---- spi_message_init(&m);
---- spi_message_add_tail(&t, &m);
---- return spi_sync(spi, &m);
----}
- spi_message_init(&m);
- spi_message_add_tail(&t, &m);
- return spi_sync(spi, &m);
- }
-
-----/**
----- * spi_sync_transfer - synchronous SPI data transfer
----- * @spi: device with which data will be exchanged
----- * @xfers: An array of spi_transfers
----- * @num_xfers: Number of items in the xfer array
----- * Context: can sleep
----- *
----- * Does a synchronous SPI data transfer of the given spi_transfer array.
----- *
----- * For more specific semantics see spi_sync().
----- *
----- * Return: Return: zero on success, else a negative error code.
----- */
-----static inline int
-----spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers,
----- unsigned int num_xfers)
-----{
----- struct spi_message msg;
-----
----- spi_message_init_with_transfers(&msg, xfers, num_xfers);
-----
----- return spi_sync(spi, &msg);
+++++ return spi_sync_transfer(spi, &t, 1);
}
/* this copies txbuf and rxbuf data; for small transfers only! */