Merge branch 'x86/cpu' into x86/platform, to avoid conflict
authorIngo Molnar <mingo@kernel.org>
Tue, 14 Jun 2016 10:25:07 +0000 (12:25 +0200)
committerIngo Molnar <mingo@kernel.org>
Tue, 14 Jun 2016 10:25:07 +0000 (12:25 +0200)
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/include/asm/topology.h
arch/x86/kernel/cpu/intel.c
arch/x86/platform/atom/punit_atom_debug.c
drivers/acpi/acpi_lpss.c
drivers/cpufreq/intel_pstate.c
drivers/idle/intel_idle.c
drivers/mmc/host/sdhci-acpi.c
drivers/platform/x86/intel_telemetry_debugfs.c
drivers/platform/x86/intel_telemetry_pltdrv.c
drivers/powercap/intel_rapl.c
drivers/thermal/intel_soc_dts_thermal.c

index 7f991bd..c9a4ed7 100644 (file)
 #ifndef _ASM_X86_TOPOLOGY_H
 #define _ASM_X86_TOPOLOGY_H
 
-#ifdef CONFIG_X86_32
-# ifdef CONFIG_SMP
-#  define ENABLE_TOPO_DEFINES
-# endif
-#else
-# ifdef CONFIG_SMP
-#  define ENABLE_TOPO_DEFINES
-# endif
-#endif
-
 /*
  * to preserve the visibility of NUMA_NO_NODE definition,
  * moved to there from here.  May be used independent of
@@ -123,7 +113,7 @@ extern const struct cpumask *cpu_coregroup_mask(int cpu);
 #define topology_physical_package_id(cpu)      (cpu_data(cpu).phys_proc_id)
 #define topology_core_id(cpu)                  (cpu_data(cpu).cpu_core_id)
 
-#ifdef ENABLE_TOPO_DEFINES
+#ifdef CONFIG_SMP
 #define topology_core_cpumask(cpu)             (per_cpu(cpu_core_map, cpu))
 #define topology_sibling_cpumask(cpu)          (per_cpu(cpu_sibling_map, cpu))
 
index 6e2ffbe..c1a89bc 100644 (file)
@@ -300,15 +300,14 @@ static void intel_workarounds(struct cpuinfo_x86 *c)
        }
 
        /*
-        * P4 Xeon errata 037 workaround.
+        * P4 Xeon erratum 037 workaround.
         * Hardware prefetcher may cause stale data to be loaded into the cache.
         */
        if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_mask == 1)) {
                if (msr_set_bit(MSR_IA32_MISC_ENABLE,
-                               MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE_BIT)
-                   > 0) {
+                               MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE_BIT) > 0) {
                        pr_info("CPU: C0 stepping P4 Xeon detected.\n");
-                       pr_info("CPU: Disabling hardware prefetching (Errata 037)\n");
+                       pr_info("CPU: Disabling hardware prefetching (Erratum 037)\n");
                }
        }
 
index 81c769e..1097829 100644 (file)
@@ -23,6 +23,7 @@
 #include <linux/seq_file.h>
 #include <linux/io.h>
 #include <asm/cpu_device_id.h>
+#include <asm/intel-family.h>
 #include <asm/iosf_mbi.h>
 
 /* Power gate status reg */
@@ -143,8 +144,8 @@ static void punit_dbgfs_unregister(void)
          (kernel_ulong_t)&drv_data }
 
 static const struct x86_cpu_id intel_punit_cpu_ids[] = {
-       ICPU(55, punit_device_byt), /* Valleyview, Bay Trail */
-       ICPU(76, punit_device_cht), /* Braswell, Cherry Trail */
+       ICPU(INTEL_FAM6_ATOM_SILVERMONT1, punit_device_byt),
+       ICPU(INTEL_FAM6_ATOM_AIRMONT,     punit_device_cht),
        {}
 };
 
index 0872d5f..357a0b8 100644 (file)
@@ -29,6 +29,7 @@ ACPI_MODULE_NAME("acpi_lpss");
 #ifdef CONFIG_X86_INTEL_LPSS
 
 #include <asm/cpu_device_id.h>
+#include <asm/intel-family.h>
 #include <asm/iosf_mbi.h>
 #include <asm/pmc_atom.h>
 
@@ -229,8 +230,8 @@ static const struct lpss_device_desc bsw_spi_dev_desc = {
 #define ICPU(model)    { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
 
 static const struct x86_cpu_id lpss_cpu_ids[] = {
-       ICPU(0x37),     /* Valleyview, Bay Trail */
-       ICPU(0x4c),     /* Braswell, Cherry Trail */
+       ICPU(INTEL_FAM6_ATOM_SILVERMONT1),      /* Valleyview, Bay Trail */
+       ICPU(INTEL_FAM6_ATOM_AIRMONT),  /* Braswell, Cherry Trail */
        {}
 };
 
index ee367e9..e1b7a5e 100644 (file)
@@ -35,6 +35,7 @@
 #include <asm/msr.h>
 #include <asm/cpu_device_id.h>
 #include <asm/cpufeature.h>
+#include <asm/intel-family.h>
 
 #define ATOM_RATIOS            0x66a
 #define ATOM_VIDS              0x66b
@@ -1352,29 +1353,29 @@ static void intel_pstate_update_util(struct update_util_data *data, u64 time,
                        (unsigned long)&policy }
 
 static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
-       ICPU(0x2a, core_params),
-       ICPU(0x2d, core_params),
-       ICPU(0x37, silvermont_params),
-       ICPU(0x3a, core_params),
-       ICPU(0x3c, core_params),
-       ICPU(0x3d, core_params),
-       ICPU(0x3e, core_params),
-       ICPU(0x3f, core_params),
-       ICPU(0x45, core_params),
-       ICPU(0x46, core_params),
-       ICPU(0x47, core_params),
-       ICPU(0x4c, airmont_params),
-       ICPU(0x4e, core_params),
-       ICPU(0x4f, core_params),
-       ICPU(0x5e, core_params),
-       ICPU(0x56, core_params),
-       ICPU(0x57, knl_params),
+       ICPU(INTEL_FAM6_SANDYBRIDGE,            core_params),
+       ICPU(INTEL_FAM6_SANDYBRIDGE_X,          core_params),
+       ICPU(INTEL_FAM6_ATOM_SILVERMONT1,       silvermont_params),
+       ICPU(INTEL_FAM6_IVYBRIDGE,              core_params),
+       ICPU(INTEL_FAM6_HASWELL_CORE,           core_params),
+       ICPU(INTEL_FAM6_BROADWELL_CORE,         core_params),
+       ICPU(INTEL_FAM6_IVYBRIDGE_X,            core_params),
+       ICPU(INTEL_FAM6_HASWELL_X,              core_params),
+       ICPU(INTEL_FAM6_HASWELL_ULT,            core_params),
+       ICPU(INTEL_FAM6_HASWELL_GT3E,           core_params),
+       ICPU(INTEL_FAM6_BROADWELL_GT3E,         core_params),
+       ICPU(INTEL_FAM6_ATOM_AIRMONT,           airmont_params),
+       ICPU(INTEL_FAM6_SKYLAKE_MOBILE,         core_params),
+       ICPU(INTEL_FAM6_BROADWELL_X,            core_params),
+       ICPU(INTEL_FAM6_SKYLAKE_DESKTOP,        core_params),
+       ICPU(INTEL_FAM6_BROADWELL_XEON_D,       core_params),
+       ICPU(INTEL_FAM6_XEON_PHI_KNL,           knl_params),
        {}
 };
 MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
 
 static const struct x86_cpu_id intel_pstate_cpu_oob_ids[] = {
-       ICPU(0x56, core_params),
+       ICPU(INTEL_FAM6_BROADWELL_XEON_D, core_params),
        {}
 };
 
index c966492..b5dd41d 100644 (file)
@@ -62,6 +62,7 @@
 #include <linux/cpu.h>
 #include <linux/module.h>
 #include <asm/cpu_device_id.h>
+#include <asm/intel-family.h>
 #include <asm/mwait.h>
 #include <asm/msr.h>
 
@@ -1020,38 +1021,38 @@ static const struct idle_cpu idle_cpu_bxt = {
        { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu }
 
 static const struct x86_cpu_id intel_idle_ids[] __initconst = {
-       ICPU(0x1a, idle_cpu_nehalem),
-       ICPU(0x1e, idle_cpu_nehalem),
-       ICPU(0x1f, idle_cpu_nehalem),
-       ICPU(0x25, idle_cpu_nehalem),
-       ICPU(0x2c, idle_cpu_nehalem),
-       ICPU(0x2e, idle_cpu_nehalem),
-       ICPU(0x1c, idle_cpu_atom),
-       ICPU(0x26, idle_cpu_lincroft),
-       ICPU(0x2f, idle_cpu_nehalem),
-       ICPU(0x2a, idle_cpu_snb),
-       ICPU(0x2d, idle_cpu_snb),
-       ICPU(0x36, idle_cpu_atom),
-       ICPU(0x37, idle_cpu_byt),
-       ICPU(0x4c, idle_cpu_cht),
-       ICPU(0x3a, idle_cpu_ivb),
-       ICPU(0x3e, idle_cpu_ivt),
-       ICPU(0x3c, idle_cpu_hsw),
-       ICPU(0x3f, idle_cpu_hsw),
-       ICPU(0x45, idle_cpu_hsw),
-       ICPU(0x46, idle_cpu_hsw),
-       ICPU(0x4d, idle_cpu_avn),
-       ICPU(0x3d, idle_cpu_bdw),
-       ICPU(0x47, idle_cpu_bdw),
-       ICPU(0x4f, idle_cpu_bdw),
-       ICPU(0x56, idle_cpu_bdw),
-       ICPU(0x4e, idle_cpu_skl),
-       ICPU(0x5e, idle_cpu_skl),
-       ICPU(0x8e, idle_cpu_skl),
-       ICPU(0x9e, idle_cpu_skl),
-       ICPU(0x55, idle_cpu_skx),
-       ICPU(0x57, idle_cpu_knl),
-       ICPU(0x5c, idle_cpu_bxt),
+       ICPU(INTEL_FAM6_NEHALEM_EP,             idle_cpu_nehalem),
+       ICPU(INTEL_FAM6_NEHALEM,                idle_cpu_nehalem),
+       ICPU(INTEL_FAM6_WESTMERE2,              idle_cpu_nehalem),
+       ICPU(INTEL_FAM6_WESTMERE,               idle_cpu_nehalem),
+       ICPU(INTEL_FAM6_WESTMERE_EP,            idle_cpu_nehalem),
+       ICPU(INTEL_FAM6_NEHALEM_EX,             idle_cpu_nehalem),
+       ICPU(INTEL_FAM6_ATOM_PINEVIEW,          idle_cpu_atom),
+       ICPU(INTEL_FAM6_ATOM_LINCROFT,          idle_cpu_lincroft),
+       ICPU(INTEL_FAM6_WESTMERE_EX,            idle_cpu_nehalem),
+       ICPU(INTEL_FAM6_SANDYBRIDGE,            idle_cpu_snb),
+       ICPU(INTEL_FAM6_SANDYBRIDGE_X,          idle_cpu_snb),
+       ICPU(INTEL_FAM6_ATOM_CEDARVIEW,         idle_cpu_atom),
+       ICPU(INTEL_FAM6_ATOM_SILVERMONT1,       idle_cpu_byt),
+       ICPU(INTEL_FAM6_ATOM_AIRMONT,           idle_cpu_cht),
+       ICPU(INTEL_FAM6_IVYBRIDGE,              idle_cpu_ivb),
+       ICPU(INTEL_FAM6_IVYBRIDGE_X,            idle_cpu_ivt),
+       ICPU(INTEL_FAM6_HASWELL_CORE,           idle_cpu_hsw),
+       ICPU(INTEL_FAM6_HASWELL_X,              idle_cpu_hsw),
+       ICPU(INTEL_FAM6_HASWELL_ULT,            idle_cpu_hsw),
+       ICPU(INTEL_FAM6_HASWELL_GT3E,           idle_cpu_hsw),
+       ICPU(INTEL_FAM6_ATOM_SILVERMONT2,       idle_cpu_avn),
+       ICPU(INTEL_FAM6_BROADWELL_CORE,         idle_cpu_bdw),
+       ICPU(INTEL_FAM6_BROADWELL_GT3E,         idle_cpu_bdw),
+       ICPU(INTEL_FAM6_BROADWELL_X,            idle_cpu_bdw),
+       ICPU(INTEL_FAM6_BROADWELL_XEON_D,       idle_cpu_bdw),
+       ICPU(INTEL_FAM6_SKYLAKE_MOBILE,         idle_cpu_skl),
+       ICPU(INTEL_FAM6_SKYLAKE_DESKTOP,        idle_cpu_skl),
+       ICPU(INTEL_FAM6_KABYLAKE_MOBILE,        idle_cpu_skl),
+       ICPU(INTEL_FAM6_KABYLAKE_DESKTOP,       idle_cpu_skl),
+       ICPU(INTEL_FAM6_SKYLAKE_X,              idle_cpu_skx),
+       ICPU(INTEL_FAM6_XEON_PHI_KNL,           idle_cpu_knl),
+       ICPU(INTEL_FAM6_ATOM_GOLDMONT,          idle_cpu_bxt),
        {}
 };
 MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids);
@@ -1261,13 +1262,13 @@ static void intel_idle_state_table_update(void)
 {
        switch (boot_cpu_data.x86_model) {
 
-       case 0x3e: /* IVT */
+       case INTEL_FAM6_IVYBRIDGE_X:
                ivt_idle_state_table_update();
                break;
-       case 0x5c: /* BXT */
+       case INTEL_FAM6_ATOM_GOLDMONT:
                bxt_idle_state_table_update();
                break;
-       case 0x5e: /* SKL-H */
+       case INTEL_FAM6_SKYLAKE_DESKTOP:
                sklh_idle_state_table_update();
                break;
        }
index 458ffb7..008709c 100644 (file)
@@ -43,6 +43,7 @@
 
 #ifdef CONFIG_X86
 #include <asm/cpu_device_id.h>
+#include <asm/intel-family.h>
 #include <asm/iosf_mbi.h>
 #endif
 
@@ -126,7 +127,7 @@ static const struct sdhci_acpi_chip sdhci_acpi_chip_int = {
 static bool sdhci_acpi_byt(void)
 {
        static const struct x86_cpu_id byt[] = {
-               { X86_VENDOR_INTEL, 6, 0x37 },
+               { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1 },
                {}
        };
 
index f5134ac..815a7c5 100644 (file)
@@ -32,6 +32,7 @@
 #include <linux/suspend.h>
 
 #include <asm/cpu_device_id.h>
+#include <asm/intel-family.h>
 #include <asm/intel_pmc_ipc.h>
 #include <asm/intel_punit_ipc.h>
 #include <asm/intel_telemetry.h>
@@ -331,7 +332,7 @@ static struct telemetry_debugfs_conf telem_apl_debugfs_conf = {
 };
 
 static const struct x86_cpu_id telemetry_debugfs_cpu_ids[] = {
-       TELEM_DEBUGFS_CPU(0x5c, telem_apl_debugfs_conf),
+       TELEM_DEBUGFS_CPU(INTEL_FAM6_ATOM_GOLDMONT, telem_apl_debugfs_conf),
        {}
 };
 
index 09c84a2..6d884f7 100644 (file)
@@ -28,6 +28,7 @@
 #include <linux/platform_device.h>
 
 #include <asm/cpu_device_id.h>
+#include <asm/intel-family.h>
 #include <asm/intel_pmc_ipc.h>
 #include <asm/intel_punit_ipc.h>
 #include <asm/intel_telemetry.h>
@@ -163,7 +164,7 @@ static struct telemetry_plt_config telem_apl_config = {
 };
 
 static const struct x86_cpu_id telemetry_cpu_ids[] = {
-       TELEM_CPU(0x5c, telem_apl_config),
+       TELEM_CPU(INTEL_FAM6_ATOM_GOLDMONT, telem_apl_config),
        {}
 };
 
index b2766b8..2e8f2be 100644 (file)
@@ -33,6 +33,7 @@
 
 #include <asm/processor.h>
 #include <asm/cpu_device_id.h>
+#include <asm/intel-family.h>
 
 /* Local defines */
 #define MSR_PLATFORM_POWER_LIMIT       0x0000065C
@@ -1096,27 +1097,34 @@ static const struct rapl_defaults rapl_defaults_cht = {
                }
 
 static const struct x86_cpu_id rapl_ids[] __initconst = {
-       RAPL_CPU(0x2a, rapl_defaults_core),/* Sandy Bridge */
-       RAPL_CPU(0x2d, rapl_defaults_core),/* Sandy Bridge EP */
-       RAPL_CPU(0x37, rapl_defaults_byt),/* Valleyview */
-       RAPL_CPU(0x3a, rapl_defaults_core),/* Ivy Bridge */
-       RAPL_CPU(0x3c, rapl_defaults_core),/* Haswell */
-       RAPL_CPU(0x3d, rapl_defaults_core),/* Broadwell */
-       RAPL_CPU(0x3f, rapl_defaults_hsw_server),/* Haswell servers */
-       RAPL_CPU(0x4f, rapl_defaults_hsw_server),/* Broadwell servers */
-       RAPL_CPU(0x45, rapl_defaults_core),/* Haswell ULT */
-       RAPL_CPU(0x46, rapl_defaults_core),/* Haswell */
-       RAPL_CPU(0x47, rapl_defaults_core),/* Broadwell-H */
-       RAPL_CPU(0x4E, rapl_defaults_core),/* Skylake */
-       RAPL_CPU(0x4C, rapl_defaults_cht),/* Braswell/Cherryview */
-       RAPL_CPU(0x4A, rapl_defaults_tng),/* Tangier */
-       RAPL_CPU(0x56, rapl_defaults_core),/* Future Xeon */
-       RAPL_CPU(0x5A, rapl_defaults_ann),/* Annidale */
-       RAPL_CPU(0X5C, rapl_defaults_core),/* Broxton */
-       RAPL_CPU(0x5E, rapl_defaults_core),/* Skylake-H/S */
-       RAPL_CPU(0x57, rapl_defaults_hsw_server),/* Knights Landing */
-       RAPL_CPU(0x8E, rapl_defaults_core),/* Kabylake */
-       RAPL_CPU(0x9E, rapl_defaults_core),/* Kabylake */
+       RAPL_CPU(INTEL_FAM6_SANDYBRIDGE,        rapl_defaults_core),
+       RAPL_CPU(INTEL_FAM6_SANDYBRIDGE_X,      rapl_defaults_core),
+
+       RAPL_CPU(INTEL_FAM6_IVYBRIDGE,          rapl_defaults_core),
+
+       RAPL_CPU(INTEL_FAM6_HASWELL_CORE,       rapl_defaults_core),
+       RAPL_CPU(INTEL_FAM6_HASWELL_ULT,        rapl_defaults_core),
+       RAPL_CPU(INTEL_FAM6_HASWELL_GT3E,       rapl_defaults_core),
+       RAPL_CPU(INTEL_FAM6_HASWELL_X,          rapl_defaults_hsw_server),
+
+       RAPL_CPU(INTEL_FAM6_BROADWELL_CORE,     rapl_defaults_core),
+       RAPL_CPU(INTEL_FAM6_BROADWELL_GT3E,     rapl_defaults_core),
+       RAPL_CPU(INTEL_FAM6_BROADWELL_XEON_D,   rapl_defaults_core),
+       RAPL_CPU(INTEL_FAM6_BROADWELL_X,        rapl_defaults_hsw_server),
+
+       RAPL_CPU(INTEL_FAM6_SKYLAKE_DESKTOP,    rapl_defaults_core),
+       RAPL_CPU(INTEL_FAM6_SKYLAKE_MOBILE,     rapl_defaults_core),
+       RAPL_CPU(INTEL_FAM6_SKYLAKE_X,          rapl_defaults_hsw_server),
+       RAPL_CPU(INTEL_FAM6_KABYLAKE_MOBILE,    rapl_defaults_core),
+       RAPL_CPU(INTEL_FAM6_KABYLAKE_DESKTOP,   rapl_defaults_core),
+
+       RAPL_CPU(INTEL_FAM6_ATOM_SILVERMONT1,   rapl_defaults_byt),
+       RAPL_CPU(INTEL_FAM6_ATOM_AIRMONT,       rapl_defaults_cht),
+       RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD1,   rapl_defaults_tng),
+       RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD2,   rapl_defaults_ann),
+       RAPL_CPU(INTEL_FAM6_ATOM_GOLDMONT,      rapl_defaults_core),
+
+       RAPL_CPU(INTEL_FAM6_XEON_PHI_KNL,       rapl_defaults_hsw_server),
        {}
 };
 MODULE_DEVICE_TABLE(x86cpu, rapl_ids);
index 4ebb31a..b2bbaa1 100644 (file)
@@ -18,6 +18,7 @@
 #include <linux/module.h>
 #include <linux/interrupt.h>
 #include <asm/cpu_device_id.h>
+#include <asm/intel-family.h>
 #include "intel_soc_dts_iosf.h"
 
 #define CRITICAL_OFFSET_FROM_TJ_MAX    5000
@@ -42,7 +43,8 @@ static irqreturn_t soc_irq_thread_fn(int irq, void *dev_data)
 }
 
 static const struct x86_cpu_id soc_thermal_ids[] = {
-       { X86_VENDOR_INTEL, X86_FAMILY_ANY, 0x37, 0, BYT_SOC_DTS_APIC_IRQ},
+       { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1, 0,
+               BYT_SOC_DTS_APIC_IRQ},
        {}
 };
 MODULE_DEVICE_TABLE(x86cpu, soc_thermal_ids);