config SPI_CLPS711X
tristate "CLPS711X host SPI controller"
-------- depends on ARCH_CLPS711X
++++++++ depends on ARCH_CLPS711X || COMPILE_TEST
help
This enables dedicated general purpose SPI/Microwire1-compatible
master mode interface (SSI1) for CLPS711X-based CPUs.
tristate "Freescale i.MX SPI controllers"
depends on ARCH_MXC || COMPILE_TEST
select SPI_BITBANG
- ------- default m if IMX_HAVE_PLATFORM_SPI_IMX
help
This enables using the Freescale i.MX SPI controllers in master
mode.
config SPI_FSL_DSPI
tristate "Freescale DSPI controller"
select SPI_BITBANG
++++++++ select REGMAP_MMIO
depends on SOC_VF610 || COMPILE_TEST
help
This enables support for the Freescale DSPI controller in master
def_tristate SPI_PXA2XX && PCI
config SPI_RSPI
-------- tristate "Renesas RSPI controller"
++++++++ tristate "Renesas RSPI/QSPI controller"
depends on (SUPERH && SH_DMAE_BASE) || ARCH_SHMOBILE
help
-------- SPI driver for Renesas RSPI blocks.
++++++++ SPI driver for Renesas RSPI and QSPI blocks.
config SPI_S3C24XX
tristate "Samsung S3C24XX series SPI"
config SPI_DW_MMIO
tristate "Memory-mapped io interface driver for DW SPI core"
-------- depends on SPI_DESIGNWARE && HAVE_CLK
++++++++ depends on SPI_DESIGNWARE
#
# There are lots of SPI device types, with sensors and memory
* published by the Free Software Foundation.
*/
-- ------#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/errno.h>
#include <linux/module.h>
static int altera_spi_probe(struct platform_device *pdev)
{
-------- struct altera_spi_platform_data *platp = dev_get_platdata(&pdev->dev);
struct altera_spi *hw;
struct spi_master *master;
struct resource *res;
master->bus_num = pdev->id;
master->num_chipselect = 16;
master->mode_bits = SPI_CS_HIGH;
++++++++ master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
++++++++ master->dev.of_node = pdev->dev.of_node;
hw = spi_master_get_devdata(master);
platform_set_drvdata(pdev, hw);
if (err)
goto exit;
}
-------- /* find platform data */
-------- if (!platp)
-------- hw->bitbang.master->dev.of_node = pdev->dev.of_node;
/* register our spi controller */
err = spi_bitbang_start(&hw->bitbang);
#include <linux/kernel.h>
#include <linux/module.h>
-- ------#include <linux/init.h>
#include <linux/delay.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>
flags = GPIOF_DIR_OUT;
if (spi->mode & SPI_CS_HIGH)
-------- flags |= GPIOF_INIT_HIGH;
-------- else
flags |= GPIOF_INIT_LOW;
++++++++ else
++++++++ flags |= GPIOF_INIT_HIGH;
status = gpio_request_one(cdata->gpio, flags,
dev_name(&spi->dev));
*/
#include <linux/kernel.h>
-- ------#include <linux/init.h>
#include <linux/clk.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/gpio.h>
++++++++#include <linux/pinctrl/consumer.h>
/* SPI register offsets */
#define SPI_CR 0x0000
as = spi_master_get_devdata(spi->master);
--- ---- if (spi->chip_select > spi->master->num_chipselect) {
--- ---- dev_dbg(&spi->dev,
--- ---- "setup: invalid chipselect %u (%u defined)\n",
--- ---- spi->chip_select, spi->master->num_chipselect);
--- ---- return -EINVAL;
--- ---- }
--- ----
/* see notes above re chipselect */
if (!atmel_spi_is_v2(as)
&& spi->chip_select == 0
}
}
-------- if (xfer->bits_per_word > 8) {
-------- if (xfer->len % 2) {
-------- dev_dbg(&spi->dev,
-------- "buffer len should be 16 bits aligned\n");
-------- return -EINVAL;
-------- }
-------- }
--------
/*
* DMA map early, for performance (empties dcache ASAP) and
* better fault reporting.
dev_dbg(&spi->dev, "new message %p submitted for %s\n",
msg, dev_name(&spi->dev));
-------- if (unlikely(list_empty(&msg->transfers)))
-------- return -EINVAL;
--------
atmel_spi_lock(as);
cs_activate(as, spi);
list_for_each_entry(xfer, &msg->transfers, transfer_list) {
dev_dbg(&spi->dev,
-------- " xfer %p: len %u tx %p/%08x rx %p/%08x\n",
++++++++ " xfer %p: len %u tx %p/%pad rx %p/%pad\n",
xfer, xfer->len,
-------- xfer->tx_buf, xfer->tx_dma,
-------- xfer->rx_buf, xfer->rx_dma);
++++++++ xfer->tx_buf, &xfer->tx_dma,
++++++++ xfer->rx_buf, &xfer->rx_dma);
}
msg_done:
struct spi_master *master;
struct atmel_spi *as;
++++++++ /* Select default pin state */
++++++++ pinctrl_pm_select_default_state(&pdev->dev);
++++++++
regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!regs)
return -ENXIO;
{
struct spi_master *master = dev_get_drvdata(dev);
struct atmel_spi *as = spi_master_get_devdata(master);
++++++++ int ret;
++++++++
++++++++ /* Stop the queue running */
++++++++ ret = spi_master_suspend(master);
++++++++ if (ret) {
++++++++ dev_warn(dev, "cannot suspend master\n");
++++++++ return ret;
++++++++ }
clk_disable_unprepare(as->clk);
++++++++
++++++++ pinctrl_pm_select_sleep_state(dev);
++++++++
return 0;
}
{
struct spi_master *master = dev_get_drvdata(dev);
struct atmel_spi *as = spi_master_get_devdata(master);
++++++++ int ret;
++++++++
++++++++ pinctrl_pm_select_default_state(dev);
clk_prepare_enable(as->clk);
-------- return 0;
++++++++
++++++++ /* Start the queue running */
++++++++ ret = spi_master_resume(master);
++++++++ if (ret)
++++++++ dev_err(dev, "problem starting queue (%d)\n", ret);
++++++++
++++++++ return ret;
}
static SIMPLE_DEV_PM_OPS(atmel_spi_pm_ops, atmel_spi_suspend, atmel_spi_resume);
*/
#include <linux/kernel.h>
-- ------#include <linux/init.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/module.h>
#include <bcm63xx_dev_spi.h>
--------#define PFX KBUILD_MODNAME
--------
#define BCM63XX_SPI_MAX_PREPEND 15
struct bcm63xx_spi {
transfer_list);
}
-------- init_completion(&bs->done);
++++++++ reinit_completion(&bs->done);
/* Fill in the Message control register */
msg_ctl = (len << SPI_BYTE_CNT_SHIFT);
}
bs = spi_master_get_devdata(master);
++++++++ init_completion(&bs->done);
platform_set_drvdata(pdev, master);
bs->pdev = pdev;
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-- ------#include <linux/init.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>
#include <linux/interrupt.h>
/**
* spi_bitbang_stop - stops the task providing spi communication
*/
--------int spi_bitbang_stop(struct spi_bitbang *bitbang)
++++++++void spi_bitbang_stop(struct spi_bitbang *bitbang)
{
spi_unregister_master(bitbang->master);
--------
-------- return 0;
}
EXPORT_SYMBOL_GPL(spi_bitbang_stop);
#include <linux/io.h>
#include <linux/clk.h>
-- ------#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
++++++++#include <linux/regmap.h>
++++++++#include <linux/mfd/syscon.h>
++++++++#include <linux/mfd/syscon/clps711x.h>
#include <linux/spi/spi.h>
#include <linux/platform_data/spi-clps711x.h>
--------#include <mach/hardware.h>
--------
#define DRIVER_NAME "spi-clps711x"
--------struct spi_clps711x_data {
-------- struct completion done;
++++++++#define SYNCIO_FRMLEN(x) ((x) << 8)
++++++++#define SYNCIO_TXFRMEN (1 << 14)
++++++++struct spi_clps711x_data {
++++++++ void __iomem *syncio;
++++++++ struct regmap *syscon;
++++++++ struct regmap *syscon1;
struct clk *spi_clk;
-------- u32 max_speed_hz;
u8 *tx_buf;
u8 *rx_buf;
-------- int count;
++++++++ unsigned int bpw;
int len;
--------
-------- int chipselect[0];
};
static int spi_clps711x_setup(struct spi_device *spi)
{
-------- struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master);
--------
/* We are expect that SPI-device is not selected */
-------- gpio_direction_output(hw->chipselect[spi->chip_select],
-------- !(spi->mode & SPI_CS_HIGH));
++++++++ gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH));
return 0;
}
--------static void spi_clps711x_setup_mode(struct spi_device *spi)
--------{
-------- /* Setup edge for transfer */
-------- if (spi->mode & SPI_CPHA)
-------- clps_writew(clps_readw(SYSCON3) | SYSCON3_ADCCKNSEN, SYSCON3);
-------- else
-------- clps_writew(clps_readw(SYSCON3) & ~SYSCON3_ADCCKNSEN, SYSCON3);
--------}
--------
--------static int spi_clps711x_setup_xfer(struct spi_device *spi,
-------- struct spi_transfer *xfer)
++++++++static void spi_clps711x_setup_xfer(struct spi_device *spi,
++++++++ struct spi_transfer *xfer)
{
-------- u32 speed = xfer->speed_hz ? : spi->max_speed_hz;
-------- u8 bpw = xfer->bits_per_word;
-------- struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master);
--------
-------- if (bpw != 8) {
-------- dev_err(&spi->dev, "Unsupported master bus width %i\n", bpw);
-------- return -EINVAL;
-------- }
++++++++ struct spi_master *master = spi->master;
++++++++ struct spi_clps711x_data *hw = spi_master_get_devdata(master);
/* Setup SPI frequency divider */
-------- if (!speed || (speed >= hw->max_speed_hz))
-------- clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) |
-------- SYSCON1_ADCKSEL(3), SYSCON1);
-------- else if (speed >= (hw->max_speed_hz / 2))
-------- clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) |
-------- SYSCON1_ADCKSEL(2), SYSCON1);
-------- else if (speed >= (hw->max_speed_hz / 8))
-------- clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) |
-------- SYSCON1_ADCKSEL(1), SYSCON1);
++++++++ if (xfer->speed_hz >= master->max_speed_hz)
++++++++ regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
++++++++ SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(3));
++++++++ else if (xfer->speed_hz >= (master->max_speed_hz / 2))
++++++++ regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
++++++++ SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(2));
++++++++ else if (xfer->speed_hz >= (master->max_speed_hz / 8))
++++++++ regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
++++++++ SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(1));
else
-------- clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) |
-------- SYSCON1_ADCKSEL(0), SYSCON1);
--------
-------- return 0;
++++++++ regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
++++++++ SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(0));
}
--------static int spi_clps711x_transfer_one_message(struct spi_master *master,
-------- struct spi_message *msg)
++++++++static int spi_clps711x_prepare_message(struct spi_master *master,
++++++++ struct spi_message *msg)
{
struct spi_clps711x_data *hw = spi_master_get_devdata(master);
-------- struct spi_transfer *xfer;
-------- int status = 0, cs = hw->chipselect[msg->spi->chip_select];
-------- u32 data;
--------
-------- spi_clps711x_setup_mode(msg->spi);
--------
-------- list_for_each_entry(xfer, &msg->transfers, transfer_list) {
-------- if (spi_clps711x_setup_xfer(msg->spi, xfer)) {
-------- status = -EINVAL;
-------- goto out_xfr;
-------- }
++++++++ struct spi_device *spi = msg->spi;
-------- gpio_set_value(cs, !!(msg->spi->mode & SPI_CS_HIGH));
--------
-------- reinit_completion(&hw->done);
--------
-------- hw->count = 0;
-------- hw->len = xfer->len;
-------- hw->tx_buf = (u8 *)xfer->tx_buf;
-------- hw->rx_buf = (u8 *)xfer->rx_buf;
--------
-------- /* Initiate transfer */
-------- data = hw->tx_buf ? hw->tx_buf[hw->count] : 0;
-------- clps_writel(data | SYNCIO_FRMLEN(8) | SYNCIO_TXFRMEN, SYNCIO);
--------
-------- wait_for_completion(&hw->done);
++++++++ /* Setup mode for transfer */
++++++++ return regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCKNSEN,
++++++++ (spi->mode & SPI_CPHA) ?
++++++++ SYSCON3_ADCCKNSEN : 0);
++++++++}
-------- if (xfer->delay_usecs)
-------- udelay(xfer->delay_usecs);
++++++++static int spi_clps711x_transfer_one(struct spi_master *master,
++++++++ struct spi_device *spi,
++++++++ struct spi_transfer *xfer)
++++++++{
++++++++ struct spi_clps711x_data *hw = spi_master_get_devdata(master);
++++++++ u8 data;
-------- if (xfer->cs_change ||
-------- list_is_last(&xfer->transfer_list, &msg->transfers))
-------- gpio_set_value(cs, !(msg->spi->mode & SPI_CS_HIGH));
++++++++ spi_clps711x_setup_xfer(spi, xfer);
-------- msg->actual_length += xfer->len;
-------- }
++++++++ hw->len = xfer->len;
++++++++ hw->bpw = xfer->bits_per_word;
++++++++ hw->tx_buf = (u8 *)xfer->tx_buf;
++++++++ hw->rx_buf = (u8 *)xfer->rx_buf;
--------out_xfr:
-------- msg->status = status;
-------- spi_finalize_current_message(master);
++++++++ /* Initiate transfer */
++++++++ data = hw->tx_buf ? *hw->tx_buf++ : 0;
++++++++ writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, hw->syncio);
-------- return 0;
++++++++ return 1;
}
static irqreturn_t spi_clps711x_isr(int irq, void *dev_id)
{
-------- struct spi_clps711x_data *hw = (struct spi_clps711x_data *)dev_id;
-------- u32 data;
++++++++ struct spi_master *master = dev_id;
++++++++ struct spi_clps711x_data *hw = spi_master_get_devdata(master);
++++++++ u8 data;
/* Handle RX */
-------- data = clps_readb(SYNCIO);
++++++++ data = readb(hw->syncio);
if (hw->rx_buf)
-------- hw->rx_buf[hw->count] = (u8)data;
--------
-------- hw->count++;
++++++++ *hw->rx_buf++ = data;
/* Handle TX */
-------- if (hw->count < hw->len) {
-------- data = hw->tx_buf ? hw->tx_buf[hw->count] : 0;
-------- clps_writel(data | SYNCIO_FRMLEN(8) | SYNCIO_TXFRMEN, SYNCIO);
++++++++ if (--hw->len > 0) {
++++++++ data = hw->tx_buf ? *hw->tx_buf++ : 0;
++++++++ writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN,
++++++++ hw->syncio);
} else
-------- complete(&hw->done);
++++++++ spi_finalize_current_transfer(master);
return IRQ_HANDLED;
}
static int spi_clps711x_probe(struct platform_device *pdev)
{
-------- int i, ret;
-------- struct spi_master *master;
struct spi_clps711x_data *hw;
struct spi_clps711x_pdata *pdata = dev_get_platdata(&pdev->dev);
++++++++ struct spi_master *master;
++++++++ struct resource *res;
++++++++ int i, irq, ret;
if (!pdata) {
dev_err(&pdev->dev, "No platform data supplied\n");
return -EINVAL;
}
-------- master = spi_alloc_master(&pdev->dev,
-------- sizeof(struct spi_clps711x_data) +
-------- sizeof(int) * pdata->num_chipselect);
-------- if (!master) {
-------- dev_err(&pdev->dev, "SPI allocating memory error\n");
++++++++ irq = platform_get_irq(pdev, 0);
++++++++ if (irq < 0)
++++++++ return irq;
++++++++
++++++++ master = spi_alloc_master(&pdev->dev, sizeof(*hw));
++++++++ if (!master)
return -ENOMEM;
++++++++
++++++++ master->cs_gpios = devm_kzalloc(&pdev->dev, sizeof(int) *
++++++++ pdata->num_chipselect, GFP_KERNEL);
++++++++ if (!master->cs_gpios) {
++++++++ ret = -ENOMEM;
++++++++ goto err_out;
}
master->bus_num = pdev->id;
master->mode_bits = SPI_CPHA | SPI_CS_HIGH;
-------- master->bits_per_word_mask = SPI_BPW_MASK(8);
++++++++ master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 8);
master->num_chipselect = pdata->num_chipselect;
master->setup = spi_clps711x_setup;
-------- master->transfer_one_message = spi_clps711x_transfer_one_message;
++++++++ master->prepare_message = spi_clps711x_prepare_message;
++++++++ master->transfer_one = spi_clps711x_transfer_one;
hw = spi_master_get_devdata(master);
for (i = 0; i < master->num_chipselect; i++) {
-------- hw->chipselect[i] = pdata->chipselect[i];
-------- if (!gpio_is_valid(hw->chipselect[i])) {
-------- dev_err(&pdev->dev, "Invalid CS GPIO %i\n", i);
-------- ret = -EINVAL;
-------- goto err_out;
-------- }
-------- if (devm_gpio_request(&pdev->dev, hw->chipselect[i], NULL)) {
++++++++ master->cs_gpios[i] = pdata->chipselect[i];
++++++++ ret = devm_gpio_request(&pdev->dev, master->cs_gpios[i],
++++++++ DRIVER_NAME);
++++++++ if (ret) {
dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i);
-------- ret = -EINVAL;
goto err_out;
}
}
ret = PTR_ERR(hw->spi_clk);
goto err_out;
}
-------- hw->max_speed_hz = clk_get_rate(hw->spi_clk);
++++++++ master->max_speed_hz = clk_get_rate(hw->spi_clk);
-------- init_completion(&hw->done);
platform_set_drvdata(pdev, master);
++++++++ hw->syscon = syscon_regmap_lookup_by_pdevname("syscon.3");
++++++++ if (IS_ERR(hw->syscon)) {
++++++++ ret = PTR_ERR(hw->syscon);
++++++++ goto err_out;
++++++++ }
++++++++
++++++++ hw->syscon1 = syscon_regmap_lookup_by_pdevname("syscon.1");
++++++++ if (IS_ERR(hw->syscon1)) {
++++++++ ret = PTR_ERR(hw->syscon1);
++++++++ goto err_out;
++++++++ }
++++++++
++++++++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++++++++ hw->syncio = devm_ioremap_resource(&pdev->dev, res);
++++++++ if (IS_ERR(hw->syncio)) {
++++++++ ret = PTR_ERR(hw->syncio);
++++++++ goto err_out;
++++++++ }
++++++++
/* Disable extended mode due hardware problems */
-------- clps_writew(clps_readw(SYSCON3) & ~SYSCON3_ADCCON, SYSCON3);
++++++++ regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCON, 0);
/* Clear possible pending interrupt */
-------- clps_readl(SYNCIO);
++++++++ readl(hw->syncio);
-------- ret = devm_request_irq(&pdev->dev, IRQ_SSEOTI, spi_clps711x_isr, 0,
-------- dev_name(&pdev->dev), hw);
-------- if (ret) {
-------- dev_err(&pdev->dev, "Can't request IRQ\n");
++++++++ ret = devm_request_irq(&pdev->dev, irq, spi_clps711x_isr, 0,
++++++++ dev_name(&pdev->dev), master);
++++++++ if (ret)
goto err_out;
-------- }
ret = devm_spi_register_master(&pdev->dev, master);
if (!ret) {
dev_info(&pdev->dev,
"SPI bus driver initialized. Master clock %u Hz\n",
-------- hw->max_speed_hz);
++++++++ master->max_speed_hz);
return 0;
}
*/
#include <linux/kernel.h>
#include <linux/module.h>
-- ------#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/of.h>
/*
* ... otherwise, take it from spi->controller_data
*/
-------- cs = (unsigned int) spi->controller_data;
++++++++ cs = (unsigned int)(uintptr_t) spi->controller_data;
}
if (!spi->controller_state) {
{
struct spi_gpio *spi_gpio;
struct spi_gpio_platform_data *pdata;
-------- int status;
spi_gpio = platform_get_drvdata(pdev);
pdata = dev_get_platdata(&pdev->dev);
/* stop() unregisters child devices too */
-------- status = spi_bitbang_stop(&spi_gpio->bitbang);
++++++++ spi_bitbang_stop(&spi_gpio->bitbang);
if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO)
gpio_free(SPI_MISO_GPIO);
gpio_free(SPI_SCK_GPIO);
spi_master_put(spi_gpio->bitbang.master);
-------- return status;
++++++++ return 0;
}
MODULE_ALIAS("platform:" DRIVER_NAME);
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/gpio.h>
-- ------#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
spi_imx->count = transfer->len;
spi_imx->txfifo = 0;
-------- init_completion(&spi_imx->xfer_done);
++++++++ reinit_completion(&spi_imx->xfer_done);
spi_imx_push(spi_imx);
spi_imx->irq = platform_get_irq(pdev, 0);
if (spi_imx->irq < 0) {
- ------- ret = -EINVAL;
+ +++++++ ret = spi_imx->irq;
goto out_master_put;
}
ret = devm_request_irq(&pdev->dev, spi_imx->irq, spi_imx_isr, 0,
- ------- DRIVER_NAME, spi_imx);
+ +++++++ dev_name(&pdev->dev), spi_imx);
if (ret) {
dev_err(&pdev->dev, "can't get irq%d: %d\n", spi_imx->irq, ret);
goto out_master_put;
spi_bitbang_stop(&spi_imx->bitbang);
writel(0, spi_imx->base + MXC_CSPICTRL);
-------- clk_disable_unprepare(spi_imx->clk_ipg);
-------- clk_disable_unprepare(spi_imx->clk_per);
++++++++ clk_unprepare(spi_imx->clk_ipg);
++++++++ clk_unprepare(spi_imx->clk_per);
spi_master_put(master);
return 0;
#include <linux/module.h>
#include <linux/kernel.h>
-- ------#include <linux/init.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/of_address.h>
gpio_set_value(spi->cs_gpio, onoff);
}
--- -----/* bus_num is used only for the case dev->platform_data == NULL */
static int mpc512x_psc_spi_do_probe(struct device *dev, u32 regaddr,
--- ----- u32 size, unsigned int irq,
--- ----- s16 bus_num)
+++ +++++ u32 size, unsigned int irq)
{
struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
struct mpc512x_psc_spi *mps;
if (pdata == NULL) {
mps->cs_control = mpc512x_spi_cs_control;
--- ----- master->bus_num = bus_num;
} else {
mps->cs_control = pdata->cs_control;
master->bus_num = pdata->bus_num;
{
const u32 *regaddr_p;
u64 regaddr64, size64;
--- ----- s16 id = -1;
regaddr_p = of_get_address(op->dev.of_node, 0, &size64, NULL);
if (!regaddr_p) {
}
regaddr64 = of_translate_address(op->dev.of_node, regaddr_p);
--- ----- /* get PSC id (0..11, used by port_config) */
--- ----- id = of_alias_get_id(op->dev.of_node, "spi");
--- ----- if (id < 0) {
--- ----- dev_err(&op->dev, "no alias id for %s\n",
--- ----- op->dev.of_node->full_name);
--- ----- return id;
--- ----- }
--- -----
return mpc512x_psc_spi_do_probe(&op->dev, (u32) regaddr64, (u32) size64,
--- ----- irq_of_parse_and_map(op->dev.of_node, 0), id);
+++ +++++ irq_of_parse_and_map(op->dev.of_node, 0));
}
static int mpc512x_psc_spi_of_remove(struct platform_device *op)
*/
#include <linux/module.h>
-- ------#include <linux/init.h>
#include <linux/errno.h>
#include <linux/of_platform.h>
#include <linux/interrupt.h>
* spi_master ops
*/
---- ----static int mpc52xx_spi_setup(struct spi_device *spi)
---- ----{
---- ---- if (spi->bits_per_word % 8)
---- ---- return -EINVAL;
---- ----
---- ---- if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST))
--- ---- return -EINVAL;
--- ----
--- ---- if (spi->chip_select >= spi->master->num_chipselect)
---- ---- return -EINVAL;
---- ----
---- ---- return 0;
---- ----}
---- ----
static int mpc52xx_spi_transfer(struct spi_device *spi, struct spi_message *m)
{
struct mpc52xx_spi *ms = spi_master_get_devdata(spi->master);
goto err_alloc;
}
---- ---- master->setup = mpc52xx_spi_setup;
master->transfer = mpc52xx_spi_transfer;
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
++++ ++++ master->bits_per_word_mask = SPI_BPW_MASK(8);
master->dev.of_node = op->dev.of_node;
platform_set_drvdata(op, master);
*/
#include <linux/kernel.h>
-- ------#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/of.h>
#include <linux/of_device.h>
{
struct mxs_spi *spi = spi_master_get_devdata(master);
struct mxs_ssp *ssp = &spi->ssp;
----- --- struct spi_transfer *t, *tmp_t;
+++++ +++ struct spi_transfer *t;
unsigned int flag;
int status = 0;
writel(mxs_spi_cs_to_reg(m->spi->chip_select),
ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
----- --- list_for_each_entry_safe(t, tmp_t, &m->transfers, transfer_list) {
+++++ +++ list_for_each_entry(t, &m->transfers, transfer_list) {
status = mxs_spi_setup_transfer(m->spi, t);
if (status)
iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
irq_err = platform_get_irq(pdev, 0);
if (irq_err < 0)
----- --- return -EINVAL;
+++++ +++ return irq_err;
base = devm_ioremap_resource(&pdev->dev, iores);
if (IS_ERR(base))
*/
#include <linux/module.h>
-- ------#include <linux/init.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>
#include <linux/interrupt.h>
/* usi register bit */
#define ENINT (0x01 << 17)
#define ENFLG (0x01 << 16)
++++++ ++#define SLEEP (0x0f << 12)
#define TXNUM (0x03 << 8)
++++++ ++#define TXBITLEN (0x1f << 3)
#define TXNEG (0x01 << 2)
#define RXNEG (0x01 << 1)
#define LSB (0x01 << 10)
unsigned char *rx;
struct clk *clk;
struct spi_master *master;
------ -- struct spi_device *curdev;
------ -- struct device *dev;
struct nuc900_spi_info *pdata;
spinlock_t lock;
------ -- struct resource *res;
};
static inline struct nuc900_spi *to_hw(struct spi_device *sdev)
}
}
------ --static void nuc900_spi_setup_txnum(struct nuc900_spi *hw,
------ -- unsigned int txnum)
++++++ ++static void nuc900_spi_setup_txnum(struct nuc900_spi *hw, unsigned int txnum)
{
unsigned int val;
unsigned long flags;
spin_lock_irqsave(&hw->lock, flags);
------ -- val = __raw_readl(hw->regs + USI_CNT);
++++++ ++ val = __raw_readl(hw->regs + USI_CNT) & ~TXNUM;
------ -- if (!txnum)
------ -- val &= ~TXNUM;
------ -- else
++++++ ++ if (txnum)
val |= txnum << 0x08;
__raw_writel(val, hw->regs + USI_CNT);
spin_lock_irqsave(&hw->lock, flags);
------ -- val = __raw_readl(hw->regs + USI_CNT);
++++++ ++ val = __raw_readl(hw->regs + USI_CNT) & ~TXBITLEN;
val |= (txbitlen << 0x03);
spin_lock_irqsave(&hw->lock, flags);
------ -- val = __raw_readl(hw->regs + USI_CNT);
++++++ ++ val = __raw_readl(hw->regs + USI_CNT) & ~SLEEP;
if (sleep)
val |= (sleep << 12);
------ -- else
------ -- val &= ~(0x0f << 12);
++++++ ++
__raw_writel(val, hw->regs + USI_CNT);
spin_unlock_irqrestore(&hw->lock, flags);
{
struct nuc900_spi *hw;
struct spi_master *master;
++++++ ++ struct resource *res;
int err = 0;
master = spi_alloc_master(&pdev->dev, sizeof(struct nuc900_spi));
hw = spi_master_get_devdata(master);
hw->master = master;
hw->pdata = dev_get_platdata(&pdev->dev);
------ -- hw->dev = &pdev->dev;
if (hw->pdata == NULL) {
dev_err(&pdev->dev, "No platform data supplied\n");
init_completion(&hw->done);
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
++++++++ if (hw->pdata->lsb)
++++++++ master->mode_bits |= SPI_LSB_FIRST;
master->num_chipselect = hw->pdata->num_cs;
master->bus_num = hw->pdata->bus_num;
hw->bitbang.master = hw->master;
hw->bitbang.chipselect = nuc900_spi_chipsel;
hw->bitbang.txrx_bufs = nuc900_spi_txrx;
------ -- hw->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
------ -- hw->regs = devm_ioremap_resource(&pdev->dev, hw->res);
++++++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++++++ ++ hw->regs = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(hw->regs)) {
err = PTR_ERR(hw->regs);
goto err_pdata;
* published by the Free Software Foundation.
*/
-- ------#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/errno.h>
#include <linux/module.h>
/* setup the state for the bitbang driver */
hw->bitbang.master = master;
------- - if (!hw->bitbang.master)
------- - return err;
hw->bitbang.setup_transfer = tiny_spi_setup_transfer;
hw->bitbang.chipselect = tiny_spi_chipselect;
hw->bitbang.txrx_bufs = tiny_spi_txrx_bufs;
#include <linux/spi/spi.h>
#include <linux/module.h>
#include <linux/delay.h>
-- ------#include <linux/init.h>
#include <linux/io.h>
#include <linux/of.h>
u64 cs_enax;
};
-------- struct octeon_spi_setup {
-------- u32 max_speed_hz;
-------- u8 chip_select;
-------- u8 mode;
-------- u8 bits_per_word;
-------- };
--------
static void octeon_spi_wait_ready(struct octeon_spi *p)
{
union cvmx_mpi_sts mpi_sts;
struct spi_transfer *xfer,
bool last_xfer)
{
++++++++ struct spi_device *spi = msg->spi;
union cvmx_mpi_cfg mpi_cfg;
union cvmx_mpi_tx mpi_tx;
unsigned int clkdiv;
int len;
int i;
-------- struct octeon_spi_setup *msg_setup = spi_get_ctldata(msg->spi);
--------
-------- speed_hz = msg_setup->max_speed_hz;
-------- mode = msg_setup->mode;
++++++++ mode = spi->mode;
cpha = mode & SPI_CPHA;
cpol = mode & SPI_CPOL;
-------- if (xfer->speed_hz)
-------- speed_hz = xfer->speed_hz;
--------
-------- if (speed_hz > OCTEON_SPI_MAX_CLOCK_HZ)
-------- speed_hz = OCTEON_SPI_MAX_CLOCK_HZ;
++++++++ speed_hz = xfer->speed_hz ? : spi->max_speed_hz;
clkdiv = octeon_get_io_clock_rate() / (2 * speed_hz);
mpi_cfg.s.cslate = cpha ? 1 : 0;
mpi_cfg.s.enable = 1;
-------- if (msg_setup->chip_select < 4)
-------- p->cs_enax |= 1ull << (12 + msg_setup->chip_select);
++++++++ if (spi->chip_select < 4)
++++++++ p->cs_enax |= 1ull << (12 + spi->chip_select);
mpi_cfg.u64 |= p->cs_enax;
if (mpi_cfg.u64 != p->last_cfg) {
cvmx_write_csr(p->register_base + OCTEON_SPI_DAT0 + (8 * i), d);
}
mpi_tx.u64 = 0;
-------- mpi_tx.s.csid = msg_setup->chip_select;
++++++++ mpi_tx.s.csid = spi->chip_select;
mpi_tx.s.leavecs = 1;
mpi_tx.s.txnum = tx_buf ? OCTEON_SPI_MAX_BYTES : 0;
mpi_tx.s.totnum = OCTEON_SPI_MAX_BYTES;
}
mpi_tx.u64 = 0;
-------- mpi_tx.s.csid = msg_setup->chip_select;
++++++++ mpi_tx.s.csid = spi->chip_select;
if (last_xfer)
mpi_tx.s.leavecs = xfer->cs_change;
else
int status = 0;
struct spi_transfer *xfer;
-------- /*
-------- * We better have set the configuration via a call to .setup
-------- * before we get here.
-------- */
-------- if (spi_get_ctldata(msg->spi) == NULL) {
-------- status = -EINVAL;
-------- goto err;
-------- }
--------
list_for_each_entry(xfer, &msg->transfers, transfer_list) {
-------- bool last_xfer = &xfer->transfer_list == msg->transfers.prev;
++++++++ bool last_xfer = list_is_last(&xfer->transfer_list,
++++++++ &msg->transfers);
int r = octeon_spi_do_transfer(p, msg, xfer, last_xfer);
if (r < 0) {
status = r;
return status;
}
-------- static struct octeon_spi_setup *octeon_spi_new_setup(struct spi_device *spi)
-------- {
-------- struct octeon_spi_setup *setup = kzalloc(sizeof(*setup), GFP_KERNEL);
-------- if (!setup)
-------- return NULL;
--------
-------- setup->max_speed_hz = spi->max_speed_hz;
-------- setup->chip_select = spi->chip_select;
-------- setup->mode = spi->mode;
-------- setup->bits_per_word = spi->bits_per_word;
-------- return setup;
-------- }
--------
-------- static int octeon_spi_setup(struct spi_device *spi)
-------- {
-------- struct octeon_spi_setup *new_setup;
-------- struct octeon_spi_setup *old_setup = spi_get_ctldata(spi);
--------
-------- new_setup = octeon_spi_new_setup(spi);
-------- if (!new_setup)
-------- return -ENOMEM;
--------
-------- spi_set_ctldata(spi, new_setup);
-------- kfree(old_setup);
--------
-------- return 0;
-------- }
--------
-------- static void octeon_spi_cleanup(struct spi_device *spi)
-------- {
-------- struct octeon_spi_setup *old_setup = spi_get_ctldata(spi);
-------- spi_set_ctldata(spi, NULL);
-------- kfree(old_setup);
-------- }
--------
static int octeon_spi_probe(struct platform_device *pdev)
{
struct resource *res_mem;
p->register_base = (u64)devm_ioremap(&pdev->dev, res_mem->start,
resource_size(res_mem));
-------- /* Dynamic bus numbering */
-------- master->bus_num = -1;
master->num_chipselect = 4;
master->mode_bits = SPI_CPHA |
SPI_CPOL |
SPI_LSB_FIRST |
SPI_3WIRE;
-------- master->setup = octeon_spi_setup;
-------- master->cleanup = octeon_spi_cleanup;
master->transfer_one_message = octeon_spi_transfer_one_message;
master->bits_per_word_mask = SPI_BPW_MASK(8);
++++++++ master->max_speed_hz = OCTEON_SPI_MAX_CLOCK_HZ;
master->dev.of_node = pdev->dev.of_node;
err = devm_spi_register_master(&pdev->dev, master);
#include <linux/dma-mapping.h>
#include <linux/dmapool.h>
#include <linux/err.h>
-- ------#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
void __iomem *base;
phys_addr_t phys;
unsigned irq;
--- ---- u32 spi_max_frequency;
u32 cur_speed;
struct spi_device *cur_spi;
spi->mode & SPI_CPHA ? "" : "~",
spi->max_speed_hz);
--- ---- BUG_ON(spi->chip_select >= MAX_CHIP_SELECT);
--- ----
--- ---- /* Set speed to the spi max fequency if spi device has not set */
--- ---- spi->max_speed_hz = spi->max_speed_hz ? : tspi->spi_max_frequency;
--- ----
ret = pm_runtime_get_sync(tspi->dev);
if (ret < 0) {
dev_err(tspi->dev, "pm runtime failed, e = %d\n", ret);
return IRQ_WAKE_THREAD;
}
--- ----static void tegra_spi_parse_dt(struct platform_device *pdev,
--- ---- struct tegra_spi_data *tspi)
--- ----{
--- ---- struct device_node *np = pdev->dev.of_node;
--- ----
--- ---- if (of_property_read_u32(np, "spi-max-frequency",
--- ---- &tspi->spi_max_frequency))
--- ---- tspi->spi_max_frequency = 25000000; /* 25MHz */
--- ----}
--- ----
static struct of_device_id tegra_spi_of_match[] = {
{ .compatible = "nvidia,tegra114-spi", },
{}
platform_set_drvdata(pdev, master);
tspi = spi_master_get_devdata(master);
--- ---- /* Parse DT */
--- ---- tegra_spi_parse_dt(pdev, tspi);
+++ ++++ if (of_property_read_u32(pdev->dev.of_node, "spi-max-frequency",
+++ ++++ &master->max_speed_hz))
+++ ++++ master->max_speed_hz = 25000000; /* 25MHz */
/* the spi->mode bits understood by this driver: */
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
master->setup = tegra_spi_setup;
master->transfer_one_message = tegra_spi_transfer_one_message;
master->num_chipselect = MAX_CHIP_SELECT;
-------- master->bus_num = -1;
master->auto_runtime_pm = true;
tspi->master = master;
#include <linux/completion.h>
#include <linux/delay.h>
#include <linux/err.h>
-- ------#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
struct reset_control *rst;
void __iomem *base;
unsigned irq;
--- ---- u32 spi_max_frequency;
u32 cur_speed;
struct spi_device *cur_spi;
return tegra_sflash_start_cpu_based_transfer(tsd, t);
}
--- ----static int tegra_sflash_setup(struct spi_device *spi)
--- ----{
--- ---- struct tegra_sflash_data *tsd = spi_master_get_devdata(spi->master);
--- ----
--- ---- /* Set speed to the spi max fequency if spi device has not set */
--- ---- spi->max_speed_hz = spi->max_speed_hz ? : tsd->spi_max_frequency;
--- ---- return 0;
--- ----}
--- ----
static int tegra_sflash_transfer_one_message(struct spi_master *master,
struct spi_message *msg)
{
return handle_cpu_based_xfer(tsd);
}
--- ----static void tegra_sflash_parse_dt(struct tegra_sflash_data *tsd)
--- ----{
--- ---- struct device_node *np = tsd->dev->of_node;
--- ----
--- ---- if (of_property_read_u32(np, "spi-max-frequency",
--- ---- &tsd->spi_max_frequency))
--- ---- tsd->spi_max_frequency = 25000000; /* 25MHz */
--- ----}
--- ----
static struct of_device_id tegra_sflash_of_match[] = {
{ .compatible = "nvidia,tegra20-sflash", },
{}
/* the spi->mode bits understood by this driver: */
master->mode_bits = SPI_CPOL | SPI_CPHA;
--- ---- master->setup = tegra_sflash_setup;
master->transfer_one_message = tegra_sflash_transfer_one_message;
master->auto_runtime_pm = true;
master->num_chipselect = MAX_CHIP_SELECT;
-------- master->bus_num = -1;
platform_set_drvdata(pdev, master);
tsd = spi_master_get_devdata(master);
tsd->dev = &pdev->dev;
spin_lock_init(&tsd->lock);
--- ---- tegra_sflash_parse_dt(tsd);
+++ ++++ if (of_property_read_u32(tsd->dev->of_node, "spi-max-frequency",
+++ ++++ &master->max_speed_hz))
+++ ++++ master->max_speed_hz = 25000000; /* 25MHz */
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
tsd->base = devm_ioremap_resource(&pdev->dev, r);
#include <linux/dma-mapping.h>
#include <linux/dmapool.h>
#include <linux/err.h>
-- ------#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
void __iomem *base;
phys_addr_t phys;
unsigned irq;
--- ---- u32 spi_max_frequency;
u32 cur_speed;
struct spi_device *cur_spi;
spi->mode & SPI_CPHA ? "" : "~",
spi->max_speed_hz);
--- ---- BUG_ON(spi->chip_select >= MAX_CHIP_SELECT);
--- ----
--- ---- /* Set speed to the spi max fequency if spi device has not set */
--- ---- spi->max_speed_hz = spi->max_speed_hz ? : tspi->spi_max_frequency;
ret = pm_runtime_get_sync(tspi->dev);
if (ret < 0) {
dev_err(tspi->dev, "pm runtime failed, e = %d\n", ret);
return IRQ_WAKE_THREAD;
}
--- ----static void tegra_slink_parse_dt(struct tegra_slink_data *tspi)
--- ----{
--- ---- struct device_node *np = tspi->dev->of_node;
--- ----
--- ---- if (of_property_read_u32(np, "spi-max-frequency",
--- ---- &tspi->spi_max_frequency))
--- ---- tspi->spi_max_frequency = 25000000; /* 25MHz */
--- ----}
--- ----
static const struct tegra_slink_chip_data tegra30_spi_cdata = {
.cs_hold_time = true,
};
master->unprepare_message = tegra_slink_unprepare_message;
master->auto_runtime_pm = true;
master->num_chipselect = MAX_CHIP_SELECT;
-------- master->bus_num = -1;
platform_set_drvdata(pdev, master);
tspi = spi_master_get_devdata(master);
tspi->chip_data = cdata;
spin_lock_init(&tspi->lock);
--- ---- tegra_slink_parse_dt(tspi);
+++ ++++ if (of_property_read_u32(tspi->dev->of_node, "spi-max-frequency",
+++ ++++ &master->max_speed_hz))
+++ ++++ master->max_speed_hz = 25000000; /* 25MHz */
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!r) {